# CompactPCl® Serial # Specification # Short Form Specification # PICMG® CPCI-S.0 R1.0, Ratified March 2, 2011 FOR INFORMATION ONLY: DO NOT ATTEMPT TO DESIGN FROM THIS DOCUMENT ![PICMG®](.cpci-s-0-r1-0-short-form-spec-2018/8164d8792283df60d2c1e7d5ae607a18cda1121ba5acb4cc5326ff934fed2e9e.jpg) Open Modular Computing Specifications © Copyright 2011, 2017, 2018 PCI Industrial Computer Manufacturers Group. The attention of adopters is directed to the possibility that compliance with or adoption of PICMG® specifications may require use of an invention covered by patent rights. PICMG® shall not be responsible for identifying patents for which a license may be required by any PICMG® specification or for conducting legal inquiries into the legal validity or scope of those patents that are brought to its attention. PICMG® specifications are prospective and advisory only. Prospective users are responsible for protecting themselves against liability for infringement of patents. # NOTICE: The information contained in this document is subject to change without notice. The material in this document details a PICMG® specification in accordance with the license and notices set forth on this page. This document does not represent a commitment to implement any portion of this specification in any company's products. WHILE THE INFORMATION IN THIS PUBLICATION IS BELIEVED TO BE ACCURATE, PICMG® MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL INCLUDING, BUT NOT LIMITED TO, ANY WARRANTY OF TITLE OR OWNERSHIP, IMPLIED WARRANTY OF MERCHANTABILITY OR WARRANTY OF FITNESS FOR PARTICULAR PURPOSE OR USE. In no event shall PICMG® be liable for errors contained herein or for indirect, incidental, special, consequential, reliance or cover damages, including loss of profits, revenue, data or use, incurred by any user or any third party. Compliance with this specification does not absolve manufacturers of equipment from the requirements of safety and regulatory agencies (UL, CSA, FCC, IEC, etc.). # IMPORTANT NOTICE: This document includes references to specifications, standards or other material not created by PICMG. Such referenced materials will typically have been created by organizations that operate under IPR policies with terms that vary widely, and under process controls with varying degrees of strictness and efficacy. PICMG has not made any enquiry into the nature or effectiveness of any such policies, processes or controls, and therefore ANY USE OF REFERENCED MATERIALS IS ENTIRELY AT THE RISK OF THE USER. Users should therefore make such investigations regarding referenced materials, and the organizations that have created them, as they deem appropriate. PICMG®, CompactPCI®, AdvancedTCA® ,ATCA®, CompactPCI® Express, COM Express®, SHB Express®, and the PICMG, CompactPCI Serial, cPCI Serial Space, AdvancedTCA, µTCA and ATCA logos are registered trademarks, and MicroTCA™, xTCA™, AdvancedMC™, IRTM™ and the IRTM logo are trademarks of the PCI Industrial Computer Manufacturers Group. All other brand or product names may be trademarks or registered trademarks of their respective holders. # Table of Contents # 1 Objective 1 1.1 Identification. # 2 General . 2 2.1 Overview.. 2 2.2 CompactPCI® System Architecture. 2.3 Architecture Extension by CompactPCI® Serial .. 3 2.4 Migration from CompactPCI® to CompactPCI® Serial. 3 # 3 Mechanical Requirements ..... 5 3.1 General.. 5 3.2 3U Mechanical Overview . .5 3.3 6U Mechanical Overview . .6 3.3.1 6U Split-Backplane Example . 3.3.2 6U Monolithic Backplane Example 9 3.3.3 6U User-Defined Backplane Example . .10 3.4 Connectors . .11 3.4.1 Connector Types and Reference Designation . .11 3.4.2 Front Board Connector Types and Reference Designation .11 3.4.3 Rear Board Connector Types and Reference Designation. .14 3.5 Mezzanine Concept .. .16 3.5.1 General.. .16 3.5.2 Backplane Guide Element . 18 3.5.3 6U Backplane Guidance Rail. 18 3.6 Conductive Cooled Assembly (CCA) . . 19 # 4 Electrical Requirements..... 21 4.1 Power Infrastructure.. .21 4.1.1 Backplane Power Distribution. .21 4.1.2 Geographical Addressing.. .21 4.2 3U Hybrid System Geographical Addressing. .22 # List of Figures Figure 1 CompactPCI® System Architecture .. 2 Figure 2 CompactPCI® Serial Architecture .. 3 Figure 3 CompactPCI® PlusIO Architecture 3 Figure 4 Mechanical Overview 3U Example.. 5 Figure 5 Mechanical Overview 6U Example (Split-Backplane / Front view) . 6 Figure 6 Backplane Example Drawings of 3U vs. 6U Variants... Figure 7 Mechanical Overview 6U Example (Split-Backplane / Side view) . 8 Figure 8 Mechanical Overview 6U Example (Monolithic Backplane). 9 Figure 9 Mechanical Overview 6U Example (User-Defined Backplane). 10 Figure 10 3U Connector Plug Types A, B, C and D on Front Boards. 12 Figure 11 6U Connector Plug Types A, B, C and D on Front Boards. 13 Figure 12 Connector Plug Types H and G on Rear Boards 14 Figure 13 3U Mezzanine Concept.. 16 Figure 14 6U Mezzanine Concept. 17 Figure 15 Guide Element Overview... 18 Figure 16 Front Board Cassette . 19 Figure 17 CCA Enclosure.. 20 Figure 18 3U Hybrid System 22 # 1 Objective NOTE: Section, Table and Figure numbers in this Short Form Specification are likely to be different from those in the full specification. # 1.1 Identification This specification defines a modular computer system, consisting of - A backplane - A system slot - Up to 24 peripheral boards. CompactPCI® Serial defines the support of PCI Express, SATA/SAS, USB and Ethernet, concurrently. PCI Express, SATA/SAS and USB are arranged as a simple star architecture. Ethernet is a full mesh. Switch boards are not required and therefore not described. To support the high-speed serial interfaces a connector is introduced which is compatible with IEEE 1101. The mechanical design is fully backward compatible to CompactPCI® and will interoperate with existing systems. This specification allows the implementation of hybrid backplanes: CompactPCI® Serial with CompactPCI®, CompactPCI® PlusIO and/or with CompactPCI® Express. 3U and 6U boards are supported with the main focus being on 3U. For 3U a new conductive cooling mechanical concept is introduced which allows to use all boards in a conductive cooled environment as well. # 2 General # 2.1 Overview CompactPCI® is a well-established industrial specification for modular computers. The IEEE 1101 compliant mechanics are robust and proven in use. The electrical interface is based on the parallel PCI bus. This technology will successively be replaced by serial, high speed, point-topoint connections. CompactPCI® Serial uses the mechanical concept of CompactPCI® and uses serial interconnect technology. CompactPCI® Serial does not need special infrastructure hardware. The migration from CompactPCI® to CompactPCI® Serial is made rather simple by using hybrid systems. Even for these, no dedicated switch or bridge boards are required because of specifications like PICMG 2.30. PICMG 2.30 brings a limited number of serial interconnects to the backplane so that modern peripheral cards can be inserted into legacy CompactPCI® systems. All mechanics are compatible to IEEE 1101. # 2.2 CompactPCI® System Architecture Figure 1 CompactPCI® System Architecture ![The diagram features a large yellow rectangular block at the top labeled **'Backplane'** with the subtext **'32- / 64-Bit PCI'**. To the right of the Backplane, four text labels have arrows pointing left into the block, indicating power inputs: * **'+12 Volts'** * **'+5 Volts'** * **'+3.3 Volts'** * **'-12 Volts'** Below the Backplane is a row of eight light blue rectangular blocks connected vertically to the bottom edge of the Backplane via gray connector bars. From left to right, these blocks are labeled: * **'System Slot'** * **'Per. Slot 1'** * **'Per. Slot 2'** * **'Per. Slot 3'** * **'Per. Slot 4'** * **'Per. Slot 5'** * **'Per. Slot 6'** * **'Per. Slot 7'**](.cpci-s-0-r1-0-short-form-spec-2018/7b110cd290751a15fcbafa596af62bb642790c1f2ac26c8c9daa56a658a23aa7.jpg) The mechanics of CompactPCI® are fully compliant to IEEE 1101. Legacy PCI bus architecture is based on parallel buses to connect typical peripheral devices. The parallel bus limits the throughput. Low-performance devices influence and reduce the bandwidth of demanding applications. A passive backplane is used to connect a system slot to up to seven peripheral slots. There are several standard backplanes on the market with different numbers of slots. Some of them support rear I/O, some 64-bit operation. The system slot carries some special functions like clock generation or bus arbitration. Because of those single points of failure, it is common practice for mission critical systems to have two more CompactPCI® backplanes in one 19” rack. Usually Ethernet is used for interprocessor communication. Four different voltages are defined to supply a CompactPCI® PICMG 2.0 compliant system. # 2.3 Architecture Extension by CompactPCI® Serial Figure 2 CompactPCI® Serial Architecture ![This diagram depicts a 'Backplane' system architecture. **Top Component:** A large yellow rectangular block labeled 'Backplane' sits at the top. Inside this block, the text is distributed as follows: * Left side: '6 x PCIe x 4' and '8 x USB2/3' * Center: 'Backplane', '2x PCIe x8', and '8 x BaseT Mesh' * Right side: '8 x SATA' * An arrow on the far right points into the block, labeled '+12 Volts'. **Bottom Components:** Nine blue rectangular blocks are arranged in a row below the Backplane, connected individually by grey vertical pillars. From left to right, they are labeled: 1. 'System Slot' 2. 'Per. Slot 1' 3. 'Per. Slot 2' 4. 'Per. Slot 3' 5. 'Per. Slot 4' 6. 'Per. Slot 5' 7. 'Per. Slot 6' 8. 'Per. Slot 7' 9. 'Per. Slot 8'](.cpci-s-0-r1-0-short-form-spec-2018/6ee40051fb38c17a9db6f3d0b899649874f1e4b20923e829193266d8318681cc.jpg) CompactPCI® Serial uses all the mechanics of CompactPCI®. The specification is compliant to IEEE 1101. Just the 2-mm hard metric connector is replaced by a more modern higher-density connector which is able to support differential signals of 10 Gb/s and even more. Like in CompactPCI® the backplane is fully passive. Supply voltage within a 3U system is 12 Volts only and additional 48 Volts are supplied within a 6U system, which can be used for Power-Over-Ethernet applications. Like in CompactPCI® there is a dedicated system slot which provides the system with some minimal central infrastructure functions like reset and clock supply. This means that the smallest possible CompactPCI® Serial system consists of just one single slot, the system slot. Peripheral slots are connected by modern serial, high speed, point-to-point connections as in MicroTCA, but requiring no switch or hub. Instead, a full star architecture is realized on the backplane for PCI Express, SATA and USB. For Ethernet a full mesh network is implemented on the backplane. A system slot board can be used in a peripheral slot as well to do multiprocessing. The easiest way to communicate in this case is via Ethernet. Ethernet uses cable standards xxBase-T instead of dedicated backplane standards. This lowers the cost, guarantees better interoperability and offers currently up to 10 Gb/s data throughput. Rear I/O is also supported like in CompactPCI® systems but many more pins are available and higher speed is supported. CompactPCI® Serial uses the robust mechanics of CompactPCI®, the modern serial interconnects but does not need dedicated infrastructure boards. CompactPCI® Serial is designed for harsh environments and cost-critical applications demanding high throughput and reliability. # 2.4 Migration from CompactPCI® to CompactPCI® Serial Figure 3 CompactPCI® PlusIO Architecture ![The image displays a block diagram of a 'Backplane' system architecture. **Top Block:** A large yellow rectangle labeled **'Backplane'** at the top center. Inside the block, the text is arranged as follows: * Left side: **'32- PCI'** * Right side (top line): **'4 x PCIe x 1'** and **'4 x SATA'** * Right side (bottom line): **'4 x USB2'** and **'2 x BaseT Mesh'** To the right of the Backplane block, four arrows point right towards voltage labels: * **'+12 Volts'** * **'+5 Volts'** * **'+3.3 Volts'** * **'-12 Volts'** **Bottom Blocks (Slots):** Below the Backplane is a row of rectangular blocks connected by vertical grey blocks. From left to right: 1. **Left Section (Light Blue Blocks):** * A block labeled **'Per.'**, **'Slot'**, **'7'**. It connects to the backplane via a solid grey block. A dashed line connects this block to the next one. * A block labeled **'Per.'**, **'Slot'**, **'2'**. It connects to the backplane via a solid grey block. * A block labeled **'Per.'**, **'Slot'**, **'1'**. It connects to the backplane via a solid grey block. 2. **Middle Section (Yellow Block):** * A block labeled **'System Slot'**. It connects to the backplane via a solid grey block. 3. **Right Section (Blue Blocks):** * A block labeled **'Per.'**, **'Slot'**, **'1'**. It connects to the backplane via a grey block with a dotted outline. * A block labeled **'Per.'**, **'Slot'**, **'2'**. It connects to the backplane via a grey block with a dotted outline. * A block labeled **'Per.'**, **'Slot'**, **'3'**. It connects to the backplane via a solid grey block. * A block labeled **'Per.'**, **'Slot'**, **'4'**. It connects to the backplane via a grey block with a dotted outline.](.cpci-s-0-r1-0-short-form-spec-2018/5c51ca079daf852caa886e93efd0bf8fdc956b6eeb005572d5d583aae91374f2.jpg) PICMG 2.30, so-called CompactPCI® PlusIO, defines the usage of connector J2 in legacy CompactPCI® systems in a way to bring some of the high speed serial interconnects to the backplane. A CompactPCI® system slot which is compliant to PICMG 2.30 can control up to seven 32-bit legacy CompactPCI® peripheral boards as well as up to four CompactPCI® Serial peripheral boards with limited functionality. This can easily be realized by means of a hybrid backplane carrying legacy boards as well as CompactPCI® Serial boards because the two specifications, PICMG 2.0 and PICMG CPCI-S.0, are IEEE 1101 compliant. # 3 Mechanical Requirements # 3.1 General All dimensions that do not have explicit tolerances within a requirement and/or within technical drawings are for information only. Tolerances of these dimensions are X.XX ±0.10 mm and X.X ±0.10 mm. All dimensions that are not explicitly mentioned within a requirement but shown within a technical drawing are recommended only. # 3.2 3U Mechanical Overview A system based on CompactPCI® Serial consists of the same components as a legacy CompactPCI® system. Within this specification 3U systems as well as 6U systems are defined. A passive backplane is used to connect all front and rear boards. Every board is supplied with a front and rear panel. A handle (two handles for 6U) allows the user to plug-in and to remove a board from a rack. A maximum of six discrete connectors forms a slot and the amount of used connectors can vary depending on the application. Thereby maximum scalability and costeffectiveness is achieved. Figure 4 shows an example of a nine-slot 3U system. In this example the maximum amount of connectors on the backplane are assembled, to offer maximum connectivity. Figure 4 Mechanical Overview 3U Example ![Top Rear Board Rear Panel REAR IEEE Handle Front Panel Front Board 3U Backplane Bottom IEEE Handle](.cpci-s-0-r1-0-short-form-spec-2018/7a0a8c96d63257e9862b065049fd1482119d766c6675ec368f42aa8f7bb43c21.jpg) # 3.3 6U Mechanical Overview Front and rear boards are defined for the 6U form factor. Compared to a 3U system one extra connector (J0/P0) is defined. This connector offers extra power (that will be needed in a 6U system) and also two further Ethernet connections, which can be used for system management (e.g. AMT). The backplane can be monolithic or split. Furthermore, it is possible to define a user backplane which is a mixture of both (see Figure 6). Figure 5 Mechanical Overview 6U Example (Split-Backplane / Front view) ![REAR 6U Backplane Rear Panel FRONT FRONT Panel](.cpci-s-0-r1-0-short-form-spec-2018/1f9ba4dfcb8d88b49796a5cf113871b461a537b2a7c2c045eea552aa5698e1a1.jpg) Figure 6 Backplane Example Drawings of 3U vs. 6U Variants ![3U – Backplane 6U – Split - Backplane Zone 0 Optional User Connector Area e.g. - CPCI Connectors - User Connectors](.cpci-s-0-r1-0-short-form-spec-2018/e0972df1a8e7c83990a9075148ee2a1fa9a4ee13f26736d5d9710775d0ac2c2c.jpg) ![6U – Monolithic - Backplane 6U – User - Defined - Backplane e.g. - CPCI Connectors - User Connectors 6U CPCI Area 3U CPCI Area Zone0 Area Area for direct rear IO](.cpci-s-0-r1-0-short-form-spec-2018/59b680b13154277139f20b61a03103662f959a614fb32a09bf3824928502b2ba.jpg) Comment: The number of slots as well as the number of connectors is not specified within this specification. This figure is only an example. # 3.3.1 6U Split-Backplane Example Figure 5 shows an example of a five-slot 6U split-backplane system. In this example also the maximum amount of I/O connectors on the backplane are assembled, to offer maximum connectivity. Furthermore it is possible to place optional connectors within a “User IO Connector Area”, to connect front and rear board signals. In this case there is a direct user connection without backplane. Figure 7 Mechanical Overview 6U Example (Split-Backplane / Side view) ![Front Board Rear Board USER IO Connectors e.g. IEC 60603-2-C096](.cpci-s-0-r1-0-short-form-spec-2018/1727d565be5b5454257db54396a6655f2bd8c9b7a59cf6344567ba201091eb07.jpg) # 3.3.2 6U Monolithic Backplane Example Figure 8 shows an example of a five-slot 6U monolithic backplane system. In this example also the maximum amount of I/O connectors on the backplane are assembled, to offer maximum connectivity. Furthermore it is possible to place optional connectors within a “User IO Connector Area”, to connect front and rear board signals, or to build a user-defined interconnection between the 6U boards. It is also possible to place CompactPCI® J1/J2 connectors to build up a hybrid system. Figure 8 Mechanical Overview 6U Example (Monolithic Backplane) ![3D technical diagram of a modular storage or rack system with layered components and structural elements (no text or symbols)](.cpci-s-0-r1-0-short-form-spec-2018/a73814f96f819cfa7aee1b9ab511584c38c10b629f77d45da5453d918d5ad759.jpg) # 3.3.3 6U User-Defined Backplane Example It is possible to mix both variants described in chapter 3.3.1 (6U Split-Backplane Example) and chapter 3.3.2 (6U Monolithic Backplane Example). Figure 9 shows such a backplane. Figure 9 Mechanical Overview 6U Example (User-Defined Backplane) ![3D architectural rendering of a green structural frame with grid patterns and embedded components (no text or symbols)](.cpci-s-0-r1-0-short-form-spec-2018/1797cb6af1dc41d5333577774398d308c8db6d2a1d502f22680f336fb8ab69a7.jpg) # 3.4 Connectors # 3.4.1 Connector Types and Reference Designation Connectors used for CompactPCI® Serial are optimized for high-speed differential signal transmission. Shielding and impedance control is maintained through the connectors. The connector is arranged in rows with 12 pins each. 12 pins are sufficient for 4 high speed signal pairs. 4 pins in a row are required for ground. However the pins within the connector are not specialized. So a pin can be used for signals (differential or single ended), for ground, as well as for the supply voltage. For front boards receptacle connectors are used on the backplane, and right angle headers are used on the plug-in boards. On rear boards it is the converse. All connector types are designed for press-fit mounting. The press-in pin length in the PCB is just 1.6 mm to minimize the stub lengths thereby enhancing the signal integrity. To realize rear I/O, a plug connector is pressed on to the back of the backplane. This mirrors the pin assignment from the front to the back side. There are 10 different types of connector specified. Table 1 Connector Types
Connector TypeRowsPins/RowTypeLocation
A612PlugFront board
B812PlugFront board
C612PlugFront board
D812PlugFront board
E612ReceptacleBackplane
F812ReceptacleBackplane
G812ReceptacleRear board
H612ReceptacleRear board
I812PlugRear backplane
J612PlugRear backplane
# 3.4.2 Front Board Connector Types and Reference Designation To connect the front boards to the backplane, four different plug types of the same connector family are used. Table 2 Front Board Connector Types
DesignatorTypeNumber of RowsNumber of WallsUsage
P0A64Optional
P1A64Mandatory
P2B82Optional
P3B82Optional
P4B82Optional
P5C62Optional
P6D84Optional
Figure 10 3U Connector Plug Types A, B, C and D on Front Boards ![CompactPCI®Serial 3U Front Board P6 Type D P5 Type C P4 Type B P3 Type B P2 Type B P1 Type A](.cpci-s-0-r1-0-short-form-spec-2018/55c2a71d276a7f63ff6932a2d5da71b88341f781fc787bcd4ef364ca1d678dbb.jpg) Figure 11 6U Connector Plug Types A, B, C and D on Front Boards ![CompactPCI®Serial 6U Front Board](.cpci-s-0-r1-0-short-form-spec-2018/30c8a34ddcce71141b27f787c192d2f6c807e892a60e12dd68d90926ed4624c4.jpg) On the backplane there are just 2 different types of receptacles, type E – a six row version and type F – an eight row version. The six row receptacle connects to all type A as well as to type C plugs. The eight row receptacle connects to all type B as well as to type D plugs. Table 3 Backplane Connector Types
DesignatorTypeNumber of RowsUsage
J0E6Optional
J1E6Mandatory
J2F8Optional
J3F8Optional
J4F8Optional
J5E6Optional
J6F8Optional
# 3.4.3 Rear Board Connector Types and Reference Designation To connect the rear boards to the backplane, two different receptacle types of the same connector family are used. Table 4 Rear Board Connector Types
DesignatorTypeNumber of RowsNumber of WallsUsage
rJ2H62Optional
rJ3G82Optional
rJ4G82Optional
rJ5H62Optional
Figure 12 Connector Plug Types H and G on Rear Boards ![CompactPCI®Serial 3U Rear Board Type H rJ5 Type G rJ4 Type G rJ3 Type H rJ2](.cpci-s-0-r1-0-short-form-spec-2018/00caf2f361c4c5d0341039a77cd844e550e463d51ee161d789e8c5522e82617a.jpg) Table 5 Rear Backplane Connector Types
DesignatorTypeNumber of RowsUsage
rP2J6Optional
rP3I8Optional
rP4I8Optional
rP5J6Optional
# 3.5 Mezzanine Concept # 3.5.1 General Implementation of the Ethernet connection of a system board can be done with a mezzanine board. Due to this concept more flexibility will be achieved, because the usage of Ethernet does not depend on the system board itself. Furthermore different mezzanine boards can offer a different number of Ethernet connections, thereby obtaining maximum scalability. If this concept is implemented, the CompactPCI® Serial system board becomes a mezzanine host and the mezzanine board can be plugged onto this host. The connector P6 is then placed on the mezzanine board and a cut-out on the mezzanine host is provided. Only the interconnection between the mezzanine host to the CompactPCI® Serial backplane will be specified within this specification. As shown in Figure 13 and Figure 14 the mezzanine concept can be implemented within a 3U and a 6U system. Figure 13 3U Mezzanine Concept ![Diagram of a device with green and yellow casing, showing internal components and a black triangular base (no text or symbols)](.cpci-s-0-r1-0-short-form-spec-2018/71634c52b0129bf9e691592b5bd79172e5fbb14df19a32afab8f95c2baea4f6b.jpg) Figure 14 6U Mezzanine Concept ![Diagram of a computer monitor layout with green and yellow panels, no text or symbols present](.cpci-s-0-r1-0-short-form-spec-2018/e4ba6857fbd3b0ae6c9df246fe6b1412e0a2fe738ccd3f6eee886f045440bf3f.jpg) # 3.5.2 Backplane Guide Element Figure 15 Guide Element Overview ![3U CompactPCI Serial Backplane Guide Element 3U CompactPCI Serial Front Board](.cpci-s-0-r1-0-short-form-spec-2018/ed2783c54485091f8c0518c88e6196e2b1d616b6284002f5050b4e8dd0a3161f.jpg) # 3.5.3 6U Backplane Guidance Rail To guarantee best fitting of the 6U board connectors into the 6U backplane connectors, also if a board will be plugged in harsh environments, a guidance rail on the backplane is defined. # 3.6 Conductive Cooled Assembly (CCA) Figure 16 Front Board Cassette ![This image is a technical engineering drawing displaying multiple orthographic projections and cross-sections of a mechanical assembly. **Top Left (Section B-B):** Labeled 'B-B ( 1 : 1)', this view shows a cross-section with horizontal dimension 99.00 and vertical dimensions 5.80, 1.80, and 9.15. Text labels indicate 'Top of PCB', '14.50 MAX. FRAME HEIGHT SIDE 1', and two 'Interboard Separation Plane' markers. A vertical note reads '5 HP (25.40)'. To the right, general notes state 'ALL DIMENSIONS IN MILLIMETERS' and 'UNTOLERANCED DIMENSIONS TOLERANCES: X.XX ±0.10mm'. **Center View:** A front view of the assembly features a large central orange rectangle flanked by vertical blue bars. At the top, six grey rectangular blocks are labeled P1, P2, P3, P4, P5, and P6. Horizontal dimensions are '122.00 +0 -0.3' and '(100.00)'. Vertical dimensions are '140.00' and '162.54'. Section lines labeled A, B, and D are marked on the perimeter. **Right Side (Section A-A):** Labeled 'A-A ( 1 : 1)', this is a side elevation view. It includes dimensions '2.54', 'PCB Length 160.00 +0 -0.3', and 'PCB Thickness 1.60 ± 0.2'. A label points to the 'TOP of PCB'. **Bottom Left:** A side view lists components with leader lines: 'Card Retainer 1', 'Ejector 1', '3U CPCI/Serial Board', '3U CCA-Side 2 Plate', 'Ejector 2', 'Card Retainer 2', and '3U CCA-Frame'. Horizontal dimensions are 5.10, 102.00, and 108.00. Rotated text reads 'M2.5x0.45 (2x) Optional Front Panel Fixing Positions'. **Bottom Right (Section D-D):** Labeled 'D-D ( 2 : 1)', this detailed cross-section shows dimensions '(7.00)', '15.30 Card Retainer Expanded', and '13.80 Card Retainer Relaxed'.](.cpci-s-0-r1-0-short-form-spec-2018/1ae06d66cb76a6debd594b8cb3d696a590d7aa70a9e3718fec888346b957e907.jpg) Figure 17 CCA Enclosure ![The image is a technical engineering drawing titled 'CompactPCI® Serial' and '3U CCA-Enclosure Specification'. It features four main visual sections: 1. **Top Left:** A 3D isometric rendering of the enclosure, showing a grey metal chassis containing a large orange component (likely a PCB or heatsink) and gold connector fingers. 2. **Bottom Left:** Wireframe line drawings of enclosure parts. A callout points to a finned component with the text: 'ENCLOSURE SIDEWALLS Used for Thermal Convection Design may include Cooling Fins'. 3. **Top Right:** A cross-sectional view labeled 'A-A (1 : 1)'. It includes labels 'BACKPLANE POSITION' and 'Card Retainer Channel'. Dimensions listed include '14.40', '11.00', '14.40', '143.00', '175.54', '8.00', '2.50', 'R1.50', 'R2.00', '4.20', and '6.00'. 4. **Bottom Right:** A 2D view showing 'M2.5 Optional Frontpanel Fixings Positions' and 'TOP of PCB'. Dimensions include '115.60', '11.85', '25.40', '5.80', '18.60', '14.40', and 'SHP' with '25.40'. Vertical dimensions on the right read '109.00 +0.3 -0' and '123.00 +0.3 -0 Card Retainer Channel'. A text block in the bottom right corner states: 'ALL DIMENSIONS IN MILLIMETER' and 'UNTOLERANCED DIMENSIONS TOLERANCES: X.XX ±0.10mm'.](.cpci-s-0-r1-0-short-form-spec-2018/1d6cd4f8f04f826252cc00f10a6424fb11ce344db620d39bfb839fc3063a9159.jpg) # 4 Electrical Requirements # 4.1 Power Infrastructure # 4.1.1 Backplane Power Distribution CompactPCI® Serial relies on a single rail +12V main power supply. +5V standby is optionally available. -48V optional voltage is available within a 6U system only. The backplane distributes the supply voltages to the front boards. Rear boards are indirectly supplied by the corresponding front board. Neither the power supply itself nor the connecting of the power supply to the backplane is a part of this specification. Redundancy concepts for power supplies are also not specified. Hot-swap is optional and is specified. On the one hand there are requirements for the power supply to handle the peak current as a board is plugged, on the other hand there are requirements for the boards to limit this current. The basic concept utilizes a switch within the handle to signal that a board will be removed. If the board is ready to be drawn-out, an optical signal gives an acknowledgement. Depending on the board an interaction with the hot-plug controller might be required which is located at the system slot. # 4.1.2 Geographical Addressing Comment: Due to the fact that within CPCI-S.0 each physical SATA port always needs the same geographic address (because of SGPIO), geographical addresses do not follow the physical slot numbers, but the SATA filling order. Comment: A 25-slot system is the maximum supported by this specification. Table 6 Physical Slot Addresses
Physical Slot Number in a 25 Slot SystemPhysical Slot Number in a 9 Slot SystemPhysical Slot Number in a 5 Slot SystemGA[3]GA[2]GA[1]GA[0]
2595GNDGNDGNDGND
2484GNDGNDGNDOpen
2373GNDGNDOpenGND
2262GNDGNDOpenOpen
215n/aGNDOpenGNDGND
204n/aGNDOpenGNDOpen
193n/aGNDOpenOpenGND
182n/aGNDOpenOpenOpen
17n/an/aOpenGNDGNDGND
16n/an/aOpenGNDGNDOpen
15n/an/aOpenGNDOpenGND
14n/an/aOpenGNDOpenOpen
13n/an/aOpenOpenGNDGND
12n/an/aOpenOpenGNDOpen
11n/an/aOpenOpenOpenGND
10n/an/aOpenOpenOpenOpen
9n/an/aPulledGNDGNDGND
8n/an/aPulledGNDGNDOpen
7n/an/aPulledGNDOpenGND
6n/an/aPulledGNDOpenOpen
5n/an/aPulledOpenGNDGND
4n/an/aPulledOpenGNDOpen
3n/an/aPulledOpenOpenGND
2n/an/aPulledOpenOpenOpen
1 (system slot)1 (system slot)1 (system slot)----
# 4.2 3U Hybrid System Geographical Addressing Tt is possible to build a hybrid system with a CompactPCI® PlusIO system card on the one side and up to four CPCI-S.0 peripheral cards on the other side. The physical slot number and its physical slot address defined by GA[3:0] are compliant to chapter 4.1.2. Figure 18 3U Hybrid System ![ Category Periph Type Value -------- ----------- ----- PICMG2.0 4P2 100 PICMG2.0 3P2 100 PICMG2.0 2P2 100 PICMG2.0 1P1 100 PICMG2.3 5J1 50 PICMG2.3 6J2 50 PICMG2.3 7J3 50 PICMG2.3 8J4 50 ](.cpci-s-0-r1-0-short-form-spec-2018/6bb595fe4eafca8d99d35b638b9752df4550db2559ad77e51a03a587f910138d.jpg) [🔗 Link to the original document](.cpci-s-0-r1-0-short-form-spec-2018/cpci-s-0-r1-0-short-form-spec-2018.pdf)