# LEC-MTK-I1200

SMARC 2.1 Short Size Module with

MediaTek MediaTek MT8195 SoC

![Close-up of a blue printed circuit board with various electronic components and connectors (no readable text or symbols)](.20260421-6687898c-db1/c92bc396e4e7fe04c1b49b195d52fb321ba9b5211f9d59d4721840ec47635e7f.jpg)

# Features

• 8-core Arm Cortex -A78 x4 + Cortex-A55 x4
• 5 TOPS APU
• SMARC revision 2.1.1 compliant
• Up to 8GB LPDDR4X
• DSI up to 1080P
• HDMI up to 4K/60Hz

1x onboard UFS up to 256 GB
Dual GbE Ethernet ports
3x CSI interfaces
USB3/USB2 interfaces
10 year product availability

Specifications

<table><tr><td rowspan="4">Processor &amp; System</td><td>CPU</td><td>MT8195 Octa-core CPU: 4x A78 @ 2.2GHz + 4x A55 @ 2.0GHz</td></tr><tr><td>Memory</td><td>4 or 8 GB LPDDR4X</td></tr><tr><td>Cache</td><td>256KB L2 per CPU core (2MB unified L3)</td></tr><tr><td>Security</td><td>TPM 2.0 module</td></tr><tr><td rowspan="5">Video</td><td>GPU Core</td><td>Five-core Arm Mali-G57 GPU – Dual 4K @ 60 fps</td></tr><tr><td>GPU Feature Support</td><td>3D graphic accelerator capable of processing 17600M pixel/sec @ 880MHzSupport for OpenGL ES 3.2/2.0/1.1, Vulkan 1.1/1.0, OpenCL 2.2</td></tr><tr><td>HDMI/DP</td><td>HDMI 2.0b 4K @ 60Hz or DisplayPort</td></tr><tr><td>eDP</td><td>4 Lane eDP</td></tr><tr><td>DSI</td><td>2x 4 Lane DSI, maximum resolution 4K p60 with 24-bit RGB</td></tr></table>

Note: “Build option””indicates an alternative BOM configuration to support additional or alternative functions that are not available on the standard product. Be aware that these “build option” part numbers will need to be newly created and this will result in production lead times.

Specifications

<table><tr><td>Camera</td><td>CSI</td><td>3x MIPI CS, 1x 2Lane, 2x 4 lane</td></tr><tr><td rowspan="3">System Storage</td><td>SDIO</td><td>1x SDIO (4-bit) compatible with SD/SDIO standard, up to version 3.0</td></tr><tr><td>UFS</td><td>32, 64, 128, or 256 GB (build option)</td></tr><tr><td></td><td>Compatible with UFS gear 2.1</td></tr><tr><td>Debug Header</td><td></td><td>30-pin multipurpose flat cable connector for use with optional DB-30 debug module. Provides JTAG, UART, boot select</td></tr><tr><td>Audio</td><td>Audio Codec</td><td>I2S audio codec located on the carrier</td></tr><tr><td rowspan="2">Dual Ethernet</td><td>Primary LAN</td><td>10/100/1000 Gbps Ethernet</td></tr><tr><td>Secondary LAN</td><td>10/100/1000 Gbps Ethernet</td></tr><tr><td rowspan="2">Wireless</td><td>Wi-Fi</td><td>IEEE 802.11 2X2 MU-MIMO ac/a/b/g/n</td></tr><tr><td>Bluetooth</td><td>Bluetooth 5.0</td></tr><tr><td rowspan="8">Extension Busses</td><td>USB</td><td>2x USB 3.0, 4x USB 2.0</td></tr><tr><td>UART</td><td>Three UART interfaces: SER1 and SER 3 (CTS/RTS), and SER0 (TX/RX/CTS/RTS)</td></tr><tr><td>CAN</td><td>1x CAN2.0B only or mixed CAN2.0B data bit rate up to 8Mbps</td></tr><tr><td>SPI</td><td>2x SPI</td></tr><tr><td>I2S</td><td>1x I2S interface with audio resolution from 16-bits to 32-bits and sample rate up to 192kHz (see Audio Codec support)</td></tr><tr><td>I2C</td><td>4x I2C interfaces</td></tr><tr><td>GPIO</td><td>14x GPIO with interrupt, one GPIO with PWM</td></tr><tr><td>PCIe</td><td>1x PCIe x2 Gen3, 1x PCIe Gen 2</td></tr><tr><td>Power</td><td>Input</td><td>5Vdc +/- 5%</td></tr><tr><td colspan="2">Mechanical and Environmental Form Factor</td><td>SGET SMARC Specifications 2.1.1</td></tr><tr><td rowspan="7"></td><td>Dimension</td><td>SMARC short size module 82 mm x 50 mm</td></tr><tr><td>Operating Temperature</td><td>Standard: 0°C to 60°C</td></tr><tr><td></td><td>Rugged: -40°C to 85°C (optional)</td></tr><tr><td>Humidity</td><td>5-90% RH operating, non-condensing</td></tr><tr><td></td><td>5-95% RH storage (and operating with conformal coating)</td></tr><tr><td>Shock and Vibration</td><td>IEC 60068-2-64 and IEC-60068-2-27, MIL-STD-202 F, Method 213B, Table 213-I, Condition A and Method 214A, Table 214-I, Condition D</td></tr><tr><td>HALT</td><td>Thermal Stress, Vibration Stress, Thermal Shock and Combined Test</td></tr><tr><td>Operating Systems</td><td>Standard Support</td><td>Canonical Ubuntu, Yocto Linux</td></tr></table>

Ordering Information

<table><tr><td>Part name</td><td>Description/Configuration</td></tr><tr><td>LEC-MTK-I1200-2G-32G-CT</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 2 GB LPDDR4, 32 GB eMMC, 0°C to 60°C</td></tr><tr><td>LEC-MTK-I1200-4G-32G-CT</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 4 GB LPDDR4, 32 GB eMMC, 0°C to 60°C</td></tr><tr><td>LEC-MTK-I1200-8G-64G-CT</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 8 GB LPDDR4, 64 GB eMMC, 0°C to 60°C</td></tr><tr><td>LEC-MTK-I1200-2G-32G-ER</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 2 GB LPDDR4, 32 GB eMMC, -40°C to 85°C</td></tr><tr><td>LEC-MTK-I1200-4G-32G-ER</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 4 GB LPDDR4, 32 GB eMMC, -40°C to 85°C</td></tr><tr><td>LEC-MTK-I1200-8G-64G-ER</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 8 GB LPDDR4, 64 GB eMMC, -40°C to 85°C</td></tr><tr><td>LEC-MTK-I1200-2G-32G-BW-CT</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 2 GB LPDDR4, 32 GB eMMC, AC Wi-Fi BT 5.1, 0°C to 60°C</td></tr><tr><td>LEC-MTK-I1200-4G-32G-BW-CT</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 4 GB LPDDR4, 32 GB eMMC, AC Wi-Fi BT 5.1, 0°C to 60°C</td></tr><tr><td>LEC-MTK-I1200-8G-64G-BW-CT</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 8 GB LPDDR4, 64 GB eMMC, AC Wi-Fi BT 5.1, 0°C to 60°C</td></tr><tr><td>LEC-MTK-I1200-2G-32G-BW-ER</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 2 GB LPDDR4, 32 GB eMMC, Wi-Fi BT 5.1, -40°C to 85°C</td></tr><tr><td>LEC-MTK-I1200-4G-32G-BW-ER</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 4 GB LPDDR4, 32 GB eMMC, Wi-Fi BT 5.1, -40°C to 85°C</td></tr><tr><td>LEC-MTK-I1200-8G-64G-BW-ER</td><td>SMARC 2.1 Short Size Module with MediaTek Genio 1200 platform, 8 GB LPDDR4, 64 GB eMMC, AC Wi-Fi BT 5.1, -40°C to 85°C</td></tr></table>

# Block Diagram

![The diagram is a block diagram centered around a large pink block labeled **MT8195 4x A78, 4x A55**, which contains a smaller blue block labeled **NPU**.\n\n**Right Side Connections (External Modules):**\n*   **LPDDR4x x16 x2ch x2** (subtext: 2, 4, 8 GB SKU) connects via **EMI (0:3)** and **x16 bits x4**.\n*   **UFS** (subtext: 64, 128, 256 GB SKU Optional) connects via **UFS** and **1 Lane**.\n*   **Wifi/BT module (M.2 / 1216)** connects via **PCIe x1**, **USB 3.0/2.0**, and **UART** (via a small **USB to UART** block). Intermediate labels include **WiFi/BT** (red), **WiFi/BT** (yellow), and **WiFi/BT** (cyan).\n*   **30-pin Debug Connector** connects via **UART0**, **JTAG**, **Boot Sel**, and **2 Lane**.\n*   **Camera FPC connector** connects via **CSIO-4-lane P2** and **4 Lane**.\n*   **PMIC MT6365**, **PMIC MT6360**, and two **PMIC MT6315** blocks connect via **PMIC ADUIO**, **PWRAP_SPI**, and **SPMI_I2C**.\n\n**Left Side Connections (SMARC Interface & Peripherals):**\n*   A grey column on the far left is labeled **SMARC Gold Finger 314-pin**.\n*   **Display:**\n    *   **DP MUX 1:2** connects **DSI0/eDP0** and **eDP** / **DSI0** (4 Lane).\n    *   **HDMI/DP MUX** connects **DSI1** and **HDMI TX** / **DisplayPort** (x4 bits).\n*   **Storage/IO:**\n    *   **SDIO** connects to **MSDC1**.\n    *   **SPI0** connects to **SPI1**.\n    *   **SPI1** connects to **SPI to CAN** which connects to **CAN0**.\n    *   **SPI1** also connects to **SPI2**.\n    *   **I2S0** connects to **I2S01+I2S IN**.\n    *   **SER0**, **SER1**, **SER3** connect via **2 Wire** to **UART0** / **UART3**.\n    *   **SER2** connects via **4 Wire** to a **USB to UART** block which connects to **USB 2.0**.\n*   **USB/Ethernet:**\n    *   **USB1**, **USB0** connect to a **USB MUX** which outputs **USB 2.0** and **USB 2.0 OTG**.\n    *   **USB2**, **USB3**, **USB4**, **USB5** connect to a **USB HUB**.\n    *   The **USB HUB** connects to a **USB MUX** and outputs **USB 2.0** / **USB 3.0**.\n    *   An **Ethernet Controller** connects to **GbE1** and has a **USB 3.0** connection (arrow pointing to it).\n    *   An **Ethernet PHY** connects to **GbE0**.\n    *   **RGMII** is an input to the MT8195.\n*   **PCIe:**\n    *   **PCIe A**, **PCIe B**, **PCIe C** connect to **PCIe P0 lane0(PCIe Gen3)**, **PCIe P0 lane1(PCIe Gen3)**, and **PCIe P1(PCIe Gen2)**.\n    *   **PCIe MUX** blocks (blue) manage connections. One connects to a red **WiFi/BT** label. Another connects via a green arrow to **PCIe x1**.\n\n**Bottom Blocks:**\n*   **GPIO Expander0**, **GPIO Expander1**, **Crypto Auth.**, **TPM**, **RTC**.\n*   Connected via **GPIO**, **I2C2**, **I2C3**, **I2C0**, **I2C1**, **I2C4** from the MT8195.](.20260421-6687898c-db1/ff5d2c4e1ca980db4585266f3223a2c10ba340e47bef2f84e8d2983ce1ffa970.jpg)

Note: “Build option””indicates an alternative BOM configuration to support additional or alternative functions that are not available on the standard product. Be aware that these “build option” part numbers will need to be newly created and this will result in production lead times.
[🔗 Link to the original document](.20260421-6687898c-db1/20260421-6687898c-db1.pdf)