# VPX3-XMXM Series

# Datasheet

# 3U VPX GPGPU Blade with NVIDIA

# RTXTM 5000 / 2000 Ada Generation

# Features

NVIDIA® RTXTM 5000 Ada Generation or NVIDIA® RTX™ 2000 Ada Generation embedded graphics (with a roadmap to Blackwell architecture)
• Up to 9728 CUDA cores, 42.6 TFLOPS peak FP32 performance (RTXTM 5000 Ada SKU)
• Native PCIe Gen4 interface
• PCIe lanes configurable by PCIe switch
• 1x DisplayPort 1.4a (SKU option)
• Additional ports from SBC for expansion (SKU option): 2x USB3.2 Gen1x1, 1x USB2.0, and 1x RS-232
• VITA 46/48/65 compliant for quick deployment
• SOSA-aligned

![Close-up of a printed circuit board with integrated circuits and connectors (no visible text or symbols)](.20260617-86e6d29c-2b5/75511442c49f94af17c7e6bbfe541ab2b212d054edac60e1ce9d81a77d288570.jpg)

SOSA Sensor Open Systems Architecture

Specifications

<table><tr><td rowspan="3">Core Design</td><td>Architecture</td><td>3U VPX carrier board with one MXM slot</td></tr><tr><td>VITA standards</td><td>VITA 46/48/65 compliantSOSA-aligned</td></tr><tr><td>Slot Profile</td><td>SLT3-PAY-2F2U-14.2.3 (PCIe Upstream Port: P1A)SLT3-PAY-1F1U1S1S1U1U4F1J-14.6.13-0, P2B de-populated (PCIe Upstream Port: P1B)SLT3-PAY-1F1U1S1S1U1U2F1H-14.6.11-0, P2 fully de-populated (PCIe Upstream Port: P1B)</td></tr><tr><td rowspan="6">Connectivity</td><td>PCI Express</td><td>One PCIe Gen4 x8 to P1A, configurable as two PCIe x4 by requestOne PCIe Gen4 x8 to P1B, configurable as two PCIe x4 by requestOne PCIe Gen4 x8 to P2A (SKU option), configurable as two PCIe x4 by requestTwo of PCIe Gen4 x8 (P1B + P2A) can be configured to one PCIe x16 by request</td></tr><tr><td>Video Output</td><td>One DisplayPort 1.4a output to P2B (SKU option)</td></tr><tr><td>USB</td><td>Two USB3.2 Gen 1x1 from SBC to P2B via PCIe switch (SKU option)One USB2.0 from SBC to P2B via PCIe switch (SKU option)</td></tr><tr><td>COM</td><td>One RS-232 from SBC to P2B via PCIe switch (SKU option)</td></tr><tr><td>GPIO</td><td>Two GPIO to P2A for multi-configuration (SKU option)Two GPIO to P2A for upstream/downstream rest (SKU option)</td></tr><tr><td>Others</td><td>One maintenance port (default RS-232)One UART from PCIe switch to P1A directly for PCIe switch debug usage</td></tr></table>

Specifications

<table><tr><td>Power Requirement</td><td>Power Input</td><td>12V (VS1/VS2)3.3V_AUX only</td></tr><tr><td rowspan="2">Operating System</td><td>Windows</td><td>Windows 10/11 64-bit</td></tr><tr><td>Linux</td><td>Support by request</td></tr><tr><td rowspan="2">Miscellaneous</td><td>LED</td><td>Status LED (Appendix 1)</td></tr><tr><td>Reset Button</td><td>Board reset button on front panel</td></tr><tr><td rowspan="2">Mechanical</td><td>Form Factor</td><td>3U VPX, conduction-cooled construction, 1&quot; pitch (VITA 48.2)</td></tr><tr><td>Thermal Dissipation</td><td>Conduction-cooling by wedge locks</td></tr><tr><td rowspan="7">Environmental</td><td>Operating Temp.</td><td>-40°C to +85°C at wedge locks (VITA47.0, ECC4-CC4)</td></tr><tr><td>Storage Temp.</td><td>-55°C to +100°C</td></tr><tr><td>Vibration</td><td>Random: 12Grms, 5Hz to 2000Hz (VITA47.0, ECC4-V3)Sinusoidal: 5g, 20Hz to 2000Hz</td></tr><tr><td>Shock</td><td>40g, 11ms (VITA47.0, ECC4-OS2)</td></tr><tr><td>Relative Humidity</td><td>95% non-condensing</td></tr><tr><td>Altitude</td><td>60,000 feet. (operating)</td></tr><tr><td>EMC</td><td>CE (EN555032 / EN55035);FCC Part 15B Class A</td></tr></table>

Software Function

<table><tr><td rowspan="2">IPMI</td><td>IPMI Command</td><td>Supports IPMI V1.5 mandatory command list</td></tr><tr><td>VITA Command</td><td>Supports VITA 46.11 Tier 1 and Tier 2 mandatory command list</td></tr></table>

![The diagram illustrates a system layout centered around a red block labeled **Microchip PCIe Switch PM43052B1-F3E1 (52 lanes)**.\n\n**Central Connections:**\n*   The PCIe Switch connects to a large block on the left labeled **MXM GPU** via a connection labeled **PCIe x16**.\n*   The switch connects to a column of blocks on the right (**P0**, **P1A**, **P1B**, **P2A**) via connections labeled **PCIe x8**.\n\n**Top Logic Blocks:**\n*   A yellow block labeled **IPMC** connects to **P0** via **IPMB (I2C)** and **1x Maintenance Port**.\n*   **IPMC** also connects to a blue block labeled **MUX**.\n*   **MUX** connects to **P1A** via **1x UART (Debug)**.\n*   Lines labeled **SYSRST** and **REFCLK #1/#2** connect to **P0**.\n\n**Bottom Logic Blocks:**\n*   Green blocks labeled **USB Bridge Renesas** and **UART Bridge FTDI** are connected to each other.\n*   Lines connect from the switch area to **P2A** labeled: **2x GPIO for Multi-Configuration**, **2x GPIO for up/downstream reset**, and **Downstream Common Mode Clock out #1/#2**.\n*   Lines connect to **P2B** labeled: **2x USB3, 1x USB2**, **1x RS-232**, and **1x DisplayPort**.\n\n**Right-Side Annotations:**\n*   Next to the **P0** and **P1A** area, **x4** and **x4** are grouped as **x8**.\n*   Next to **P1B**, **x4** and **x4** are grouped as **x8**.\n*   Next to **P2A**, **x4** and **x4** are grouped as **x8**.\n*   These three **x8** groups are bracketed together as **x16**.\n*   Text at the bottom right reads **Configurable PCIe lane**.](.20260617-86e6d29c-2b5/4bc824a7a7974d965c92fa80b5a078b6b75fb86290cf7019ff53f43ef985f97a.jpg)

GPU Selection

<table><tr><td>Model</td><td>VPX3-XMXM/AD5000</td><td>VPX3-XMXM/AD2000</td></tr><tr><td colspan="3">Graphic Core</td></tr><tr><td>GPU</td><td>NVIDIA RTX5000 Ada</td><td>NVIDIA RTX2000 Ada</td></tr><tr><td>Memory</td><td>16GB GDDR6 memoryBandwidth: 576GB/s</td><td>8GB GDDR6 memoryBandwidth: 256GB/s</td></tr><tr><td colspan="3">GPGPU Computing</td></tr><tr><td>CUDA Cores</td><td>9728 CUDA cores42.6 TFLOPS peak(FP32 performance)</td><td>3072 CUDA cores14.5 TFLOPS peak (FP32 performance)</td></tr><tr><td>Tensor Cores</td><td>304 Tensor Cores</td><td>96 Tensor Cores</td></tr><tr><td>RT Cores</td><td>76 RT Cores</td><td>24 RT Cores</td></tr><tr><td>Compute API</td><td colspan="2">CUDA Tool Kit 8.0 and aboveCUDA Compute version 8 and above, OpenCL1.2</td></tr><tr><td>Graphics API</td><td colspan="2">DirectX® 12, OpenGL 4.6Graphics API</td></tr><tr><td colspan="3">TGP &amp; GPU clocks</td></tr><tr><td>TGP Configuration</td><td>80W (115W configurable by request)</td><td>60W</td></tr><tr><td>Base Clock</td><td>930 MHz</td><td>1635 MHz</td></tr><tr><td>Boost Clock</td><td>1680 MHz</td><td>2115 MHz</td></tr><tr><td colspan="3">Interface</td></tr><tr><td>PCIe</td><td>PCIe Gen4 x16</td><td>PCIe Gen4 x8</td></tr></table>

# Ordering Information

Legacy OpenVPX payload: SLT3-PAY-2F2U-14.2.3(PCIe Upstream Port: P1A)

<table><tr><td>VPX3-XMXM/AD5000, COMM</td><td>3U VPX GPGPU blade with MXM RTX 5000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 3x PCIe x8, 1x DP, 2x USB3.0, 1x USB2.0, and 1x RS-232, supports common PCIe clock mode</td></tr><tr><td>VPX3-XMXM/AD5000, non-COMM</td><td>3U VPX GPGPU blade with MXM RTX 5000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 3x PCIe x8, 1x DP, 2x USB3.0, 1x USB2.0, and 1x RS-232, supports non-common PCIe clock mode</td></tr><tr><td>VPX3-XMXM/AD2000, COMM</td><td>3U VPX GPGPU blade with MXM RTX 2000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 3x PCIe x8, 1x DP, 2x USB3.0, 1x USB2.0, and 1x RS-232, supports common PCIe clock mode</td></tr><tr><td>VPX3-XMXM/AD2000, non-COMM</td><td>3U VPX GPGPU blade with MXM RTX 2000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 3x PCIe x8, 1x DP, 2x USB3.0, 1x USB2.0, and 1x RS-232, supports non-common PCIe clock mode</td></tr></table>

P2B de-populated, SOSA-aligned payload: SLT3-PAY-1F1U1S1S1U1U4F1J-14.6.13-0 (PCIe Upstream Port: P1B)

<table><tr><td>VPX3-XMXM/AD5000, w/o P2B, COMM</td><td>3U VPX GPGPU blade with MXM RTX 5000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 3x PCIe x8, supports common PCIe clock mode, P2B de-populated</td></tr><tr><td>VPX3-XMXM/AD5000, w/o P2B, non-COMM</td><td>3U VPX GPGPU blade with MXM RTX 5000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 3x PCIe x8, supports non-common PCIe clock mode, P2B de-populated</td></tr><tr><td>VPX3-XMXM/AD2000, w/o, P2B, COMM</td><td>3U VPX GPGPU blade with MXM RTX 2000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 3x PCIe x8, supports common PCIe clock mode, P2B de-populated</td></tr><tr><td>VPX3-XMXM/AD2000, w/o P2B, non-COMM</td><td>3U VPX GPGPU blade with MXM RTX 2000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 3x PCIe x8, supports non-common PCIe clock mode, P2B de-populated</td></tr></table>

P2 fully de-populated, SOSA-aligned payload: SLT3-PAY-1F1U1S1S1U1U2F1H-14.6.11-0 (PCIe Upstream Port: P1B)

<table><tr><td>VPX3-XMXM/AD5000, w/o P2, COMM</td><td>3U VPX GPGPU blade with MXM RTX 5000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 2x PCIe x8, supports common PCIe clock mode, P2 fully de-populated</td></tr><tr><td>VPX3-XMXM/AD5000, w/o P2, non-COMM</td><td>3U VPX GPGPU blade with MXM RTX 5000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 2x PCIe x8, supports non-common PCIe clock mode, P2 fully de-populated</td></tr><tr><td>VPX3-XMXM/AD2000, w/o P2, COMM</td><td>3U VPX GPGPU blade with MXM RTX 2000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 2x PCIe x8, supports common PCIe clock mode, P2 fully de-populated</td></tr><tr><td>VPX3-XMXM/AD2000, w/o P2, non-COMM</td><td>3U VPX GPGPU blade with MXM RTX 2000 ADA, SOSA aligned, conformal coating &amp; ETT, -40 to +85°C, conduction-cooled, with 2x PCIe x8, supports non-common PCIe clock mode, P2 fully de-populated</td></tr></table>

Appendix 1: Status LED
![1\n2\n3\n4\n5\n6\n7\n8\nGreen\nBlue\nOrange\nGreen\nGreen\nRed\nRed\nGreen / Orange](.20260617-86e6d29c-2b5/d28fa75b8cd5eb7dadd9653b821ee7ea152a93a91dea234fb0432e5b1523b71c.jpg)

<table><tr><td>NO.</td><td>Function</td><td>Color</td><td>Blink Rate</td><td>Description</td></tr><tr><td rowspan="2">1</td><td rowspan="2">Power</td><td rowspan="2">Green</td><td>Always on</td><td>Board power ready</td></tr><tr><td>Off</td><td>Board power NOT ready</td></tr><tr><td rowspan="2">2</td><td rowspan="2">IPMC Heartbeat</td><td rowspan="2">Blue</td><td>One blink per second</td><td>IPMC ready</td></tr><tr><td>Off</td><td>IPMC NOT ready</td></tr><tr><td rowspan="4">3</td><td rowspan="4">PCIe Switch Heartbeat &amp; Debug</td><td rowspan="2">Green</td><td>One blink per second</td><td>PCIe switch ready</td></tr><tr><td>Off</td><td>PCIe switch NOT ready</td></tr><tr><td rowspan="2">Orange</td><td>Off</td><td>Normal Status</td></tr><tr><td>Always on</td><td>MXM GPU abnormal</td></tr><tr><td rowspan="2">4</td><td rowspan="2">Internal Heater</td><td rowspan="2">Orange</td><td>Off</td><td>Heater off</td></tr><tr><td>Four blinks per second</td><td>Heater on (below -20C)</td></tr><tr><td rowspan="2">5</td><td rowspan="2">IPMC Maintenance Port Selection</td><td rowspan="2">Green</td><td>Off</td><td>Maintenance port is RS-232 (default)</td></tr><tr><td>Always on</td><td>Maintenance port is UART</td></tr><tr><td rowspan="2">6</td><td rowspan="2">PCIe Switch Debug Port Selection</td><td rowspan="2">Green</td><td>Always on</td><td>PCIe switch debug port to P1A (default)</td></tr><tr><td>Off</td><td>PCIe switch debug port to IPMC</td></tr><tr><td rowspan="2">7</td><td rowspan="2">MXM GPU Temperature</td><td rowspan="2">Red</td><td>Off</td><td>MXM GPU in normal temperature</td></tr><tr><td>Four blinks per second</td><td>MXM GPU in critical temperature</td></tr><tr><td rowspan="2">8</td><td rowspan="2">Board Temperature</td><td rowspan="2">Red</td><td>Off</td><td>Board in normal temperature</td></tr><tr><td>Four blinks per second</td><td>Board in critical temperature</td></tr></table>
[🔗 Link to the original document](.20260617-86e6d29c-2b5/20260617-86e6d29c-2b5.pdf)