# cExpress-ASL/ALN

COM Express COM.0 R3.1 Type 6 Compact size Module based on Intel® Amston Lake / Alder Lake-N platform

# Features

• Max. 8 Gracemont cores, boosting up to 3.8GHz
• 12th Gen Intel UHD graphics, max. 3x 4K60
• Up to 16GB LPDDR5 max. 4800MT/s, in-band ECC
• On-board memory for extreme rugged application

![The image displays a blue, tilted oval shape containing the word 'Preliminary' in white, sans-serif text. Below the oval on the right side, a partial view of a computer circuit board is visible, showing green circuitry and metallic components.](.cexpress-asl-aln-prelim-datasheet-240905/b851add269b0dda515a6023827f789261a7c221daf90e579532c34e471d53f68.jpg)

![Green printed circuit board with various electronic components and connectors (no readable text or symbols)](.cexpress-asl-aln-prelim-datasheet-240905/381e1476b65eecf5621c63e650268d0212b9d7f3696c5afbdab75ccdd81234af.jpg)

Real-time based on 2.5G Ethernet, Intel TSN/TCC
• Up to 8x PCIe Gen3 lanes and 4x USB 3.2 ports
• 1x USB-C and MIPI-CSI 4-lane

Specifications

<table><tr><td rowspan="23">Core System</td><td rowspan="16">SoC</td><td colspan="5">7th Gen Intel $^{\textregistered}$  Atom $^{\textregistered}$  x7425E, x7211E processors (formerly Alder Lake-N)</td></tr><tr><td>Processor</td><td>Cores</td><td>Cache</td><td>TDP</td><td>Graphics</td></tr><tr><td>Atom x7425E</td><td>4-core</td><td>6MB</td><td>12W</td><td>UHD 24EUs</td></tr><tr><td>Atom x7213E</td><td>2-core</td><td>6MB</td><td>10W</td><td>UHD 16EUs</td></tr><tr><td>Atom x7211E</td><td>2-core</td><td>6MB</td><td>6W</td><td>UHD 16EUs</td></tr><tr><td>Processor N97</td><td>4-core</td><td>6MB</td><td>12W</td><td>UHD 24EUs</td></tr><tr><td>Processor N50</td><td>2-core</td><td>6MB</td><td>6W</td><td>UHD 16EUs</td></tr><tr><td colspan="5">7th Gen Intel $^{\textregistered}$  Atom $^{\textregistered}$  x7000RE &amp; x7000C processors (formerly Amston Lake)</td></tr><tr><td>Atom x7211RE</td><td>2-core</td><td>6MB</td><td>6W</td><td>UHD 16EUs</td></tr><tr><td>Atom x7213RE</td><td>2-core</td><td>6MB</td><td>9W</td><td>UHD 16EUs</td></tr><tr><td>Atom x7433RE</td><td>4-core</td><td>6MB</td><td>9W</td><td>UHD 32EUs</td></tr><tr><td>Atom x7835RE</td><td>8-core</td><td>6MB</td><td>12W</td><td>UHD 32EUs</td></tr><tr><td>Atom x7809C</td><td>8-core</td><td>6MB</td><td>25W</td><td>no GPU</td></tr><tr><td>Atom x7405C</td><td>4-core</td><td>6MB</td><td>12W</td><td>no GPU</td></tr><tr><td>Atom x7203C</td><td>2-core</td><td>6MB</td><td>9W</td><td>no GPU</td></tr><tr><td colspan="5">Supporting Intel $^{\textregistered}$  VT (including VT-x, VT-d, VT-x with Extended Page Tables), Intel $^{\textregistered}$  SSE4.2, Intel $^{\textregistered}$  64 Architecture, Intel $^{\textregistered}$  AVX2, Intel $^{\textregistered}$  OS Guard, Intel $^{\textregistered}$  Boot Guard, Mode-based Execute Control, Intel $^{\textregistered}$  AES-NI Note: Availability of features may vary between processor SKUs. Atom SKU is capable of Intel IBECC and TCC/TSN feature (specific hardware and software configuration may be required). Please contact an ADLINK representative for details.</td></tr><tr><td>Memory</td><td colspan="5">16/8/4GB LPDDR5 memory, max. 4800MT/s, IBECC (build option)</td></tr><tr><td>Embedded BIOS</td><td colspan="5">AMI Aptio V</td></tr><tr><td>Cache</td><td colspan="5">See above</td></tr><tr><td>Expansion Buses</td><td colspan="5">8 PCIe x1 Gen3 lanes (PCIe lane 5-7 are build option, see block diagram below)</td></tr><tr><td>SEMA Board Controller</td><td colspan="5">Supports: Voltage/current monitoring, power sequence debug support, AT/ATX mode control, logistics and forensic information, genral purpose  $I^{2}C$ , UART, GPIO, watchdog timer, fan control</td></tr><tr><td>Debug Headers</td><td colspan="5">30-pin multipurpose flat cable connector for use with DB30-x86 debug module providing BIOS POST code LED, SEMA Board Controller access, SPI BIOS flashing, power testpoints, debug LEDs</td></tr><tr><td>Management Bus</td><td colspan="5">I2C, SMBus</td></tr></table>

Note: “Build option””indicates an alternative BOM configuration to support additional or alternative functions that are not available on the standard product. Be aware that these “build option” part numbers will need to be newly created and this will result in production lead times.

Specifications

<table><tr><td rowspan="6">Video</td><td>GPU Feature Support</td><td>12th Gen Intel® UHD Graphics with up to 32 execution units, supporting 3 independent, simultaneous DirextX 12, OpenCL 3.0, Vulkan 1.2, SR-IOV</td></tr><tr><td>Digital Display Interface</td><td>2x DDI (DP 1.4/HDMI 2.0b)</td></tr><tr><td>VGA</td><td>DP-to-VGA (build option, in place of DDI2)</td></tr><tr><td>LVDS</td><td>eDP-to-LVDS, single/dual-channel, 18/24-bit</td></tr><tr><td>eDP</td><td>4 lane support (build option, in place of LVDS)</td></tr><tr><td>USB-C</td><td>DP Alt mode (build option, in place of DDI1)</td></tr><tr><td rowspan="2">Audio</td><td>Chipset</td><td>Integrated on SoC</td></tr><tr><td>Codec</td><td>On carrier Express-BASE6 (ALC886 standard support)</td></tr><tr><td rowspan="2">Ethernet</td><td>Intel® MAC/PHY</td><td>Intel® Ethernet Connection I226 series (TSN by build option)</td></tr><tr><td>Interface</td><td>2.5GbE and 1000/100/10 Mbit/s Ethernet connection</td></tr><tr><td rowspan="3">Multi I/O and Storage</td><td>USB</td><td>4x USB 3.2 Gen2 (default 2 ports, can use hub for 4 ports, build option)2x SATA 6Gb/s (SATA 0-1 muxed with PCIe lane 6/5, SATA as default)</td></tr><tr><td>USB-C</td><td>USB and DP Alt mode (in place of DDI1, build option)</td></tr><tr><td>eMMC</td><td>eMMC 5.1, 3.2GB to 128GB (build option)</td></tr><tr><td>Super I/O</td><td colspan="2">Supported on carrier if needed (standard support W83627DHG-P, other Super I/O supported by project basis)</td></tr><tr><td rowspan="2">TPM</td><td>Chipset</td><td>Infineon</td></tr><tr><td>Type</td><td>TPM 2.0 (SPI based)</td></tr><tr><td rowspan="4">Power</td><td>Standard Input</td><td>ATX: 8.5-20V+/-5% / 5Vsb+/-5%; or AT: 8.5-20V+/-5%</td></tr><tr><td>Management</td><td>ACPI 5.0 compliant, Smart Battery support (TBC)</td></tr><tr><td>Power States</td><td>C1-C6, S0, S3, S4, S5, S5 ECO mode (Wake-on-USB S3/S4, WoL S3/S4/S5)</td></tr><tr><td>ECO Mode</td><td>Supports deep S5 mode for power saving</td></tr><tr><td rowspan="6">Mechanical and Environmental</td><td>Form Factor</td><td>PICMG COM.0: Rev 3.1 Type 6</td></tr><tr><td>Dimension</td><td>Compact size: 95 mm x 95 mm</td></tr><tr><td>Operating Temperature</td><td>Standard: 0°C to 60°CExtreme Rugged: -40°C to 85°C (Amston Lake, standard 12V input)</td></tr><tr><td>Humidity</td><td>5-90% RH operating, non-condensing5-95% RH storage (and operating with conformal coating)</td></tr><tr><td>Shock and Vibration</td><td>IEC 60068-2-64 and IEC-60068-2-27MIL-STD-202F, Method 213B, Table 213-I, Condition A and Method 214A,Table 214-I, Condition D (TBC)</td></tr><tr><td>HALT</td><td>Thermal Stress, Vibration Stress, Thermal Shock and Combined Test</td></tr><tr><td>Operating Systems</td><td>Standard Support</td><td>Windows 10 64-bit IoT Enterprise LTSC 2021, Ubuntu 20.04.4 LTSC, Yocto (LTS-Kernel 2021, TBC), Windows 11 64-bit IoT Enterprise LTSC (TBC)</td></tr></table>

Note: “Build option””indicates an alternative BOM configuration to support additional or alternative functions that are not available on the standard product. Be aware that these “build option” part numbers will need to be newly created and this will result in production lead times.

# Ordering Information

Module

<table><tr><td>cExpress-ALN-x7425E-16G</td><td>Compact size COM Express Type 6 with Intel Alder Lake-N Atom x7425E(4C), 16GB LPDDR5</td></tr><tr><td>cExpress-ALN-x7213E-4G</td><td>Compact size COM Express Type 6 with Intel Alder Lake-N Atom x7213E(2C), 4GB LPDDR5</td></tr><tr><td>cExpress-ALN-x7211E-8G</td><td>Compact size COM Express Type 6 with Intel Alder Lake-N Atom x7211E(4C), 8GB LPDDR5</td></tr><tr><td>cExpress-ASL -x7211RE-8G</td><td>Compact size COM Express Type 6 with Intel Amston Lake x7211RE Processor(2C), 8GB LPDDR5</td></tr><tr><td>cExpress-ASL -x7213RE-4G</td><td>Compact size COM Express Type 6 with Intel Amston Lake x7213RE Processor(2C), 4GB LPDDR5</td></tr><tr><td>cExpress-ASL-x7433RE-8G</td><td>Compact size COM Express Type 6 with Intel Amston Lake x7433RE Processor(4C), 8GB LPDDR5</td></tr><tr><td>cExpress-ASL-x7835RE-16G</td><td>Compact size COM Express Type 6 with Intel Amston Lake x7835RE Processor(8C), 16GB LPDDR5</td></tr></table>

Note: For certain processor or memory capacity SKUs not listed, please contact our ADLINK representative.

# Accessories

Heat Spreaders

<table><tr><td>HTS-cALN-B</td><td>Heatspreader for cExpress-ALN with threaded standoffs for bottom mounting</td></tr><tr><td>HTS-cALN-BT</td><td>Heatspreader for cExpress-ALN with through-hole standoffs for top mounting</td></tr><tr><td colspan="2">Passive Heatsinks</td></tr><tr><td>THS-cALN-B</td><td>Low-profile Heatsink for cExpress-ALN with threaded standoffs for bottom mounting</td></tr><tr><td>THS-cALN-BT</td><td>Low-profile Heatsink for cExpress-ALN with through-hole standoffs for top mounting</td></tr><tr><td>THSH-cALN-B</td><td>High-profile Heatsink for cExpress-ALN with threaded standoffs for bottom mounting</td></tr><tr><td colspan="2">Active Heatsinks</td></tr><tr><td>THSF-cALN-B</td><td>High-profile Heatsink with Fan for cExpress-ALN with threaded standoffs for bottom mounting</td></tr></table>

Note: “Build option” indicates an alternative BOM configuration to support additional or alternative functions that are not available on the standard product. Be aware that these “build option” part numbers will need to be newly created and this will result in production lead times.

![The diagram illustrates the system architecture of an Intel platform.\n\n**Central Block:**\n*   **Intel Amston Lake**\n*   **Intel Alder Lake N**\n\n**Left Side Inputs & Connections:**\n*   **LPDDR5 2/4/8GB** (two blocks) connect to the central block.\n*   **eDP/LVDS** connects to **eDP to LVDS**, which connects to **DDIA** on the central block. A dashed line labeled **eDP x4** runs above this path.\n*   **VGA** connects to **DP to VGA**, which connects to **DDIB** on the central block. The text **Build option** appears below 'DP to VGA'.\n*   **USB 2.0 (0:7)** connects to the central block.\n*   **Max. 2.5GbE** connects to **LAN Intel i226**, which connects to **HSIO(6)** on the central block.\n*   **PCIe (0:1)** connects to **2 x1, 1 x2**, which connects to **HSIO(2:3)** on the central block.\n*   **PCIe (2:3)** connects to **2 x1, 1 x2**, which connects to **HSIO(8:9)** on the central block.\n*   **SATA (0)** connects to **HSIO(10)** on the central block.\n*   **SATA (1)** connects to **HSIO(11)** on the central block.\n*   **PCIe (4)** connects to **HSIO0** on the central block.\n*   **PCIe (5)** (dashed line) connects to **HSIO0** (dashed line) on the central block.\n*   **HDA** connects to **HSUART** on the central block.\n*   **LPC/eSPI** connects to **eSPI to LPC**, which connects to **eSPI** on the central block. The text **Build option** appears above 'eSPI to LPC'.\n*   **UART (0:1)** connects to **HSUART** on the central block and branches down to the **Embedded Controller**.\n*   **SMBus** connects to **SMBus** on the central block and branches down to the **Embedded Controller**.\n*   **I2C** connects to **I2C** on the central block and branches down to the **Embedded Controller**.\n*   **GSPI (OEM)** connects to **GP_SPI** on the central block.\n*   **SPI** connects to **SPI** on the central block.\n\n**Right Side Outputs & Connections:**\n*   **DDI1/USBC_1** connects from **DDIA**.\n*   **DDI2** connects from **DDIB**.\n*   **MIP-CSI x4** connects to **FFC connector** and **eMMC 5.1 (32-128GB)**. The text **Build option** appears below 'eMMC 5.1'.\n*   **USB3 (0)** connects to the central block.\n*   **USB3 (1)** connects to the central block.\n*   **USB3 (2:3)** connects from **USB3.2 Gen2 Hub**. The text **Build option** appears below 'USB3.2 Gen2 Hub'.\n*   **PCIe (6)** (dashed line) and **PCIe (7)** (dashed line) branch off from the **HSIO(10)** and **HSIO(11)** lines respectively.\n\n**Bottom & Peripheral Blocks:**\n*   **Embedded Controller** connects to **Fan connector** and **LM73**.\n*   **TPM 2.0** connects from **SPI** on the central block.\n*   **BIOS Flash** connects from **SPI** on the central block. The text **Build option** appears below 'BIOS Flash'.](.cexpress-asl-aln-prelim-datasheet-240905/f31004ba9d82c8b6de08632e786603b7cd42e6640337c4447f08b53ebf71394f.jpg)

Note: “Build option” indicates an alternative BOM configuration to support additional or alternative functions that are not available on the standard product. Be aware that these “build option” part numbers will need to be newly created and this will result in production lead times.
[🔗 Link to the original document](.cexpress-asl-aln-prelim-datasheet-240905/cexpress-asl-aln-prelim-datasheet-240905.pdf)