# COM-HPC-cADP

Client Type COM-HPC Size B Module based on Intel® Alder Lake-P platform

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![Close-up of a computer motherboard with visible components and gold contacts (no readable text or symbols)](.com-hpc-cadp-datasheet-preliminary-20211224/5352a0fd80982de531b84e14347f9e7e83439a44ddfe5f9a0bb1586b2291a620.jpg)

# Features

• Performance hybrid architecture (P-core, E-core)
• Up to 14 cores, 20 threads at 45W TDP and lower
• Up to 64GB DDR5 SO-DIMM at max. 4800MT/s
• AI inference (AVX-512 VNNI, Iris Xe GPU 96EUs)
• 4 displays via DDI/eDP and USB4/Thunderbolt 4
• 16x PCIe Gen4, dual Ethernet
• Extreme Rugged operating temperature (optional, selected SKUs)

Specifications

<table><tr><td rowspan="12">Core System</td><td rowspan="8">SoC</td><td colspan="5">12th Gen Intel $^{\textregistered}$  Core $^{\text{TM}}$  processors (formerly Alder Lake-P)</td></tr><tr><td>Processor</td><td>Cores/Threads</td><td>Cache</td><td>TDP</td><td>Graphics</td></tr><tr><td>Core $^{\text{TM}}$  i7-12800HE</td><td>6P+8E/20T</td><td>24MB</td><td>45W(35W cTDP)</td><td>Iris Xe GPU</td></tr><tr><td>Core $^{\text{TM}}$  i5-12600HE</td><td>4P+8E/16T</td><td>18MB</td><td>45W(35W cTDP)</td><td>Iris Xe GPU</td></tr><tr><td>Core $^{\text{TM}}$  i3-12300HE</td><td>4P+4E/12T</td><td>12MB</td><td>45W(35W cTDP)</td><td>UHD GPU</td></tr><tr><td colspan="5">Note: More processor SKUs available soon. Some SKUs are supported by project basis only.Please consult your ADLINK representative.</td></tr><tr><td colspan="5">Note: Some processor SKUs are supported by project basis only.</td></tr><tr><td colspan="5">Supports: Intel $^{\textregistered}$  VT (including VT-x, VT-d, VT-x with Extended Page Tables),Intel $^{\textregistered}$  HT Technology, Intel $^{\textregistered}$  SSE4.2, Intel $^{\textregistered}$  64 Architecture, Intel $^{\textregistered}$  Turbo BoostTechnology 2.0, Intel $^{\textregistered}$  AVX512-VNNI, Intel $^{\textregistered}$  TXT, Execute Disable Bit,Intel $^{\textregistered}$  Data Protection Technology with Intel $^{\textregistered}$  Secure Key, Intel $^{\textregistered}$  AES-NINote: Availability of features may vary between processor SKUs.</td></tr><tr><td>Memory</td><td colspan="5">Up to 64GB (2x 32GB) DDR5 non-ECC SO-DIMM memory, max. 4800MT/s2 memory channels with 1DPC design</td></tr><tr><td>Embedded BIOS</td><td colspan="5">AMI UEFI with CMOS backup in 32 or 16MB (TBC) SPI BIOS</td></tr><tr><td>Cache</td><td colspan="5">Refer to processor specifications above</td></tr><tr><td>Expansion Busses</td><td colspan="5">16x PCI Express Gen4, 8x PCI Express Gen3• 4x PCI Express Gen3 lanes 0-3 (J1): configurable to x4, x2, x1• 4x PCI Express Gen3 lanes 4-7 (J1): configurable to x4, x2, x1• 4x PCI Express Gen4 lanes 8-11 (J1): configurable to x4• 4x PCI Express Gen4 lanes 12-15 (J1): configurable to x4• 8x PCI Express Gen4 lanes 16-23 (J2): configurable to x8Note: PCIe lanes 0-7, NBASE-T 0-1 source from HSIO, max. 6 devices (TBC)• SMBus (system), 2x I $^{2}$ C (user), GP_SPI</td></tr></table>

Specifications

<table><tr><td rowspan="2"></td><td>SEMA Board Controller</td><td>Supports: Voltage/current monitoring, power sequence debug support, AT/ATX mode control, logistics and forensic information, genral purpose I2C, UART, GPIO, watchdog timer, fan control</td></tr><tr><td>Debug Headers</td><td>40-pin multipurpose flat cable connector for use with DB40-HPC debug module providing BIOS POST code LED, SEMA Board Controller access, SPI BIOS flashing, power testpoints, debug LEDs</td></tr><tr><td rowspan="5">Video</td><td>GPU Feature Support</td><td>Intel® Iris Xe or UHD Graphics Core Architecture, max. 96EUs, supporting 4 concurrent display combinations of DisplayPort/HDMI, Thunderbolt 4/USB4, eDP/DSI outputs (4x 4K60 or 1x 8K60)Hardware video encode/decode, up to 8K60 HEVCDirectX 12, OpenGL 4.6, Vulkan 1.2, Mesa 3D supportOneVPLHDCP 2.3Graphics Hardware Virtualization (SRIOV)</td></tr><tr><td>Digital Display Interface</td><td>DDI 0/1/2 supporting DP 1.4a, HDMI 2.0b, DVI</td></tr><tr><td>eDP</td><td>4 lanes, eDP 1.4b</td></tr><tr><td>MIPI-DSI</td><td>Build option: MIPI-DSI 2.0, in place of eDP (TBC)</td></tr><tr><td>USB4</td><td>USB4_0, USB4_1 supporting DP 1.4a by DP alternative mode, Thunderbold 4 capable (TBC)</td></tr><tr><td rowspan="3">Audio</td><td>Chipset</td><td>Integrated on SoC</td></tr><tr><td>Interface</td><td>1x HDA or 1x I2S or 2x Soundwire (2,3) (TBC)2x Soundwire (0,1) or 2x DMIC (TBC)</td></tr><tr><td>Codec</td><td>On COM-HPC Client Base (TBC)</td></tr><tr><td>Camera</td><td>MIPI-CSI</td><td>2x MIPI-CSI, 4 lanes each (TBC)Features may vary dependent on OS</td></tr><tr><td rowspan="2">NBASE-T Ethernet</td><td>Intel® MAC/PHY</td><td>Intel® Ethernet Connection I225 series (I225-IT supports TSN by build option, TBC), 2pcs</td></tr><tr><td>Interface</td><td>2x NBASE-T (0,1)2.5GbE and 1000/100/10 Mbit/s Ethernet connectionNBASET_SDP if TSN support enabled</td></tr><tr><td rowspan="4">Multi I/O and Storage</td><td>USB</td><td>2x USB4/3.x/2.0, 2x USB 3.x/2.0 and 4x USB 2.0Thunderbolt 4 capable on USB4 portUSB4/Thunderbolt 4 support dependent on carrier design</td></tr><tr><td>On-board Storage</td><td>NVMe SSD, in place of PCIe lanes 12-15 (build option, project basis)</td></tr><tr><td>Serial</td><td>2x UART ports with console redirection</td></tr><tr><td>GPIO</td><td>12x GPIO (GPI with interrupt, TBC)</td></tr><tr><td>Super I/O</td><td colspan="2">Supported on carrier if needed (standard support TBC, other Super I/O supported by project basis)</td></tr><tr><td rowspan="2">TPM</td><td>Chipset</td><td>Infineon</td></tr><tr><td>Type</td><td>TPM 2.0 (SPI based)</td></tr><tr><td rowspan="5">Power</td><td>Standard Input</td><td>ATX: 12V±5% / 5Vsb ±5%; or AT: 12V±5%</td></tr><tr><td>Wide Input</td><td>ATX: 8.5-20V / 5Vsb ±5%; or AT: 8.5-20V</td></tr><tr><td>Management</td><td>ACPI 5.0 compliant, Smart Battery support (TBC)</td></tr><tr><td>Power States</td><td>C1-C6, S0, S1, S3, S4, S5 , S5 ECO mode (Wake on USB S3/S4, WOL S3/S4/S5) (TBC)</td></tr><tr><td>ECO Mode</td><td>Supports deep S5 mode for power saving</td></tr><tr><td rowspan="4">Mechanical and Environmental</td><td>Form Factor</td><td>PICMG COM-HPC: Rev 1.0 Client Type</td></tr><tr><td>Dimension</td><td>Size B: 120 mm x 120 mm</td></tr><tr><td>Operating Temperature</td><td>Standard: 0°C to 60°C (storage: -20°C to 80°C)Extreme Rugged: -40°C to 85°C (storage: -40°C to 85°C, TBC, build option, selected SKUs)</td></tr><tr><td>Humidity</td><td>5-90% RH operating, non-condensing5-95% RH storage (and operating with conformal coating)</td></tr></table>

Specifications

<table><tr><td>Shock and Vibration</td><td>IEC 60068-2-64 and IEC-60068-2-27MIL-STD-202F, Method 213B, Table 213-I, Condition A and Method 214A,Table 214-I, Condition D (TBC)</td></tr><tr><td>HALT</td><td>Thermal Stress, Vibration Stress, Thermal Shock and Combined Test</td></tr><tr><td>Operating Systems Standard Support</td><td>Windows 10 IOT Enterprise LTSC, Yocto project based Linux 64-bit, Ubuntu 64-bit (TBC), VxWorks (TBC)</td></tr></table>

Ordering Information

<table><tr><td colspan="2">Starter Kit</td></tr><tr><td>COM-HPC Client Type Starter Kit</td><td>Starter kit for COM-HPC Client Type</td></tr></table>

![**Central Block:**\n*   **12th Gen Intel® Core™ Processor (Alder Lake-P)**\n\n**Left Column (J1) Connections to Processor:**\n*   **EDP / DSI** connects via **eDP x 4 & DSI**.\n*   **DDI 0** and **DDI 1** connect directly.\n*   **USB 4/3.x_0** and **USB 4/3.x_1** (both labeled **TBT4 capable**) connect via **TCP**.\n*   **USB 2.0 0-7** connects directly.\n*   **NBASE -T 0 (2.5GbE)** and **NBASE -T 1 (2.5GbE)** connect to **Intel i225** blocks (labeled **TSN dependent on SKU**), which then connect to the Processor via **1 PCIe Gen 3 (HSIO)**.\n*   **PCIe 0-3** and **PCIe 4-7** (both labeled **1 x4, 2 x2, 4 x1, Intel RST**) connect via **4 PCIe Gen 3 (HSIO)**.\n*   **PCIe 8-11** and **PCIe 12-15** (both labeled **1 x4**) connect via **4 PCIe Gen 4 (CPU)**.\n*   **PCIe 12-15** has a dashed connection labeled **build option** to **NVMe SSD 30-240GB**.\n*   **HAD / I2S / 2xSNDW / 2xSDNW / 2xD MIC** connects directly.\n*   **BOOT_SPI / GP_SPI** has a dashed connection labeled **build option** to **BIOS Flash** and **TPM 2.0**.\n*   **SMBus** connects to **EEPROM** and the **Embedded Controller**.\n*   **I2C_0** and **I2C_1** connect via **I2C** to the **Embedded Controller**.\n*   **12xGPIO** connects directly.\n*   **2xUART** connects via **2x HSUART** to the **Embedded Controller**.\n*   **eSPI** connects to the **Embedded Controller** and the Processor.\n\n**Right Column (J2) Connections to Processor:**\n*   **DDI 2** connects directly.\n*   **CSI 0** and **CSI 1** connect via lines labeled **4 lanes**.\n*   **PCIe 16-23** connects via **8 PCIe Gen 4 (CPU)** and **1 x8** (labeled **only on 35-45W SKU s**).\n*   **PCIe 24-31** is crossed out.\n*   **USB 10GbPs** connects via **USB 10GbPs**.\n*   **USB 3.x_2** connects directly.\n*   **USB 10GbPs** connects via **USB 10GbPs**.\n*   **USB 3.x_3** connects directly.\n*   **PCIe 32-47** connects directly.\n*   There is a dashed connection labeled **build option** to **DB 40-HPC connector**.\n\n**Bottom Section:**\n*   **Embedded Controller** connects to **build option Fan Connector** and **LM 73 (board)**.\n*   The **Embedded Controller** connects to the Processor via **1DPC Style**.\n*   The Processor connects to two blocks labeled **DDR 5 SODIMM 4800 MT/s, non-ECC**.](.com-hpc-cadp-datasheet-preliminary-20211224/2e6e72cb2f465cd349af5f4769feb1b2748f2d01d4fcfbc47afe1dc477e6eb01.jpg)
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