# OSM-IMX8MP

OSM Size-L Module with NXP® i.MX8M Plus Series

![The image features a blue oval shape containing the word 'Preliminary' in white, slanted text.](.osm-imx8mp-prelim-datasheet-240318/1f58e2c184a4446056798d9b68bfc86ffd8e0ea0d82fdef56075adcbf55f77b7.jpg)

# Features

• NXP® i.MX8M Plus series with 4-core Arm Cortex-A53 & M7
• In-SoC 2.3 TOPS NPU
• OSM revision 1.1 compliant
• HDMI, LVDS, DSI graphic output interfaces
• Dual GbE (one TSN capable)

• Rugged operating temperature option: -40°C to 85°C
Dual CAN bus
• USB3.0, 2.0 interfaces
• I2S audio codec interface
• 15 year product availability

# Specifications

<table><tr><td rowspan="4">Processor &amp; System</td><td>SoC</td><td>NXP® i.MX8M Plus series with 4-core Arm Cortex-A53 &amp; M7 TrustZone Technology with Armv8 Cryptography2.3 TOPS Neural Processing Unit (optional)</td></tr><tr><td>Memory</td><td>2/4/8GB LPDDR4L</td></tr><tr><td>L2 Cache</td><td>512kB system L2 cache (ECC)</td></tr><tr><td>Security</td><td>RDC – Resource Domain Controllero Supports up to 4 domains and 8 regions of DDRArm TrustZone® (TZ) architecture: Cortex-A53 MPCore TrustZone supportOn-chip RAM (OCRAM) secure region protection using OCRAM controllerHigh Assurance Boot (HAB)Cryptographic Acceleration and Assurance Module (CAAM)Widevine and PlayReady content protection supportPublic Key Cryptography (PKHA) with RSA and Elliptic Curve (ECC) algorithmsReal-time integrity checker (RTIC)DRM support for RSA, AES, 3DES, DESSide channel attack resistanceTrue random number generation (RNG)Manufacturing protection support / Secure Non-Volatile Storage (SNVS)</td></tr><tr><td rowspan="5">Video</td><td>GPU Core</td><td>Vivante GC7000UL</td></tr><tr><td>GPU Feature Support</td><td>GC7000UL (2 shaders), OpenGL ES 2.0/3.0/3.1, Vulkan, OpenCL 1.2; GC380 (2D)</td></tr><tr><td>MIPI DSI</td><td>1x MIPI DSI 4 lanes</td></tr><tr><td>LVDS</td><td>2-channel LVDS port 18/24 bit</td></tr><tr><td>Camera</td><td>MIPI CSI RX interfaceCompatible with MIPI Alliance Interface spec v1.0Up to 4 data lanes, up to 1.0 Gb/s per laneMIPI-HS, MIPI-LP mode support</td></tr><tr><td rowspan="2">System Storage</td><td>SDIO</td><td>2x SDIO (4-bit) compatible with SD/SDIO standard, up to version 3.0</td></tr><tr><td>eMMC</td><td>32, 64, or 128 GB (build option)Compatible with eMMC spec 4.41, 4.51, 5.0, 5.1</td></tr></table>

Specifications

<table><tr><td>Debug Header</td><td colspan="2">JTAG interface</td></tr><tr><td>Audio</td><td>Audio Codec</td><td> $I^{2}S$  audio codec located on carrier</td></tr><tr><td rowspan="2">Dual Ethernet</td><td>Primary LAN</td><td>10/100/1000 Ethernet controller on SoC (TSN capable)</td></tr><tr><td>Secondary LAN</td><td>10/100/1000 Ethernet controller on SoC</td></tr><tr><td rowspan="7">Extension Buses</td><td>USB</td><td>2x USB 3.0, 2x USB 2.0 (one with OTG)</td></tr><tr><td>UART</td><td>4x UART interfaces (UART A/B has TX/RX/CTS/RTS)</td></tr><tr><td>CAN</td><td>2x CAN2.0B only or mixed CAN2.0B and CAN FD mode, data bit rate up to 8 Mbps</td></tr><tr><td>SPI</td><td>2x SPI</td></tr><tr><td> $I^{2}S$ </td><td>1x  $I^{2}S$  interfaces with audio resolution from 16-bits to 32-bits and sample rate up to 192kHz (see Audio Codec support)</td></tr><tr><td> $I^{2}C$ </td><td>2x  $I^{2}C$  interfaces- Support for 7-bit and 10-bit address mode- Software programmable clock frequency of 100 kbit/s in Standard-mode, 400 Kbit/s in the Fast-mode or 1 Mbit/s in Fast-mode Plus</td></tr><tr><td>GPIO</td><td>8x GPIO with interrupt</td></tr><tr><td>Power</td><td>Input</td><td>5V DC +/- 5%</td></tr><tr><td rowspan="6" colspan="2">Mechanical and Environmental Form Factor</td><td>SGET OSM Specifications 1.1</td></tr><tr><td>Dimension OSM Size-L (Large) module 45 mm x 45 mm</td></tr><tr><td>Operating Temperature Standard: 0°C to 60°C Rugged: -40°C to 85°C</td></tr><tr><td>Humidity 5-90% RH operating, non-condensing 5-95% RH storage (and operating with conformal coating)</td></tr><tr><td>Shock and Vibration IEC 60068-2-64 and IEC-60068-2-27, MIL-STD-202 F, Method 213B, Table 213-I, Condition A and Method 214A, Table 214-I, Condition D</td></tr><tr><td>HALT Thermal Stress, Vibration Stress, Thermal Shock and Combined Test</td></tr><tr><td rowspan="2">Operating Systems</td><td>Standard Support</td><td>Yocto Linux BSP, Android</td></tr><tr><td>Extended Support (BSP)</td><td>Foundries.IO Linux microPlatform (LMP)</td></tr></table>

Ordering Information

<table><tr><td>Part name</td><td>Description/Configuration</td></tr><tr><td>OSM-IMX8MP-Q-N-2G-32G-ER</td><td>OSM L-size Module with 4-core NXP i.MX8M-PLUS, NPU, 2GB LPDDR4, 32GB eMMC, -40°C to 85°C</td></tr></table>

# Block diagram

![Based on the provided flowchart, here is the accurate description of the labeled blocks and their connections:\n\n**Central Component**\n*   A large reddish-brown block labeled **'NXP i.MX8M Plus'** with **'OSM L'** below it.\n\n**Memory Connections (Top)**\n*   **'eMMC 5.1'** (with subtext **'32/64/128 GB'**) connects to the top of the central block.\n*   **'LPDDR4'** (with subtext **'2/4/8 GB'**) connects to the top of the central block.\n\n**Left Side Connections**\n*   **'DSI 4L'** connects to **'DSI 4L'**.\n*   **'LVDS 8L'** connects to **'LVDS'**.\n*   **'HDMI'** connects to **'HDMI'**.\n*   **'CSI 4L'** connects to **'CSI'**.\n*   **'ETH_A'** connects to **'RGMII_0'**.\n*   **'ETH_B'** connects to **'RGMII_1'**.\n*   **'USB_D'** connects via a small box labeled **'OTG'** to **'USB_1'**.\n*   **'USB_2'** connects to a light blue block labeled **'USB hub'**. This hub connects to three blocks: **'USB_A'**, **'USB_B'**, and **'USB_C'**.\n*   **'I2S_A'** connects to **'SAI'**.\n*   **'SPI_A'** connects to **'ECSPI_1'**.\n*   **'SPI_B'** connects to **'ECSPI_2'**.\n\n**Right Side Connections**\n*   **'UART_2'** connects to **'Console'**.\n*   **'UART_1'** connects to **'UART_A 4W'**.\n*   **'UART_4'** connects to **'UART_B 4W'**.\n*   **'UART_3'** connects to **'UART_C 2W'**.\n*   **'I2C_1'** connects to **'I2C_A'**.\n*   **'I2C_2'** connects to **'I2C_B'**.\n*   **'GPIO'** connects to **'GPIO_A'**.\n*   **'CAN_1'** connects to **'CAN_A'**.\n*   **'CAN_2'** connects to **'CAN_B'**.\n*   **'SD_1'** connects to **'SDIO_A'**.\n*   **'SD_2'** connects to **'SDIO_B'**.\n*   **'JTAG'** connects to a yellow block labeled **'JTAG'**.](.osm-imx8mp-prelim-datasheet-240318/c67bd67da819745f1c74ff32c4a732215d1e70751b1318a88ed0a76fc992b020.jpg)
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