# OSM-IMX95

OSM L Size Module with NXP i.MX95 series

Preliminary
![Close-up of a printed circuit board with various electronic components and connectors (no readable text or symbols)](.osm-imx95-prelim-datasheet-260212/6f2b2c3e6ba75c5ccce2efd260a4818a2ef5c7d79a6c3c6b94952a80dea70f0f.jpg)

# Features

• i.MX95 series with 4/6-core Cortex-A55, Cortex M7, and M33 MCU
• eIQ Neutron N3 NPU
• OSM revision 1.2 compliant
• DSI and LVDS graphic output interfaces
• Rugged operating temperature option : -40°C to 85°C (standard SKU consumer temp.)

• 15 year product availability
• USB3.0 /2.0 interfaces
• Dual Gigabit RGMii Ethernet with TSN
• eMMC up to 256 GB, QSPI interface to carrier

Specifications

<table><tr><td rowspan="4">Processor &amp; System</td><td>SoC</td><td>i.MX95 with up to six Cortex-A55 cores, Cortex-M7/M33 MCUs, and eIQ Neutron AI processor</td></tr><tr><td>Memory</td><td>2/4/8 GB LPDDR4L via BOM option</td></tr><tr><td>L2 Cache</td><td>Per core: Coherent 512 L3 cache, 64KB L2 cache</td></tr><tr><td>Security</td><td>NXP ARM TrustZone with safety island (Cortex M33)</td></tr><tr><td rowspan="5">Video</td><td>GPU Core</td><td>Arm® MaliTM G310 GPU</td></tr><tr><td>GPU Feature Support:</td><td></td></tr><tr><td>MIPI DSI</td><td>1x MIPI DSI 4 lanes</td></tr><tr><td>LVDS</td><td>8 Lanes LVDS interface</td></tr><tr><td>Camera</td><td>1x MIPI CSI 4 Lanes</td></tr></table>

Note: “Build option” indicates an alternative BOM configuration to support additional or alternative functions that are not available on the standard product. Be aware that these “build option” part numbers will need to be newly created and this will result in production lead times.

Specifications

<table><tr><td rowspan="3">System Storage</td><td>SDIO</td><td>2x SDIO (4-bit) compatible with SD/SDIO standard, up to version 3.0</td></tr><tr><td>eMMC</td><td>Up to 256 GB (build option)Compatible with eMMC specification 4.41, 4.51, 5.0, and 5.1</td></tr><tr><td>Flash</td><td>SPI NOR flash via QSPI on the carrier</td></tr><tr><td colspan="3">Debug Header</td></tr><tr><td>Audio</td><td>Audio Codec</td><td> $I^{2}S$  audio codec (located on the carrier)</td></tr><tr><td rowspan="2">Dual Ethernet</td><td>Primary LAN</td><td>MAC 10/100/1000 RGMii interface with TSN</td></tr><tr><td>Secondary LAN</td><td>MAC 10/100/1000 RGMii interface with TSN</td></tr><tr><td rowspan="7">Extension Busses</td><td>USB</td><td>1x USB 3.0 host, 1x USB 2.0 device / host</td></tr><tr><td>UART</td><td>4x UART interfaces</td></tr><tr><td>SPI</td><td>3x SPI interfaces (SPI_A can be used as QSPI)</td></tr><tr><td> $I^{2}S$ </td><td>2x  $I^{2}S$  interfaces with audio resolution from 16-bit to 32-bit and sample rate up to 192KHz (see Audio Codec support)</td></tr><tr><td> $I^{2}C$ </td><td>2x  $1^{2}C$  interfaces</td></tr><tr><td>GPIO</td><td>14 x GPIO with interrupt</td></tr><tr><td>PCIe</td><td>1x GEN3 single lane</td></tr><tr><td>Power</td><td>Input</td><td>5Vdc +/- 5%</td></tr><tr><td rowspan="6">Mechanical and Environmental</td><td>Form Factor</td><td>OSM revision 1.2</td></tr><tr><td>Dimension</td><td>OSM size L 45x45 mm</td></tr><tr><td>Operating Temperature</td><td>Standard: 0°C to 60°C Rugged: -40°C to 85°C (optional)</td></tr><tr><td>Humidity</td><td>5-90% RH operating, non-condensing 5-95% RH storage (and operating with conformal coating)</td></tr><tr><td>Shock and Vibration</td><td>IEC 60068-2-64 and IEC-60068-2-27, MIL-STD-202 F, Method 213B, Table 213-Condition A and Method 214A, Table 214-I, Condition D</td></tr><tr><td>HALT</td><td>Thermal Stress, Vibration Stress, Thermal Shock and Combined Test</td></tr><tr><td rowspan="2">Operating Systems</td><td>Standard Support</td><td>Yocto Linux BSP</td></tr><tr><td>Extended Support (BSP)</td><td>Foundries.IO Linux microPlatform (LMP) Note: contact sales for more information</td></tr></table>

Note: “Build option” indicates an alternative BOM configuration to support additional or alternative functions that are not available on the standard product. Be aware that these “build option” part numbers will need to be newly created and this will result in production lead times.

Ordering Information

<table><tr><td>Part name</td><td>Description/Configuration</td></tr><tr><td>OSM-IMX95-H-4G-32G-CT</td><td>OSM module L size with i.MX95 SOC , NPU , 4 GB LPDDR4, 32 GB eMMC, 0°C to 70°C</td></tr><tr><td>OSM-IMX95-H-4G-32G-ER</td><td>OSM module L size with i.MX95 SOC , NPU , 4 GB LPDDR4, 32 GB eMMC, -40°C to 85°C</td></tr></table>

Note: Non-listed configurations available on demand.

Block diagram
![The diagram centers around a large red block labeled **NXP IMX95**. It connects to various peripheral blocks arranged around it.\n\n**Top Connections:**\nTwo light blue blocks are connected to the top of the central block under a yellow header labeled 'build option':\n*   **eMMC** (subtext: 32 - 256 GB)\n*   **LPDDR4** (subtext: 2 - 8 GB)\n\n**Left Side Connections (Left Box to Central Block Label):**\n*   **DSI 4L** connects to **DSI**\n*   **LVDS 8L** connects to **LVDS**\n*   **CSI_A 4L** connects to **CSI**\n*   **PCIe_A** connects to **PCIe GEN3 x1**\n*   **ETH_A** connects to **RGMii 0**\n*   **ETH_B** connects to **RGMii 1**\n*   **USB_A** connects to **USB_2**\n*   **USB_C** connects to **USB_1**\n*   **I2S A/B** connects to **SAI**\n*   **SPI_A** connects to **QSPI**\n*   **SPI_B** connects to **ECSPI_2**\n*   **SPI_C** connects to **ECSPI_3**\n*   **ADC** connects to **ADC**\n\n**Right Side Connections (Central Block Label to Right Box):**\n*   **UART_2** connects to **Console**\n*   **UART_1** connects to **UART_A 4w**\n*   **UART_4** connects to **UART_B 4w**\n*   **UART_3** connects to **UART_C 2w**\n*   **I2C_1** connects to **I2C_A**\n*   **I2C_2** connects to **I2C_B**\n*   **CAN_1** connects to **CAN_A**\n*   **CAN_2** connects to **CAN_B**\n*   **SD_1** connects to **SDIO_A**\n*   **SD_2** connects to **SDIO_B**\n*   **PWM** connects to **PWM**\n*   **GPIO** connects to **GPIO_A**\n\n**Bottom Connections:**\n*   A yellow block labeled **JTAG Point** connects to the bottom of the central block.\n*   A pink block labeled **MCU** connects to the bottom of the central block.\n*   The **MCU** block connects to a light blue block labeled **GPIO_B**.](.osm-imx95-prelim-datasheet-260212/5ecc0a776263181436461c07d0e5b418f9a6c245c122e3db1cf7823b396ec432.jpg)

Note: “Build option” indicates an alternative BOM configuration to support additional or alternative functions that are not available on the standard product. Be aware that these “build option” part numbers will need to be newly created and this will result in production lead times.
[🔗 Link to the original document](.osm-imx95-prelim-datasheet-260212/osm-imx95-prelim-datasheet-260212.pdf)