![Green PCI computer card with various electronic components and connectors (no visible text or symbols)](.pci-9114series-datasheet-en-1/3a68f7526b90f8f5409990ae0f79592ec1d29f48ad427c82489195ad7596013d.jpg)

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# Introduction

ADLINK’s PCI-9114 series are 32-CH, 16-bit, high-resolution multi-function DAQ cards. The PCI-9114 device features flexible configurations on analog input. The devices are divided into 2 kinds: normal gain version and high gain version. Both versions provide 4 programmable input ranges for bipolar and unipolar inputs. The A/D on the PCI-9114DG device features a sampling rate of 100 kS/s with resolution at 16 bits, while PCI-9114A-DG/HG device features a sampling rate of up to 250 kS/s with resolution at 16 bits. The device supports automatic analog input scanning, and offers a differential mode for 8-CH analog inputs and maximum noise elimination, as well as single-ended modes for16-CH analog inputs.

The PCI-9114 also features 1-CH 16-bit general-purpose timer/counter, 16-CH TTL isolated digital inputs and 16-CH TTL isolated digital outputs. ADLINK PCI-9114 delivers cost-effective and reliable data acquisition capabilities and is ideal for a broad variety of applications.

# Features

■ Supports a 32-bit 5 V PCI bus
■ 16-bit A/D resolution
■ Up to 100 kS/s sampling rate (PCI-9114DG)
■ Up to 250 kS/s sampling rate (PCI-9114A-DG and PCI-9114A-HG)
■ 32-CH single-ended or 16-CH differential analog inputs
■ Bipolar or unipolar analog input ranges
■ Onboard 1 k-sample A/D FIFO
■ Programmable gains:
• x1, x2, x4, x8 (PCI-9114DG and PCI-9114A-DG)
• x1, x10, x100 (PCI-9114A-HG)
■ Automatic analog inputs scanning
■ 16-CH isolated digital inputs and 16-CH isolated digital outputs
■ 2500 VRMS optical isolation for digital inputs and outputs
■ 1-CH 16-bit general-purpose timer/counter

■ +12 V and -12 V power available on the 37-pin D-sub connector

■ Onboard resettable fuses for power output protection

■	 Compact, half-size PCB

■ Operating Systems

• Windows 7/Vista/XP/2000/2003 Server

• Linux

Recommended Software

• AD-Logger

• VB.NET/VC.NET/VB/VC++/BCB/Delphi

• DAQBench

■ Drivers Support

• DAQPilot for LabVIEW™

• DAQ-MTLB for MATLABR

• PCIS-DASK for Windows

• PCIS-DASK/X for Linux

![The image displays a cropped section of a graphic design. The upper portion features a light green background with white geometric shapes resembling triangles or chevrons pointing upward. The lower portion shows black curved lines, which appear to be the upper sections of black letters, possibly 'S' and 'c'.](.pci-9114series-datasheet-en-1/88357c403acdd8f018d0e57f9f213866b04728f5aeb312329cd929d458aa8ad6.jpg)

# Specifications

# Analog Input

■ Number of channels: 32 single-ended or 16 differential

■ Resolution: 16 bits

■ Conversion time:

· 10 μs (PCI-9114DG)

· 4 μs (PCI-9114A-DG & PCI-9114A-HG)

■ Maximum sampling rate

<table><tr><td>Device</td><td>Sampling rate</td></tr><tr><td>PCI-9114DG</td><td>100 kS/s</td></tr><tr><td>PCI-9114A-DGPCI-9114A-HG</td><td>250 kS/s</td></tr></table>

■ Input ranges (software programmable)

<table><tr><td>Device</td><td>Gain</td><td>Input Range</td></tr><tr><td rowspan="2">PCI-9114DG</td><td>1</td><td>±10 V</td></tr><tr><td>2</td><td>±5 V</td></tr><tr><td rowspan="2">PCI-9114A-DG</td><td>4</td><td>±2.5 V</td></tr><tr><td>8</td><td>±1.25 V</td></tr><tr><td rowspan="3">PCI-9114A-HG</td><td>1</td><td>±10 V</td></tr><tr><td>10</td><td>±1 V</td></tr><tr><td>100</td><td>±0.1 V</td></tr></table>

■ Accuracy

<table><tr><td>Device</td><td>Gain</td><td>Input Range</td></tr><tr><td>PCI-9114DG</td><td>1</td><td>0.01% of FSR ± 1 LSB</td></tr><tr><td rowspan="2">PCI-9114A-DG</td><td>2,4</td><td>0.02% of FSR ± 1 LSB</td></tr><tr><td>8</td><td>0.04% of FSR ± 1 LSB</td></tr><tr><td rowspan="2">PCI-9114A-HG</td><td>1, 10</td><td>0.01% of FSR ± 1 LSB</td></tr><tr><td>100</td><td>0.02% of FSR ± 1 LSB</td></tr></table>

■ Input coupling: DC
■ Overvoltage protection: continuous ±35 V
■ Input impedance: 1 GΩ
■ Trigger modes: software, pacer, and external trigger (5 V/TTL compatible)
■ FIFO buffer size: 1 k samples
■ Data transfers: polling, interrupt

# Isolated Digital Input

■ Number of channels: 16
■ Maximum input range: 24 V, non-polarity
■ Digital logic levels
- 0 - 24 V, non-polarity
- Input high voltage: 5 - 24 V
- Input low voltage: 0 - 1.5 V

■ Input resistance: 2.4 KΩ @ 0.5 W

■ Isolation voltage: 2500 VRMS

■ Data transfers: programmed I/O

# Isolated Digital Output

■ Number of channels: 16
■ Output type: open emitter Darlington transistors
■ Sink current
· 350 mA for one channel @ 100% duty
· 260 mA for all channels @ 10% duty
■ Power dissipation: Max. 1.47 W per chip (8 DO channels)
■ Supply voltage: 5-35 V
■ Isolation voltage: 2500 VRMS
■ Data transfers: programmed I/O

# Power Output

Output voltage: +12 V and -12 V

■ Resettable fuse protection: 500 mA

# General-Purpose Timer/Counter

■ Number of channels: 1
■ Resolution: 16 bits
■ Compatibility: 5 V/TTL
■ Base clock available: 2 MHz, external clock to 2 MHz

# General Specifications

■ I/O connector
· 37-pin D-sub female
· 20-pin ribbon male x 2
■ Operating temperature: 0˚C to 55˚C
■ Storage temperature: -20˚C to 80˚C
■ Relative humidity: 5% to 95%, non-condensing

■ Power requirements

<table><tr><td>+5 V</td><td>+12 V</td></tr><tr><td>600 mA typical</td><td>100 mA typical</td></tr></table>

■ Dimensions (not including connectors)

175 mm x 107 mm

# Terminal Boards & Cables

■ DIN-37D-01\*
Terminal Board with One 37-pin D-sub
Connector and DIN-Rail Mounting
■ DIN-20P-01\*
Terminal Board with One 20-pin Ribbon
Connector and DIN-Rail Mounting

■ ACLD-9137-01

General-Purpose Terminal Board with One 37-pin D-sub Male Connector

■ ACLD-9188-01\*

General-Purpose Terminal Board with Two 20- pin Ribbon Connectors and One 37-pin D-sub Connector

\* Cables are not included. For information on mating cables, refer to P2-61/62

![The image displays a partial graphic, likely a logo. A thick black circular shape, resembling the letter 'O', is visible at the bottom center. Above this, light green geometric shapes form a triangular or 'V' pattern against a white background. There is no text present.](.pci-9114series-datasheet-en-1/094c1980039be3c18be53d431786141339a3179469f4ba57dec3f935ca0cc7f2.jpg)

# Ordering Information

■ PCI-9114DG
32-CH 16-Bit 100 kS/s Normal-Gain Multi-Function DAQ Card
■ PCI-9114A-DG
32-CH 16-Bit 250 kS/s Normal-Gain Multi-Function DAQ Card
■ PCI-9114A-HG
32-CH 16-Bit 250 kS/s High-Gain Multi-Function DAQ Card

# Pin Assignment

<table><tr><td rowspan="3"></td><td rowspan="3" colspan="3">CN1</td><td colspan="4">CN2</td></tr><tr><td>DI_0</td><td>1</td><td>2</td><td>DI_8</td></tr><tr><td>DI_1</td><td>3</td><td>4</td><td>DI_9</td></tr><tr><td>+12Vout</td><td>1</td><td>20</td><td>GND</td><td>DI_2</td><td>5</td><td>6</td><td>DI_10</td></tr><tr><td>-12Vout</td><td>2</td><td>21</td><td>(AIL15) AI31</td><td>DI_3</td><td>7</td><td>8</td><td>DI_11</td></tr><tr><td>AI15 (AIH15)</td><td>3</td><td>22</td><td>(AIL14) AI30</td><td>DI_4</td><td>9</td><td>10</td><td>DI_12</td></tr><tr><td>AI14 (AIH14)</td><td>4</td><td>23</td><td>(AIL13) AI29</td><td>DI_5</td><td>11</td><td>12</td><td>DI_13</td></tr><tr><td>AI13 (AIH13)</td><td>5</td><td>24</td><td>(AIL12) AI28</td><td>DI_6</td><td>13</td><td>14</td><td>DI_14</td></tr><tr><td>AI12 (AIH12)</td><td>6</td><td>25</td><td>(AIL11) AI27</td><td>DI_7</td><td>15</td><td>16</td><td>DI_15</td></tr><tr><td>AI11 (AIH11)</td><td>7</td><td>26</td><td>(AIL10) AI26</td><td>EICOM1</td><td>17</td><td>18</td><td>EICOM3</td></tr><tr><td>AI10 (AIH10)</td><td>8</td><td>27</td><td>(AIL9) AI25</td><td>EICOM2</td><td>19</td><td>20</td><td>EICOM4</td></tr><tr><td>AI9 (AIH9)</td><td>9</td><td>28</td><td>(AIL8) AI24</td><td></td><td></td><td></td><td></td></tr><tr><td>AI8 (AIH8)</td><td>10</td><td>29</td><td>AGND</td><td colspan="4">CN3</td></tr><tr><td>AGND</td><td>11</td><td>30</td><td>(AIL7) AI23</td><td>DO_0</td><td>1</td><td>2</td><td>DO_8</td></tr><tr><td>AI7 (AIH7)</td><td>12</td><td>31</td><td>(AIL6) AI22</td><td>DO_1</td><td>3</td><td>4</td><td>DO_9</td></tr><tr><td>AI6 (AIH6)</td><td>13</td><td>32</td><td>(AIL5) AI21</td><td>DO_2</td><td>5</td><td>6</td><td>DO_10</td></tr><tr><td>AI5 (AIH5)</td><td>14</td><td>33</td><td>(AIL4) AI20</td><td>DO_3</td><td>7</td><td>8</td><td>DO_11</td></tr><tr><td>AI4 (AIH4)</td><td>15</td><td>34</td><td>(AIL3) AI19</td><td>DO_4</td><td>9</td><td>10</td><td>DO_12</td></tr><tr><td>AI3 (AIH3)</td><td>16</td><td>35</td><td>(AIL2) AI18</td><td>DO_5</td><td>11</td><td>12</td><td>DO_13</td></tr><tr><td>AI2 (AIH2)</td><td>17</td><td>36</td><td>(AIL1) AI17</td><td>DO_6</td><td>13</td><td>14</td><td>DO_14</td></tr><tr><td>AI1 (AIH1)</td><td>18</td><td>37</td><td>(AILO) AI16</td><td>DO_7</td><td>15</td><td>16</td><td>DO_15</td></tr><tr><td>AI0 (AIH0)</td><td>19</td><td></td><td></td><td>EOGND</td><td>17</td><td>18</td><td>EOGND</td></tr><tr><td></td><td></td><td></td><td></td><td>VDD</td><td>19</td><td>20</td><td>VDD</td></tr></table>
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