# LittleBoard™800

# Single Board Computer

# Reference Manual

P/N 50-1Z029-1000 Revision 1.0

# NOTICE

No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, without the prior written permission of ADLINK Technology, Incorporated.

# DISCLAIMER

ADLINK Technology, Incorporated makes no representations or warranties with respect to the contents of this manual or of the associated ADLINK products, and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. ADLINK shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this product, even if it has been notified of the possibility of such damages. ADLINK reserves the right to revise this publication from time to time without obligation to notify any person of such revisions. If errors are found, please contact ADLINK at the address shown at the bottom of this notice.

# TRADEMARKS

CoreModule and the Ampro logo are registered trademarks, and ADLINK, Little Board, LittleBoard, MightyBoard, MightySystem, MilSystem, MiniModule, ReadyBoard, ReadyBox, ReadyPanel, ReadySystem, and RuffSystem are trademarks of ADLINK Technology, Inc. All other marks are the property of their respective companies.

REVISION HISTORY

<table><tr><td>Revision</td><td>Reason for Change</td><td>Date</td></tr><tr><td>A, A</td><td>Initial Release</td><td>Mar/07</td></tr><tr><td>A, B</td><td>Added 1.0 Ghz power measurements</td><td>Nov/07</td></tr><tr><td>B, A</td><td>Updates</td><td>Mar/09</td></tr><tr><td>1.0</td><td>Changed document part number from 5001816 to 50-1Z029-1000; swapped Ethernet reference designators in Table 2-2; added J30 pin 1 to board dwgs; added world-wide addresses to Appendix A</td><td>Oct/09</td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

ADLINK Technology, Incorporated

5215 Hellyer Avenue

San Jose, CA 95138-1007

Tel. 408 360-0200

Fax 408 360-0222

www.adlinktech.com

© Copyright 2006, 2007, 2008, 2009 ADLINK Technology, Incorporated

# Audience

This reference manual is for the person who designs computer related equipment, including but not limited to hardware and software design and implementation of the same. ADLINK Technology, Inc. assumes you are qualified in designing and implementing your hardware designs and their related software into your prototype computer equipment.

# Contents

# Chapter 1 About This Manual ..

Purpose of this Manual ..

References ..

# Chapter 2 Product Overview.........

EBX Architecture... .3

Product Description.. .4

Board Features .5

Block Diagram . .7

Major Components (ICs).. ..8

Headers and Connectors...... ..10

Jumper Headers .. ..13

Specifications...... ....13

Physical Specifications ...... ..13

Environmental Specifications.. ..14

Power Specifications ...... ..14

Thermal/Cooling Requirements. ..14

# Chapter 3 Hardware .17

Overview .... ..17

Interrupt Channel Assignments ..18

Memory Map . ..19

I/O Address Map . ..19

Floppy Drive Interface. ..20

Parallel Port Interface . ..20

Serial Interfaces ..21

Utility Interfaces ..25

Utility 1 Interface .25

Keyboard Interface . ..26

External Battery ... ..26

Reset Switch.. ..26

Speaker ...... ...26

Utility 2 Interface ........ .27

System Management Bus (SMBus) . .27

USB Signals (USB1 and USB2) .. ..27

Mouse Interface... ..27

Infrared Port (IrDA) . ..28

Utility 3 Interface .29

USB Signals (USB3 and USB4) . ..29

Audio Interface... ..30

Video Interfaces ...31

CRT Interface ..31

LVDS Interface . ..31

Power Interfaces ..

Power In.... ..33

Miscellaneous . ..34

Real Time Clock (RTC) . .34

Temperature Monitoring ..34

Oops! Jumper (BIOS Recovery) .. ..34

Serial Console.. . 35

Serial Console Setup . . 35

Hot (Serial) Cable .. 35

Watchdog Timer... . 35

Optional CPU Fan .. . 36

LAN LED . . 36

# Chapter 4 BIOS Setup .... . 37

Introduction.......... .. 37

Entering BIOS Setup (VGA Display) .. .. 37

Entering BIOS Setup (Serial Console) . .. 37

PCI-ISA Bridge Mapping . . 38

Logo Screen Utility (Splash Screen) . .. 38

Logo Screen Image Requirements . . 38

# Appendix A Technical Support . .. 39

Index ..... ... 41

# List of Figures

Figure 2-1. Stacking PC/104 Modules with the LittleBoard 800 . 4

Figure 2-2. Functional Block Diagram .

Figure 2-3. Component Locations (Front view) ....... 9

Figure 2-4. Component Locations (Back view).. . 10

Figure 2-5. Connector Pin-Out Identification ..... .... 11

Figure 2-6. Header and Connector Locations (Front view).. .. 12

Figure 2-7. LittleBoard 800 Dimensions . .. 15

Figure 3-1. RS485 Serial Port Implementation ......... . 22

Figure 3-2. Oops! Jumper Connection.. . 34

Figure 3-3. Hot Cable Jumper ........ .... 35

# List of Tables

Table 2-1. Major Integrated Circuit Description and Function ....... 8

Table 2-2. Header and Connector Descriptions . . 10

Table 2-3. Jumper Settings ..... . 13

Table 2-4. Weight and Footprint Dimensions ..... ..... 13

Table 2-5. Environmental Requirements . .. 14

Table 2-6. Power Supply Requirements. .. 14

Table 3-1. Interrupt Channel Assignments .. .. 18

Table 3-2. Memory Map ......... .. 19

Table 3-3. I/O Address Map ... .. 19

Table 3-4. Parallel Interface Pin/Signal Descriptions (J16) . . 20

Table 3-5. Serial A Interface Pin/Signal Descriptions (J11).... . 22

Table 3-6. Serial B Interface Pin/Signal Descriptions (J12).. . 24

Table 3-7. Utility 1 Interface Pin/Signal Descriptions (J15) .. .. 26

Table 3-8. SMBus Reserved Addresses .... . 27

Table 3-9. Utility 2 Interface Pin/Signal Descriptions (J13) ..... . 28

Table 3-10. Utility 3 Interface Pin/Signal Descriptions (J14) .. . 29

Table 3-11. Audio Interface Pin/Signal Descriptions (J9) .. . 30

Table 3-12. CRT Interface Pin/Signal Descriptions (J3).. ... 31

Table 3-13. LVDS Interface Pin/Signal Descriptions (J26). . 31

Table 3-14. Power Supply Input Pin/Signal Descriptions (J19) .. .. 33

Table 3-15. Power On Button and Reset Switch Header Pin/Signal Descriptions (J29)...........33

Table 3-16. Power On Header Pin/Signal Descriptions (J30) .. ..34

Table 3-17. Optional CPU Fan (J21) . ..36

Table 3-18. Ethernet External LED Pin/Signal Descriptions (J28) . ..36

Table A-1. Technical Support Contact Information........ ...39

# Purpose of this Manual

This manual is for designers of systems based on the LittleBoard™ 800 single board computer (SBC). This manual contains information that permits designers to create an embedded system based on specific design requirements.

Information provided in this reference manual includes:

• LittleBoard 800 specifications
Environmental requirements
Major integrated circuits (chips) and features implemented
. Header/connector pin numbers and definitions
• BIOS Setup information

Information not provided in this reference manual includes:

• Detailed chip specifications
• Internal component operation
• Internal registers or signal operations
Bus or signal timing for industry standard busses and signals

# References

The following list of references may be helpful for you to complete your design successfully. Most of these references are also available on the Ampro By ADLINK web site in the InfoCenter. The InfoCenter was created for embedded system developers to share ADLINK’s knowledge, insight, and expertise.

# Specifications:

EBX Spec Revision 2.0, March 1 2005
For the latest version of the EBX specifications, contact the PC/104 Consortium, at: Web site: http://www.pc104.org

PC/104 Spec Revision 2.5, November 2003

PC/104-Plus Spec Revision 2, November 2003

For latest revision of the PC/104 specifications, contact the PC/104 Consortium, at: Web site: http://www.pc104.org

• PCI 2.2 Compliant Specifications
For latest revision of the PCI specifications, contact the PCI Special Interest Group Office at: Web site: http://www.pcisig.com

Chip specifications used on the LittleBoard 800:

Intel Corporation and the Celeron M or Pentium M processors used for the embedded CPU.
Web site: http://www.intel.com/design/mobile/datashts/252612.htm = Pentium M
Web site: http://www.intel.com/design/intarch/datashts/301753.htm = Celeron M

Intel Corporation and the 82855GME and 82801DB chips, used for the Memory Hub/Video controller and I/O Hub, respectively.

Web site: http://www.intel.com/products/chipsets/855gme/index.htm = Memory Hub

Web site: http://www.intel.com/design/chipsets/datashts/290744.htm = I/O Hub

Intel Corporation and the 82551ER and 82541(GI/PI) chips, used for the Fast Ethernet and Gigabit Ethernet controllers respectively.

Web site: http://www.intel.com/design/network/datashts/82551ER\_ds.htm = Ethernet

Web site: http://www.intel.com/design/network/datashts/82541gi\_ei.htm = Gigabit Ethernet

. Standard Microsystems Corp and the LPC47B272 chip, used for both Super I/O controllers.

Web site: http://www.smsc.com/main/catalog/lpc47b272.html

Realtek and the ALC203-LF chip, used for the Audio CODEC.

Web site: http://www.realtek.com.tw/products/ productsView.aspx?Langid=1&PFid=29&Level=5&Conn=4&ProdID=53

ITE Tech. Inc. and the IT8888F chip, used for the PCI-to-ISA bridge conversion.

Web site: http://www.ite.com.tw/EN/products\_more.aspx?CategoryID=3&ID=5,76

# NOTE

If you are unable to locate the datasheets using the links provided, go to the manufacturer’s web site where you should be able to perform a search using the chip datasheet number or name listed, including the extension, htm, pdf, etc.

This introduction presents general information about the EBX architecture and the LittleBoard 800 single board computer (SBC). After reading this chapter you should understand:

EBX Architecture
LittleBoard 800 description
LittleBoard 800 features
• Major components
Header definitions
Jumper Header definitions

Specifications (physical, environmental, power, cooling)

# EBX Architecture

The “Embedded Board, eXpandable” (EBX) standard is the result of a collaboration between industry leaders, Motorola and Ampro, to unify the embedded computing industry on a full featured embedded single-board computer (SBC) standard. The EBX standard principally defines physical size, mounting hole pattern, and power connector locations. It does not specify processor type or electrical characteristics. There are recommended connector placements for serial/parallel, Ethernet, graphics, and memory expansion.

Derived from the Ampro LittleBoard form-factor originated in 1984, EBX combines a standard footprint with open interfaces. The EBX form-factor is small enough for deeply embedded applications, yet large enough to contain the functions of a fully embedded SBC (single board computer) including CPU, memory, mass storage interfaces, display controller, serial/parallel ports, today’s advanced operating systems, and other system functions. This embedded SBC standard ensures that embedded system OEMs can standardize their designs and that embedded computing solutions can be designed into space constrained environments with off-the-shelf components.

The EBX standard boasts highly flexible and adaptable system expansion, allowing easy and modular addition of functions such as additional USB 2.0 ports, Firewire or wireless networking not usually contained in standard product offerings. The EBX system expansion is based on popular existing industry standards, PC/104™ and PC/104-Plus™. PC/104 places the ISA bus on compact 3.6" x 3.8" modules with self-stacking capability. PC/104-Plus adds the power of a PCI bus to PC/104 while retaining the basic formfactor. Using PC/104 expansion cards, the PC/104 standard offers access to PC cards from the mobile and handheld computing markets.

The EBX standard integrates all these off-the-shelf standards into a highly embeddable SBC form-factor. EBX supports the legacy of PC/104, hosting the wide variety of embedded system oriented expansion modules from hundreds of companies worldwide. PC/104 brings the advantages of the latest portable and mobile system expansion technologies to embedded applications. See Figure 2-1 on page 4.

The EBX standard also brings stability to the embedded board market and offers OEMs assurance that a wide range of products will be available from multiple sources – now and in the future. The EBX standard is open to continuing technology advancements since it is processor independent. It creates opportunity for economies of scale in chassis, power supply, and peripheral devices.

The EBX specification is freely available to all interested. For further technical information on the EBX standard, go to the PC/104 Consortium web site at www.pc104.org.

![Based on the provided diagram, here is the accurate description of the labeled blocks and connections:\n\n**Labeled Blocks (from top to bottom):**\n*   **PC/104 Module** (Top board)\n*   **PC/104 Plus Module** (Middle board)\n*   **Little Board 800** (Bottom board)\n\n**Hardware and Connections:**\n*   **4-40 screws (4):** An arrow points to a screw securing the top of the assembly.\n*   **0.6 inch spacers (4):** An arrow points to a spacer post connecting the **PC/104 Module** to the **PC/104 Plus Module**.\n*   **ISA Bus Stackthrough Expansion Headers:** Arrows indicate these headers connect the top and middle boards on the right side.\n*   **PCI Stackthrough Headers:** Arrows indicate these headers connect the middle and bottom boards on the left side.\n*   **0.6 inch spacers (4):** A second arrow points to spacer posts connecting the **PC/104 Plus Module** to the **Little Board 800**.\n*   **4-40 nuts (4):** An arrow points to nuts securing the bottom of the assembly.\n*   **LB800stackthru:** Vertical text on the far right edge.](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/7b294a987371f661b6fb3a211597fb55ba978648964251981f802d44dcd20f7b.jpg)

Figure 2-1. Stacking PC/104 Modules with the LittleBoard 800

# Product Description

The LittleBoard 800 is an exceptionally high integration, high performance, rugged, and high quality singleboard system, which contains all the component subsystems of a PC motherboard plus the equivalent of up to 3 expansion boards. Based on the Intel Pentium® M and Celeron® M ultra high performance, highintegration processor, the LittleBoard 800 gives designers a complete, high performance embedded processor based on the EBX form factor and conforms to the EBX V2.0 specifications.

Each LittleBoard 800 incorporates an Intel 855GME chipset for the Graphics and Memory Hub (Northbridge) and the I/O Hub (Southbridge) controllers. This set includes the 82855GME, Graphics and Memory Controller Hub, (also GMCH), which controls the graphics and memory interface. The other chip in this set is the 82801DB, I/O Controller Hub 4 (ICH4), which controls some of the I/O functions on the board. There are two additional chips that provide the remainder of the I/O functions: the Standard Microsystems, LPC47B272, Super I/O controllers. Together the Intel and SMSC chips provide four serial ports, an EPP/ECP parallel port, four USB 2.0 ports, PS/2 keyboard and mouse interfaces, floppy and two Ultra/DMA 33/66/100 IDE controllers supporting two IDE drives each. To provide the ISA bus on the board through the PC/104 connector, an ITE, IT8888F, PCI-to-ISA Bridge is included. The LittleBoard 800 also supports up to 1GB of DDR RAM in a single 184-pin DDR DIMM slot, and an AGP4x equivalent graphics controller, which provides CRT and LVDS flat panel video interfaces for most popular LCD panels.

The LittleBoard 800 can be expanded through the PC/104 and PC/104-Plus expansion for additional system functions, as these buses offer compact, self-stacking, modular expandability. The PC/104 and PC/104-Plus buses are the embedded system version of the signal set provided on a desktop PC’s ISA and PCI buses at 8MHz and 33MHz clock speeds, respectively.

Among the many embedded-PC enhancements on the LittleBoard 800 that ensure embedded system operation and application versatility are a watchdog timer, serial console support, battery-free boot, onboard, high-density Compact Flash disk, and BIOS extensions for OEM boot customization.

The LittleBoard 800 is particularly well suited to either embedded or portable applications and meets the size, power consumption, temperature range, quality, and reliability demands of embedded system applications. It can be stacked with Ampro MiniModules™ or other PC/104-compliant expansion boards, or it can be used as a powerful computing engine.

# Board Features

# CPU features

Intel 1.4GHz LV, Pentium® M 738, 1.0GHz ULV Celeron M 373, or 800MHz ULV Celeron M Processors
2MB (Pentium) or 512KB (Celeron) L2 cache (800MHz Celeron is cacheless)
400MHz FSB

# . Memory

Single standard 184-pin DDR DIMM slot
Supports non-ECC or unbuffered ECC memory
Supports +2.5V DDR RAM up to 1GB
Supports up to PC2700 DDR 333 (166MHz)

# PC/104-Plus Bus Interfaces

♦ PCI Bus up to 33MHz
♦ PCI 2.2 compliant signals
♦ PC/104 (ISA) Bus up to 8MHz

# • IDE Interfaces

♦ Provides two enhanced IDE controllers (4 devices)
Supports dual bus master mode
Supports Ultra DMA 33/66/100 modes
Supports ATAPI and DVD peripherals
Supports IDE native and ATA compatibility modes

# Floppy Disk Interface

Supports one standard floppy disk drive interface
Supports all standard PC/AT formats: 360KB, 1.2MB, 720KB, 1.44MB, 2.88MB

# Parallel Port

Provides a standard printer interface
Supports IEEE standard 1284 protocols of EPP and ECP outputs
Supports Bi-directional data lines
Supports 16 byte FIFO for ECP mode.

# . Serial Ports

Four buffered serial ports with full handshaking
Provides 16550-equivalent controllers, each with a built-in 16-byte FIFO buffer
Supports full modem capability on two of the four ports
Supports RS232, RS485, or RS422 operation on each port
Supports programmable word length, stop bits, and parity
Supports 16-bit programmable baud-rate generator and an interrupt generator

• USB Ports

♦ Provides two root USB hubs
♦ Provides up to four USB ports
Supports USB boot devices
Supports USB v2.0 EHCI and UHCI v1.1
Supports over-current detection status

Infrared Interface

Supports IrDA 1.1 signals through Utility 2 connector

Keyboard/Mouse Interface

♦ Provides PS/2 keyboard interface
+ ♦ Provides PS/2 mouse interface

Audio interface

♦ Provides AC’97 CODEC on board
Supports AC’97 standard

Ethernet Interface

♦ Provides two fully independent Ethernet ports
♦ Provides integrated LEDs on each port (Link/Activity and Speed)
♦ Provides Intel 82551ER and 82541(GI/PI) controller chips
♦ Provides extra header for LAN LED signals (gigabit only)
Supports IEEE 802.3 10/100BaseT and 10/100/1000BaseT compatible physical layers
Supports Auto-negotiation for speed, duplex mode, and flow control
Supports full duplex or half-duplex mode

Full-duplex mode supports transmit and receive frames simultaneously
Supports IEEE 802.3x Flow control in full duplex mode
Half-duplex mode supports enhanced proprietary collision reduction mode

• Video Interfaces (CRT/LVDS)

Support CRT (2048 x 1536) with up to 64MB UMA (Unified Memory Architecture)
♦ AGP 4X equivalent graphics performance
♦ Dual channel 9-, 12-, or 18-bit LVDS
♦ LVDS outputs (1 or 2 channel, four differential signals: 3-bits + clock)

Miscellaneous

Real-time clock (RTC) with replaceable battery
Battery-free boot (Boots even if battery is dead or missing)
♦ Supports both on-board or external battery for Real Time Clock operation
Thermal and Voltage monitoring
♦ Oops! Jumper (BIOS recovery) support
Serial Console
Watchdog timer (WDT)

# Block Diagram

Figure 2-2 on page 7 shows the functional components of the board.
![Based on the provided block diagram, here are the labeled blocks and their connections:\n\n**Labeled Blocks:**\n*   CPU Intel Pentium M or Celeron M\n*   Clock\n*   Memory Hub (Northbridge) 855GME\n*   DDR SDRAM DIMM\n*   CRT Connector\n*   LVDS Connector\n*   I/O Hub (Southbridge) 82801DB\n*   SM Bus\n*   ATA\n*   IDE Primary / IDE Secondary\n*   Compact Flash\n*   USB\n*   USB Port 1 / USB Port 2 / USB Port 3 / USB Port 4\n*   LPC Bus\n*   Flash (BIOS) Memory FWH\n*   AC'97 CODEC\n*   PCI Bus\n*   PCI - ISA Bridge\n*   PC/104 Connector\n*   PC/104-Plus Bus Connector\n*   Ethernet Controller 82551ER\n*   Gigabit Ethernet Controller 82541(GI/PI)\n*   Magnetics RJ45\n*   Super I/O-1 LPC47B272\n*   Keyboard\n*   Mouse\n*   IrDA\n*   Floppy\n*   Parallel\n*   RS232 Transceiver and RS422/485 Transceiver\n*   COM 1\n*   COM 2\n*   COM 3\n*   COM 4\n*   Super I/O-2 LPC47B272\n\n**Connections:**\n*   **Clock** connects to **CPU Intel Pentium M or Celeron M**, **Memory Hub (Northbridge) 855GME**, and **I/O Hub (Southbridge) 82801DB**.\n*   **CPU Intel Pentium M or Celeron M** connects to **Memory Hub (Northbridge) 855GME**.\n*   **Memory Hub (Northbridge) 855GME** connects to **DDR SDRAM DIMM**, **CRT Connector**, and **LVDS Connector**.\n*   **Memory Hub (Northbridge) 855GME** connects to **I/O Hub (Southbridge) 82801DB**.\n*   **I/O Hub (Southbridge) 82801DB** connects to **AC'97 CODEC**.\n*   **I/O Hub (Southbridge) 82801DB** connects via **ATA** to **IDE Primary / IDE Secondary**, which connects to **Compact Flash**.\n*   **I/O Hub (Southbridge) 82801DB** connects via **USB** to **USB Port 1 / USB Port 2 / USB Port 3 / USB Port 4**.\n*   **I/O Hub (Southbridge) 82801DB** connects via **LPC Bus** to **Flash (BIOS) Memory FWH**, **Super I/O-1 LPC47B272**, and **Super I/O-2 LPC47B272**.\n*   **I/O Hub (Southbridge) 82801DB** connects to **PCI Bus**.\n*   **PCI Bus** connects to **PCI - ISA Bridge**, which connects to **PC/104 Connector**.\n*   **PCI Bus** connects to **PC/104-Plus Bus Connector**.\n*   **PCI Bus** connects to **Ethernet Controller 82551ER** and **Gigabit Ethernet Controller 82541(GI/PI)**, both of which connect to **Magnetics RJ45**.\n*   **Super I/O-1 LPC47B272** connects to **Keyboard**, **Mouse**, **IrDA**, **Floppy**, **Parallel**, and **RS232 Transceiver and RS422/485 Transceiver**.\n*   The **RS232 Transceiver and RS422/485 Transceiver** connected to Super I/O-1 connects to **COM 2** and **COM 1**.\n*   **Super I/O-2 LPC47B272** connects to **RS232 Transceiver and RS422/485 Transceiver**, which connects to **COM 3** and **COM 4**.](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/0a52146833d1e0bef304669a75a462d87c18261654fbbf395db97ebeded7ee2d.jpg)

Figure 2-2. Functional Block Diagram

# Major Components (ICs)

Table 2-1 on page 8 lists the major ICs, including a brief description of each, on the LittleBoard 800.

Figures 2-3 and 2-4 show the locations of the chips.

Table 2-1. Major Integrated Circuit Description and Function

<table><tr><td>Chip Type</td><td>Mfg.</td><td>Model</td><td>Description</td><td>Function</td></tr><tr><td>CPU (U1)</td><td>Intel</td><td>Pentium M or Celeron M</td><td>CPUs offered at 1.4GHz (LV Pentium M), 1.0GHz (ULV Celeron M), or 800MHz (ULV Celeron M)</td><td>Embedded CPU</td></tr><tr><td>Memory Hub (U2)</td><td>Intel</td><td>82855GME</td><td>Memory functions plus Video</td><td>Memory and Video</td></tr><tr><td>I/O Hub (U3)</td><td>Intel</td><td>82801DB</td><td>Some of the I/O functions</td><td>I/O Functions</td></tr><tr><td>Super I/O 1 &amp; 2 (U14, U16)[On back of board; see Figure 2-4]</td><td>SMC</td><td>LPC47B272</td><td>The remaining I/O controller functions</td><td>I/O Functions</td></tr><tr><td>Audio AC&#x27;97 CODEC (U7)</td><td>Realtek</td><td>ALC203-LF</td><td>Audio AC&#x27;97 CODEC for audio signals</td><td>Audio In/Out</td></tr><tr><td>Fast Ethernet Controller (U9)[On back of board; see Figure 2-4]</td><td>Intel</td><td>82551ER</td><td>10/100BaseT Ethernet controller</td><td>Ethernet functions</td></tr><tr><td>Gigabit Ethernet Controller (U11)[On back of board; see Figure 2-4]</td><td>Intel</td><td>82541(GI/PI)</td><td>10/100/1000BaseT Ethernet controller</td><td>Ethernet functions</td></tr><tr><td>Ethernet Transformer (T1)</td><td>Pulse</td><td>H5004</td><td>Gigabit Ethernet Transformer</td><td>Ethernet Magnetics</td></tr><tr><td>Ethernet Transformer (U31)</td><td>Pulse</td><td>H1102NLT</td><td>Fast Ethernet Transformer</td><td>Ethernet Magnetics</td></tr><tr><td>RS232 Transceiver (U17) [On back of board; see Figure 2-4]</td><td>Maxim</td><td>MAX213EEAI</td><td>RS232 Transceiver for COM1 and COM2</td><td>Serial Ports 1 and 2 Transceiver</td></tr><tr><td>RS485/422 Transceiver (U18)</td><td>Linear</td><td>LTC1334CG# PBF</td><td>RS422/485 Transceiver for COM1 and COM2</td><td>Serial Ports 1 and 2 Transceiver</td></tr><tr><td>RS232 Transceiver (U19)</td><td>Maxim</td><td>MAX213EEAI</td><td>RS232 Transceiver for COM3 and COM4</td><td>Serial Ports 3 and 4 Transceiver</td></tr><tr><td>RS485/422 Transceiver (U20)[On back of board; see Figure 2-4]</td><td>Linear</td><td>LTC1334CG# PBF</td><td>RS422/485 Transceiver for COM3 and COM4</td><td>Serial Ports 3 and 4 Transceiver</td></tr><tr><td>ISA Bridge (U51)[On back of board; see Figure 2-4]</td><td>ITE</td><td>IT8888F</td><td>PCI-to-ISA bridge conversion</td><td>ISA Bus</td></tr></table>

![U1\nU2\nU7\nU3\nU13\nT1\nU31\nU19\nU18](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/8fe41076ddfae390859e79d63f19adc72c2449bfa2e39fb8ee4ab6f4d98918c3.jpg)

Figure 2-3. Component Locations (Front view)

![U51\nU9\nU11 U14 U16\nU17 U20](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/916aa49402a699ce6a277ff34ed77aaf35c29a36b58f12ea5da26af379c5125e.jpg)

Figure 2-4. Component Locations (Back view)

# Headers and Connectors

Table 2-2 describes the headers and connectors shown in Figure 2-6 on page 12. All I/O headers use 0.100" (2.54mm) pin spacing unless otherwise indicated.

Table 2-2. Header and Connector Descriptions

<table><tr><td>Jack #</td><td>Name</td><td>Description</td></tr><tr><td>SK1</td><td>Battery Socket</td><td>Battery socket for 3 volt Lithium battery</td></tr><tr><td>DIMM1</td><td>Memory</td><td>184-pin, .050" (1.27mm), slot for a single DDR RAM DIMM</td></tr><tr><td>J1A,B,C,D</td><td>PC/104 bus</td><td>104-pins for PC/104 connector</td></tr><tr><td>J2A,B,C,D</td><td>PC/104-Plus</td><td>120-pin, .079" (2mm), connector for PCI bus</td></tr><tr><td>J3</td><td>Video (CRT)</td><td>10-pin connector for output to a CRT type monitor</td></tr><tr><td>J6</td><td>Primary IDE</td><td>40-pin connector for the primary IDE interface</td></tr><tr><td>J7</td><td>Secondary IDE</td><td>40-pin connector for the secondary IDE interface</td></tr><tr><td>J8</td><td>Compact Flash</td><td>50-pin, .050" (1.27mm), socket accepts Type I or Type II Compact Flash cards</td></tr><tr><td>J9</td><td>Audio In/Out</td><td>26-pin, .079" (2mm), connector for all of the audio signals (input/output)</td></tr><tr><td>J10</td><td>Ethernet 1</td><td>8-pin RJ45 connector for 10/100BaseT Ethernet port</td></tr><tr><td>J11</td><td>Serial A</td><td>20-pin connector for serial ports 1 and 2 (COM 1 &amp; COM 2)</td></tr><tr><td>J12</td><td>Serial B</td><td>20-pin connector for serial ports 3 and 4 (COM 3 &amp; COM 4)</td></tr><tr><td>J13</td><td>Utility 2</td><td>24-pin connector for mouse, IrDA, SMBus, USB 0 &amp; 1, power button</td></tr><tr><td>J14</td><td>Utility 3</td><td>10-pin connector for USB2 and USB3 ports</td></tr><tr><td>J15</td><td>Utility 1</td><td>16-pin connector for keyboard, external battery, reset switch, speaker</td></tr><tr><td>J16</td><td>Parallel</td><td>26-pin connector for parallel port</td></tr><tr><td>J17</td><td>Floppy</td><td>34-pin connector for floppy disk drive interface</td></tr><tr><td>J19</td><td>Power In</td><td>7-pin, 0.156" (3.96mm), connector for input power</td></tr><tr><td>J21</td><td>Optional Fan</td><td>3-pin header provides +5V, tach, and ground to optional CPU fan</td></tr><tr><td>J23</td><td>Ethernet 2</td><td>8-pin RJ45 connector for 10/100/1000BaseT Ethernet port</td></tr><tr><td>J26</td><td>Video (LVDS)</td><td>30-pin, .079" (2mm), connector for LVDS type video displays</td></tr><tr><td>J28</td><td>LAN LED</td><td>5-pin LAN LED connector for extra gigabit Ethernet LED</td></tr><tr><td>J29</td><td>Power Button</td><td>5-pin header for ATX power button cable</td></tr><tr><td>J30</td><td>Power-On</td><td>3-pin connector for ATX power-on functions</td></tr></table>

# NOTE

ADLINK uses a connector/header identification method in Chapter 3 to avoid difficult to see visible numbering next to the headers. For example, a 20-pin header with two rows of pins, using odd/even numbering, where pin-2 is directly across and adjacent to pin-1, is noted in this way; 20-pin, two rows, odd/even (1, 2). Alternately, a 20-pin header using consecutive numbering, where pin-11 is directly across and adjacent to pin-1, is noted in this way: 20-pin, two rows, consecutive (1, 11). The second number in the parenthesis is always directly across from and adjacent to pin-1, with a few exceptions (DIMM1 slot, PC/104- Plus, PC/104). See Figure 2-5.

![| Pin Type | Row | Value |\n| -------- | --- | ----- |\n| 20-pin, two rows, Odd/Even, (1, 2) | 19 | 19 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 9 | 9 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 7 | 7 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 5 | 5 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 3 | 3 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 1 | 1 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 1 | 1 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 20 | 20 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 20 | 20 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 10 | 10 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 5 | 5 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 4 | 4 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 3 | 3 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 2 | 2 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 11 | 11 |\n| Consecutive | 10 | 10 |\n| Consecutive | 5 | 5 |\n| Consecutive | 4 | 4 |\n| Consecutive | 3 | 3 |\n| Consecutive | 2 | 2 |\n| Consecutive | 1 | 1 |\n| Consecutive | 11 | 11 |\n| Consecutive | 20 | 20 |\n| Consecutive | 15 | 15 |\n| Consecutive | 11 | 11 |](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/9917593687c33fff615c55a94eca6da7439dfdfa3a92f756799df3ea670b3ad7.jpg)

Figure 2-5. Connector Pin-Out Identification

![JP1\nJ26\nJ21\nJ3\nJ9\nJ14\nDIMM1\nJ1\nJ2\nJP19\nBATT\nJ8\nJP4\nJP5\nJ16\nJ12\nJ11\nJ10\nJ23\nJ30\nJ29\nJ17\nJ13\nJ7\nJ28\nJ15\nJ6\nJP7 JP2\nJ19\nBoard Grounding Pad](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/d230f52307e7967d5236b4119a068b7402329eb3aca3f9b9a88e4c9413fc697e.jpg)

Figure 2-6. Header and Connector Locations (Front view)

# CAUTION

The two Ethernet ports share a common ground (transformer center tap), that is floating until you determine how the common ground is connected. The grounding holes (8) of the LittleBoard 800 are connected to ground potential (return) of the DC power supply connected to the board through J19.

# NOTE

Pin-1 is shown as a black pin (square or round) in all connectors and jumpers in all illustrations.

# Jumper Headers

Table 2-3 describes the jumper headers shown in Figure 2-6 on page 12.

Table 2-3. Jumper Settings

<table><tr><td>Jumper #</td><td>Installed</td><td>Removed/Installed</td></tr><tr><td>JP1 – LVDS Voltage Select</td><td>Enable +3.3V (pins 1-2) Default</td><td>Enable +5V (pins 2-3)</td></tr><tr><td>JP2 – Compact Flash Master/Slave</td><td>Enable Slave (pins 1-2)</td><td>Enable Master (pins 2-3) Default</td></tr><tr><td>JP3 – Compact Flash Voltage Selection</td><td>Enable +5V (pins 1-2) Default</td><td>Enable +3.3V (pins 2-3)</td></tr><tr><td>JP4 – Serial Port 1 RS485 Termination</td><td>Enable Termination (pins 1-2)</td><td>Disable Termination (Removed) Default</td></tr><tr><td>JP5 – Serial Port 2 RS485 Termination</td><td>Enable Termination (pins 1-2)</td><td>Disable Termination (Removed) Default</td></tr><tr><td>JP6 – Serial Port 3 RS485 Termination</td><td>Enable Termination (pins 1-2)</td><td>Disable Termination (Removed) Default</td></tr><tr><td>JP7 – Serial Port 4 RS485 Termination</td><td>Enable Termination (pins 1-2)</td><td>Disable Termination (Removed) Default</td></tr><tr><td>JP19 – CMOS Normal/Clear</td><td>Clear CMOS (pins 1-2)</td><td>Normal (Removed) Default</td></tr></table>

Note: Only the jumper headers listed above are populated on the board. Jumpers or shunts use .079" (2mm) spacing. A jumper that is removed may be placed on one of the jumper pins for safe keeping.

# Specifications

# Physical Specifications

Table 2-4 gives the physical dimensions of the board.

Table 2-4. Weight and Footprint Dimensions

<table><tr><td>Item</td><td>Dimension</td><td rowspan="6">NOTE</td><td rowspan="6">Overall height is measured from the upper board surface to the highest permanent component (battery in socket) on the upper board surface. This measurement does not include the various heatsinks or various size DIMMs inserted into the socket. The DIMMs or heatsinks could increase this dimension.</td></tr><tr><td>Weight</td><td>0.351kg. (0.775lbs.)</td></tr><tr><td>Height (overall)</td><td>24.94mm (0.982&quot;)</td></tr><tr><td>Width</td><td>146mm (5.75&quot;)</td></tr><tr><td>Length</td><td>203mm (8.0&quot;)</td></tr><tr><td>Thickness</td><td>2.36mm (0.093&quot;)</td></tr></table>

# Environmental Specifications

Table 2-5 provides the most efficient operating and storage condition ranges required for this board.
Table 2-5. Environmental Requirements

<table><tr><td></td><td>Parameter</td><td>800MHz Celeron M Conditions</td><td>1.0GHz Celeron M Conditions</td><td>1.4GHz Pentium M Conditions</td></tr><tr><td rowspan="3">Temperature</td><td>Operating</td><td>-20° to +70°C(-4° to +158°F)</td><td>-20° to +70°C(-4° to +158°F)</td><td>-20° to +70°C(-4° to +158°F)</td></tr><tr><td>Extended (Optional)</td><td>-40° to +85°C(-40° to +185°F)</td><td>-40° to +85°C(-40° to +185°F)</td><td>-40° to +85°C*(-40° to +185°F)</td></tr><tr><td>Storage</td><td>-55° to +85°C(-67° to +185°F)</td><td>-55° to +85°C(-67° to +185°F)</td><td>-55° to +85°C(-67° to +185°F)</td></tr><tr><td rowspan="2">Humidity</td><td>Operating</td><td>5% to 95%relative humidity,non-condensing</td><td>5% to 95%relative humidity,non-condensing</td><td>5% to 95%relative humidity,non-condensing</td></tr><tr><td>Non-operating</td><td>5% to 95%relative humidity,non-condensing</td><td>5% to 95%relative humidity,non-condensing</td><td>5% to 95%relative humidity,non-condensing</td></tr></table>

Note: \*The 1.4GHz Pentium M requires a fan above $7 0 \mathrm { { } ^ { \circ } C }$ .

# Power Specifications

Table 2-6 shows the power requirements from the baseboard and the board power output.
Table 2-6. Power Supply Requirements

<table><tr><td>Parameter</td><td>800MHzCeleron MCharacteristics</td><td>1.0GHzCeleron MCharacteristics</td><td>1.4GHzPentium MCharacteristicsw/o fan</td><td>1.4GHzPentium MCharacteristicsw/fan</td></tr><tr><td>Input Type</td><td>Regulated DCvoltages</td><td>Regulated DCvoltages</td><td>Regulated DCvoltages</td><td>Regulated DCvoltages</td></tr><tr><td>In-rush Current</td><td>14.24A (71.20W)</td><td>14.24A (71.20W)</td><td>14.44A (72.20W)</td><td>14.89A (74.45W)</td></tr><tr><td>Idle Power</td><td>1.94A (9.68W)</td><td>1.78A (9.90W)</td><td>1.87A (9.35W)</td><td>2.74A (13.72W)</td></tr><tr><td>BIT Current</td><td>2.99A (14.96W)</td><td>2.81A (14.03W)</td><td>3.57A (17.85W)</td><td>4.11A (20.56W)</td></tr></table>

# Operating conditions:

• In-rush operating conditions include video, 512MB DDR RAM, and power.
Idle operating conditions include the in-rush conditions as well as an I/O board, one IDE hard drive with Windows XP, keyboard, and mouse.
BIT = Burn-In-Test. Operating conditions include idle conditions as well as four serial loop-backs, one parallel loop-back, one USB DVD Drive, one on-board Compact Flash drive with 256 MB Compact Flash, two Ethernet connections, two USB Compact Flash readers with 256MB Compact Flash, one USB floppy drive.

# Thermal/Cooling Requirements

The CPU, Memory Hub, I/O Hub, and voltage regulators are the sources of heat on the board. The LittleBoard 800 is designed to operate at the maximum speed of the respective CPUs: 800MHz, 1.0GHz, or 1.4GHz. The Celeron M CPUs require a heatsink but no fan for -40°C to $+ 8 5 ^ { \circ } \mathrm { C }$ operation. The Pentium M CPU requires a heatsink but no fan for -20° to +70°C operation, but does require a fan above +70°C (+70°C to $+ 8 5 ^ { \circ } \dot { \mathrm { C } }$ operation).

# Mechanical Specifications

Figure 2-7 shows the top view of the LittleBoard 800 with the mechanical mounting dimensions.
![0.20\n0\n0.20\n0\n2.65\n2.80\n5.80\n5.70\n7.22\n7.60\n7.80\n0.20\n0\n5.35\n5.55](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/149ef123a964446f47573ee316aac49c79e60ed58197efea34074f47d5ea244f.jpg)

Figure 2-7. LittleBoard 800 Dimensions

NOTE All dimensions are given in inches.

# Overview

This chapter discusses the following features of the connectors:

Interrupt Channel Assignments
• Memory Map
• I/O Address Map
Floppy Interface
. Serial Interfaces
. Parallel Interface
Utility Interfaces

♦ Keyboard
▲ Mouse
♦ Battery
♦ Reset Switch
♦ Speaker
♦ USB
♦ SMBus
♦ Infrared (IrDA)

. Audio Interface
CRT/LVDS Video Interfaces
Power Interfaces
♦ Power In
♦ ATX Power

. Miscellaneous

♦ Time of Day/RTC
Temperature Monitoring
♦ Oops! Jumper (BIOS recovery)
Serial Console
Watchdog timer
Optional CPU fan
♦ LAN LED

# NOTE

ADLINK Technology, Inc. only supports the features/options tested and listed in this manual. The main integrated circuits (chips) used in the LittleBoard 800 may provide more features or options than are listed for the LittleBoard 800, but some of these chip features/options are not supported on the board and may not function as specified in the chip documentation.

This chapter does not include pinout tables for standard headers and connectors such as PC/104, Ethernet RJ45, 40-pin IDE, Floppy, and Compact Flash.

# Interrupt Channel Assignments

The interrupt channel assignments are shown in Table 3-1.

Table 3-1. Interrupt Channel Assignments

<table><tr><td>Device vs IRQ No.</td><td>0</td><td>1</td><td>2</td><td>3</td><td>4</td><td>5</td><td>6</td><td>7</td><td>8</td><td>9</td><td>10</td><td>11</td><td>12</td><td>13</td><td>14</td><td>15</td></tr><tr><td>Timer</td><td>D</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>Keyboard</td><td></td><td>D</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>Secondary Cascade</td><td></td><td></td><td>D</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>COM1</td><td></td><td></td><td></td><td>O</td><td>D</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>COM2</td><td></td><td></td><td></td><td>D</td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>COM3</td><td></td><td></td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td><td>D</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>COM4</td><td></td><td></td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>D</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>Floppy</td><td></td><td></td><td></td><td></td><td></td><td></td><td>D</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>Parallel</td><td></td><td></td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td>D</td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>RTC</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td>D</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>IDE Primary</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td>D</td><td></td></tr><tr><td>IDE Secondary</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td>D</td></tr><tr><td>Math Coprocessor</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td>D</td><td></td><td></td></tr><tr><td>PS/2 Mouse</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td>D</td><td></td><td></td><td></td></tr><tr><td>PCI INTA</td><td></td><td></td><td></td><td>O</td><td>O</td><td>D</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>PCI INTB</td><td></td><td></td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>D</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>PCI INTC</td><td></td><td></td><td></td><td>O</td><td>O</td><td>D</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>PCI INTD</td><td></td><td></td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>D</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>PCI INTE</td><td></td><td></td><td></td><td>O</td><td>O</td><td>D</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>PCI INTF</td><td></td><td></td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>D</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr><tr><td>PCI INTH</td><td></td><td></td><td></td><td>O</td><td>O</td><td>D</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td><td>O</td><td>O</td><td></td><td>O</td><td>O</td></tr></table>

Legend: D = Default, O = Optional

# NOTE

The IRQs for the Ethernet, Video, and Internal Local Bus (ISA) are automatically assigned by the BIOS Plug and Play logic. Local IRQs assigned during initialization can not be used by external devices.

# Memory Map

The following table provides the common PC/AT memory allocations. Memory below 000500h is used by the BIOS.

Table 3-2. Memory Map

<table><tr><td colspan="2">Base Address</td><td>Function</td></tr><tr><td>00000000h</td><td>- 0009FFFFh</td><td>Conventional Memory</td></tr><tr><td>000A0000h</td><td>- 000AFFFFh</td><td>Graphics Memory</td></tr><tr><td>000B0000h</td><td>- 000B7FFFh</td><td>Mono Text Memory</td></tr><tr><td>000B8000h</td><td>- 000BFFFFh</td><td>Color Text Memory</td></tr><tr><td>000C0000h</td><td>- 000CFFFFh</td><td>Standard Video BIOS</td></tr><tr><td>000D0000h</td><td>- 000DFFFFh</td><td>Reserved for Extended BIOS</td></tr><tr><td>000E0000h</td><td>- 000EFFFFh</td><td>Extended System BIOS Area</td></tr><tr><td>000F0000h</td><td>- 000FFFFFFh</td><td>System BIOS Area (Storage and RAM Shadowing)</td></tr><tr><td>00100000h</td><td>- 04000000h</td><td>Extended Memory (If on-board VGA is enabled, then the amount of memory assigned is subtracted from extended memory)</td></tr><tr><td>FFF80000h</td><td>- FFFFFFFh</td><td>System Flash</td></tr></table>

# I/O Address Map

Table 3-3 shows the I/O address map.

Table 3-3. I/O Address Map

<table><tr><td>Address (hex)</td><td>Subsystem</td></tr><tr><td>0000-000F</td><td>Primary DMA Controller</td></tr><tr><td>0020-0021</td><td>Master Interrupt Controller</td></tr><tr><td>0040-0043</td><td>Programmable Interrupt Timer (Clock/Timer)</td></tr><tr><td>0060-06F</td><td>Keyboard Controller</td></tr><tr><td>0061</td><td>NMI, Speaker Controller</td></tr><tr><td>0063</td><td>NMI Controller</td></tr><tr><td>0064</td><td>Keyboard Controller</td></tr><tr><td>0065</td><td>NMI Controller</td></tr><tr><td>0067</td><td>NMI Controller</td></tr><tr><td>0070-007F</td><td>CMOS RAM, NMI Mask Reg, RT Clock</td></tr><tr><td>0080-09F</td><td>System reserved</td></tr><tr><td>0081-0083</td><td>DMA Page Registers</td></tr><tr><td>0084-0086</td><td>System Reserved</td></tr><tr><td>0087</td><td>DMA page Register</td></tr><tr><td>0088</td><td>System reserved</td></tr><tr><td>0089-008B</td><td>DMA page Registers</td></tr><tr><td>008C-008E</td><td>System reserved</td></tr><tr><td>008F</td><td>DMA page Register</td></tr><tr><td>0090-0091</td><td>System reserved</td></tr><tr><td>092</td><td>Fast A20 Gate and CPU Reset</td></tr><tr><td>0093-009F</td><td>System reserved</td></tr><tr><td>00A0-00A1</td><td>Slave Interrupt Controller</td></tr><tr><td>00A2-00BF</td><td>System reserved</td></tr><tr><td>00C0-00DF</td><td>Slave DMA Controller #2</td></tr><tr><td>00E0-00EF</td><td>System reserved</td></tr><tr><td>0F0-00FF</td><td>Math Coprocessor</td></tr><tr><td>0170-0177</td><td>Secondary IDE Hard Disk Controller</td></tr><tr><td>01F0-01F7</td><td>Primary IDE Hard Disk Controller</td></tr><tr><td>0278-027F</td><td>Parallel Printer</td></tr><tr><td>02E8-02EF</td><td>Serial Port 4 (COM4)</td></tr><tr><td>02F8-02FF</td><td>Serial Port 2 (COM2)</td></tr><tr><td>0376</td><td>Secondary IDE Disk Controller</td></tr><tr><td>0378-037F</td><td>Parallel Port (Standard and EPP)</td></tr><tr><td>03B0-03BB</td><td>Video (Monochrome)</td></tr><tr><td>03C0-03DF</td><td>VGA</td></tr><tr><td>03E8-03EF</td><td>Serial Port 3 (COM3)</td></tr><tr><td>03F0-03F5</td><td>Floppy Disk Controller</td></tr><tr><td>03F6</td><td>Primary IDE Disk Controller</td></tr><tr><td>03F7</td><td>Floppy Disk Controller</td></tr><tr><td>03F8-03FF</td><td>Serial Port 1 (COM1)</td></tr><tr><td>04D0-04D1</td><td>Edge/Level Trigger PIC</td></tr><tr><td>0778-077F</td><td>Parallel Port (ECP Extensions) (Port 378+400)</td></tr><tr><td>0CF8-0CFF</td><td>PCI Configuration Registers</td></tr><tr><td>0CF9</td><td>Reset Control Register</td></tr></table>

# Floppy Drive Interface

The LPC47B272 chip provides the floppy controller and supports one floppy drive as configured. The floppy signals are provided through the standard 34-pin connector (J17). The floppy controller will support a 360k, 720k, 1.2M, 1.44M, or 2.88M drive.

The floppy drive header has 34 pins, 2 rows, odd/even, (1, 2) with 0.100" pitch.

# Parallel Port Interface

Parallel port supports standard parallel, Bi-directional, ECP and EPP protocols. The LPC47B272 provides separate parallel port interface signals not shared with the floppy drive signals.

The parallel header uses 26 pins, 2 rows, odd/even, (1, 2), with 0.100" pitch.

Note: The shaded area denotes power or ground. The signals marked with \* = Negative true logic.
Table 3-4. Parallel Interface Pin/Signal Descriptions (J16)

<table><tr><td>Pin #</td><td>Signal</td><td>In/Out</td><td>Description</td></tr><tr><td>1</td><td>Strobe*</td><td>Out</td><td>Strobe* – This is an output signal used to strobe data into the printer. I/O pin in ECP/EPP mode.</td></tr><tr><td>2</td><td>AFD*</td><td>Out</td><td>Auto Feed* – This is a request signal into the printer to automatically feed one line after each line is printed.</td></tr><tr><td>3</td><td>PD0</td><td>I/O</td><td>Parallel Port Data 0 – These pins (0 to 7) provide parallel port data.</td></tr><tr><td>4</td><td>ERR*</td><td>Out</td><td>Error* – This is a status output signal from the printer. A Low State indicates an error condition on the printer.</td></tr><tr><td>5</td><td>PD1</td><td>I/O</td><td>Parallel Port Data 1 – Refer to pin-3 for more information.</td></tr><tr><td>6</td><td>INIT*</td><td>Out</td><td>Initialize* – This signal used to Initialize printer. Output in standard Mode, I/O in ECP/EPP mode.</td></tr><tr><td>7</td><td>PD2</td><td>I/O</td><td>Parallel Port Data 2 – Refer to pin-3 for more information.</td></tr><tr><td>8</td><td>SLIN</td><td>Out</td><td>Select In – This output signal is used to select the printer. I/O pin in ECP/EPP mode.</td></tr><tr><td>9</td><td>PD3</td><td>I/O</td><td>Parallel Port Data 3 – Refer to pin-3 for more information.</td></tr><tr><td>10, 12</td><td>GND</td><td></td><td>Ground</td></tr><tr><td>11</td><td>PD4</td><td>I/O</td><td>Parallel Port Data 4 – Refer to pin-3 for more information.</td></tr><tr><td>13</td><td>PD5</td><td>I/O</td><td>Parallel Port Data 5 – Refer to pin-3 for more information.</td></tr><tr><td>14, 16</td><td>GND</td><td></td><td>Ground</td></tr><tr><td>15</td><td>PD6</td><td>I/O</td><td>Parallel Port Data 6 – Refer to pin-3 for more information.</td></tr><tr><td>17</td><td>PD7</td><td>I/O</td><td>Parallel Port Data 7 – Refer to pin-3 for more information.</td></tr><tr><td>18, 20</td><td>GND</td><td></td><td>Ground</td></tr><tr><td>19</td><td>ACK*</td><td>In</td><td>Acknowledge* – This printer output status indicates it has received the data and is ready to accept new data if the signal state is Low.</td></tr><tr><td>21</td><td>BUSY</td><td>In</td><td>Busy – This printer output status indicates the printer is not ready to accept data if the signal state is High.</td></tr><tr><td>22, 24</td><td>GND</td><td></td><td>Ground</td></tr><tr><td>23</td><td>PE</td><td>In</td><td>Paper End – The printer output status indicates the printer is out of paper if the signal state is High.</td></tr><tr><td>25</td><td>SLCT</td><td>In</td><td>Select – This printer output status indicates the printer is selected and powered on if the signal state is high.</td></tr><tr><td>26</td><td>Key/NC</td><td></td><td>Key - Not connected</td></tr></table>

# Serial Interfaces

Two LPC47B272 chips provide the circuitry for the 4 serial ports. One chip provides serial ports 1 and 2 through connector J11 and the second chip provides serial ports 3 and 4 through connector J12. The four serial ports support the following features:

Four individual 16550-compatible UARTs
Programmable word length, stop bits and parity
16-bit programmable baud rate generator
Interrupt generator
• Loop-back mode
. Four individual 16-bit FIFOs

. Serial A Interface (J11)

♦ Serial Port 1 (COM1) supports RS232/RS485/RS422 and full modem support
Serial Port 2 (COM2) supports RS232/RS485/RS422

Serial B Interface (J12)

♦ Serial Port 3 (COM3) supports RS232/RS485/RS422 and full modem support
Serial Port 4 (COM4) supports RS232/RS485/RS422

# NOTE

The RS232 and RS485/RS422 modes can be selected for any serial port in BIOS Setup under the Advanced menu. However, the RS232 mode is the default selection (Standard) for any serial port.

To implement the two-wire RS485 mode on any serial port, you must tie the equivalent pins together for each port.

For example, on Serial Port 1, tie pin 3 to 5 and pin 4 to 6 at the Serial A interface connector (J11) as shown in Figure 3-1. As an alternate, tie pin 2 to 3 and pin 7 to 8 at the DB9 serial connector for Serial Port 1 as shown in Figure 3-1. Refer also to the following tables for the specific pins for the other ports on each connector. The RS422 mode uses a four-wire interface and does not need any pins tied together, but you must select RS485 in BIOS Setup.

![Serial A Interface (J11)\nfor Serial Port 1\n(or COM1 Port)\nTop View](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/da1017620c93046e9521efe98ff3905b34c742160f3f262421488c2729226a41.jpg)

Or
![Standard DB9 Serial\nPort Connector (Female)\nRear View\n1 2 3 4 5\n6 7 8 9](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/ed62798ae6e2ee909ec3b3dae0ad1a00375f719d2747ce2d4cf6857d84a1f42b.jpg)

Figure 3-1. RS485 Serial Port Implementation
Table 3-5 Defines the pins and corresponding signals for the Serial A interface connector (Serial Ports 1 and 2) and Table 3-6 defines the pins and corresponding signals for the Serial B interface connector (Serial Ports 3 and 4).

Both Serial A and B headers use 20 pins, 2 rows, odd/even, (1, 2), with 0.100" pitch.

Note: The shaded area denotes power or ground. Signals are listed in the table with RS232 first, followed by RS485/RS422.
Table 3-5. Serial A Interface Pin/Signal Descriptions (J11)

<table><tr><td>Pin #</td><td>Pin # DB9</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>1 (COM1)</td><td>DCD1*</td><td>Data Carrier Detect 1 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open). In direct connect environments, this input will be driven by DTR1 as part of the DTR/DSR handshake.</td></tr><tr><td>2</td><td>6</td><td>DSR1*</td><td>Data Set Ready 1 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR1 for overall readiness to communicate.</td></tr><tr><td rowspan="2">3</td><td rowspan="2">2</td><td>RXD1</td><td>Receive Data 1 – Serial port 1 receive data in.</td></tr><tr><td>RX1-</td><td>RX1- – If in RS485 or RS422 mode, this pin is Receive Data 1 -.</td></tr><tr><td rowspan="2">4</td><td rowspan="2">7</td><td>RTS1*</td><td>Request To Send 1 – Indicates Serial port 1 is ready to transmit data. Used as hardware handshake with CTS1 for low level flow control.</td></tr><tr><td>TX1+</td><td>TX1+ – If in RS485 or RS422 mode, this pin is Transmit Data 1 +.</td></tr><tr><td rowspan="2">5</td><td rowspan="2">3</td><td>TXD1</td><td>Transmit Data 1 – Serial port 1 transmit data out.</td></tr><tr><td>TX1-CTS1*</td><td>TX1- – If in RS485 or RS422 mode, this pin is Transmit Data 1 -.Clear to Send 1 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS1 for low level flow control.</td></tr><tr><td rowspan="2">6</td><td rowspan="2">8</td><td></td><td></td></tr><tr><td>RX1+</td><td>RX1+ – If in RS485 or RS422 mode, this pin is Receive Data 1 -.</td></tr><tr><td>7</td><td>4</td><td>DTR1*</td><td>Data Terminal Ready 1 – Indicates this Serial port is powered, initialized, and ready. Used as hardware handshake with DSR1 for overall readiness to communicate.</td></tr><tr><td>8</td><td>9</td><td>RI1*</td><td>Ring Indicator 1 – Indicates external serial communications device is detecting a ring condition. Used by software to initiate operations to answer and open the communications channel.</td></tr><tr><td>9</td><td>5</td><td>GND</td><td>Ground</td></tr><tr><td>10</td><td>NC</td><td>KEY/NC</td><td>KeyNot connected</td></tr><tr><td>11</td><td>1(COM2)</td><td>DCD2*</td><td>Data Carrier Detect 2 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open). In direct connect environments, this input will be driven by DTR2 as part of the DTR/DSR handshake.</td></tr><tr><td>12</td><td>6</td><td>DSR2*</td><td>Data Set Ready 2 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR2 for overall readiness to communicate.</td></tr><tr><td rowspan="2">13</td><td rowspan="2">2</td><td>RXD2</td><td>Receive Data 2 – Serial port 2 receive data in.</td></tr><tr><td>RX2-</td><td>RX1- – If in RS485 or RS422 mode, this pin is Receive Data 1 -.</td></tr><tr><td rowspan="2">14</td><td rowspan="2">7</td><td>RTS2*</td><td>Request To Send 2 – Indicates Serial port 2 is ready to transmit data. Used as hardware handshake with CTS2 for low level flow control.</td></tr><tr><td>TX2+</td><td>TX2+ – If in RS485 or RS422 mode, this pin is Transmit Data 2 +.</td></tr><tr><td rowspan="2">15</td><td rowspan="2">3</td><td>TXD2</td><td>Transmit Data 2 – Serial port 2 transmit data out</td></tr><tr><td>TX2-</td><td>TX2- – If in RS485 or RS422 mode, this pin is Transmit Data 2 -.</td></tr><tr><td rowspan="2">16</td><td rowspan="2">8</td><td>CTS2*</td><td>Clear To Send 2 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS2 for low level flow control.</td></tr><tr><td>RX2+</td><td>RX2+ – If in RS485 or RS422 mode, this pin is Receive Data 2 -.</td></tr><tr><td>17</td><td>4</td><td>DTR2*</td><td>Data Terminal Ready 2 – Indicates Serial port 1 is powered, initialized, and ready. Used as hardware handshake with DSR2 for overall readiness to communicate.</td></tr><tr><td>18</td><td>9</td><td>NC</td><td>Not Connected (Ring Indicator 2)</td></tr><tr><td>19</td><td>5</td><td>GND</td><td>Ground</td></tr><tr><td>20</td><td>NC</td><td>NC</td><td>Not connected</td></tr></table>

Table 3-6. Serial B Interface Pin/Signal Descriptions (J12)

<table><tr><td>Pin #</td><td>Pin #DB9</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>1(COM3)</td><td>DCD3*</td><td>Data Carrier Detect 3 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open). In direct connect environments, this input will be driven by DTR3 as part of the DTR/DSR handshake.</td></tr><tr><td>2</td><td>6</td><td>DSR3*</td><td>Data Set Ready 3 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR3 for overall readiness to communicate.</td></tr><tr><td rowspan="2">3</td><td rowspan="2">2</td><td>RXD3</td><td>Receive Data 3 – Serial port 3 receive data in</td></tr><tr><td>RX3-</td><td>RX3- – If in RS485 or RS422 mode, this pin is Receive Data 3 -.</td></tr><tr><td rowspan="2">4</td><td rowspan="2">7</td><td>RTS3*</td><td>Request To Send 3 – Indicates Serial port 3 is ready to transmit data. Used as hardware handshake with CTS3 for low level flow control.</td></tr><tr><td>TX3+</td><td>TX3+ – If in RS485 or RS422 mode, this pin is Transmit Data 3 +.</td></tr><tr><td rowspan="2">5</td><td rowspan="2">3</td><td>TXD3</td><td>Transmit Data 3 – Serial port 3 transmit data out</td></tr><tr><td>TX3-</td><td>TX3- – If in RS485 or RS422 mode, this pin is Transmit Data 3 -.</td></tr><tr><td rowspan="2">6</td><td rowspan="2">8</td><td>CTS3*</td><td>Clear To Send 3 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS3 for low level flow control.</td></tr><tr><td>RX3+</td><td>RX3+ – If in RS485 or RS422 mode, this pin is Receive Data 3 -.</td></tr><tr><td>7</td><td>4</td><td>DTR3*</td><td>Data Terminal Ready 3 – Indicates this Serial port is powered, initialized, and ready. Used as hardware handshake with DSR3 for overall readiness to communicate.</td></tr><tr><td>8</td><td>9</td><td>RI3*</td><td>Ring Indicator 3 – Indicates external serial communications device is detecting a ring condition. Used by software to initiate operations to answer and open the communications channel.</td></tr><tr><td>9</td><td>5</td><td>GND</td><td>Ground</td></tr><tr><td>10</td><td>NC</td><td>KEY</td><td>Not Connected</td></tr><tr><td>11</td><td>1(COM4)</td><td>DCD4*</td><td>Data Carrier Detect 4 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open). In direct connect environments, this input will be driven by DTR4 as part of the DTR/DSR handshake.</td></tr><tr><td>12</td><td>6</td><td>DSR4*</td><td>Data Set Ready 4 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR4 for overall readiness to communicate.</td></tr><tr><td rowspan="2">13</td><td rowspan="2">2</td><td>RXD4</td><td>Receive Data 4 – Serial port 4 receive data in</td></tr><tr><td>RX4-</td><td>RX4- – If in RS485 or RS422 mode, this pin is Receive Data 4 -.</td></tr><tr><td rowspan="2">14</td><td rowspan="2">7</td><td>RTS4*</td><td>Request To Send 4 – Indicator to serial output port 4 is ready to transmit data. Used as hardware handshake with CTS4 for low level flow control.</td></tr><tr><td>TX4+</td><td>TX4+ – If in RS485 or RS422 mode, this pin is Transmit Data 4 +.</td></tr><tr><td rowspan="2">15</td><td rowspan="2">3</td><td>TXD4</td><td>Transmit Data 4 – Serial port 4 transmit data out</td></tr><tr><td>TX4-</td><td>TX4- – If in RS485 or RS422 mode, this pin is Transmit Data 4 -.</td></tr></table>

Table 3-6. Serial B Interface Pin/Signal Descriptions (J12)

<table><tr><td rowspan="2">16</td><td rowspan="2">8</td><td>CTS4*</td><td>Clear To Send 4 – Indicator to serial port 4 that external serial communications device is ready to receive data. Used as hardware handshake with RTS4 for low level flow control.</td></tr><tr><td>RX4+</td><td>RX4+ – If in RS485 or RS422 mode, this pin is Receive Data 4+.</td></tr><tr><td>17</td><td>4</td><td>DTR4*</td><td>Data Terminal Ready 4 – Indicates this Serial port is powered, initialized, and ready. Used as hardware handshake with DSR4 for overall readiness to communicate.</td></tr><tr><td>18</td><td>9</td><td>NC</td><td>Not connected (Ring Indicator 4)</td></tr><tr><td>19</td><td>5</td><td>GND</td><td>Ground</td></tr><tr><td>20</td><td>NC</td><td>NC</td><td>Not connected</td></tr></table>

Note: The shaded area denotes power or ground. Signals are listed in the table with RS232 first, followed by RS485/RS422.

# Utility Interfaces

The Utility interfaces consist of three connectors that provide the standard interface signals for the following devices:

• Utility 1 (J15)

Keyboard
External battery connection
♦ Reset Switch
Speaker

• Utility 2 (J13)

PS/2 Mouse
Infrared (IrDA) signals
♦ SMBus signals
♦ USB signals for USB ports 1 and 2
♦ Power button signal

• Utility 3 (J14)

USB signals for USB ports 3 and 4

# Utility 1 Interface

The Utility 1 (J15) interface uses a 16-pin header and provides the various interface signals to an external I/ O board with external connections for the respective connectors such as, keyboard, speaker, etc. Table 3-7 provides the pin signals for the Utility 1 interface, which uses 16 pins, 2 rows, odd/even, (1, 2) with 0.100" pitch.

• Keyboard
Battery
• Reset Switch
• Speaker
External voltages (-5V In, -12V In, +3.3V Out to Power On LED)

# Keyboard Interface

The signal lines for a PS/2 keyboard are provided through the Utility 1 interface, which is also fully PC/AT compatible.

# External Battery

An external battery input connection is provided through a Utility 1 interface for the Real Time Clock’s operation in the event the on-board battery is not used.

# Reset Switch

The signal lines for a reset switch are provided through the Utility 1 interface.

NOTE To perform the equivalent of a power-on reset, the reset button must be pressed and held for a minimum of three seconds.

# Speaker

The signal lines for a speaker port with 0.1-watt drive are provided through a Utility 1 interface (J15).

Table 3-7. Utility 1 Interface Pin/Signal Descriptions (J15)

<table><tr><td>Pin #</td><td>Signal</td><td>I/O</td><td>Description</td></tr><tr><td>1</td><td>-12V</td><td>I</td><td>-12 Volts – Supplied from external power source.</td></tr><tr><td>2</td><td>GND</td><td>I</td><td>Ground</td></tr><tr><td>3</td><td>-5V</td><td>I</td><td>-5 Volts – Supplied from external power source.</td></tr><tr><td>4</td><td>GND</td><td>I</td><td>Ground</td></tr><tr><td>5</td><td>LED</td><td>O</td><td>Power On LED – This on-board +3.3 volts is provided through 330 ohm resistor to an external Power-On LED.</td></tr><tr><td>6</td><td>NC</td><td>-</td><td>Not connected (Power Good)</td></tr><tr><td>7</td><td>SPKR+</td><td>O</td><td>+ Speaker Output – This signal drives external PC &quot;Beep&quot; speaker.</td></tr><tr><td>8</td><td>GND</td><td>I</td><td>Ground</td></tr><tr><td>9</td><td>RSTSW*</td><td>I</td><td>Reset Switch – This signal (ground) provided from external reset switch.</td></tr><tr><td>10</td><td>NC</td><td>-</td><td>Not connected (Keyboard Switch)</td></tr><tr><td>11</td><td>KBDATA</td><td>I/O</td><td>Keyboard Data signal provided to external keyboard connector.</td></tr><tr><td>12</td><td>KBCLK</td><td>I/O</td><td>Keyboard Clock – Clock signal provided to external keyboard connector.</td></tr><tr><td>13</td><td>GND</td><td>I</td><td>Keyboard Ground</td></tr><tr><td>14</td><td>KBDPWR</td><td>O</td><td>Keyboard Power – This +5 volts is provided to external keyboard connector. Requires external fuse for keyboard/mouse protection.</td></tr><tr><td>15</td><td>BATV+</td><td>I</td><td>Backup Battery – This connection provides an additional backup battery from an external source. It can also be used in place of the on-board backup battery, B1, shipped with all LittleBoard 800s. Each RTS battery input is protected with a zener diode.</td></tr><tr><td>16</td><td>BATV-</td><td>I</td><td>Battery - Return (Grounded)</td></tr></table>

Note: The shaded area denotes power or ground. The signals marked with \* = Negative true logic.

# Utility 2 Interface

The Utility 2 (J13) interface consists of a 24-pin connector used to interface various signals to the external board with external connections, or directly to the respective connector such as, the mouse, USB, etc. Table 3-9 on page 28 lists the pin signals for the Utility 2 interface. The J13 connector uses 24 pins, 2 rows, odd/even (1, 2) with 0.100" pitch.

PS/2 Mouse signals
Infrared (IrDA) signals
• SMBus signals
• USB signals for USB ports 1 and 2
Power button signal

# System Management Bus (SMBus)

The I/O Hub, 82801DB, (Southbridge) contains both a host and slave SMBus port; but the host cannot access the slave internally. The slave port allows an external master access to the I/O Hub through the connector (J13). The master contained in the 82801DB is used to communicate with the SDRAM DDR DIMM, 82541(GI/PI) Gigabit Ethernet controller, and the clock generator. Table 3-8 gives the addresses for these devices with the components and corresponding binary addresses of the SMBus.

Table 3-8. SMBus Reserved Addresses

<table><tr><td>Component</td><td>Address Binary</td></tr><tr><td>SDRAM EPROM</td><td> $1010,000x_b$ </td></tr><tr><td>Clock Generator (ICS950811)</td><td> $1101,001x_b$ </td></tr><tr><td>I/O Hub (82801DB)</td><td> $0000,000x_b$  (default) Programmable Master</td></tr></table>

# USB Signals (USB1 and USB2)

The LittleBoard 800 contains two root USB hubs with four functional USB ports. This connector (Utility 2) provides two of the four USB ports (USB0 and USB1). The hub is USB EHCI V2.0 and UHCI V1.1 compatible.

Features implemented in the USB ports include the following:

Support for USB EHCI v2.0 and UHCI v1.1
• Integrated physical layer transceivers
Over-current detection status (software) on all four USB ports

# CAUTION

ADLINK does not recommend connecting a USB boot device to the LittleBoard 800 through an external hub. Instead, connect the USB boot device directly to the LittleBoard 800.

# Mouse Interface

The signal lines for a PS/2 mouse are provided through the Utility 2 interface (J13).

# Infrared Port (IrDA)

The Infrared Data Association (IrDA) port provides a two-way wireless communications port using infrared as a transmission medium at the basic level. There are two basic infrared implementations provided; the Hewlett-Packard Serial Infrared (HPSIR) and the Amplitude Shift Keyed Infrared (ASKIR) methods. HPSIR is a serial implementation of infrared developed by Hewlett-Packard. The IrDA (HPSIR and ASKIR) signals are available on the Utility 2 connector.

The HPSIR method allows serial communication at baud rates up to 115k baud. Each word is sent serially beginning with a zero value start bit. A zero is sent when a single infrared pulse is sent at the beginning of the serial bit time. A one is sent when no infrared pulse is sent during the bit time.

The Amplitude Shift Keyed infrared (ASKIR) allows serial communication at baud rates up to 19.2k baud. Each word is sent serially beginning with a zero value start bit. A zero is sent when a 500kHz waveform is sent for the duration of the serial bit time. A one is sent when no transmission is sent during the serial bit time.

Both of these methods require an understanding of the timing diagrams provided in the Super I/O-1 controller chip (LPC47B272) specifications available from the manufacture’s web site and referred to earlier in this manual. For more information, refer to the SMSC LPC47B272 chip databook and the Infrared Data Association web site at http://www.irda.org.

NOTE For faster speeds and infrared applications not covered in this brief description, refer to the LPC47B272 chip specifications by Standard Microsystems Corp.

Table 3-9. Utility 2 Interface Pin/Signal Descriptions (J13)

<table><tr><td>Pin #</td><td>Signal</td><td>I/O</td><td>Description</td></tr><tr><td>1</td><td>LIDSW</td><td>-</td><td>Lid Switch – This signal (Suspend Status on I/O Hub) is asserted by the I/O Hub to indicate the system will be entering a low power state soon. This signal is not shared with other devices on the LittleBoard. This signal is similar to the Lid Switch on laptop computer.</td></tr><tr><td>2</td><td>PWRBT*</td><td>I</td><td>Power Button – This signal from an external switch to the I/O Hub is not used with AT Power supplies.</td></tr><tr><td>3</td><td>BATLOW*</td><td>I</td><td>Battery Low – This signal from external battery indicates to the I/O Hub there is insufficient power to boot the system.</td></tr><tr><td>4</td><td>NC</td><td>O</td><td>Not connected (IR Mode select)</td></tr><tr><td>5</td><td>IRTX</td><td>O</td><td>IR Transmit Data – This signal goes to external IrDA Transceiver.</td></tr><tr><td>6</td><td>IRRX</td><td>I</td><td>IR Receive Data – This signal comes from external IrDA Transceiver.</td></tr><tr><td>7</td><td>GND</td><td>-</td><td>Ground</td></tr><tr><td>8</td><td>VCC</td><td>-</td><td>+5 Volts</td></tr><tr><td>9</td><td>MDATA</td><td>I/O</td><td>Mouse Data – Data signal provided to external mouse connector.</td></tr><tr><td>10</td><td>MCLK</td><td>I/O</td><td>Mouse Clock– Clock signal provided to external mouse connector</td></tr><tr><td>11</td><td>GND</td><td>-</td><td>Ground</td></tr><tr><td>12</td><td>VCC</td><td>-</td><td>+5 Volts</td></tr><tr><td>13</td><td>SMBCLK</td><td>-</td><td>SMBus Clock – Clock signal provided to external devices.</td></tr><tr><td>14</td><td>SMBDATA</td><td>-</td><td>SMBus Data – Data signal provided to external devices.</td></tr><tr><td>15</td><td>USBPWR1</td><td>-</td><td>+5V USB Port Power – Port is disabled if this input is low.</td></tr><tr><td>16</td><td>USBPWR2</td><td>-</td><td>+5V USB Port Power – Port is disabled if this input is low.</td></tr><tr><td>17</td><td>USBP1-</td><td>I/O</td><td>USB 1 Negative Data Signal</td></tr><tr><td>18</td><td>USBP2-</td><td>I/O</td><td>USB 2 Negative Data Signal</td></tr><tr><td>19</td><td>USBP1+</td><td>I/O</td><td>USB 1 Positive Data Signal</td></tr></table>

Table 3-9. Utility 2 Interface Pin/Signal Descriptions (J13)

<table><tr><td>20</td><td>USBP2+</td><td>I/O</td><td>USB 2 Positive Data Signal</td></tr><tr><td>21</td><td>USBGND1</td><td>-</td><td>USB Port ground</td></tr><tr><td>22</td><td>USBGND2</td><td>-</td><td>USB Port ground</td></tr><tr><td>23</td><td>NC</td><td>-</td><td>Not Connected - Reserved</td></tr><tr><td>24</td><td>NC</td><td>-</td><td>Not Connected - Reserved</td></tr></table>

Note: The shaded area denotes power or ground. The signals marked with \* = Negative true logic.

# Utility 3 Interface

The Utility 3 (J14) interface is a 10-pin connector used to provide two of the four USB port signals to an external board with USB connections or directly to the respective USB connector for the USB ports. Table 3-10 gives the pin signals for the Utility 3 interface, which uses 10 pins, 2 rows, odd/even, (1, 2) with 0.100" pitch.

USB ports 3 and 4

# USB Signals (USB3 and USB4)

The LittleBoard 800 contains two root USB hubs with four functional USB ports. This header (Utility 3) provides two of the four USB ports (USB3 and USB4). The hub is USB EHCI V2.0 and UHCI V1.1 compatible.

Features implemented in the USB ports include the following:

USB EHCI V2.0 and Universal UHCI V1.1 compatible
• Integrated physical layer transceivers
• Over-current detection status on the USB port (software)

# CAUTION

ADLINK does not recommend connecting a USB boot device to the LittleBoard 800 through an external hub. Instead, connect the USB boot device directly to the LittleBoard 800.

Table 3-10. Utility 3 Interface Pin/Signal Descriptions (J14)

<table><tr><td>Pin #</td><td>Signal</td><td>I/O</td><td>Description</td></tr><tr><td>1</td><td>USBPWR3</td><td>-</td><td>+5V USB Port Power – Port is disabled if this input is low.</td></tr><tr><td>2</td><td>USBPWR4</td><td>-</td><td>+5V USB Port Power – Port is disabled if this input is low.</td></tr><tr><td>3</td><td>USBP3-</td><td>I/O</td><td>USB 3 Negative Data Signal</td></tr><tr><td>4</td><td>USBP4-</td><td>I/O</td><td>USB 4 Negative Data Signal</td></tr><tr><td>5</td><td>USBP3+</td><td>I/O</td><td>USB 3 Positive Data Signal</td></tr><tr><td>6</td><td>USBP4+</td><td>I/O</td><td>USB 4 Positive Data Signal</td></tr><tr><td>7</td><td>USBGND3</td><td>-</td><td>USB Port ground</td></tr><tr><td>8</td><td>USBGND4</td><td>-</td><td>USB Port ground</td></tr><tr><td>9</td><td>NC</td><td>-</td><td>Not Connected - Reserved</td></tr><tr><td>10</td><td>NC</td><td>-</td><td>Not Connected - Reserved</td></tr></table>

Note: The shaded area denotes power or ground.

# Audio Interface

The audio solution on the LittleBoard 800 is provided by the Realtek ALC203-LF audio CODEC. The chip is defined by AC97 and is revision 2.2 compliant. The audio interface signals are supplied to the 26-pin 2mm connector (J9). Refer to the following list for the Audio CODEC (ALC203-LF) features.

• Analog Mixer Dynamic Range 97dB (typ)
• D/A Dynamic Range 89dB (typ) and A/D Dynamic Range 90dB (typ)
AC’97 Rev 2.1 compliant
High quality Sample Rate Conversion (SRC) from 4kHz to 48kHz
• 3D Sound circuitry and PC-Beep passthrough to Line Out while reset is held active low
True Line Level Output with volume control independent of Line Out

Table 3-11 describes the pin signals of the audio interface, which uses 26 pins, 2 rows, odd/even, (1, 2) with 2mm pitch.
Table 3-11. Audio Interface Pin/Signal Descriptions (J9)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>VIDEO_L</td><td>Video-Audio signal in left channel</td></tr><tr><td>2</td><td>VIDEO_GND</td><td>Video Audio ground</td></tr><tr><td>3</td><td>VIDEO_R</td><td>Video-Audio signal in right channel</td></tr><tr><td>4</td><td>CD_L</td><td>CD-ROM signal left channel</td></tr><tr><td>5</td><td>CD_GND</td><td>CD-ROM Audio ground</td></tr><tr><td>6</td><td>CD_R</td><td>CD-ROM signal right channel</td></tr><tr><td>7</td><td>LINE_IN_L</td><td>Line in signal left channel</td></tr><tr><td>8</td><td>LINE_IN_GND</td><td>Line in Audio ground</td></tr><tr><td>9</td><td>LINE_IN_R</td><td>Line in signal right channel</td></tr><tr><td>10</td><td>MIC1</td><td>Microphone in signal 1 or left channel</td></tr><tr><td>11</td><td>MIC_GND</td><td>Microphone Audio ground</td></tr><tr><td>12</td><td>MIC2</td><td>Microphone in signal 2 or right channel</td></tr><tr><td>13</td><td>MIC_REF</td><td>Microphone reference signal</td></tr><tr><td>14</td><td>NC/KEY</td><td>Not Connected - Key</td></tr><tr><td>15</td><td>PHONE_IN</td><td>Phone signal in</td></tr><tr><td>16</td><td>PHONE_GND</td><td>Phone Audio ground</td></tr><tr><td>17</td><td>MONO_OUT</td><td>Monaural signal out</td></tr><tr><td>18</td><td>MONO_GND</td><td>Monaural Audio ground</td></tr><tr><td>19</td><td>+AOUT_L</td><td>- Audio out signal left channel</td></tr><tr><td>20</td><td>-AOUT_L</td><td>+ Audio out Audio ground</td></tr><tr><td>21</td><td>+AOUT_R</td><td>- Audio out signal right channel</td></tr><tr><td>22</td><td>-AOUT_R</td><td>+ Audio out Audio ground</td></tr><tr><td>23</td><td>GND</td><td>Audio Ground (tied to all audio grounds)</td></tr><tr><td>24</td><td>HP_L</td><td>Headphone signal left channel</td></tr><tr><td>25</td><td>HP_R</td><td>Headphone signal right channel</td></tr><tr><td>26</td><td>NC</td><td>Not Connected</td></tr></table>

Note: The shaded areas denote power or ground.

# Video Interfaces

The 82855GME chip provides the graphics control and video signals to the traditional glass CRT monitors and LCD flat panel displays. The chip features are listed below:

CRT features:

Supports a max resolution of 2048 X 1536
Supports a maximum allowable video frame buffer size of 32MB shared memory
• AGP 4X graphics performance (always enabled)

Flat Panel features:

Supports (+3.3V or +5V, and +12V) output to LCD flat panels through an LVDS interface
• Supports panel sizes from VGA (640 x 480) up to UXGA+ (1600 x 1200).
Supports 1-channel (18-bit) or 2-channel (36-bit) LVDS outputs

# CRT Interface

Table 3-12 describes the pin signals of the CRT interface, which uses 10 pins, 2 rows, odd/even, (1, 2) with 0.100" (2.54mm) pitch.
Table 3-12. CRT Interface Pin/Signal Descriptions (J3)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>RED</td><td>Red – This is the Red analog output signal to the CRT.</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>GREEN</td><td>Green – This is the Green analog output signal to the CRT.</td></tr><tr><td>4</td><td>GND</td><td>Ground</td></tr><tr><td>5</td><td>BLUE</td><td>Blue – This is the Blue analog output signal to the CRT.</td></tr><tr><td>6</td><td>GND</td><td>Ground</td></tr><tr><td>7</td><td>HSYNC</td><td>Horizontal Sync – This signal is used for the digital horizontal sync output to the CRT.</td></tr><tr><td>8</td><td>GND</td><td>Ground</td></tr><tr><td>9</td><td>VSYNC</td><td>Vertical Sync – This signal is used for the digital vertical sync output to the CRT.</td></tr><tr><td>10</td><td>PWR</td><td>Power – Provided through fuse (F1) to +5 volts +/- 5%. F1 is next to J3 connector on board.</td></tr></table>

Note: The shaded area denotes power or ground.

# LVDS Interface

Note: The shaded area denotes power or ground.
Table 3-13 describes the pin signals of the LVDS interface, which uses 30 pins, 2 rows, odd/even, (1, 2) with.079" (2mm) pitch.
Table 3-13. LVDS Interface Pin/Signal Descriptions (J26)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td><td>Line</td><td>Channel</td></tr><tr><td>1</td><td>+12V</td><td>+12 volt input</td><td rowspan="4">NA</td><td rowspan="4">NA</td></tr><tr><td>2</td><td>+VCC (+3.3V/+5V)</td><td>JP1 determines voltage on pin</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr><tr><td>4</td><td>GND</td><td>Ground</td></tr><tr><td>5</td><td>CLK_LVDS_IYBP</td><td>Clock Positive Output</td><td rowspan="2">Clock</td><td rowspan="10">Channel 2</td></tr><tr><td>6</td><td>CLK_LVDS_IYBM</td><td>Clock Negative Output</td></tr><tr><td>7</td><td>LVDS_IYBP3</td><td>Data Positive Output</td><td rowspan="2">3</td></tr><tr><td>8</td><td>LVDS_IYBM3</td><td>Data Negative Output</td></tr><tr><td>9</td><td>LVDS_IYBP2</td><td>Data Positive Output</td><td rowspan="2">2</td></tr><tr><td>10</td><td>LVDS_IYBM2</td><td>Data Negative Output</td></tr><tr><td>11</td><td>LVDS_IYBP1</td><td>Data Positive Output</td><td rowspan="2">1</td></tr><tr><td>12</td><td>LVDS_IYBM1</td><td>Data Negative Output</td></tr><tr><td>13</td><td>LVDS_IYBP0</td><td>Data Positive Output</td><td rowspan="2">0</td></tr><tr><td>14</td><td>LVDS_IYBM0</td><td>Data Negative Output</td></tr><tr><td>15</td><td>LVDS_PANELBKLTCTL</td><td>Control Panel Backlight</td><td>NA</td><td>NA</td></tr><tr><td>16</td><td>LVDS_PANELVDDEN</td><td>Enable Panel Power</td><td>NA</td><td>NA</td></tr><tr><td>17</td><td>CLK_LVDS_IYAP</td><td>Clock Positive Output</td><td rowspan="2">Clock</td><td rowspan="4">Channel 1</td></tr><tr><td>18</td><td>CLK_LVDS_IYAM</td><td>Clock Negative Output</td></tr><tr><td>19</td><td>LVDS_IYAP3</td><td>Data Positive Output</td><td rowspan="2">3</td></tr><tr><td>20</td><td>LVDS_IYAM3</td><td>Data Negative Output</td></tr><tr><td>21</td><td>LVDS_IYAP2</td><td>Data Positive Output</td><td rowspan="2">2</td><td rowspan="6"></td></tr><tr><td>22</td><td>LVDS_IYAM2</td><td>Data Negative Output</td></tr><tr><td>23</td><td>LVDS_IYAP1</td><td>Data Positive Output</td><td rowspan="2">1</td></tr><tr><td>24</td><td>LVDS_IYAM1</td><td>Data Negative Output</td></tr><tr><td>25</td><td>LVDS_IYAP0</td><td>Data Positive Output</td><td rowspan="2">0</td></tr><tr><td>26</td><td>LVDS_IYAM0</td><td>Data Negative Output</td></tr><tr><td>27</td><td>DDCPCLK</td><td>Display Data Channel Clock</td><td>NA</td><td>NA</td></tr><tr><td>28</td><td>DDCPDATA</td><td>Display Data Channel Data</td><td>NA</td><td>NA</td></tr><tr><td>29</td><td>LVDS_PANELBKLTEN</td><td>Enable Backlight Inverter</td><td>NA</td><td>NA</td></tr><tr><td>30</td><td>NC</td><td>Not Connected</td><td>NA</td><td>NA</td></tr></table>

NOTE Pins 5-14 constitute $2 ^ { \mathrm { n d } }$ channel interface of two channels. Pins 15-26 constitute $1 ^ { \mathrm { s t } }$ channel interface of two channels, or a single channel interface.

# Power Interfaces

# Power In

The LittleBoard 800 uses five separate voltages on the board, but only one of the voltages is provided externally (+5 volts) through the external header (J19), which uses a 7-pin vertical header with 0.156" (3.96mm) spacing. Holes for a right angle mounting header are also available at J19. All the onboard voltages are derived from the externally supplied +5 volts DC +/- 5%. The onboard voltages include the CPU core voltages as well as the other voltages used on the board.

Table 3-14 lists the pin signals for the power supply input header, which uses 7 pins, single row, with 0.156" pitch.

Table 3-14. Power Supply Input Pin/Signal Descriptions (J19)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>+5V</td><td>+5.0 Volts – This +5.0 volts DC +/- 5% is the only voltage required for operation.</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr><tr><td>4</td><td>+12V</td><td>+12 Volts – This +12 volts is for the PC/104, PC/104-Plus, and LVDS power only.</td></tr><tr><td>5</td><td>+3.3V</td><td>+3.3 Volts – This +3.3 volts is for PC/104-Plus Bus power only (optional).</td></tr><tr><td>6</td><td>GND</td><td>Ground</td></tr><tr><td>7</td><td>+5V</td><td>+5.0 Volts – This +5.0 volts DC +/- 5% is the only voltage required for operation.</td></tr></table>

Note: The shaded area denotes power or ground. The +12V and +3.3V on the Power Supply Input connector (J19) are used for the PCI, ISA bus, and LVDS power, which are supplied externally and not generated on the LittleBoard 800. The -5V and -12V used for the PC/104 bus are supplied through the PC/104 bus or from an external power supply through the Utility 1 connector (J15).

# ATX Power

Table 3-15 lists the pin signals for the J29 Power On Button and Reset Switch header, which uses 5 pins, single row with 0.100" (2.54mm) pitch.

Power On Switch – This control signal is provided externally through a button by connecting ground to pin 1 on the J29 header.
Reset Switch – This signal is provided externally through a switch by connecting ground to pin 3 on the J29 header.

Table 3-15. Power On Button and Reset Switch Header Pin/Signal Descriptions (J29)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>PWRBTN</td><td>Power On input (connect between pins 1 &amp; 2)</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>RESET_IN</td><td>Reset Switch input or output (connect between pins 2 &amp; 3)</td></tr><tr><td>4</td><td>NC</td><td>NA</td></tr><tr><td>5</td><td>-12V</td><td>VCC</td></tr></table>

Note: The shaded areas denote power or ground.

Table 3-16 lists the pin signals for the J30 Power On header, which uses 3 pins, single row with 0.100" (2.54mm) pitch.
Table 3-16. Power On Header Pin/Signal Descriptions (J30)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>PS_ON*</td><td>Power Supply On – This signal is sent to the ATX power supply by the LittleBoard 800 to turn On the ATX power supply. This signal can also be used to turn Off the ATX power supply or go into a suspended or standby state.</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>VCCSB</td><td>+5V suspend voltage (+5V, 100mA Standby) – This voltage is supplied from ATX power supply. This voltage is required for normal operation.</td></tr></table>

Note: The shaded areas denote power or ground. The signals marked with \* = Negative true logic.

# Miscellaneous

# Real Time Clock (RTC)

The LittleBoard 800 contains a Real Time Clock (RTC). The BIOS (CMOS) RAM is backed up with a Lithium Battery. If the battery is not present, the BIOS has a battery-free boot option to complete the boot process.

# Temperature Monitoring

The ADM1023 performs CPU temperature monitoring. This device has an input connection from the thermal diode in the Intel Celeron M or Pentium M CPU. The SMBus is connected to a dedicated thermal alert pin in the ADM1023 and the other devices on the SMBus.

NOTE The LittleBoard 800 requires a heatsink for both Celeron M CPUs and a heatsink for the Pentium M CPU below $7 0 ^ { \circ } \mathrm { C } .$ .

# Oops! Jumper (BIOS Recovery)

The Oops! jumper is provided in the event the BIOS settings you have selected prevent you from booting the system. By using the Oops! jumper you can prevent the current BIOS settings in the EEPROM from being loaded, forcing the use of the default settings. Connect the DTR pin to the RI pin on serial port 1 (COM 1) prior to boot up to prevent the present BIOS settings from loading. After booting with the Oops! jumper in place, remove the Oops! jumper and go into BIOS Setup. Change the desired BIOS settings, or select the default settings, and save changes before rebooting the system.

To convert the Serial A interface to an Oops! jumper, short together the DTR (7) and RI (8) pins on Serial A (J11) header for Serial Port 1. As an alternate, short the equivalent pins, 4 and 9, on the Serial Port 1 DB9 connector as shown in Figure 3-2.

![Serial A Interface (J11)\nfor Serial Port 1\n(or COM1 Port)\nTop View\n19 9 7 5 3 1\n20 10 8 6 4 2\nOr Standard DB9 Serial\nPort Connector (Female)\nRear View\n1 2 3 4 5\n6 7 8 9](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/ea671c61cec410e11d9e831d4ac0fe546c3b0cac364badec5c70c6647223d721.jpg)

Figure 3-2. Oops! Jumper Connection

# Serial Console

The LittleBoard 800 supports the serial console (or console redirection) feature. This I/O function is provided by an ANSI-compatible serial terminal, or the equivalent terminal emulation software running on another system. This can be very useful when setting up the BIOS on a production line for systems that are not connected to a keyboard and display.

# Serial Console Setup

The serial console feature is implemented by connecting a standard null modem cable or modified serial cable (or “Hot Cable”) between one of the serial ports, such as Serial 1 (J11A) and the serial terminal, or a PC with communications software. The BIOS Setup Utility controls the serial console settings on the LittleBoard 800. Refer to Chapter 4, BIOS Setup for the settings of the serial console option, the serial terminal, or PC with communications software and the connection procedure.

# Hot (Serial) Cable

To convert a standard serial cable to a Hot Cable, specific pins must be shorted together at the Serial port connector or at the DB9 connector. For example, short the RTS (7) and RI (9) on the respective DB9 port connector as shown in Figure 3-3.

![Standard DB9 Serial\nPort Connector (Female)\nRear View\n1 2 3 4 5\n6 7 8 9\nLB800Hotcable](.50-1z029-1000-1-0-littleboard-800-reference-manual-final/d789766f6a9444e0e4a5204ee6a1b9fe6a008d1514e14aef69473e18aeb1191a.jpg)

Figure 3-3. Hot Cable Jumper

# Watchdog Timer

The watchdog timer (WDT) restarts the system if a mishap occurs, ensuring proper start-up after the interruption. Possible problems include failure to boot properly, the application software’s loss of control, failure of an interface device, unexpected conditions on the bus, or other hardware or software malfunctions.

The WDT (watchdog timer) can be used both during the boot process and during normal system operation.

During the Boot process – If the operating system fails to boot in the time interval set in the BIOS, the system will reset.
Enable the WDT in Boot Settings Configuration of BIOS Setup. Set the WDT for a time-out interval in seconds, between 1 and 255, in one-second increments in the Boot Setting Configuration screen. Ensure you allow enough time for the boot process to complete and for the OS to boot. The OS or application must tickle the WDT as soon as it comes up. This can be done by accessing the hardware directly or through a BIOS call.

• During System Operation – An application can set up the WDT hardware through a BIOS call, or by accessing the hardware directly. Some ADLINK Board Support Packages provide an API interface to the WDT. The application must tickle the WDT in the time set when the WDT is initialized or the system will be reset. You can use a BIOS call to tickle the WDT or access the hardware directly.

The BIOS implements interrupt 15 function 0C3h to manipulate the WDT.

Watchdog Code examples – ADLINK has provided source code examples on the LittleBoard 800 Support Software DVD illustrating how to control the WDT. The code examples can be easily copied to your development environment to compile and test the examples, or make any desired changes before compiling. Refer to the WDT Readme file on the LittleBoard 800 Support Software DVD.

# Optional CPU Fan

Table 3-17 lists the pin signals of the optional CPU Fan, which uses 3 pins, single row, with $0 . 1 0 0 "$ pitch.

Table 3-17. Optional CPU Fan (J21)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>Fan_Tach</td><td>Fan Tachometer – This signal indicates Fan speed</td></tr><tr><td>2</td><td>VCC</td><td>+5.0 volts DC +/- 5%</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

# LAN LED

Table 3-18 lists the pin signals of the Ethernet external LED interface, which uses 5 pins, single row, with 0.100" pitch. This header is for an external LED, indicating Gigabit Ethernet power and activity.

Table 3-18. Ethernet External LED Pin/Signal Descriptions (J28)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>LED YEL</td><td>Ethernet Power</td></tr><tr><td>2</td><td>LINK_LED_HDR#</td><td>Ethernet Connection LED</td></tr><tr><td>3</td><td>MAC ACTLED_RES#</td><td>Ethernet Activity</td></tr><tr><td>4</td><td>MAC LINK 1000# CON</td><td>Ethernet Connection</td></tr><tr><td>5</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

# Introduction

This section assumes the user is familiar with BIOS Setup and does not attempt to describe the inner workings of BIOS functions. Refer to the appropriate PC reference manuals for information about the onboard, ROM-BIOS software interface. If ADLINK has added to or modified the standard functions, these functions will be described.

# Entering BIOS Setup (VGA Display)

To enter BIOS Setup using a VGA display for the LittleBoard 800:

1. Turn on the VGA monitor and the power supply to the LittleBoard 800.
2. Start Setup by pressing the [Del] key, when the following message appears on the boot screen.

Press DEL to run Setup

NOTE If the setting for Memory Test is set to Fast, you may not see this prompt appear on screen if the monitor is too slow to display it on start up. If this happens, press the &lt;Del&gt; key early in the boot sequence to enter BIOS Setup.

3. Use the &lt;Enter&gt; key to select the screen menus listed in the Opening BIOS screen.
4. Follow the instructions at the bottom of each screen to navigate through the selections and modify any settings.

# Entering BIOS Setup (Serial Console)

Entering the BIOS Setup, in serial console mode, is very similar to the steps you use to enter BIOS Setup with a VGA display, except the actual keys you use.

1. Set the serial terminal, or the PC with communications software to the following settings:

♦ 115k baud
▲ 8 bits
♦ One stop bit
♦ No parity
♦ No hardware handshake

2. Connect the serial console, or the PC with serial terminal emulation, to Serial Port 1 or Serial Port 2 of the LittleBoard 800.

♦ If the BIOS option, Serial Console is set to [Enable], use a standard null-modem serial cable.
If the BIOS option, Serial Console is set to [Hot Cable], use the modified serial cable described in Chapter 3, under Hot (Serial) Cable.

3. Turn on the serial console or the PC with serial terminal emulation and the power supply to the LittleBoard 800.
4. Start Setup by pressing the Ctl–c keys, when the following message appears on the boot screen.

Hit ^C if you want to run SETUP

5. Use the &lt;Enter&gt; key to select the screen menus listed in the Opening BIOS screen.

NOTE The serial console port is not hardware protected, and is not listed in the COM table within BIOS Setup. Diagnostic software that probes hardware addresses may cause a loss or failure of the serial console functions.

# PCI-ISA Bridge Mapping

The LittleBoard 800 supports ISA bus based modules with an on-board PCI-ISA bridge. The PCI-ISA bridge optionally maps the following resources to ISA based modules:

• IRQs
DMA Channels

The LittleBoard 800 system BIOS, maps the above resources based on information provided in the BIOS Setup screens. By default, IRQs or DMA channels to be mapped to ISA modules must be explicitly specified by the user in the BIOS Setup screens.

The IRQs and DMA channels are mapped with the “PCIPnP/IRQx” fields in BIOS setup (where x specifies the IRQ number.) The IRQs 3, 4, 5, 7, 9, 10, 11, 14, and 15 can be mapped to ISA based modules by changing the default setting for these IRQs from “Available” to “Reserved”.

Any of the DMA channels 0, 1, 3, 5, 6, 7 can be mapped to ISA modules by changing the default setting of “Available” to “Reserved”.

# Logo Screen Utility (Splash Screen)

The LittleBoard 800 BIOS supports a graphical logo utility, which can be customized by the user and displayed when enabled through the BIOS Setup Utility. The graphical image can be a company logo or any custom image the user wants to display during the boot process. The custom image can be displayed as the first image displayed on screen during the boot process and remain there, depending on the options selected in BIOS Setup, while the OS boots.

# Logo Screen Image Requirements

The user’s image may be customized with any standard image editing tool.

The LittleBoard 800 logo screen utility supports the following image formats:

Bitmap image
Exactly 640 x 480 pixels
Exactly 16 colors

NOTE For procedures on loading custom images, see the logo screen utility document available on the Ampro By ADLINK web page.

ADLINK Technology, Inc. provides a number of methods for contacting Technical Support listed in the Table A-1 below. Requests for support through the Ask an Expert are given the highest priority, and usually will be addressed within one working day.

ADLINK Ask an Expert– This is a comprehensive support center designed to meet all your technical needs. This service is free and available 24 hours a day through the Ampro By ADLINK web page at http://www.adlinktech.com/AAE/. This includes a searchable database of Frequently Asked Questions, which will help you with the common information requested by most customers. This is a good source of information to look at first for your technical solutions. However, you must register online if you wish to use the Ask a Question feature.

ADLINK strongly suggests that you register with the web site. By creating a profile on the ADLINK web site, you will have a portal page called “My ADLINK” unique to you with access to exclusive services and account information.

Personal Assistance – You may also request personal assistance by creating an Ask an Expert account and then going to the Ask a Question feature. Requests can be submitted 24 hours a day, 7 days a week. You will receive immediate confirmation that your request has been entered. Once you have submitted your request, you must log in to go to the My Question area where you can check status, update your request, and access other features.
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Table A-1. Technical Support Contact Information

<table><tr><td>Method</td><td>Contact Information</td></tr><tr><td>Ask an Expert</td><td>http://www.adlinktech.com/AAE/</td></tr><tr><td>Web Site</td><td>http://www.adlinktech.com</td></tr><tr><td>Standard Mail</td><td>ADLINK Technology Inc.Address: 9F, No.166 Jian Yi Road, Chungho City,Taipei County 235, Taiwan台北縣中和市建一路166號9樓Tel: +886-2-8226-5877Fax: +886-2-8226-5717Email: service@adlinktech.comAmpro ADLINK Technology Inc.Address: 5215 Hellyer Avenue, #110, San Jose, CA 95138, USATel: +1-408-360-0200Toll Free: +1-800-966-5200 (USA only)Fax: +1-408-360-0222Email: info@adlinktech.comADLINK Technology BeijingAddress: 北京市海淀区上地东路1号盈创动力大厦E座801室(100085)Rm. 801, Power Creative E, No. 1, B/DShang Di East Rd., Beijing 100085, ChinaTel: +86-10-5885-8666Fax: +86-10-5885-8625Email: market@adlinktech.comADLINK Technology ShanghaiAddress:上海市漕河泾高科技开发区钦江路333号39幢4层(200233)Tel:+86-21-6495-5210Fax:+86-21-5450-0414Email:market@adlinktech.comADLINK Technology ShenzhenAddress:深圳市南山区科技园南区高新南七道数字技术园A1栋2楼C区(518057)2F,C Block,Bld.A1,Cyber-Tech Zone,Gao Xin Ave.Sec 7,High-Tech Industrial Park S.,Shenzhen,518054 ChinaTel:+86-755-2643-4858Fax:+86-755-2664-6353Email:market@adlinktech.comADLINK Technology Inc.(German Liaison Office)Address:Nord Carree 3,40477 Duesseldorf,GermanyTel:+49-211-495-5552Fax:+49-211-495-5557Email:emea@adlinktech.comADLINK(French Liaison Office)Address:15 rue Emile Baudot,91300 MASSY Cedex,FranceTel:+33(0)160123566Fax:+33(0)160123566Email:france@adlinktech.comADLINK Technology Japan CorporationAddress:151-0072東京都渋谷区幡ヶ谷1-1-2朝日生命幡ヶ谷ビル8FAsahiseimei Hatagaya Bldg.8F1-1-2 Hatagaya,Shibuya-ku,Tokyo 151-0072,JapanTel:+81-3-4455-3722Fax:+81-3-5333-6040Email:japan@adlinktech.comADLINK Technology Inc.(Korean Liaison Office)Address:서울시서초구서초동1506-25한도B/D2층2F,Hando B/D,1506-25,Seocho-Dong,Seocho-Gu,Seoul,137-070,KoreaTel:+82-2-2057-0565Fax:+82-2-2057-0563Email:korea@adlinktech.comADLINK Technology Singapore Pte Ltd.Address:84 Genting Lane#07-02A,Cityneon Design Centre,Singapore 349584Tel:+65-6844-2261Fax:+65-6844-2263Email:singapore@adlinktech.comADLINK Technology Singapore Pte Ltd.(Indian Liaison Office)Address:No.1357,"Anupama",Sri Aurobindo Marg,9th Cross,JP Nagar Phase I,Bangalore-560078,IndiaTel:+91-80-65605817Fax:+91-80-22443548Email:india@adlinktech.com</td></tr></table>

# A

AT Power in pin-out list . 33

audio interface pin-out list . 30

# B

BIOS Setup accessing BIOS setup (VGA) . 37 accessing serial console . 37 logo (splash) screen conversion . 38 watchdog timer (WDT) . 35

# C

console redirection serial console . 35 serial port settings . 37 supported feature . 35

CPU fan (optional) pin-out list . .. 36

CRT interface pin-out list . 31

# D

dimensions 13

# E

EBX specifications references

Environmental specifications . . 14

Ethernet chip specifications web sites . 2

Ethernet ports share common ground 12

# G

grounding holes . 12

# H

header/connector pin arrangement definition 11

headers and connectors header/connector list 10

Hot cable console redirection . 35 modified serial cable . 35 serial console 35

# I

infrared interface supported features . 28

Interrupt (IRQs) list . 18

# J

jumper header locations 13

# L

LAN LED interface pin-out table . 36

Lithium Battery RTC ..34

LittleBoard 800 audio AC’97 interface .30

block diagram 7

Celeron M CPU 4

console redirection feature .35

CPU features 5

dimensions .13

EBX Architecture .3

features . .5

Floppy Disk Drive features .20

headers and connectors .10

Logo Screen (splash screen) customization ...38

major chip list .8

major integrated circuit list .8

Parallel port features .20

Pentium M CPU 4

pin-1 locations .12

power requirements .14

product description 4

see also supported features .4

serial console feature .35

Utility 1 interface features .25

Utility 2 interface features .27

Utility 3 interface features .29

video interface features .31

voltage requirements .33

watchdog timer (WDT) .35

weight .13

logo (splash) screen customization ..38 requirements ..38

Logo Screen Utility (splash screen) customer defined .38

LVDS interface pin-out list . .31

# M

major chip specifications web sites

major integrated circuits see also major chip specifications

memory map .19

# P

parallel port pin-out list . ..20

pin-1 locations ..12

power requirements input voltages ..33

processor requirements heatsink requirements .14

# R

Real Time Clock (RTC) . 34

Lithium Battery . 34

references

EBX specifications

specifications

# S

serial A

pin-out list . 22

serial B

pin-out list . 24

Serial Communications Software . 35

Serial console

accessing BIOS . 37

serial console

console redirection . 35

Hot cable . 35

modified serial cable . 35

serial port settings . 37

serial terminal . 35

serial terminal emulation . 35

terminal emulation software . 35

two methods . 35

serial terminal

ANSI-compatible . 35

serial terminal emulation . 35

SMBus

supported feature . 27

specifications

LittleBoard features . 5

references

supported features

184-pin DDR DIMM slot . 5

AT power supply input . 33

audio AC’97 interface ...6, 30

Battery-free boot 6

Celeron M CPU 5

console redirection . 35

CPU optional fan connector . 36

CRT interface . 31

Ethernet interfaces (2) 6

external battery 6

external battery interface . 26

external LAN Activity LED . 36

floppy disk drive (1) ...5, 20

heatsinks . 14

I/O address map . . 19

IDE devices (4) . 5

Infrared (IrDA) interface 6

IRQ assignments . 18

ISA bus 5

jumper headers, on board . 13

logo (splash) screen customization . 38

LVDS interface . 31

memory 5

memory map . 19

on-board battery 6

Oops! jumper (BIOS recovery) ... 6, 34

parallel port . 20

parallel port (1) 5

PC 'Beep' speaker interface . 26

PC/104 bus . 5

PC/104-Plus bus 5

Pentium M CPU 5

power requirements 14

power-on switch . 33

PS/2 keyboard interface ... 6, 26

PS/2 mouse interface 6

Real-time clock 6

reset switch interface . 26

root USB hubs (2) . 27

RS485 termination (4) . 22

RS485 two-wire port . 22

serial console .. 6, 35

serial ports (4) .. 5, 21

SMBus devices . 27

thermal monitoring ... 6, 34

USB boot device 6

USB ports (4) ..6, 27, 29

video interfaces (2) .. 6, 31

voltage monitoring 6

watchdog timer (WDT) ... 6, 35

# T

Technical Support

Ask an Expert . . 39

contact methods . 39

terminal emulation software

serial console . 35

thermal cooling

processor requirements . 14

thermal monitoring

supported feature . 34

# U

USB 1 & 2 port

pin-out list . 28

USB 3 & 4

pin-out list . 29

# V

voltage requirements

AT power supply . 33

# W

watchdog timer (WDT)

2 to 255 sec interval . 35

functions . 35

source code examples . 35

web sites

Ethernet chip specifications 2

infrared specifications . 28

major chip specifications

references

weight 13
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