# ReadyBoard™ 620

# Single Board Computer

# Reference Manual

P/N 5001820B Revision B

# DISCLAIMER

ADLINK Technology, Incorporated makes no representations or warranties with respect to the contents of this manual or of the associated ADLINK products, and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. ADLINK shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this product, even if it has been notified of the possibility of such damages. ADLINK reserves the right to revise this publication from time to time without obligation to notify any person of such revisions. If errors are found, please contact ADLINK at the address listed below this Disclaimer.

# TRADEMARKS

CoreModule and the Ampro logo are registered trademarks, and ADLINK, Little Board, LittleBoard, MightyBoard, MightySystem, MilSystem, MiniModule, ReadyBoard, ReadyPanel, ReadySystem, and RuffSystem are trademarks of ADLINK Technology, Inc. All other marks are the property of their respective companies.

REVISION HISTORY

<table><tr><td>Revision</td><td>Reason for Change</td><td>Date</td></tr><tr><td>A, A</td><td>Initial Release</td><td>Apr/07</td></tr><tr><td>A, B</td><td>Correct ethernet p/n in blk diag.</td><td>May/07</td></tr><tr><td>A, C</td><td>Added ISA bridge section to BIOS chapter</td><td>June/07</td></tr><tr><td>A, D</td><td>Corrected pin 1 on J19; removed reference to JP5 from pin 41 in table 3-4</td><td>Nov/07</td></tr><tr><td>A, E</td><td>Corrected jumper pins for JP6 in fig 2-5; changed JP1 to “Not Used” in table 2-3</td><td>Dec/07</td></tr><tr><td>B, A</td><td>Changed operating temperature in Table 2-6; added mechanical dimension drawing; added pinout tables to ch. 3</td><td>Apr/08</td></tr><tr><td>B, B</td><td>Changed UHCI legacy USB references to OHCI; revised callouts in figs 3-1, 3-2, &amp; 3-3</td><td>May/09</td></tr></table>

ADLINK Technology, Incorporated

5215 Hellyer Avenue

San Jose, CA 95138-1007

Tel. 408 360-0200

Fax 408 360-0222

www.ADLINKTech.com

© Copyright 2007, 2008, 2009 ADLINK Technology, Incorporated

# Audience

This manual provides reference only for computer design engineers, including but not limited to hardware and software designers and applications engineers. ADLINK Technology, Inc. assumes you are qualified to design and implement prototype computer equipment.

# Contents

# Chapter 1 About This Manual ..

Purpose of this Manual ..

References ..

# Chapter 2 Product Overview...........

EPIC Architecture .3

Product Description.. .4

Board Features... .4

Block Diagram.. .7

Major Components (ICs).. ..8

Header, Connector, and Socket Definitions....... .9

Jumper Header Definitions ......... ..11

Specifications......... ..12

Physical Specifications ..... ..12

Power Specifications ....... ..12

Mechanical Specifications ...... ..13

Environmental Specifications. ..14

Thermal/Cooling Requirements..... ..14

# Chapter 3 Hardware . ..15

Overview .... ...15

Interrupt Channel Assignments.. ...16

Memory Map... ..17

I/O Address Map . ..17

Floppy/Parallel Interface .. ...18

Serial Interfaces ..20

USB Interfaces . ..22

USB 2.0 Support.. .22

Legacy USB Support .22

Secondary USB2 and USB3

Audio Interface........ ..23

Video Interfaces ..24

CRT features: .... ..24

LVDS and TTL Flat Panel features: . ..24

TTL Flat Panel Interface .. ..25

LVDS Flat Panel Interface .27

Miscellaneous ........ ..28

Utility Interface ..28

Reset Switch ..... .28

User GPIO Signals ... ..28

Infrared (IrDA) Port . .29

System Management Bus (SMBus).. ..29

Real Time Clock (RTC) . ..30

Oops! Jumper (BIOS Recovery) .. ..30

Temperature Monitoring .30

Remote Access (Serial Console). ..31

Serial Console Setup... ..31

Hot (Serial) Cable ..31

Watchdog Timer (WDT).. ..31

Power Interfaces . . 32

Power In . 32

Power On ....... . 32

Power and Sleep States.. . 33

Power On Switch . 33

Sleep States (ACPI) .. . 33

Wake-Up Activities . . 34

# Chapter 4 BIOS Setup Utility ........... .. 35

Introduction.. . 35

Entering BIOS Setup (VGA Display) .. . 35

Entering BIOS Setup (Remote Access) . . 35

PCI-ISA Bridge Mapping . . 36

OEM Logo Utility (Splash Screen).. .. 37

Logo Image Requirements..... . 37

# Appendix A Technical Support . . 39

# Index ... . 41

# List of Figures

Figure 2-1. Typical ReadyBoard and PC/104 Module Stack .. 3

Figure 2-2. Functional Block Diagram .

Figure 2-3. Component Locations . 9

Figure 2-4. Connector Pin Identifications.. . 10

Figure 2-5. Connector Locations ...... .... 11

Figure 2-6. ReadyBoard 620 I/O Panel Dimensions (Side view).. .. 13

Figure 3-1. RS-485 Serial Port Implementation.. . 20

Figure 3-2. Oops! Jumper Connection.. . 30

Figure 3-3. Hot Cable Jumper .... . 31

# List of Tables

Table 2-1. Major Integrated Circuit Description and Function ... 8

Table 2-2. Connector Descriptions . 9

Table 2-3. Jumper Settings . . 11

Table 2-4. Weight and Footprint Dimensions . . 12

Table 2-5. Power Supply Requirements. .. 12

Table 2-6. Environmental Requirements . . 14

Table 3-1. Interrupt Channel Assignments (Typical) .. .. 16

Table 3-2. Memory Map . . 17

Table 3-3. I/O Address Map ........ ..... 17

Table 3-4. Floppy/Parallel Interface Pin/Signal Descriptions (J18) . . 18

Table 3-5. Serial B (COM3 and COM4) Interface Pin/Signal Descriptions (J5) .. .. 21

Table 3-6. USB 2 & 3 Interface Pin/Signal Descriptions (J17A/B).. . 23

Table 3-7. Audio Interface Pin/Signal Descriptions (J15) . . 23

Table 3-8. TTL Flat Panel Interface Pin/Signal Descriptions (J8).. . 25

Table 3-9. LVDS Interface Pin/Signal Descriptions (J9).... . 27

Table 3-10. Utility Interface Pin/Signal Descriptions (J16) . . 28

Table 3-11. User GPIO Signals Pin/Signal Descriptions (J4)..... .. 28

Table 3-12. Infrared Interface Pin/Signal Descriptions (J21).. . 29

Table 3-13. SMBus Reserved Addresses .... . 29

Table 3-14. SMBus Signals Pin/Signal Descriptions (J20).. .. 30

Table 3-15. Power In Interface Pin/Signal Descriptions (J2).. ..32

Table 3-16. Power On Connector Pin/Signal Descriptions (J1) . ..32

Table 3-17. Wake-Up Activities and Conditions... ..34

Table A-1. Technical Support Contact Information.. ..39

# Purpose of this Manual

This manual is for designers of systems based on the ReadyBoard™ 620 Single Board Computer (SBC). This manual contains information that permits designers to create an embedded system based on specific design requirements.

Information provided in this reference manual includes:

• ReadyBoard 620 Specifications
Environmental requirements
Major integrated circuits (chips) and features implemented
. ReadyBoard 620 connector/pin numbers and definitions
• BIOS Setup Utility information

Information not provided in this reference manual includes:

• Detailed chip specifications
• Internal component operation
• Internal registers or signal operation
Bus or signal timing for industry standard busses and signals

# References

The following list of references may be helpful for you successfully to complete your design. Most of this material is also available on the Ampro By ADLINK web site in the InfoCenter. The InfoCenter was created for embedded system developers to share ADLINK’s knowledge, insight, and expertise.

# Specifications

EPIC Specification Revision 1.0, March 22, 2004
Web site: http://www.ampro.com/RP/EPIC\_Specification\_v1.0.pdf
PC/104™ Specification Revision 2.5, November 2003
PC/104-Plus™ Specification Revision 2.0, November 2003
• PCI-104™ Specification Revision 1.0, November 2003
For latest revision of the PC/104, PC/104-Plus, and PCI-104 specifications, contact the PC/104 Consortium, at:
Web site: http://www.pc104.org

PCI™ 2.3 Specifications

For latest revision of the PCI specifications, contact the PCI Special Interest Group Office at: Web site: http://www.pcisig.com/specifications/conventional

Compact Flash Specifications Revision 3.0, December 2004

For the latest revision of the Compact Flash specifications, contact the Compact Flash association at: Web site: http://www.CompactFlash.org

Major Integrated Circuit specifications used on the ReadyBoard 620:

AMD, Inc., Geode LX 800 processor (with integrated Northbridge)
Web site:
http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/
• AMD, Inc., CS5536, used for the I/O Hub (Southbridge)
Web site: http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/ 0,,50\_2330\_9863\_9864^13054^13056,00.html
Winbond Electronics, Corp. and the W83627HF chip used for the Super I/O controller
Web site: http://www.winbond-usa.com/products/winbond\_products/pdfs/PCIC/ W83627HF\_F\_HG\_Ga.pdf
Fintek and the F81216D chip used for the Secondary I/O (LPC UART) controller (48-pin)
Web site: http://www.fintek.com.tw/eng/
Intel Corporation and the 82551QM, used for the Ethernet 1 and Ethernet 2 controllers
Web site: http://www.intel.com/design/network/datashts/82551QM\_ds.htm

# NOTE

If you are unable to locate the datasheets using the links provided, go to the manufacturer’s web site where you can perform a search using the chip datasheet number or name listed, including the extension, (htm for web page, pdf for files name, etc.)

This introduction presents general information about the EPIC Architecture and the ReadyBoard 620 Single Board Computer (SBC). After reading this chapter you should understand:

EPIC Architecture
ReadyBoard 620 architecture
ReadyBoard 620 features
• Major components
• Connectors
. Specifications

# EPIC Architecture

In 2004, five companies collaborated to fill the void between the EBX size and the PC/104 size with a new industry standard form factor (115 mm x 165 mm, or 4.5" x 6.5") called “Embedded Platform for Industrial Computing™ (EPIC).” The EPIC standard principally defines physical size, mounting hole pattern, and power connector locations. It does not specify processor type or electrical characteristics. There are recommended connector placements for serial, parallel, Ethernet, graphics, and memory expansion. This embedded SBC standard ensures that embedded system OEMs can standardize their designs and that full featured embedded computing solutions can be designed into even more space constrained environments than ever before.

The EPIC standard boasts the same highly flexible and adaptable system expansion as EBX, allowing easy and modular addition of functions such as Firewire or wireless networking not usually contained in standard product offerings. The EBX system expansion is based on popular existing industry standards, PC/104™, PC/104-Plus™, and PCI-104™. PC/104 places the ISA bus on compact 3.6" x 3.8" modules with selfstacking capability. PC/104-Plus adds the power of a PCI bus to PC/104 while retaining the basic form factor, but PCI-104 expansion cards only provide the PCI bus to the PC/104 form factor. Using PC/104 expansion cards, an EPIC board can be easily adapted to meet a variety of embedded applications. See Figure 2-1.

The EPIC standard also brings stability to the mid-sized embedded board market and offers OEMs assurance that a wide range of products will be available from multiple sources – now and in the future. The EPIC specification is freely available to all interested companies, and may be used without licenses or royalties. For further technical information on the EPIC standard Rev 1.0, visit the web site at: http://www.ampro.com/RP/EPIC\_Specification\_v1.0.pdf.

![screws (4) or\n(0.6 inch spacers (4)\nfor next board)\nPC/104 Module\n0.6 inch spacers (4)\nPC/104 Plus Module\nPCI Bus\nStackthrough\nConnectors\n0.8 inch spacers (4)\nReadyBoard (EPIC-Compatible)\nnuts (4)\nor chassis standoffs\nISABus\nExpansion\nStackthrough\nConnectors\nI/O\nConnectors\nEPICstackhru](.5001820bb-rb620-refman-61209/f8447d5aaebb5f573d737fa92d212f6569a5dd93b464310657a4f5b40b0752b8.jpg)

Figure 2-1. Typical ReadyBoard and PC/104 Module Stack

# Product Description

The ReadyBoard 620 is a mid-sized, EPIC-compatible, affordable, high quality single-board system, which contains all the component subsystems of a PC/AT PCI motherboard plus the equivalent of several PCI expansion boards. The ReadyBoard 620 is based on the AMD Geode™ LX 800 processor. This processor and the matching chip set give designers a complete integration solution with a high performance embedded processor based on the EPIC form factor.

Each ReadyBoard 620 incorporates an AMD Geode CS5536 chipset for the Graphics and Memory Hub (the Northbridge integrated in the CPU) and I/O Hub (Southbridge) controllers. The Winbond Electronics Corp. Super I/O controller, W83627HF, and Fintek LPC controller add I/O functions. Together, the AMD, Winbond, and Fintek chips provide four serial ports, a floppy or EPP/ECP parallel port, four USB 2.0 ports, PS/2 keyboard and mouse interfaces, an Ultra/DMA 33/66 IDE controller supporting two IDE drives and one Compact Flash socket, which provides CRT and LVDS/TTL flat panel video interfaces, and an audio AC’97 CODEC on the board. The ReadyBoard 620 also supports two 10/100BaseT Ethernet interfaces, and up to 1 GB of non-ECC DDR RAM in a single 200-pin SODIMM socket.

The ReadyBoard 620 can be expanded through the PC/104 and PC/104-Plus expansion buses to accept PC/104 and PC/104-Plus cards that offer compact, self-stacking, modular expandability for additional system functions. The PCI bus operates at 33 MHz clock speed and if included as an option, the ISA bus operates at 8 MHz clock speed. See Figure 2-1.

Among the many enhancements provided on the ReadyBoard 620 to ensure system operation and application versatility are a watchdog timer, serial console (remote access) support, battery-free boot, customizable splash logo screen, on-board high-density Compact Flash socket, and ACPI support for sleep states.

The ReadyBoard 620 is particularly well suited to embedded applications by meeting the size, power consumption, temperature range, quality, and reliability demands of embedded system applications. It can be stacked with ADLINK MiniModules™ or other PCI-104 compliant expansion boards, or it can be used as a powerful computing engine. The ReadyBoard 620 only requires a single +5V power supply.

# Board Features

CPU features

♦ Provides a 500 MHz AMD Geode LX800 processor
64-bit DDR memory interface up to 400 MHZ

• Memory

♦ Provides a single standard 200-pin DDR SODIMM socket
Supports a single +2.5V DDR RAM SODIMM up to 1 GB
Supports PC2700, DDR 333

PC/104-Plus Bus Interface

Supports PCI 2.3 standard
Supports 8 MHz ISA
Supports 33 MHz PCI Bus speed
Supports PC/104 standard at 8 MHz

. IDE Interface

♦ Provides one enhanced IDE controller
Supports one IDE drive on the IDE bus (two drives if Compact Flash card not installed)
Supports dual bus master mode
Supports Ultra DMA 33/66/100 modes
Supports ATAPI and DVD peripherals

Supports IDE native and ATA compatibility modes
♦ Provides Compact Flash socket (on IDE bus with Master/Slave jumper)
Supports bootable IDE compact flash card

Floppy/Parallel Interface

Shared floppy/parallel connector
Supports one floppy disk drive (1 standard 34-pin floppy drive)
Supports all standard PC/AT formats: 360 kB, 1.2 MB, 720 kB, 1.44 MB, 2.88 MB
Supports standard printer port
Supports IEEE standard 1284 protocols of EPP and ECP outputs
Bi-directional data lines
Supports 16 byte FIFO for ECP mode

Serial Ports

♦ Provides four buffered serial ports with full handshaking
♦ Provides two DB9 connectors serial 1 & 2 (COM1 & COM2)
♦ Provides serial ports 3 & 4 (COM3 & COM4) through a 20-pin header
Provides 16550-equivalent controllers, each with a built-in 16-byte FIFO buffer
Supports full modem capability on three of the four ports
Supports RS-232 operation on all four ports
Supports RS-485 or RS-422 operation on two ports, serial 3 & 4 (COM3 & COM4)
Supports programmable word length, stop bits, and parity
Supports 16-bit programmable baud-rate generator

USB Ports

♦ Provides two root USB hubs
Provides four USB ports
♦ Provides two standard USB connectors (USB 0 & 1) and one 10-pin header (USB 2 & 3)
Supports USB v2.0 and legacy v1.1 devices
Supports one USB floppy disk drive
♦ Provides over-current shared fuses on board

Audio interface

Supports AC’97 audio standard
♦ Provides AC’97 CODEC
♦ Provides non-amplified Stereo Line In/Out
♦ Provides non-amplified MIC in (Mono)

Ethernet Interfaces

♦ Provides two fully independent Ethernet (RJ45) ports
♦ Provides two Intel 82551QM Ethernet controllers
♦ Provides integrated LEDs on each port (Link/Activity and Speed)
Supports IEEE 802.3 10BaseT/100BaseTX compatible physical layer
Supports Auto-negotiation for speed, duplex mode, and flow control

Supports full duplex or half-duplex mode
Full-duplex mode supports transmit and receive frames simultaneously
Supports IEEE 802.3x flow control in full duplex mode
♦ Half-duplex mode supports enhanced proprietary collision reduction mode

• Video Interfaces (CRT/TTL/LVDS)

♦ Support CRT (1920 x 1440) with 254 MB UMA (Unified Memory Architecture)
Provides TTL, 24-bit, flat panel outputs pared with resolution up to 1600 x 1200
Provides standard 15-pin VGA connector
Provides LVDS flat panel outputs (single channel; four differential signal pairs; or one 24-bit noninterleaved) on 30-pin header

Infrared Interface

♦ Provides IrDA v1.1 signals on separate connector (J21)
Supports HPSIR and ASKIR infrared modes
Supports IR mode select from the Super I/O chip

Keyboard/Mouse Interface

♦ Provides PS/2 keyboard (shared with mouse) interface
Provides PS/2 mouse (shared with keyboard) interface
▲ ♦ Provides shared over-current fuse

Miscellaneous

♦ Provides real-time clock (RTC) with replaceable battery
Supports battery-free boot
Supports external battery option
Provides Thermal and Voltage monitoring
Supports Remote Access (Serial Console or Console Redirection)
♦ Provides General Purpose I/O (GPIO) capability
Provides SMBus header for external device connection
♦ Oops! Jumper (BIOS Recovery)
Supports LAN Boot (PXE)
♦ Supports Watchdog Timer (WDT)
Supports logo (splash) screen customization

# Block Diagram

Figure 2-2 shows the functional components of the ReadyBoard 620.
![Based on the provided block diagram, here are the labeled blocks and their connections:\n\n**Labeled Blocks:**\n*   CRT VGA\n*   TTL LCD\n*   Transmitter\n*   LVDS LCD\n*   PC/104 Connector\n*   ISA Bridge\n*   PC/104-Plus Connector\n*   PCI Bus\n*   AMD Geode, LX800 CPU\n*   I/O Hub CS5536 (Southbridge)\n*   Clock\n*   Memory Bus\n*   DDR SODIMM\n*   Ext SMBus\n*   Temp\n*   SMBus\n*   P ATA\n*   IDE\n*   Compact Flash Socket\n*   IDE Device, (HDD, CD-ROM, etc.)\n*   Ethernet Controller 82551QM\n*   AC'97 Link\n*   AC'97 CODEC ALC203\n*   USB 2.0\n*   USB Port 1\n*   USB Port 2\n*   USB Port 3\n*   USB Port 4\n*   LPC Bus\n*   Floppy/Parallel\n*   Keyboard/Mouse\n*   IrDA 1.1\n*   Super I/O W83627HF\n*   COM1\n*   COM2\n*   GPIO (User Defined)\n*   512kB ROM BIOS\n*   LPC I/O F81216D\n*   COM3\n*   COM4\n*   Magnetics-RJ45\n\n**Connections:**\n*   **AMD Geode, LX800 CPU** connects to **CRT VGA** and **TTL LCD**.\n*   **TTL LCD** connects to **Transmitter**, which connects to **LVDS LCD**.\n*   **AMD Geode, LX800 CPU** connects to **Clock**.\n*   **AMD Geode, LX800 CPU** connects to **PCI Bus** (upward arrow) and **I/O Hub CS5536 (Southbridge)** (downward arrow).\n*   **PCI Bus** connects to **ISA Bridge** and **PC/104-Plus Connector**.\n*   **ISA Bridge** connects to **PC/104 Connector**.\n*   **PCI Bus** connects to the top **Ethernet Controller 82551QM**.\n*   **I/O Hub CS5536 (Southbridge)** connects to the bottom **Ethernet Controller 82551QM**.\n*   Both **Ethernet Controller 82551QM** blocks connect to two **Magnetics-RJ45** blocks.\n*   **I/O Hub CS5536 (Southbridge)** connects to **SMBus**.\n*   **Clock** connects to **SMBus**.\n*   **SMBus** connects to **DDR SODIMM** and **Temp**. (Note: 'Memory Bus' label is near the connection to DDR SODIMM).\n*   **Clock** connects to **Ext SMBus**.\n*   **I/O Hub CS5536 (Southbridge)** connects to **P ATA**, which connects to **IDE**.\n*   **IDE** connects to **Compact Flash Socket** and **IDE Device, (HDD, CD-ROM, etc.)**.\n*   **PCI Bus** connects to **AC'97 CODEC ALC203**.\n*   **AC'97 CODEC ALC203** connects to **AC'97 Link**, which connects to **I/O Hub CS5536 (Southbridge)**.\n*   **I/O Hub CS5536 (Southbridge)** connects to **USB 2.0**.\n*   **USB 2.0** connects to **USB Port 1**, **USB Port 2**, **USB Port 3**, and **USB Port 4**.\n*   **I/O Hub CS5536 (Southbridge)** connects to **Super I/O W83627HF**.\n*   **Super I/O W83627HF** connects to **Floppy/Parallel**, **Keyboard/Mouse**, **IrDA 1.1**, **COM1**, **COM2**, and **GPIO (User Defined)** (all bidirectional).\n*   **I/O Hub CS5536 (Southbridge)** connects to **LPC Bus**.\n*   **LPC Bus** connects to **512kB ROM BIOS** and **LPC I/O F81216D**.\n*   **LPC I/O F81216D** connects to **COM3** and **COM4** (bidirectional).](.5001820bb-rb620-refman-61209/5bf77c379748eb865bc3a99e5cf1f6a6732a87a023424e0dc9391c49fb7219c2.jpg)

Figure 2-2. Functional Block Diagram

# Major Components (ICs)

Table 2-1 lists the major integrated circuits (ICs) on the ReadyBoard 620, including a brief description of each, and Figure 2-3 on page 9 shows the locations of ICs.

Table 2-1. Major Integrated Circuit Description and Function

<table><tr><td>Chip Type</td><td>Mfg.</td><td>Model</td><td>Description</td><td>Function</td></tr><tr><td>CPU (U9)</td><td>AMD</td><td>Geode LX800</td><td>500 MHz CPU and Northbridge</td><td>Integrated CPU, memory, and video</td></tr><tr><td>I/O Hub (B1)</td><td>AMD</td><td>CS5536</td><td>Southbridge functions (provides some of the standard I/O functions)</td><td>I/O Functions</td></tr><tr><td>Super I/O (U6)</td><td>Winbond Electronics, Corp.</td><td>W83627HF</td><td>Super I/O controller (provides remaining standard I/O functions)</td><td>I/O Functions</td></tr><tr><td>LPC I/O UART Controller (U18 - on back of the board)</td><td>Fintek</td><td>F81216D</td><td>LPC controller for Serial Ports 3 and 4 (COM 3 and COM4)</td><td>UART (I/O) Controller</td></tr><tr><td>Ethernet Controllers (U11, U12)</td><td>Intel</td><td>82551QM</td><td>Ethernet chips provide two independent 10/100BaseT based network channels</td><td>Ethernet Functions</td></tr><tr><td>PCI to ISA Bridge (U10)</td><td>ITE</td><td>ITE8888G</td><td>PCI to ISA interface</td><td>ISA Bus</td></tr></table>

![U6\nU9\nU11\nU12\nB1\nU10\nRB_620_2_4_BA](.5001820bb-rb620-refman-61209/2852aff02d479af69190305771bb0b11f5e91fc98808b953f240e8e30bd29b2d.jpg)

Figure 2-3. Component Locations

# Header, Connector, and Socket Definitions

Table 2-2 describes the interfaces shown in Figures 2-4 and 2-5. All I/O headers and connectors use 2.54 mm (0.100") pitch, unless otherwise indicated.

Table 2-2. Connector Descriptions

<table><tr><td>Jack #</td><td>Signal/Device</td><td>Description</td></tr><tr><td>BTI</td><td>RTC battery (B1)</td><td>2-pin, 1.25mm (0.049") header for battery input</td></tr><tr><td>DIMM1</td><td>Memory (on back of the board)</td><td>200-pin socket for DDR SDRAM SODIMM</td></tr><tr><td>D5</td><td>IDE LED</td><td>Yellow and green IDE and power activity indicators</td></tr><tr><td>SW1</td><td>Reset switch</td><td>4-pin, 5V, momentary push-button switch</td></tr><tr><td>J1</td><td>Power On</td><td>3-pin, 2 mm header for Power-On and +5V standby voltages</td></tr><tr><td>J2</td><td>Power In</td><td>4-pin, 5.08 mm (0.200") connector for input power +5V, +12V, GND</td></tr><tr><td>J3</td><td>NC</td><td>Not connected</td></tr><tr><td>J4</td><td>GPIO</td><td>10-pin, 2 mm (0.079") header for GPIO signals</td></tr><tr><td>J5</td><td>Serial B</td><td>20-pin, 2 mm (0.079") header for serial ports 3 &amp; 4 (COM3 &amp; COM4)</td></tr><tr><td>J6A/B</td><td>Serial A</td><td>9-pin dual connectors for serial ports 1 &amp; 2 (COM1 &amp; COM2, DB9)</td></tr><tr><td>J7</td><td>Video (CRT VGA)</td><td>15-pin connector for output to a CRT monitor</td></tr><tr><td>J8</td><td>Video (LCD TTL)</td><td>50-pin, 1 mm (0.039") header 36-bit output for LCD flat panels</td></tr><tr><td>J9</td><td>Video (LCD LVDS)</td><td>30-pin, 2 mm (0.079") header for LVDS video display</td></tr><tr><td>J10</td><td>Ethernet 1 + LEDs</td><td>14-pin connector for 8-pin RJ45 and LEDs for Ethernet port 1</td></tr><tr><td>J11A/B/C/D</td><td>PC/104</td><td>104-pin, connector for ISA functions</td></tr><tr><td>J12</td><td>Ethernet 2 + LEDs</td><td>14-pin connector for 8-pin RJ45 and LEDs for Ethernet port 2</td></tr><tr><td>J13A/B</td><td>USB 0 &amp; 1</td><td>8-pin connector for two 4-pin interfaces provides USB0 and USB1</td></tr><tr><td>J14</td><td>Keyboard/Mouse</td><td>6-pin, PS/2 Keyboard/Mouse connector (dual output cable)</td></tr><tr><td>J15</td><td>Audio In/Out</td><td>16-pin, 2 mm (0.079") header for Line In L/R, Line Out L/R, Mic In</td></tr><tr><td>J16</td><td>Utility</td><td>5-pin header for power and reset buttons and speaker</td></tr><tr><td>J17</td><td>USB 2 &amp; 3</td><td>10-pin, 2 mm (0.079") header provides USB2 and USB3 output</td></tr><tr><td>J18</td><td>Floppy/Parallel Port</td><td>26-pin, 2 mm (0.079") header for floppy/parallel port interface</td></tr><tr><td>J19</td><td>IDE</td><td>44-pin, 2 mm (0.079") header for IDE interface</td></tr><tr><td>J20</td><td>SMBus</td><td>5-pin, 2 mm (0.079") SMBus header for external device connection</td></tr><tr><td>J21</td><td>IrDA</td><td>5-pin header for infrared signals</td></tr><tr><td>J22A/B/C/D</td><td>PC/104-Plus</td><td>120-pin, 2 mm (0.079") connector for PCI bus</td></tr><tr><td>J23</td><td>Compact Flash Socket (on back of the board)</td><td>50-pin, 1.27 mm (0.050") socket accepts compact flash cards (Type I or II)</td></tr></table>

# NOTE

The pinout tables in Chapter 3 of this manual identify pin sequence using the following methods: A 20-pin header with two rows of pins, using odd/even numbering, where pin 2 is directly across from pin 1, is noted as 20-pin, 2 rows, odd/ even (1, 2). Alternately, a 20-pin connector using consecutive numbering, where pin 11 is directly across from pin 1, is noted in this way: 20-pin, 2 rows, consecutive (1, 11). The second number in the parenthesis is always directly across from pin-1. See Figure 2-4.

![| Group | Row | Value |\n|-------|-----|-------|\n| 20-pin, two rows, Odd/Even, (1, 2) | 19 | 19 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 20 | 20 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 10 | 10 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 8 | 8 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 6 | 6 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 4 | 4 |\n| 20-pin, two rows, Odd/Even, (1, 2) | 2 | 2 |\n| Or | 10 | 10 |\n| Or | 5 | 5 |\n| Or | 4 | 4 |\n| Or | 3 | 3 |\n| Or | 2 | 2 |\n| Or | 1 | 1 |\n| Or | 11 | 11 |\n| Consecutive | 20 | 20 |\n| Consecutive | 15 | 15 |\n| Consecutive | 11 | 11 |](.5001820bb-rb620-refman-61209/e9d19181b6082d18d85387a314c8dcdc213d22045645c21fd10e98d304400f27.jpg)

Figure 2-4. Connector Pin Identifications

![JP6\nJ5\nJ4\nJ2\nJ1\nJ6\nJP5\nJP4\nJ7\nJ9\nAB\nJ10\nDC\nJ12\nJ13\nJ14\nJ15\nSW1\nD5\nJ16 J17\nJP3 JP2\nJ20 JP7 JP1\nJ21 BT1\nABCD\nJ22](.5001820bb-rb620-refman-61209/ac02466f782bd664e4dd8de7b379a4e2ae2514b0d85009aead76336bc1817885.jpg)

Figure 2-5. Connector Locations

NOTE Pin 1 is shown as a black pin (circle or square) in all connectors and jumper headers. To comply with the PC/104, PC/104-Plus, or PCI-104 specifications, some pins in the connectors/headers are missing or have keys blocking the pins.

# Jumper Header Definitions

Table 2-3 describes the jumper header locations shown in Figure 2-5. Refer to the Oops! Jumper on page 30 for BIOS recovery.

Table 2-3. Jumper Settings

<table><tr><td>Jumper #</td><td>Installed/Enabled</td><td>Removed/Enabled</td></tr><tr><td>JP1 – Not Used</td><td>Reserved</td><td>Reserved Default</td></tr><tr><td>JP2 – Compact Flash</td><td>Master (pins 1-2)</td><td>Slave (removed) Default</td></tr><tr><td>JP3 – CF Voltage Select</td><td>Enable +3.3V (pins 1-2) Default</td><td>Enable +5V (pins 2-3)</td></tr><tr><td>JP4 – LCD Voltage Type</td><td>Enable +3.3V (pins 1-2) Default</td><td>Enable +5V (pins 2-3)</td></tr><tr><td>JP5 – INTVR</td><td>Enable +5V (pins 1-2) Default</td><td>Enable +12V (pins 2-3)</td></tr><tr><td>JP6 – COM3 RS485</td><td>Termination (pins 1-2)</td><td>No Termination (removed)Default</td></tr><tr><td>JP6 – COM4 RS485</td><td>Termination (pins 3-4)</td><td>No Termination (removed)Default</td></tr><tr><td>JP7 – CMOS Reset</td><td>Normal (pins 1-2) Default</td><td>Clear (Reset CMOS, pins 2-3)</td></tr></table>

# Specifications

# Physical Specifications

Table 2-4 lists the physical dimensions of the board.

Table 2-4. Weight and Footprint Dimensions

<table><tr><td>Parameter</td><td>Dimensions</td><td rowspan="6">NOTE</td><td rowspan="6">Overall height is measured from the upper board surface to the highest permanent component (at Serial A) on the upper board surface. This measurement does not include the heatsinks available for these boards.</td></tr><tr><td>Weight</td><td>0.117 kg. (0.26 lb.)</td></tr><tr><td>Height (overall)</td><td>28.44 mm (1.12&quot;)</td></tr><tr><td>Width</td><td>115 mm (4.5&quot;)</td></tr><tr><td>Length</td><td>165 mm (6.5&quot;)</td></tr><tr><td>PCB Thickness</td><td>1.574 mm (0.062&quot;)</td></tr></table>

# Power Specifications

Table 2-5 lists the ReadyBoard 620 current measurements.

Table 2-5. Power Supply Requirements

<table><tr><td>Parameters</td><td>Characteristics (500 Mhz Geode, LX800)</td></tr><tr><td>Input Type</td><td>Regulated DC voltages</td></tr><tr><td>In-rush Current</td><td>14.20A/71.00W</td></tr><tr><td>Idle Power</td><td>1.51A/7.54W</td></tr><tr><td>BIT Current</td><td>2.19A/10.94W</td></tr></table>

# Operating configurations:

In-rush operating configurations include video and 512MB DDR RAM.
Idle operating configurations include the in-rush configurations as well as one IDE hard drive with Windows XP SP2, floppy, keyboard, and mouse.
BIT = Burn-In-Test. Operating configurations include idle configurations as well as four serial loopbacks, one USB Jump Drive, one on-board Compact Flash drive with 64MB Compact Flash, two Ethernet connections, one USB Compact Flash reader with 64MB Compact Flash, one external-power USB hard drive, one external-power USB CD-ROM drive.

# Mechanical Specifications

Figure 2-6 shows the side view of the ReadyBoard 620 with the mechanical mounting dimensions.
ReadyBoard 620 (Side view)
![Serial 1 & 2\n(Serial 1 Lower)\nEthernet 1\nUSB 0 & 1\n(USB 0 Lower)\nKeyboard/\nMouse\nReset\nSwitch\nPower/IDE\nActivity\nLED\nRB620sideviewa\nCRT\nEthernet 2\nCompact Flash Socket](.5001820bb-rb620-refman-61209/b7c233321f1ca6f4224e9eb43d7fb9173345bb4af8a8e9b528ae5974e52a5188.jpg)

![| Dimension         | Value   |\n| ----------------- | ------- |\n| Height (Top)      | 6.500   |\n| Height (Bottom)  | 0.345   |\n| Width (Top)       | 1.213   |\n| Width (Bottom)   | 0.361   |\n| Thickness (Top)   | 0.696   |\n| Thickness (Bottom)| 0.311   |\n| Total Width (Top) | 0.370   |\n| Total Width (Bottom)| 0.338 |\n| Board Thickness (Top) | 0.554   |\n| Board Thickness (Bottom)| 0.510   |\n| Board Thickness (Bottom) | 0.275   |\n| Board Thickness (Bottom) | 0.275   |\n| Board Thickness (Bottom) | 0.390   |\n| Board Thickness (Bottom) | 1.875   |\n| Board Thickness (Bottom) | 1.350   |\n| Board Thickness (Bottom) | 1.875   |\n| Board Thickness (Bottom) | 1.350   |\n| Board Thickness (Bottom) | 1.875   |\n| Board Thickness (Bottom) | 1.350   |\n| Board Thickness (Bottom) | 1.875   |\n| Board Thickness (Bottom) | 1.350   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.497   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.120   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.640   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.500   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.311   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.200   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.370   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.624   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.100   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.624   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.068   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.602   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.055   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.547   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.650   |\n| Board Thickness (Bottom) - Mounting Hole Center at (4) Corners | 0.510   |\nAll dimensions are in inches and are approximate.\nBoard thickness is 0.062 inches.](.5001820bb-rb620-refman-61209/6c1f673fe1256442dd0abaad9cf90ca2c7953259ef7d27096b209fb94b13e87f.jpg)

![| Dimension         | Value   |\n| ----------------- | ------- |\n| Total Width       | 165.1   |\n| Total Height      | 30.810  |\n| Total Height      | 30.835  |\n| Total Height      | 1.701   |\n| Total Height      | 1.295   |\n| Total Height      | 17.678  |\n| Total Height      | 691.6   |\n| Total Height      | 16.256  |\n| Total Height      | 3.048   |\n| Total Height      | 28.270  |\n| Total Thickness    | 15.849  |\n| Total Thickness    | 15.849  |\n| Total Thickness    | 1.727   |\n| Total Thickness    | 2.54    |\n| Total Thickness    | 13.893  |\n| Total Thickness    | 16.510  |\n| Total Thickness    | 12.954  |\n| Total Thickness    | 14.071  |\n| Total Thickness    | 6.985   |\n| Total Thickness    | 4.572   |\n| Total Thickness    | 9.398   |\n| Total Thickness    | 2.032   |\n| Total Thickness    | 6.985   |\n| Total Thickness    | 9.906   |\n| Total Thickness    | 34.29   |\n| Total Thickness    | 8.588   |\n| Mounting Hole Center at (4) Corners | 7.899   |\n| Mounting Hole Center at (4) Corners | 12.700  |\n| Mounting Hole Center at (4) Corners | 5.080   |](.5001820bb-rb620-refman-61209/cd0fcaad99f4bd61c605f72883fb7c65ceeb6ea72e46a8a4238e368bfb9aaf75.jpg)

Figure 2-6. ReadyBoard 620 I/O Panel Dimensions (Side view)

# Environmental Specifications

Table 2-6 provides the most efficient operating and storage condition ranges required for this board.
Table 2-6. Environmental Requirements

<table><tr><td>Parameter</td><td colspan="3">Temperature</td><td colspan="2">Humidity</td></tr><tr><td>Model</td><td>Operating</td><td>Storage</td><td>Extended(Optional)</td><td>Operating</td><td>Non-operating</td></tr><tr><td>500 MHz Geode, LX800</td><td>0° to +60°C(+32° to +140°F)</td><td>-20° to +75°C(-4° to +167°F)</td><td>-20° to +70°C(-4° to +158°F)</td><td>5% to 90% relative humidity, non-condensing</td><td>5% to 95% relative humidity, non-condensing</td></tr></table>

# Thermal/Cooling Requirements

The CPU, I/O Hub (Southbridge), Super I/O, and voltage regulators are the sources of heat on the board. The ReadyBoard 620 is designed to operate at its maximum CPU speed of 500 MHz. Only the CPU requires a heatsink, but no fan.

# Overview

This chapter discusses the following features of the ReadyBoard 620 connectors:

Interrupt Channel Assignments
• Memory Map
• I/O Address Map
Floppy/Parallel Interface
. Serial Interfaces
. USB Interface
. Audio Interface
Video Interfaces
. Miscellaneous

♦ Utility Interfaces
Reset Switch
Keyboard/Mouse
♦ User GPIO signals
Infrared (IrDA) Port
System Management Bus (SMBus)
♦ Real Time Clock (RTC)
♦ Oops! Jumper (BIOS Recovery)
Temperature Monitoring
♦ Remote Access (Serial Console)
Watchdog timer

Power In Interface

. Power On Interface

• Power and Sleep States

# NOTE

ADLINK Technology, Inc. only supports the features/options tested and listed in this manual. The main integrated circuits (ICs) used in the ReadyBoard 620 may provide more features or options than are listed for the ReadyBoard 620, but some of these IC features/options are not supported on the board and may not function as specified in the IC documentation.

This chapter does not include pinout tables for standard headers and connectors such as PC/104, PC/104-Plus, Ethernet RJ45, 44-pin IDE, and Compact Flash.

# Interrupt Channel Assignments

The interrupt channel assignments are listed in Table 3-1.

Table 3-1. Interrupt Channel Assignments (Typical)

<table><tr><td>Device vs IRQ No.</td><td>0</td><td>1</td><td>2</td><td>3</td><td>4</td><td>5</td><td>6</td><td>7</td><td>8</td><td>9</td><td>10</td><td>11</td><td>12</td><td>13</td><td>14</td><td>15</td></tr><tr><td>Timer</td><td>X</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>Keyboard</td><td></td><td>X</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>Secondary Cascade</td><td></td><td></td><td>X</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>COM1</td><td></td><td></td><td></td><td>O</td><td>D</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>COM2</td><td></td><td></td><td></td><td>D</td><td>O</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>COM3</td><td></td><td></td><td></td><td></td><td>O</td><td></td><td></td><td></td><td></td><td>O</td><td>O</td><td>D</td><td></td><td></td><td></td><td></td></tr><tr><td>COM4</td><td></td><td></td><td></td><td>O</td><td></td><td></td><td></td><td></td><td></td><td>O</td><td>D</td><td>O</td><td></td><td></td><td></td><td></td></tr><tr><td>Floppy</td><td></td><td></td><td></td><td></td><td></td><td></td><td>D</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>Parallel</td><td></td><td></td><td></td><td></td><td></td><td>O</td><td></td><td>D</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>RTC</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td>X</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>IDE</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td>D</td><td>O</td></tr><tr><td>Math Coprocessor</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td>X</td><td></td><td></td></tr><tr><td>PS/2 Mouse</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td>X</td><td></td><td></td><td></td></tr><tr><td>PCI INTA</td><td colspan="16">Automatically Assigned</td></tr><tr><td>PCI INTB</td><td colspan="16">Automatically Assigned</td></tr><tr><td>PCI INTC</td><td colspan="16">Automatically Assigned</td></tr><tr><td>PCI INTD</td><td colspan="16">Automatically Assigned</td></tr><tr><td>USB</td><td colspan="16">Automatically Assigned</td></tr><tr><td>VGA</td><td colspan="16">Automatically Assigned</td></tr><tr><td>Ethernet</td><td colspan="16">Automatically Assigned</td></tr></table>

Legend: D = Default, X = Fixed, O = Optional

# NOTE

The IRQs for the Ethernet, Video, and USB are automatically assigned by the BIOS Plug and Play logic. Local IRQs assigned during initialization can not be used by external devices.

# Memory Map

The following table provides the common PC/AT memory allocations. Memory below 000500h is used by the BIOS. Refer to Table 3-2.

Table 3-2. Memory Map

<table><tr><td>Base Address</td><td>Function</td></tr><tr><td>00000000h - 0009FFFFh</td><td>Conventional Memory</td></tr><tr><td>000A0000h - 000AFFFFh</td><td>Graphics Memory</td></tr><tr><td>000B0000h - 000B7FFFh</td><td>Mono Text Memory</td></tr><tr><td>000B8000h - 000BFFFFh</td><td>Color Text Memory</td></tr><tr><td>000C0000h - 000C7FFFh</td><td>Standard Video BIOS</td></tr><tr><td>000D0000h - 000DFFFFh</td><td>Reserved for Extended BIOS</td></tr><tr><td>000E0000h - 000FFFFFFh</td><td>System BIOS Area (Storage and RAM Shadowing)</td></tr><tr><td>00100000h - Top of DRAM</td><td>Extended Memory (If on-board VGA is enabled, then the amount of memory assigned is subtracted from extended memory.)</td></tr><tr><td>FFF80000h - FFFFFFFFh</td><td>System Flash</td></tr></table>

# I/O Address Map

Table 3-3 lists the I/O addresses.

Table 3-3. I/O Address Map

<table><tr><td>Address (hex)</td><td>Subsystem</td></tr><tr><td>000-00F</td><td>Primary DMA Controller</td></tr><tr><td>020-021</td><td>Master Interrupt Controller</td></tr><tr><td>040-043</td><td>Programmable Interrupt Timer (Clock/Timer)</td></tr><tr><td>060-06F</td><td>Keyboard Controller</td></tr><tr><td>070-07F</td><td>CMOS RAM, NMI Mask Reg, RT Clock</td></tr><tr><td>080-09F</td><td>DMA Page Registers</td></tr><tr><td>092</td><td>Fast A20 Gate and CPU Reset</td></tr><tr><td>094</td><td>Motherboard Enable</td></tr><tr><td>102</td><td>Video Subsystem Register</td></tr><tr><td>0A0-0BF</td><td>Slave Interrupt Controller</td></tr><tr><td>0C0-0DF</td><td>Slave DMA Controller #2</td></tr><tr><td>0F0-0FF</td><td>Math Coprocessor</td></tr><tr><td>1F0-1F8</td><td>IDE Hard Disk Controller</td></tr><tr><td>201</td><td>Watchdog Timer (WDT)</td></tr><tr><td>278-27F</td><td>Parallel Printer</td></tr><tr><td>2E8-2FF</td><td>Serial Port 4 (COM4)</td></tr><tr><td>2F8-2FF</td><td>Serial Port 2 (COM2)</td></tr><tr><td>378-37F</td><td>Parallel Port (Standard and EPP)</td></tr><tr><td>3C0-3DF</td><td>VGA</td></tr><tr><td>3E8-3EF</td><td>Serial Port 3 (COM3)</td></tr><tr><td>3F0-3F7</td><td>Floppy Disk Controller</td></tr><tr><td>3F8-3FF</td><td>Serial Port 1 (COM1)</td></tr><tr><td>778-77A</td><td>Parallel Port (ECP Extensions) (Port 378+400)</td></tr><tr><td>CF8-CFF</td><td>PCI Bus Configuration Address and Data</td></tr></table>

# Floppy/Parallel Interface

The Super I/O controller (W83627HF) provides the floppy controller and the parallel port controller. The floppy controller and the parallel port controller share the same output connector (J18) on the board and the device selection is made in the BIOS Setup Utility.

Floppy port controller only supports one floppy drive, in the standard formats, such as 360 kB, 720 kB, 1.2 MB, 1.44 MB, or 2.88 MB drives.
• Parallel port controller supports standard parallel, bi-directional, ECP and EPP protocols.

NOTE Due to the multiplexed nature of the signals for the floppy and parallel ports, you can only connect one of these devices at a time. Refer to Chapter 4, BIOS Setup Utility later in this manual to enter the BIOS Setup for selecting the floppy or parallel device. A reboot is necessary for the change of BIOS settings to take affect.

Table 3-4 describes the floppy/parallel port pin/signals with 26-pins, 2 rows, consecutive (1, 14) with 2 mm pin spacing.

Note: The shaded areas denote power or ground. The signals marked with \* = Negative true logic.
Table 3-4. Floppy/Parallel Interface Pin/Signal Descriptions (J18)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>Strobe*</td><td>Parallel Strobe* – This is an output signal used to strobe data into the printer. I/O pin in ECP/EPP mode.</td></tr><tr><td>2</td><td>PD0INDEX*</td><td>Parallel Port Data 0 – These pins (0 to 7) provide parallel port data signals.Floppy Index – Detects head positioned over the beginning of a track.</td></tr><tr><td>3</td><td>PD1TRK0*</td><td>Parallel Port Data 1 – See pin 2 (PD0) for more information.Floppy Track 0 – Detects when head is positioned over track 0.</td></tr><tr><td>4</td><td>PD2WPRT*</td><td>Parallel Port Data 2 – See pin 2 (PD0) for more information.Floppy Write Protect – Senses if diskette is write protected.</td></tr><tr><td>5</td><td>PD3RDATA*</td><td>Parallel Port Data 3 – See pin 2 (PD0) for more information.Floppy Read Data – Raw serial bit stream from the drive for read operations.</td></tr><tr><td>6</td><td>PD4DSKCHG*</td><td>Parallel Port Data 4 – See pin 2 (PD0) for more information.Floppy Disk Change – Senses when drive door is open or the diskette has been changed since the last drive selection.</td></tr><tr><td>7</td><td>PD5</td><td>Parallel Port Data 5 – See pin 2 (PD0) for more information.</td></tr><tr><td>8</td><td>PD6</td><td>Parallel Port Data 6 – See pin 2 (PD0) for more information.</td></tr><tr><td>9</td><td>PD7</td><td>Parallel Port Data 7 – See pin 2 (PD0) for more information.</td></tr><tr><td>10</td><td>ACK*DS1*</td><td>Parallel Acknowledge * – This is a status output signal from the printer. A Low State indicates it has received the data and is ready to accept new data.Floppy Drive Select 1 – Select drive 1.</td></tr><tr><td>11</td><td>BUSYMTR1*</td><td>Parallel Busy – This is a status output signal from the printer. A High State indicates the printer is not ready to accept data.Floppy Motor Control 1 – Select motor on drive 1.</td></tr><tr><td>12</td><td>PEWDATA*</td><td>Parallel Paper End – This is a status output signal from the printer. A High State indicates it is out of paper.Floppy Write Data – Encoded data to the drive for write operations.</td></tr><tr><td>13</td><td>PSLCTWGATE*</td><td>Printer Select – This is a status output signal from the printer. A High State indicates it is selected and powered on.Floppy Write Enable – Drive signal to enable current flow in the write head.</td></tr><tr><td>14</td><td>AFD*DRVEN0*</td><td>Parallel Auto Feed* – This is a request signal into the printer to automatically feed one line after each line is printed.Floppy Drive Density Select Bit 0</td></tr><tr><td>15</td><td>ERR*HDSEL*</td><td>Parallel Error – This is a error status output signal from the printer. A Low State indicates an error condition on the printer.Floppy Head Select – Selects the side for Read/Write operations (0 = side 1, 1 = side 0)</td></tr><tr><td>16</td><td>PINIT*DIR*</td><td>Printer Initialize* – This signal is used to Initialize printer. Output in standard mode, I/O in ECP/EPP mode.Floppy Direction – Direction of head movement (0 = inward motion, 1 = outward motion).</td></tr><tr><td>17</td><td>SLINSTEP*</td><td>Parallel Select In – This output signal to the printer is used to select the printer. I/O pin in ECP/EPP mode.Floppy Step – Low pulse for each track-to-track movement of the head.</td></tr><tr><td>18</td><td>GND</td><td>Ground</td></tr><tr><td>19</td><td>GND</td><td>Ground</td></tr><tr><td>20</td><td>GND</td><td>Ground</td></tr><tr><td>21</td><td>GND</td><td>Ground</td></tr><tr><td>22</td><td>GND</td><td>Ground</td></tr><tr><td>23</td><td>GND</td><td>Ground</td></tr><tr><td>24</td><td>GND</td><td>Ground</td></tr><tr><td>25</td><td>GND</td><td>Ground</td></tr><tr><td>26</td><td>NC</td><td>Not Connected</td></tr></table>

# Serial Interfaces

The ReadyBoard 620 supports four independent serial ports, using two separate chips. The Super I/O controller (W83627HF) provides serial ports 1 and 2 through the Serial A DB9 connectors (J6A/B), and the I/O Hub (CS5536) and LPC I/O controller (F81216D) provide serial ports 3 and 4 through Serial B header (J5). The four serial ports support the following features:

. Four individual 16550-compatible UARTs
Programmable word length, stop bits and parity
16-bit programmable baud rate generator
Interrupt generator
• Loop-back mode
. Four individual 16-bit FIFOs
Serial A supports ports 1 and 2 using the Super I/O Controller

Serial Port 1 (COM1) supports RS-232 and full modem support
Serial Port 2 (COM2) supports RS-232 and full modem support

Serial B supports ports 3 and 4 using the I/O Hub (Southbridge)

♦ Serial Port 3 (COM3) supports RS-232 and RS-485/RS-422 and full modem support
♦ Serial Port 4 (COM4) supports RS-232 and RS-485/RS-422 and modem support

# NOTE

The RS-232 and RS-485/RS-422 modes are selected in BIOS Setup Utility under the submenu, Super I/O Configuration in the Advanced menu screen for Serial Ports 3 (COM3) and 4 (COM4). However, the RS-232 mode is the default (Standard) for any serial port.

RS-485 mode termination is selected with jumper JP6, pins 1-2 (COM3), and pins 3-4 (COM4), when the RS-485 mode is selected in BIOS Setup Utility.

To implement the two-wire RS-485 mode on either serial port, you must tie the equivalent pins together for each port.

For example: on Serial Port 3, tie pin 3 (RX3-) to 5 (TX3-) and pin 4 (TX3+) to 6 (RX3+) at the Serial B interface connector (J5). As an alternate, tie pin 2 to pin 3 and pin 7 to pin 8 at the DB9 serial connector for Serial Port 3. See Figure 3-1. Refer to the following table for the specific pins of the Serial B interface. The RS-422 mode uses a four-wire interface and does not require tying pins together, but you must select RS-485 in BIOS Setup Utility.

![Serial B Interface (J5)\nfor Serial Port 3\n(or COM3 Port)\nTop View\n19 9 7 5 3 1\n20 10 8 6 4 2\nOr Standard DB9 Serial\nPort Connector (Male)\nFront View\n5 4 3 2 1\n9 8 7 6\nRB620RS485Con_b](.5001820bb-rb620-refman-61209/f0ae9bf4239f2b9165e7b1e4f676a6d0834d6ef00bedba015f54fd2a8ffa741e.jpg)

Figure 3-1. RS-485 Serial Port Implementation

Table 3-5. Serial B (COM3 and COM4) Interface Pin/Signal Descriptions (J5)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>DCD3*</td><td>Data Carrier Detect 3 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open). In direct connect environments, this input will be driven by DTR3 as part of the DTR3/DSR3 handshake.</td></tr><tr><td>2</td><td>DSR3*</td><td>Data Set Ready 3 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR3 for overall readiness to communicate.</td></tr><tr><td rowspan="2">3</td><td>RXD3</td><td>Receive Data 3 – Serial port 3 receive data in</td></tr><tr><td>RX3-</td><td>RX3- – If in RS485 or RS422 mode, this pin is Receive Data 3 -.</td></tr><tr><td rowspan="2">4</td><td>RTS3*</td><td>Request To Send 3 – Indicates Serial port 3 is ready to transmit data. Used as hardware handshake with CTS3 for low level flow control.</td></tr><tr><td>TX3+</td><td>TX3+ – If in RS485 or RS422 mode, this pin is Transmit Data 3 +.</td></tr><tr><td rowspan="2">5</td><td>TXD3</td><td>Transmit Data 3 – Serial port 3 transmit data out</td></tr><tr><td>TX3-</td><td>TX3- – If in RS485 or RS422 mode, this pin is Transmit Data 3 -.</td></tr><tr><td rowspan="2">6</td><td>CTS3*</td><td>Clear To Send 3 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS3 for low level flow control.</td></tr><tr><td>RX3+</td><td>RX3+ – If in RS485 or RS422 mode, this pin is Receive Data 3 -.</td></tr><tr><td>7</td><td>DTR3*</td><td>Data Terminal Ready 3 – Indicates Serial port 3 is powered, initialized, and ready. Used as hardware handshake with DSR3 for overall readiness to communicate.</td></tr><tr><td>8</td><td>RI3*</td><td>Ring Indicator 3 – Indicates external serial communications device is detecting a ring condition. Used by software to initiate operations to answer and open the communications channel.</td></tr><tr><td>9</td><td>GND</td><td>Ground</td></tr><tr><td>10</td><td>NC</td><td>Not connected</td></tr><tr><td>11</td><td>DCD4*</td><td>Data Carrier Detect 4 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open). In direct connect environments, this input will be driven by DTR4 as part of the DTR4/DSR4 handshake.</td></tr><tr><td>12</td><td>DSR4*</td><td>Data Set Ready 4 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR4 for overall readiness to communicate.</td></tr><tr><td rowspan="2">13</td><td>RXD4</td><td>Receive Data 4 – Serial port 4 receive data in</td></tr><tr><td>RX4-</td><td>RX4- – If in RS485 or RS422 mode, this pin is Receive Data 4 -.</td></tr><tr><td rowspan="2">14</td><td>RTS4*</td><td>Request To Send 4 – Indicates Serial port 4 is ready to transmit data. Used as hardware handshake with CTS4 for low level flow control.</td></tr><tr><td>TX4+</td><td>TX4+ – If in RS485 or RS422 mode, this pin is Transmit Data 4 +.</td></tr><tr><td rowspan="2">15</td><td>TXD4</td><td>Transmit Data 4 – Serial port 4 transmit data out</td></tr><tr><td>TX4-</td><td>TX4- – If in RS485 or RS422 mode, this pin is Transmit Data 4 -.</td></tr><tr><td rowspan="2">16</td><td>CTS4*</td><td>Clear To Send 4 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS4 for low level flow control.</td></tr><tr><td>RX4+</td><td>RX4+ – If in RS485 or RS422 mode, this pin is Receive Data 4 +.</td></tr><tr><td>17</td><td>DTR4*</td><td>Data Terminal Ready 4 – Indicates Serial port 3 is powered, initialized, and ready. Used as hardware handshake with DSR4 for overall readiness to communicate.</td></tr><tr><td>18</td><td>NC</td><td>Not connected</td></tr><tr><td>19</td><td>GND</td><td>Ground</td></tr><tr><td>20</td><td>NC</td><td>Not connected</td></tr></table>

Note: The shaded area denotes power or ground. Signals are listed in the following order: RS232 followed by RS485/RS422. The signals marked with \* = Negative true logic.

# USB Interfaces

The I/O Hub (CS5536) provides the USB solution for both legacy OHCI controllers and EHCI controller (USB 2.0) support. The I/O Hub (Southbridge) contains port-routing logic that determines which controller (OHCI or EHCI) handles the USB data signals. The PC style (or Standard) connector (J13A/B) provides two of the four USB ports (USB0 and USB1). The other two USB ports share a single 10-pin header (J17A/B) on the board.

# USB 2.0 Support

The I/O Hub contains an Enhanced Host Controller Interface (EHCI) compliant host controller, which supports up to 4 high-speed USB 2.0 Specification compliant root ports. The higher speed USB 2.0 specification allows data transfers up to 480 Mbps using the same pins as the 4 Full-speed/Low-speed USB OHCI ports. The I/O Hub port-routing logic determines which of the controllers (OHCI or EHCI) processes the USB signals. The following list provides some of the ReadyBoard 620’s EHCI features.

One EHCI host controller for all four USB ports on connectors (J17A/B, and/or J13A/B)
Support for USB v2.0 Specification
Over-current fuses, located on the board, where USB0 and USB1 share a single fuse (F3) and USB2 and USB3 share a single fuse (F2).

# Legacy USB Support

The I/O Hub supports two USB Open Host Controller Interfaces (OHCI) and each Host Controller includes a root hub with two USB ports each, for a total of 4 USB ports. The USB Legacy features implemented on the USB ports include the following:

One root hub and two USB ports on connector (J17A/B)
One root hub and two USB ports on connector (J13A/B)
Supports USB v.1.1 OHCI with integrated physical layer transceivers
Supports improved arbitration latency for OHCI controllers
OHCI controllers support Analog Front End (AFE) embedded cell instead of USB I/O buffers to allow for USB high-speed signaling rates
Over-current fuses, located on the board, are used on all four USB ports

# Secondary USB2 and USB3

Table 3-11 describes USB 2 & 3, J17A/B at 10-pins, 2 rows, odd/even (1, 2) with 2 mm pitch.

Table 3-6. USB 2 & 3 Interface Pin/Signal Descriptions (J17A/B)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1, 2</td><td>VCC</td><td>USB Voltage – +5V through shared fuse (F2)</td></tr><tr><td>3</td><td>USBP2-</td><td>Universal Serial Bus Port 2 Data Negative</td></tr><tr><td>4</td><td>USBP3-</td><td>Universal Serial Bus Port 3 Data Negative</td></tr><tr><td>5</td><td>USBP2+</td><td>Universal Serial Bus Port 2 Data Positive</td></tr><tr><td>6</td><td>USBP3+</td><td>Universal Serial Bus Port 3 Data Positive</td></tr><tr><td>7, 8, 9, 10</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

# Audio Interface

The audio solution on the ReadyBoard 620 is provided by the (Southbridge) I/O Hub (CS5536) and the onboard Audio CODEC (ALC203). These two chips use a digital interface to communicate between the two, which is defined by AC’97 and is revision 2.3 compliant. The input or output signals for the audio interface go through the 16-pin connector (J15) to an external cable and/or board, which has the respective audio connections. The PC Beep Speaker signal from the I/O Hub is also fed to the on board Audio CODEC to provide a PC Beep signal for the stereo line out connections.

Audio CODEC (ALC203) features

AC’97 Rev 2.3 compliant
18-bit full duplex performance
Independent variable sampling rate
• Stereo (Left and Right) Line In
Stereo (Left and Right) Line Out
Microphone (Mono) In

• PC “Beep” speaker signal is also fed to the CODEC for the Line Out (Left and Right) channels

Table 3-7 describes the Audio interface pin/signals on 16-pins, 2 rows, odd/even (1, 2) with 2 mm pin spacing.
Table 3-7. Audio Interface Pin/Signal Descriptions (J15)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1, 3</td><td>NC</td><td>Not Connected</td></tr><tr><td>2, 4, 7, 8, 11, 12, 13, 14, 16</td><td>GND_AUD</td><td>Audio ground</td></tr><tr><td>5</td><td>LINE_OUTL</td><td>Line Out signal left channel</td></tr><tr><td>6</td><td>LINE_OUTR</td><td>Line Out signal right channel</td></tr><tr><td>9</td><td>LINE_INL</td><td>Line In signal left channel</td></tr><tr><td>10</td><td>LINE_INR</td><td>Line In signal right channel</td></tr><tr><td>15</td><td>MICIN</td><td>Microphone signal In</td></tr></table>

Note: The shaded area denotes power or ground.

# Video Interfaces

The Graphics and Memory Hub (Northbridge)—integrated in the Geode LX processor—provides the graphics control and video signals to the traditional glass CRT monitors and the LVDS and TTL flat panel displays. The chip features are listed below:

Supports 2D graphics with extensive set of instructions including:

BLT operations
Hardware video up/down scalar
♦ Legacy RGB mode

# CRT features:

Provide an integrated 350 MHz, 24-bit RAMDAC to drive a progressive scan analog monitor and outputs to three 8-bit DACs provide the R, G, and B signals to the monitor.
Support resolutions up to 1920 x 1440.
Support a maximum allowable video frame buffer size of 254 MB UMA (Unified Memory Architecture).

# LVDS and TTL Flat Panel features:

Supports (3.3V, 5V, or 12V) Output to both LVDS and TTL flat panels through a 24-bit interface.
Supports TTL panel sizes from VGA (600 x 480) up to UXGA + (1600 x 1200).
Supports a 24-bit single channel LVDS flat panel interface.
Supports panel up-scaling (to fit a smaller source image onto a specific native panel size) as well as panning and centering.TTL Flat Panel Interface.

# TTL Flat Panel Interface

Table 3-8. TTL Flat Panel Interface Pin/Signal Descriptions (J8)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>NC</td><td>Not connected</td></tr><tr><td>2</td><td>NC</td><td>Not connected</td></tr><tr><td>3</td><td>NC</td><td>Not connected</td></tr><tr><td>4</td><td>NC</td><td>Not connected</td></tr><tr><td>5</td><td>NC</td><td>Not connected</td></tr><tr><td>6</td><td>NC</td><td>Not connected</td></tr><tr><td>7</td><td>NC</td><td>Not connected</td></tr><tr><td>8</td><td>NC</td><td>Not connected</td></tr><tr><td>9</td><td>NC</td><td>Not connected</td></tr><tr><td>10</td><td>NC</td><td>Not connected</td></tr><tr><td>11</td><td>NC</td><td>Not connected</td></tr><tr><td>12</td><td>NC</td><td>Not connected</td></tr><tr><td>13</td><td>NC</td><td>Not connected</td></tr><tr><td>14</td><td>FP21</td><td>Flat Panel Data Output, R5</td></tr><tr><td>15</td><td>FP23</td><td>Flat Panel Data Output, R7</td></tr><tr><td>16</td><td>FP22</td><td>Flat Panel Data Output, R6</td></tr><tr><td>17</td><td>FP16</td><td>Flat Panel Data Output, R0</td></tr><tr><td>18</td><td>FP20</td><td>Flat Panel Data Output, R4</td></tr><tr><td>19</td><td>FP17</td><td>Flat Panel Data Output, R1</td></tr><tr><td>20</td><td>FP18</td><td>Flat Panel Data Output, R2</td></tr><tr><td>21</td><td>FP19</td><td>Flat Panel Data Output, R3</td></tr><tr><td>22</td><td>FP14</td><td>Flat Panel Data Output, G6</td></tr><tr><td>23</td><td>FP13</td><td>Flat Panel Data Output, G5</td></tr><tr><td>24</td><td>FP12</td><td>Flat Panel Data Output, G4</td></tr><tr><td>25</td><td>FP15</td><td>Flat Panel Data Output, G7</td></tr><tr><td>26</td><td>FP11</td><td>Flat Panel Data Output, G3</td></tr><tr><td>27</td><td>FP7</td><td>Flat Panel Data Output, B7</td></tr><tr><td>28</td><td>FP10</td><td>Flat Panel Data Output, G2</td></tr><tr><td>29, 30</td><td>LCDV+</td><td>Jumper (JP4) determines voltage (pins 1-2 = +3.3V, or pins 2-3 = +5V).</td></tr><tr><td>31</td><td>FP9</td><td>Flat Panel Data Output, G1</td></tr><tr><td>32</td><td>FP8</td><td>Flat Panel Data Output, G0</td></tr><tr><td>33</td><td>FP4</td><td>Flat Panel Data Output, B4</td></tr><tr><td>34</td><td>FP6</td><td>Flat Panel Data Output, B6</td></tr><tr><td>35</td><td>FP3</td><td>Flat Panel Data Output, B3</td></tr><tr><td>36</td><td>FP5</td><td>Flat Panel Data Output, B5</td></tr><tr><td>37</td><td>FP2</td><td>Flat Panel Data Output, B2</td></tr><tr><td>38</td><td>FP1</td><td>Flat Panel Data Output, B1</td></tr><tr><td>39</td><td>FPDEN</td><td>Flat Panel Data Enable – This signal to settle the horizontal display position.</td></tr><tr><td>40</td><td>FP0</td><td>Flat Panel Data Output, B0</td></tr><tr><td>41</td><td>FPCLK</td><td>Flat Panel Shift Clock</td></tr><tr><td>42</td><td>DISPEN</td><td>Reserved</td></tr><tr><td>43</td><td>ENVDD</td><td>Flat Panel Enable VDD – This is power sequencing output for LCD driver.</td></tr><tr><td>44</td><td>FPVS</td><td>Flat Panel VSync (FLM) – This signal is digital monitor equivalent of VSYNC.</td></tr><tr><td>45</td><td>DISPEN</td><td>Flat Panel Enable VEE – This signal is used for power sequencing.</td></tr><tr><td>46</td><td>FPHS</td><td>Flat Panel HSync (LP) – This signal is the digital monitor equivalent of HSYNC.</td></tr><tr><td>47, 48</td><td>GND</td><td>Ground</td></tr><tr><td>49, 50</td><td>VCC_BKLT</td><td>Jumper (JP5) determines back light inverter voltage (pins 1-2 = +5V, or pins 2-3 = +12V.)Note: The +12V voltage is supplied externally from the AT/ATX power supply input connector.</td></tr></table>

Note: The shaded areas denote power or ground.

# LVDS Flat Panel Interface

Table 3-9. LVDS Interface Pin/Signal Descriptions (J9)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td><td>Line</td><td>Channel</td><td rowspan="31">NOTE N/A</td></tr><tr><td>1</td><td>VCC_INVTR</td><td>+5 or +12 Volts (JP5 setting)</td><td></td><td rowspan="4"></td></tr><tr><td>2</td><td>VCC_LCD</td><td>+3.3 Volts or +5 Volts Depends on JP4 setting (+3.3V Default)</td><td></td></tr><tr><td>3</td><td>GND</td><td>Ground</td><td rowspan="2">GND</td></tr><tr><td>4</td><td>GND</td><td>Ground</td></tr><tr><td>5</td><td>NC</td><td>Not connected</td><td rowspan="2"></td><td rowspan="10">Channel 2</td></tr><tr><td>6</td><td>NC</td><td>Not connected</td></tr><tr><td>7</td><td>NC</td><td>Not connected</td><td rowspan="2">3</td></tr><tr><td>8</td><td>NC</td><td>Not connected</td></tr><tr><td>9</td><td>NC</td><td>Not connected</td><td rowspan="2">2</td></tr><tr><td>10</td><td>NC</td><td>Not connected</td></tr><tr><td>11</td><td>NC</td><td>Not connected</td><td rowspan="2">1</td></tr><tr><td>12</td><td>NC</td><td>Not connected</td></tr><tr><td>13</td><td>NC</td><td>Not connected</td><td rowspan="2">0</td></tr><tr><td>14</td><td>NC</td><td>Not connected</td></tr><tr><td>15</td><td>NC</td><td>Not connected</td><td></td><td></td></tr><tr><td>16</td><td>LCD_EN</td><td>LCD Enable</td><td></td><td></td></tr><tr><td>17</td><td>LVDSA_Clk+</td><td>Data Positive Output</td><td rowspan="2">Clk</td><td rowspan="10">Channel 1</td></tr><tr><td>18</td><td>LVDSA_Clk-</td><td>Data Negative Output</td></tr><tr><td>19</td><td>LVDSA_Y3+</td><td>Data Positive Output</td><td rowspan="2">3</td></tr><tr><td>20</td><td>LVDSA_Y3-</td><td>Data Negative Output</td></tr><tr><td>21</td><td>LVDSA_Y2+</td><td>Data Positive Output</td><td rowspan="2">2</td></tr><tr><td>22</td><td>LVDSA_Y2-</td><td>Data Negative Output</td></tr><tr><td>23</td><td>LVDSA_Y1+</td><td>Data Positive Output</td><td rowspan="2">1</td></tr><tr><td>24</td><td>LVDSA_Y1-</td><td>Data Negative Output</td></tr><tr><td>25</td><td>LVDSA_Y0+</td><td>Data Positive Output</td><td rowspan="2">0</td></tr><tr><td>26</td><td>LVDSA_Y0-</td><td>Data Negative Output</td></tr><tr><td>27</td><td>NC</td><td>Not connected</td><td></td><td></td></tr><tr><td>28</td><td>NC</td><td>Not connected</td><td></td><td></td></tr><tr><td>29</td><td>LCD_BKLEN</td><td>LCD Backlight Enable</td><td></td><td></td></tr><tr><td>30</td><td>NC</td><td>Not connected</td><td></td><td></td></tr></table>

Note: The shaded areas denote power or ground.

# Miscellaneous

# Utility Interface

Power-On – This control signal is provided externally through a switch by connecting ground to pin 1 on the Utility connector (J16).
Reset Switch – This signal is provided externally through a switch by connecting ground to pin 3 on the Utility connector (J16). This signal line is shared with Reset Switch (SW1).
PC Beep Speaker – The output signals from the I/O Hub (CS5536) and the Super I/O (W83627HF) are fed to pin 5 of the Utility connector (J16) through an OR circuit, and in conjunction with the +5V (pin 4), drives an external PC Beep speaker. The PC Beep speaker signal from the I/O Hub is also fed to the on-board Audio CODEC to provide a PC Beep signal for the Line Out connections.

Table 3-10. Utility Interface Pin/Signal Descriptions (J16)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>PWRON</td><td>Power-On input (connect between pins 1 &amp; 2)</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>RST_SW</td><td>Reset Switch input or output (connect between pins 3 &amp; 2)</td></tr><tr><td>4</td><td>+5V</td><td>+5 Volts</td></tr><tr><td>5</td><td>Speaker</td><td>PC Beep Speaker + Output (connect between pins 5 &amp; 4)</td></tr></table>

Note: The shaded areas denote power or ground.

# Reset Switch

The reset switch (SW1), located on the board edge, provides an internal reset signal (momentary ground) to the ReadyBoard 620. The reset switch shares the reset line with pin 3 of the Utility interface (J16).

# User GPIO Signals

The ReadyBoard 620 provides eight GPIO pins for custom use, and the signals are routed to the J4 connector. ADLINK has provided sample applications showing how to use the GPIO pins in the Miscellaneous Source Code Examples on the ReadyBoard 620 Support Software DVD.

For more information about the GPIO pin operation, refer to the datasheet specifications or Programming Manual for the Super I/O (W83627HF) controller at:

http://www.winbond-usa.com/products/winbond\_products/pdfs/PCIC/W83627HF\_F\_HG\_Ga.pdf

Table 3-11 lists the GPIO pin/signals on a 10-pin, 2 rows, odd/even (1, 2) with 2 mm pin spacing.

Table 3-11. User GPIO Signals Pin/Signal Descriptions (J4)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>GND</td><td>Ground</td></tr><tr><td>2</td><td>VCC</td><td>+5 Volts DC  $\pm$  5%</td></tr><tr><td>3</td><td>GPIO4</td><td>User defined</td></tr><tr><td>4</td><td>GPIO5</td><td>User defined</td></tr><tr><td>5</td><td>GPIO6</td><td>User defined</td></tr><tr><td>6</td><td>GPIO7</td><td>User defined</td></tr><tr><td>7</td><td>GPIO0</td><td>User defined</td></tr><tr><td>8</td><td>GPIO1</td><td>User defined</td></tr><tr><td>9</td><td>GPIO2</td><td>User defined</td></tr><tr><td>10</td><td>GPIO3</td><td>User defined</td></tr></table>

# Infrared (IrDA) Port

The Infrared Data Association (IrDA) signals pass through a two-way communications header for an external IrDA device using infrared as the transmission medium. There are two basic infrared implementations provided; the Hewlett-Packard Serial Infrared (HPSIR) and the Amplitude Shift Keyed Infrared (ASKIR) methods. HPSIR is a serial implementation of infrared developed by Hewlett-Packard. The IrDA (HPSIR and ASKIR) signals share the same header as the IrDA model select signals. These signals are operating system (OS) and/or application dependent and are based on the user’s application, but can be configured and enabled in the BIOS Setup Utility.

The HPSIR method allows serial communication at baud rates up to 115k baud. Each word is sent serially beginning with a zero value start bit. A zero is sent when a single infrared pulse is sent at the beginning of the serial bit time. A one is sent when no infrared pulse is sent during the bit time.

The Amplitude Shift Keyed infrared (ASKIR) allows serial communication at baud rates up to 19.2 k baud. Each word is sent serially beginning with a zero value start bit. A zero is sent when a 500 kHz waveform is sent for the duration of the serial bit time. A one is sent when no transmission is sent during the serial bit time.

Both of these methods require an understanding of the timing diagrams provided in the Super I/O controller (W83627HF) specifications available from the manufacture’s web site and referenced earlier in this manual. For more information, refer to the Winbond W83627HF specifications and the Infrared Data Association web site at http://www.irda.org.

NOTE For faster speeds and infrared applications not covered in this brief description, refer to the W83627HF chip specifications by Winbond Electronics Corp.

Table 3-12. Infrared Interface Pin/Signal Descriptions (J21)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>VCC</td><td>+5 Volts DC  $\pm$  5%</td></tr><tr><td>2</td><td>IRTX</td><td>IR Transmit Data</td></tr><tr><td>3</td><td>CIRRX</td><td>IR Mode Select</td></tr><tr><td>4</td><td>IRRX</td><td>IR Receive Data</td></tr><tr><td>5</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded areas denote power or ground.

# System Management Bus (SMBus)

The I/O Hub (Southbridge) chip (CS5536) contains both a host and slave SMBus port; but the host cannot access the slave internally. The slave port allows an external master access to the I/O Hub through connector (J20). The master contained in the I/O Hub is used to communicate with the SODIMM EPROM, Super I/O, Ethernet 1 and 2, and the clock generator. Table 3-13 lists the device name and corresponding reserved binary addresses on the SMBus.

Note: The I/O Hub has two reserved addresses.
Table 3-13. SMBus Reserved Addresses

<table><tr><td>Component</td><td>Address Binary</td></tr><tr><td>SODIMM EPROM</td><td> $1010,000x_b$ </td></tr><tr><td>Clock Generator</td><td> $1101,001x_b$ </td></tr><tr><td>I/O Hub</td><td> $1000,100x_{b}$ </td></tr><tr><td>I/O Hub</td><td> $0001,000x_{b}$ </td></tr></table>

Table 3-14. SMBus Signals Pin/Signal Descriptions (J20)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>VCC5Dual</td><td>+5V standby voltage</td></tr><tr><td>2</td><td>SMBCLK</td><td>SMBus Clock</td></tr><tr><td>3</td><td>SMBDATA</td><td>SMBus Data</td></tr><tr><td>4</td><td>NC</td><td>Not connected</td></tr><tr><td>5</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground. The signals marked with \* = Negative true logic.

# Real Time Clock (RTC)

The I/O Hub contains a Real Time Clock (RTC), and an external Lithium Battery (B1) provides power for the RTC and the CMOS RAM through connector BT1. The CMOS RAM is backed up with a Lithium Battery. If the battery is not present or defective, the BIOS has a battery-free boot option to complete the boot process.

# Oops! Jumper (BIOS Recovery)

The Oops! jumper is provided in the event the user selected BIOS settings prevent the system from booting, but does not reset CMOS or change the Time & Date in the BIOS. Refer to the CMOS Normal/Clear jumper (JP7) to reset the BIOS and change the Time & Date.

By using the Oops! jumper, you can prevent the current BIOS settings in Flash from being loaded, forcing the use of the default BIOS settings. Connect the DTR pin to the RI pin on Serial port 1 (COM 1) prior to applying power to prevent the current BIOS settings from loading. After booting with the Oops! jumper in place, remove the Oops! jumper and go into BIOS Setup Utility. Change the desired BIOS settings, or select the default settings, and save the changes before rebooting the system.

To convert the Serial 1 interface to an Oops! jumper, short together the DTR (4) and RI (9) pins on the Serial Port 1 DB9 connector as shown in Figure 3-2.

![Serial 1 (J6A) Lower Port (COM1)\nStandard DB9 Serial Port Connector\n(Male)\nFront View\n5 4 3 2 1\n9 8 7 6\nRB620_Oopsljump_b](.5001820bb-rb620-refman-61209/63cdc3fc600d42e8284a5d83bea0eeec1edb3a874be8b4d24365b01805a961db.jpg)

Figure 3-2. Oops! Jumper Connection

# Temperature Monitoring

The ReadyBoard 620 performs CPU temperature monitoring through an integrated thermal diode in the AMD CS5536 chipset. The CPU temperature monitor appears in the BIOS under the Hardware Health Configuration selection of the Advanced menu.

NOTE The ReadyBoard 620 CPU requires a heatsink.

# Remote Access (Serial Console)

The ReadyBoard 620 supports the Remote Access (serial console or console redirection) feature. The remote access (serial console) can be accessed by an ANSI-compatible serial terminal, or the equivalent terminal emulation software running on another system. This can be very useful when setting up the BIOS on a production line for systems that are not connected to a keyboard and display.

# Serial Console Setup

The serial console feature is implemented by connecting a standard null modem cable or a modified serial cable (or “Hot Cable”) between one of the serial ports, such as Serial 1 (J6A), and the serial terminal or a PC with communications software. The BIOS Setup Utility controls the serial console settings on the ReadyBoard 620. Refer to Chapter 4, BIOS Setup Utility to set the serial console option, using a serial terminal, or PC with communications software.

# Hot (Serial) Cable

To convert a standard serial cable to a Hot Cable, certain pins must be shorted together at the Serial port connector or on the DB9 connector. For example, short the RTS (7) and RI (9) on the respective DB9 port connector as shown in Figure 3-3.

![Standard DB9 Serial\nCable Connector (Female)\nRear View\n5 4 3 2 1\n9 8 7 6\nRB620_hotcable_b](.5001820bb-rb620-refman-61209/73f2bbbe4238fa2fc83f3a4f0a95ed39b1eb3a89ded57c44610fb84ae0a9bcfe.jpg)

Figure 3-3. Hot Cable Jumper

# Watchdog Timer (WDT)

The watchdog timer (WDT) restarts the system if an error or mishap occurs, allowing the system to recover from the mishap, even though the error condition may still exist. Possible problems include failure to boot properly, loss of control by the application software, failure of an interface device, unexpected conditions on the bus, or other hardware or software malfunctions.

The WDT (watchdog timer) can be used both during the boot process and during normal system operation.

During the boot process – If the operating system fails to boot in the time interval set in the BIOS, the system will reset.
Enable the WDT in the Boot Settings menu of BIOS Setup Utility. Set the WDT for a time-out interval in seconds, between 1 and 255, in one second increments. Ensure you allow enough time for the operating system (OS) to boot. The OS or application must tickle (reset) the WDT before the timer expires. This can be done by accessing the hardware directly or through a BIOS call.
• During System Operation – An application can set up the WDT hardware through a BIOS call, or by accessing the hardware directly. Some ADLINK Board Support Packages provide an API to the WDT. The application must tickle (reset) the WDT before the timer expires or the system will be reset. The BIOS implements interrupt 15 function 0x0C3h to manipulate the WDT.
• Watchdog Code examples – ADLINK has provided source code examples on the ReadyBoard 620 Support Software DVD illustrating how to control the WDT. The code examples can be easily copied to your development environment to compile and test the examples, or make any desired changes before compiling. Refer to the WDT Readme file in the Miscellaneous Source Code Examples on the ReadyBoard 620 Support Software DVD.

# Power Interfaces

The ReadyBoard 620 uses various voltages on board, but only one voltage is required externally (+5 volts) through the external connector, which uses a 4-pin header with 0.200" (5.08 mm) pitch. The optional +12V is also provided on the input connector as a pass through voltage but is not used on the board except for CPU Fan, LVDS power, PCI bus, and optional ISA bus power. All other on board voltages, including the CPU core voltages, are derived from the externally supplied +5 volts DC +/- 5%.

# Power In

Table 3-15 lists the pin numbers and signals for the Power In interface header, J2.

<table><tr><td>CAUTION</td><td>This table matches the board even though the +5V and +12V are swapped in comparison to typical AT power supply cables.</td></tr></table>

Table 3-15. Power In Interface Pin/Signal Descriptions (J2)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>+5V</td><td>+5.0 volts DC +/- 5%</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr><tr><td>4</td><td>+12V</td><td>This pass through +12 voltage is primarily for PCI bus power, CPU fan, and LCD power (may also be backlight power).</td></tr></table>

Note: The shaded areas denote power or ground.

# Power On

The signals on this connector allow the ATX power supply to be turned off (soft off) from the ReadyBoard 620 by operating system (OS) control. If you use a non-ATX power supply, you will not have the soft off feature for sleep states normally provided by ATX power supplies.

Table 3-16. Power On Connector Pin/Signal Descriptions (J1)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>VCC5SBY</td><td>+5V Standby Voltage – Supplied from ATX power supply and is required for normal operation and sleep states.</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>PS_ON*</td><td>Power Supply On – This signal is sent to the ATX power supply from the ReadyBoard 620 to turn On the ATX power supply. This signal can also be used to turn Off the ATX power supply or to go into a suspended or standby state.</td></tr></table>

Note: The shaded areas denote power or ground. The signals marked with \* = Negative true logic.

# Power and Sleep States

The following information only applies if an ATX power supply is used to provide power to the ReadyBoard 620. If a non-ATX power supply is used, then the ReadyBoard 620 is only controlled by the Power-On/Off switch on the power supply and the various sleep states are not available. The sleep states are OS dependent and not available if your OS does not support power management based on the ACPI standard.

# Power On Switch

The Power On switch turns on the ReadyBoard 620 and its attached power supply to fully awake conditions, if you are using an ATX power supply. Normally, if the operating system (OS) supports sleep states, the OS will turn off the ReadyBoard and its power supply during the OS shut down process. If the OS supports sleep states, the Power On switch typically will also transition the ReadyBoard and its power supply between fully Powered On states, various sleep states depending on the OS control setting, and fully Powered Off states. If the OS does not support sleep states, then the Power On switch only turns power on or off to the ReadyBoard 620.

An OS supporting ACPI, typically allows the Power On switch to be configured through a user interface. The Power On switch for the ReadyBoard 620 is provided externally by connecting a momentary switch between pin 1 and pin 2 on the Utility connector (J16). The Power On signal occurs when ground is placed on pin 1 of J16.

# Sleep States (ACPI)

The ReadyBoard 620 supports the ACPI (Advanced Configuration and Power Interface) standard, which is a key component of certain Operating Systems’ (OSs’) power management. The supported features (sleep states) listed here are only available when an ACPI-compliant OS is used for the operating system, such as Windows 2000/XP. The term “sleep” state refers to a low latency (reduced power consumption) state, which can be re-started (awakened) restoring full operation to the ReadyBoard 620.

If a computer is in one of the various sleep states, the computer appears to be off as indicated by such things as no display on the connected monitor and no activity for the connected floppy drive, CD-ROM, or hard drives. Normally, when a computer is in one of the various sleep states and it detects certain activity (i.e. power switch, mouse, keyboard, or certain types of LAN activity), it returns to a fully operational state.

NOTE The ReadyBoard 620 supports various wake-up activities, including the Power On switch to wake the ReadyBoard 620 from a powered down state, such as Standby (S1), Hibernate (S4) and Power Off (S5).

The ReadyBoard 620 supports four ACPI power states, depending on the operating system used and its ability to manage sleep states. Typically, the Power On switch is used to wake up from a sleep state, or transition from one state to another, but this is dependent on the OS and the settings in BIOS Setup.

1st state is normal Power On (S0).

To go to a fully powered on state, the ReadyBoard 620 must either be powered Off (S5), or in a sleep state (S1 or S4), and then the Power On switch is pressed for less than 4 seconds (default).
The ReadyBoard 620 can transition from this state (S0) to the various states described below, depending on the power management capability of the OS and how it is programmed.

2nd state is a standby state (S1).

In this state there are very few internal operations taking place, except for the internal RTC (real time clock), the Power On LED, and the contents of RAM. This includes no activity for the CPU, CD-ROM, or hard disk drives. The ReadyBoard 620 appears to be off except for the Power On LED.

♦ Normally, to enter this sleep state, the ReadyBoard 620 must be fully powered on (S0) and the OS transitions the ReadyBoard into this standby state (S1) under user control.

To exit this sleep state, typically the Power On switch is used to wake up the ReadyBoard 620 to restore full operation, including the Power On LED. Typically, pressing the Power On switch for less than 4 seconds (default) will restore full operation.

3rd state is a hibernate or suspend-to-disk state (S4).

In this state there are no internal operations taking place except for the Power On LED and the internal RTC. This includes no activity for the CPU, CD-ROM, or hard disk drives. The ReadyBoard 620 appears to be off, except for the Power On LED. Your system will take longer to wake up from this sleep state, however, since your data is saved to the disk, it is more secure and should not be lost in the event of a power failure.

♦ To enter a hibernate or suspend-to-disk state, the ReadyBoard 620 must be fully powered on and the OS transitions the ReadyBoard 620 into this sleep state (S4) under user control.
To exit this sleep state, typically pressing the Power On switch for less than 4 seconds (default) will restore full operation.

4th state is the normal power off or shutdown (S5).

All activity stops except the Power On LED and the internal RTC clock, unless the power cord is removed from the AC power source.

♦ To go to a fully powered down state, the ReadyBoard 620 must either be powered on, or in a sleep state, and then the Power On switch is pressed for 4-to-6 seconds.
To go to a fully powered up state, press the Power On switch for less than 4 seconds (default) and full operation is restored.

The OS may provide additional programming features to change the activation time for each state, and to shutdown or transition the ReadyBoard 620 at certain times, which depends on how the OS interface is programmed. Refer to the OS vendor’s documentation for power management under the ACPI standard.

NOTE Some operating systems use the keyboard, mouse, and Wake-on-LAN (Ethernet port) as an activity to wake up the system from a sleep state. Refer to Table 3-17 for the conditions the ReadyBoard 620 currently supports for wake-up activity.

# Wake-Up Activities

The wake-up events listed in Table 3-17 can be used to wake up the ReadyBoard 620 from any of the states mentioned.

Table 3-17. Wake-Up Activities and Conditions

<table><tr><td>Signal/Device</td><td>Condition</td></tr><tr><td>Power On Switch</td><td>If the Power On switch is pressed for more than 4-to-6 seconds, the system will wake up from any of the sleep states.</td></tr><tr><td>LAN Ports (2)</td><td>If Resume On LAN is [Enabled], then the system will wake from one of the sleep states through direct addressing, magic packets, or link status changes.</td></tr><tr><td>PS/2 Keyboard &amp; Mouse</td><td>If you use a PS/2 keyboard or mouse, any activity from the keyboard or mouse could wake the system.</td></tr><tr><td>USB</td><td>If you use a USB keyboard or mouse instead of a PS/2 device, the USB device could wake the system.</td></tr></table>

# Introduction

This section assumes the user is familiar with general BIOS Setup Utility and does not attempt to describe the BIOS functions. Refer to the appropriate PC reference manuals for information about the on-board ROM-BIOS software interface. If ADLINK has added to or modified the standard functions, these functions will be described.

# Entering BIOS Setup (VGA Display)

To access the BIOS Setup Utility using a VGA display for the ReadyBoard 620:

1. Turn on the VGA monitor and the power supply to the ReadyBoard 620.
2. Start Setup by pressing the [Del] key, when the following message appears on the boot screen.

Press &lt;Del&gt; to run SETUP

# NOTE

If the setting for Quick Boot is set to [Enabled], you may not see this prompt appear on screen if the monitor is too slow to display it on start-up. If this happens, press the &lt;Del&gt; key early in the boot sequence to enter the BIOS Setup Utility.

3. Use the &lt;Enter&gt; key to select the screen menus listed in the Opening BIOS screen.
4. Follow the instructions at the bottom of each screen to navigate through the selections and modify any settings.

# Entering BIOS Setup (Remote Access)

Once you set up the BIOS Utility for Remote Access (serial console or console redirection) in VGA mode, entering the BIOS in the remote access mode, is very similar to the method used when entering the BIOS with a VGA display.

1. Turn on the power supply to the ReadyBoard 620 and access the BIOS Setup Utility in VGA mode.
2. Set the BIOS feature Remote Access to [Enabled] under the Advanced menu.
3. Accept the default options or make your own selections for the balance of the Remote Access fields and record your settings.
4. Ensure you select the type of remote serial terminal you will be using and record your selection.
5. Select Save Changes and Exit and then shut down the ReadyBoard 620.
6. Connect the remote serial terminal (or the PC with communications software) to the COM port you selected on the ReadyBoard 620 using a Hot Cable or a standard null-modem serial cable.
7. Turn on the remote serial terminal (or the PC with communications software) and set it to the settings you selected and recorded earlier in the BIOS Setup Utility.

COM1, 115200, 8 bits, 1 stop bit, no parity, no flow control, and [Always] for Redirection After BIOS POST are the default settings for the ReadyBoard 620.

8. Restore power to the ReadyBoard 620 and look for the screen prompt shown below.

Press ^C to run SETUP

9. Press the CTRL–C keys to enter Setup early in the boot sequence if Quick Boot is set to [Enabled].

If Quick Boot is set to [Enabled], you may never see the screen prompt.

10. Use the &lt;Enter&gt; key to select the screen menus listed in the Opening BIOS screen.

NOTE The serial console port is not hardware protected, and is not listed in the COM table within BIOS Setup Utility. Diagnostic software that probes hardware addresses may cause a loss or failure of the serial console functions.

# PCI-ISA Bridge Mapping

The ReadyBoard 620 supports ISA bus based modules with an on-board PCI-ISA bridge. The PCI-ISA bridge optionally maps the following resources to ISA based modules:

Memory
• I/O Ports
. IRQs

• DMA Channels

The ReadyBoard 620 system BIOS maps the above resources, based on information provided in the BIOS Setup screens. By default, only some of the I/O ports are mapped to ISA modules and any memory, IRQs or DMA channels to be mapped must be explicitly specified by the user in the BIOS Setup screens.

The IRQs are mapped with the “PCIPnP/IRQx” fields in BIOS setup (where x specifies the IRQ number.) The IRQs 3, 4, 5, 7, 9, 10, 11, 14, and 15 can be mapped to ISA based modules by changing the default setting for these IRQs from “Available” to “Reserved”.

ISA I/O ports, Memory, and DMA channels can be mapped to ISA modules on the “Boot/Boot Settings Configuration” BIOS setup screen. Six I/O port “windows” and four memory “windows” are available for mapping I/O Port or Memory regions to ISA modules by specifying the window length and base address.

By default, the following I/O port windows are mapped to ISA modules:

• 200-240h
240-260h
. 279h
. 300-340h
• 340-360h
• A79h

NOTE 279h and A79 are the ISA PnP ports used by the BIOS and an OS that supports this feature to recognize ISA PnP (Plug and Play) cards.

By default, no memory windows are mapped to ISA modules.

Any of the DMA channels 0, 1, 2, 3, 5, 6, 7 can be mapped to ISA modules by changing the default setting of “LPC Bridge” to “ISA Bridge”.

For example, to configure an ISA Soundblaster PnP card with resources 220/5/1/5 (Port/IRQ/DMA/DMA) so that the Soundblaster would work in Windows XP, the following BIOS Setup changes would be required:

ISA I/O Ports – no changes necessary. 220h is already mapped to ISA by default.
• IRQ – set IRQ5 to “Reserved” in BIOS Setup. See the paragraph above on mapping IRQs.
DMA1 and DMA5 – set DMA Channels 1 and 5 to “ISA Bridge” in BIOS Setup. See paragraph above on mapping DMA Channels.

# OEM Logo Utility (Splash Screen)

The ReadyBoard 620 BIOS supports a graphical logo screen, which can be customized by the user and displayed on screen when enabled through the BIOS Setup Utility. The graphical image can be a company logo or any custom image the user wants to display during the boot process. The custom image can be displayed as the first image displayed on screen during the boot process and remain there, depending on the options selected in BIOS Setup, while the OS boots.

# Logo Image Requirements

The user’s image may be customized with any image editing tool, and the system will automatically convert the image into an acceptable format to the tools (files and utilities) provided by ADLINK. The ReadyBoard 620 OEM Logo utility supports the following image formats:

. Bitmap image
16-Color, 640x480 pixels
256-Color, 640x480 pixels
• JPG image
16-Color, 640x480 pixels
• PCX image
256-Color, 640x480 pixels
A file size of not larger than the sample image

NOTE For procedures on loading custom images, see the OEM logo utility document available on the Ampro By ADLINK, InfoCenter web page.

ADLINK Technology, Inc. provides a number of methods for contacting Technical Support listed in the Table A-1 below. Requests for support through the Ask an Expert are given the highest priority, and usually will be addressed within one working day.

ADLINK Ask an Expert – This is a comprehensive support center designed to meet all your technical needs. This service is free and available 24 hours a day through the Ampro By ADLINK web site at http://ampro.custhelp.com.This includes a searchable database of Frequently Asked Questions, which will help you with the common information requested by most customers. This is a good source of information to look at first for your technical solutions. However, you must register online if you wish to use the Ask a Question feature.
Personal Assistance – You may also request personal assistance by creating an Ask an Expert account and then going to the Ask a Question feature. Requests can be submitted 24 hours a day, 7 days a week. You will receive immediate confirmation that your request has been entered. Once you have submitted your request, you must log in to go to My Stuff area where you can check status, update your request, and access other features.
InfoCenter – This service is also free and available 24 hours a day at the Ampro By ADLINK web site at http://www.ampro.com. However, you must sign up online before you can login to access this service.

The InfoCenter was created as a resource for embedded system developers to share ADLINK’s knowledge, insight, and expertise. This page contains links to White Papers, Specifications, and additional technical information.

Table A-1. Technical Support Contact Information

<table><tr><td>Method</td><td>Contact Information</td></tr><tr><td>Ask an Expert</td><td>http://ampro.custhelp.com</td></tr><tr><td>Web Site</td><td>http://www.ampro.com</td></tr><tr><td>Standard Mail</td><td>ADLINK Technology, Incorporated5215 Hellyer AvenueSan Jose, CA 95138-1007, USA</td></tr></table>

# A

ACPI

Advanced Configuration and Power Interface .. 33

allows reduced power consumption .. 33

Architecture

EPIC (Embedded Platform for Industrial Computing) .. 3

# B

BIOS recovery

Oops! jumper . 30

BIOS Setup

splash screen conversion . 37

BIOS Setup Utility

accessing serial console . 35

accessing VGA Display . 35

can not see entry prompt . 35

using remote access . 35

watchdog timer (WDT) . 31

# C

console redirection

Hot cable . 31

serial console . 31

serial port settings . 35

Console Redirection See also Remote Access

# D

dimensions

ReadyBoard 620 . . 12

# E

Embedded Platform for Industrial Computing (EP-

IC) . 3

Environmental specifications

ReadyBoard 620 . 1 4

# H

headers

header list . 9

pin sequence description 1 0

pin-1 locations 11

Hot cable

console redirection . 31

modified serial cable . 31

serial console . 31

# I

Infrared (IrDA)

supported feature . 29

Interrupt (IRQ) list . 1 6

# J

jumper header locations 11

# L

Lithium Battery

Real Time Clock (RTC) . 30

logo screen

requirements .37

# M

major integrated circuit specifications

web sites .2

# P

PCI specifications

references

processor requirements

heatsinks .14

# R

ReadyBoard 620

ACPI features .33

audio interface features .23

block diagram 7

can not see BIOS entry prompt .35

CPU features .4

current capability .12

dimensions .12

environmental requirements .14

EPIC Architecture .3

features .4

Geode LX 800 CPU . .4

GPIO feature .28

headers .

heatsink requirements .14

input power .32

major components (ICs) .8

mechanical dimensions 13

pin-1 locations

power requirements .12

product description 4

see also supported features 4

serial console features .31

serial port features .20

shared floppy/parallel interface .18

splash screen customization .37

USB port features .22

wake up activity .34

watchdog timer (WDT) .31

weight .12

Real Time Clock (RTC) supported feature .........30

reference material

Infrared (IrDA) interface .29

references

Compact Flash specifications

EPIC specifications

PC/104 specifications

PC/104-Plus specifications

PCI specifications

PCI-104 specifications

web sites

Remote Access

serial port settings . 35

remote access

accessing BIOS . 35

Remote Access See also console redirection

Remote Access See also serial console

remote access See also serial console

# S

Serial B

pin-out list . 21

serial communications software

serial console . 31

serial console

accessing BIOS . 35

console redirection . 31

Hot cable . 31

modified serial cable . 31

serial port settings . 35

serial terminal . 31

terminal emulation software . 31

Serial Console See also Remote Access

serial terminal

ANSI-compatible . 31

terminal emulation software . 31

sleep states (ACPI)

operating system (OS) power management .. 33

reduced power consumption . 33

supported feature . 33

wake up activity . 34

SMBus

supported features . 29

splash screen

customer defined . 37

supported features

200-pin DDR SODIMM socket . 4

AC '97' Audio CODEC . 23

AMD Geode LX800 CPU 4

audio interface ...5, 23

battery-free boot 6

Compact Flash socket 5

console redirection ...6, 31

CRT (VGA) interface . ...6, 24

current capability . . 12

Ethernet interfaces 5

external battery 6

floppy disk drive ...5, 18

GPIO capability ...6, 28

header list 9

heatsinks . 14

Hot cable . 31

IDE drives . 4

Infrared (IrDA) interface ...6, 29

input power (+5V) . 32

IRQ assignments . 16

jumper headers, on board 11

LAN Boot (PXE) 6

LVDS video interface . 24

memory map 17

modified serial cable 31

Oops! jumper (BIOS recovery) ... 6, 30

Optional PC/104 (ISA) bus 4

parallel port .. 5, 18

PCI-104 4

physical dimensions 13

power requirements 12

power-on switch . 28

Real Time Clock (RTC) ... 6, 30

remote access ... 6, 31

required power-on connection . 32

reset switch, external . 28

root USB hubs 5

serial console .. 6, 31

serial ports .. 5, 20

shared floppy/parallel interface .. 5, 18

shared keyboard/mouse over-current fuse ...... 6

shared PS/2 keyboard/mouse interface ........... 6

sleep states (ACPI) . 33

SMBus capability, external 6

SMBus devices 2 9

splash screen customization ... 6, 37

thermal monitoring 6

thermal sensors 3 0

USB 2.0 ports .. 5, 22

USB floppy disk drive 5

video interfaces 6

watchdog timer (WDT) ... 6, 31

# T

Technical Support

Ask an Expert . . 39

contact information 39

InfoCenter 39

terminal emulation software

serial console . 31

thermal cooling

heatsinks . . 14

processor requirements 14

thermal sensors

supported feature . 30

# W

watchdog timer (WDT)

functions . . 31

ReadyBoard 620 Doc & SW DVD . .. 31

source code examples . 31

web sites

Compact Flash specifications

infrared (IrDA) specifications 2 9

major integrated circuit specifications ............ 2

PC/104 specifications

PC/104-Plus specifications

PCI-104 specifications

references weight

ReadyBoard 620 .12
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