# AmITX-ALN

# User’s Manual

Mini-ITX Embedded Motherboard with

Intel® Processor N97

![Close-up of a green printed circuit board with various electronic components and a central fan (no readable text or symbols)](.amitx-aln-50m-16009-1010-11/7a0cdbbd30cf035353660ffb6c37dcb8752eafcafdf0347e81f48f3f1b4c25cd.jpg)

Manual Rev.: 1.1

Revision Date: September 11, 2025

Part Number: 50M-16009-1010

# Preface

# Copyright

Copyright © 2025 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

![Symbol of a trash bin crossed with a diagonal line and a horizontal bar below (no text or labels)](.amitx-aln-50m-16009-1010-11/f02640fa5eb4522aa134c988fa07d18e4f7293f968dffc69ccb03cc3a882ccad.jpg)

Battery Labels (for products with battery)

![Simple line drawing of a trash bin with two crossed lines (no text or symbols)](.amitx-aln-50m-16009-1010-11/bf097c04423622e64f062986921fb1b5fd5c49585d1def603ebeaaa6dbcf2975.jpg)

![Li-ion](.amitx-aln-50m-16009-1010-11/9c7b074ff811bf0a07151f1106e1e60bbb53f0255f2dff3ce48a62875f593728.jpg)

![RECYCLE\nRBRC\nLi-ion\n7.800.822.8837](.amitx-aln-50m-16009-1010-11/0a7bfced7d3d9d56ef93a6b194f233ccb459768d0b57d16e09ab6f2dd5b6f1a7.jpg)

![廢電池請回收](.amitx-aln-50m-16009-1010-11/3f502fa03bd8bd035efc41a541f2dd98f9d8a87115fd83e32315862b72ff88a0.jpg)

# California Proposition 65 Warning

![The image displays a yellow triangular warning sign with a thick black border. Centered inside the triangle is a large black exclamation point.](.amitx-aln-50m-16009-1010-11/9c9c37c91821334dedba00afb36f97caf53ffa8d7bba51cf19264da20e00787c.jpg)

WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP,

DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

Revision History

<table><tr><td>Revision</td><td>Description</td><td>Date</td><td>By</td></tr><tr><td>1.0</td><td>Initial release</td><td>2024-07-12</td><td>AL</td></tr><tr><td>1.1</td><td>Connectors and jumpers updated</td><td>2025-09-11</td><td>AL</td></tr></table>

# Table of Contents

# Preface...

# List of Figures ..............

# 1 Introduction...

1.1 Packing List..
1.2 Optional Accessories..

# 2 Specifications ...

2.1 Core System . 3
2.2 Rear I/O Connectors . 3
2.3 Internal Headers and Connectors..
2.4 Form Factor.. 4
2.5 Video.. 4
2.6 Audio.. 4
2.7 LAN. .5
2.8 Power Specification.. .5
2.9 Watchdog Timer... 5
2.10 Temperatures.. 5
2.11 Environmental . .5
2.12 Operating Systems.. 5
2.13 Functional Block Diagram.. 6

# 3 Mechanical Layout ..

3.1 Connector Locations ..
3.1.1 Rear I/O Connectors. 7
3.1.2 Connectors and Jumpers.. ..8

# 4 Connectors and Jumpers ....... .11

4.1 Rear IO Connectors . ..11
4.1.1 HDMI.. ..11
4.1.2 VGA ... ..11
4.1.3 Ethernet Connectors (LAN1, LAN2) . ..11
4.1.4 USB Connectors .. ..12
4.1.5 Audio Connectors ... ..13

4.2 Internal Connectors.. ..13

4.2.1 4-Pin DC-In PWR Connector & UPS Module Power Output Connector (Input +12V to +28V) (FROM\_UPS1) .. ..13

4.2.2 SATA Connectors (SATA3\_1) .. ..13

4.2.3 USB 2.0 Header (USB2\_10\_11).. ..13

4.2.4 USB 3.2 Gen1 (USB3H\_2-4).. ..14

4.2.5 Front Panel Audio Header (HD\_AUDIO1) . ..15

4.2.6 CPU Fan and Chassis Fan Connectors (+12V) (CPU\_FAN1, CHA\_FAN1) .. ...15

4.2.7 Serial COM Port Header.. ...16

4.2.8 LVDS Panel Connector (LVDS1).. ..17

4.2.9 System Panel Header (PANEL1).. ..18

4.2.10 Chassis Intrusion Header ..

4.2.11 ESPI Header (ESPI1).. ..19

4.2.12 8-bit GPIO (JGPIO1) .. ..19

4.2.13 M.2 M-Key Socket (M2\_M1) . ..20
4.2.14 M.2 B-Key Socket (M2\_B1).. ..21
4.2.15 M.2 E-Key Socket (M2\_E1).. ..22

# 4.3 Jumper and Switch Settings . ..23

4.3.1 ATX/AT Mode Jumper (SIO\_AT1).. ..23
4.3.2 Clear CMOS Header (CLRMOS1).. ..23
4.3.3 Brightness Control Mode (BLT\_PWM1) .. ..24

# 5 Driver Installation .. .29

# 6 BIOS Setup........... .31

6.1 Menu Structure.. ..31
6.2 Main . ..32
6.3 Advanced .. ..32

6.3.1 Advanced > CPU Configuration.. ..33
6.3.2 Advanced > Chipset Configuration .. ..34
6.3.3 Advanced > Storage Configuration.. ..35
6.3.4 Advanced > Super IO Configuration.. ..35
6.3.5 Advanced > ACPI Configuration......... ....36
6.3.6 Advanced > USB Configuration.. ..36
6.3.7 Advanced > Trusted Computing .. ..36

6.4 HW Monitor .. ..37
6.5 Security. ..38
6.6 Boot . ..38
6.7 Save & Exit . ..39

# Safety Instructions.... ..40

# Getting Service.... .41

# List of Figures

Figure 1: Functional block diagram. .6

Figure 2: Rear I/O connectors .

Figure 3: Component-side connectors.. 9

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# 1 Introduction

The AmITX-ALN is a Mini-ITX motherboard supporting the Desktop Intel® Processor N97. The AmITX-ALN is specifically designed for customers who need high-level processing and graphics performance with a long product life solution.

The AmITX-ALN features one DisplayPort (from Type-C), one HDMI, one VGA, one LVDS or eDP, dual 2.5 Gigabit Ethernet ports, USB 3.2 Gen 2 and Gen1 ports, USB 2.0 ports, and SATA 6 Gb/s ports. Expansion is provided by one PCIe Gen3 x1 slot. The onboard feature connector provides GPIO, SMBus support. The board is equipped with SPI AMI EFI BIOS, supporting embedded features such as hardware monitor and watchdog timer.

# Model Number

AmITX-ALN-N97

Latest revisions of the datasheet, user’s manual, BIOS, drivers, and board support packages, can be downloaded from the product webpage on the ADLINK web site: www.adlinktech.com

# 1.1 Packing List

• AmITX-ALN Mini-ITX motherboard
Rear I/O shield
M.2 screw kits

# 1.2 Optional Accessories

USB 2.0 Cable (P/N: 30-21625-0000-B0)
USB 3.0 Cable (P/N: 30-21597-1000-A0)
SATA Cable (P/N: 30-10057-7000)
SATA Power Cable (P/N: 30-22156-0000-A0)
• COM Port Cable (P/N: 30-22155-0000-A0)
120W 24V/5A Adapter (P/N: 31-62196-0000-A0)

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# 2 Specifications

# 2.1 Core System

<table><tr><td>CPU</td><td>Intel® Processor N97, 3.6GHz, 12W</td></tr><tr><td>Memory</td><td>One 260-pin DDR4 non-ECC SODIMM slots, DDR4 3200 MHz, up to 32 GB</td></tr><tr><td>Embedded BIOS</td><td>AMI® UEFI BIOS, 256Mb SPI flash memory</td></tr></table>

# 2.2 Rear I/O Connectors

<table><tr><td>Display</td><td>1x HDMI 2.0b, 1x DP 1.4a (from Type-C), 1x VGA</td></tr><tr><td>LAN</td><td>2x 2.5GbE RJ-45</td></tr><tr><td>USB</td><td>1x USB 3.2 Gen2 (Type-C, supports DP1.4a display output)1x USB 3.2 Gen12x USB 2.0</td></tr><tr><td>Audio</td><td>1x Line-out, 1x Mic-in connector</td></tr><tr><td>DC Jack</td><td>1</td></tr></table>

2.3 Internal Headers and Connectors

<table><tr><td>PCI Express Slots</td><td>1x PCIe Gen3 x1</td></tr><tr><td>USB</td><td>2x USB 3.2 Gen1 x1 (via header)1x USB 3.2 Gen1 x1 (Type A vertical connector)4x USB 2.0 (via header)</td></tr><tr><td>SATA</td><td>1x SATA 6.0 Gb/s connectors.</td></tr><tr><td>Expansion Slots</td><td>1x M.2 B-Key 3042/3052 (PCIe x1, USB 3.0, USB 2.0) for 4G/5G modules1x M.2 E-Key 2230 (PCIe x1, USB 2.0, CNVi) for wireless1x M.2 M-Key 2242/2260/2280 (PCIe Gen3 x1 or SATA, USB 2.0) for SSD1x SIM socket connected to B-Key</td></tr><tr><td>Serial</td><td>2x RS-232/422/485 (via header)2x RS-232 (via header)</td></tr><tr><td>LVDS</td><td>1x LVDS pin header, supports dual channel 24-bit up to 1920x1200@60Hz (Connector shared with eDP)</td></tr><tr><td>DIO</td><td>1x 8-bit GPIO pin header</td></tr><tr><td>Other</td><td>ESPI HeaderCPU Fan ConnectorChassis Fan ConnectorSystem Panel HeaderFront Panel Audio HeaderChassis Intrusion HeaderSPDIF HeaderSpeaker HeaderSATA PWR OutputTPM HeaderDC-in PWR Connector (Input +12V~+28V) (4-pin)</td></tr></table>

# 2.4 Form Factor

Mini-ITX: 170mm x 170mm

2.5 Video

<table><tr><td>Controller</td><td>Intel® UHD Graphics</td></tr><tr><td>Display Interface Support</td><td>1x HDMI 2.0b, max resolution up to 4096x2160@60Hz1x DP 1.4a, max resolution up to 4096x2160@60Hz (from Type C)1x VGA, resolution up to 1920x1200 @ 60Hz1x LVDS, supports dual channel 24-bit, max resolution up to 1920x1200@60Hz (Connector shared with eDP)</td></tr></table>

2.6 Audio

<table><tr><td>Audio Codec</td><td>Realtek ALC897</td></tr><tr><td>Interfaces</td><td>1x Line-out, 1x Mic-in connector</td></tr></table>

# 2.7 LAN

<table><tr><td>Controller</td><td>2x Realtek RTL8125BG, 2.5GbE</td></tr><tr><td>Interface</td><td>RJ45 connectors</td></tr></table>

# 2.8 Power Specification

<table><tr><td>Input PWR</td><td>12~28V DC-In with 4-pin wafer PWR cable or DC Jack</td></tr><tr><td>Power On</td><td>AT/ATX SupportedAT: Directly PWR on as power input readyATX: Press the button to PWR on after power input ready</td></tr></table>

# 2.9 Watchdog Timer

<table><tr><td>Output</td><td>From Super I/O to drag RESETCON#</td></tr><tr><td>Interval</td><td>256 Segments, 0, 1, 2, ...255 Sec</td></tr></table>

# 2.10 Temperatures

<table><tr><td>Standard Operating Temperature</td><td>-20°C to 70°C</td></tr><tr><td>Storage Temperature</td><td>-40°C to 85°C</td></tr></table>

# 2.11 Environmental

<table><tr><td>Humidity</td><td>60°C @ 95% RH non-condensing</td></tr><tr><td>Vibration</td><td>1Grms, 5-500Hz, operation</td></tr></table>

# 2.12 Operating Systems

<table><tr><td>Standard Support</td><td>Microsoft® Windows® 10/11 64-bit, Ubuntu 22.04.4 LTS 64-bit</td></tr></table>

# 2.13 Functional Block Diagram

![Based on the provided flowchart, here is the accurate and concise description of the labeled blocks and their connections:\n\n**Central Component**\n*   **Intel Alder Lake-N SoC** (Central red block)\n\n**Left Side Connections**\n*   **LVDS/By pass mode** connects via **LVDS/eDP** to **Chrontel CH7513**, which connects via **DDI** to the **Intel Alder Lake-N SoC**.\n*   **HDMI Connector** connects via **HDMI** to **ITE IT66318FN**, which connects via **DDI** to the **Intel Alder Lake-N SoC**.\n*   **Type-C Connector** connects directly to the **Intel Alder Lake-N SoC** via **TCP** and **1x USB 2.0**.\n*   **VGA Connector** connects via **VGA** to **Realtek RTD2168**, which connects via **TCP** to the **Intel Alder Lake-N SoC**.\n*   **1x USB3.2 Gen1 Connector** connects via **1x USB3.2 Gen1** to **ASMedia ASM1074**.\n*   **1x USB3.2 Gen1 Internal Connector** connects via **1x USB3.2 Gen1** to **ASMedia ASM1074**.\n*   **2x USB3.2 Gen1 Header** connects via **2x USB3.2 Gen1** to **ASMedia ASM1074**.\n*   **ASMedia ASM1074** connects to the **Intel Alder Lake-N SoC** via **USB3.2 Gen2** and **USB2.0**.\n*   **2x USB2.0 Connector** connects directly to the **Intel Alder Lake-N SoC** via **2x USB2.0**.\n*   **RJ45 Connector** connects via **2.5G** to **Realtek RTL8125BG**, which connects via **PCIe x1** to the **Intel Alder Lake-N SoC**.\n*   A second **RJ45 Connector** connects via **2.5G** to a second **Realtek RTL8125BG**, which connects via **PCIe x1** to the **Intel Alder Lake-N SoC**.\n*   **Line In/Line Out Mic In**, **SPDIF**, and **Front Audio** connect to **Realtek ALC897**, which connects via **HDA** to the **Intel Alder Lake-N SoC**.\n*   **Speaker** connects to **Realtek ALC122**, which connects to **Realtek ALC897**.\n*   **DGPI Header** connects via **GPIO** to **NUVOTON NCT6126D** and via **GPIO x4** to the **Intel Alder Lake-N SoC**.\n\n**Bottom Connections**\n*   **eSPI Header** connects via **eSPI** to **NUVOTON NCT6126D**, which connects via **eSPI** to the **Intel Alder Lake-N SoC**.\n*   **COM Port x2 RS232/422/485** connects via **UART x2** to **NUVOTON NCT6126D**.\n*   **COM Port x2 RS232 Only** connects via **UART x2** to **NUVOTON NCT6126D**.\n*   **NUVOTON NCT6126D** connects via **FAN** to **CPU FAN x1 CHA FAN x1**.\n\n**Right Side Connections**\n*   **SO-DIMM** connects directly to the **Intel Alder Lake-N SoC** via **DDR4 3200MHz**.\n*   **SATA Port** connects directly to the **Intel Alder Lake-N SoC** via **SATA**.\n*   **M.2 Key E** connects directly to the **Intel Alder Lake-N SoC** via **PCIe x1 CNVi USB 2.0**.\n*   **M.2 Key B** connects directly to the **Intel Alder Lake-N SoC** via **PCIe x1 USB 3.2 Gen2 USB 2.0** and connects via **SIM** to **SIM Card**.\n*   **M.2 Key M** connects directly to the **Intel Alder Lake-N SoC** via **PCIe x1/SATA USB 2.0**.\n*   **PCIe x1 Slot** connects directly to the **Intel Alder Lake-N SoC** via **PCIe x1**.\n*   **Genesys GL852G** connects directly to the **Intel Alder Lake-N SoC** via **USB 2.0** and connects via **USB 2.0** to two separate **2x USB2.0 Header** blocks.\n*   **BIOS** connects directly to the **Intel Alder Lake-N SoC** via **SPI**.\n*   **TPM Header** connects directly to the **Intel Alder Lake-N SoC** via **SPI**.\n*   **MIPI-CSI-2 Connector** connects directly to the **Intel Alder Lake-N SoC** via **CSI-2**.\n*   **NUVOTON NUC121ZC2AE** connects directly to the **Intel Alder Lake-N SoC** via **SMBUS**.](.amitx-aln-50m-16009-1010-11/f58ab2a8c5ab25b9d11a9a3cd062a4f0f8b6f08110a1aa266aed398a73d57443.jpg)

Figure 1: Functional block diagram

# 3 Mechanical Layout

# 3.1 Connector Locations

# 3.1.1 Rear I/O Connectors

![HDMI2.0b USB 3.2\nGen1 2x USB2.0\n12~28V DC USB 3.2 Gen2\nType-C VGA 2x 2.5GbE LAN Audio Output: Green - Line Out\nAudio Output: Pink - Mic In](.amitx-aln-50m-16009-1010-11/80aebd555cd8bd46296720f7e2c63bf83411d3d382c248d5f9054d7cdf776c31.jpg)

Figure 2: Rear I/O connectors

3.1.2 Connectors and Jumpers
![4x USB2.0\n(USB2H_1~4)\nM.2 E-Key\n(M2_E1)\n27 28\n29 30 31\n26\n25\n24\nM.2 M-Key\n(M2_B1)\nPCIe Gen3 x1\n23\nSIM Card\nM.2 B-Key (M2_B1)\n3* USB 3.2 Gen1 x1\n(USB3H_2~4)\n22\n21\n20\n19\n18\n4x COM\n(COM1~4)\n17\n16\n15\n14\nLVDS/eDP\nDDR4\n6\n1* SATA3\n(SATA3_1)\n1 2 3 4\n1 5](.amitx-aln-50m-16009-1010-11/01c5a00847396756568281f1c0b17bf361da19e07be33a26da20eeb2dfa7992f.jpg)

<table><tr><td>1</td><td>4-pin DC-in PWR Connector (Input +12V~+28V) &amp; UPS Module Power Output Connector (FROM_UPS1)</td><td>17</td><td>COM3, COM4 TX RX Selection Header(From left to right)COM4_RX_SEL1COM4_TX_SEL1COM3_RX_SEL1COM3_TX_SEL1</td></tr><tr><td>2</td><td>2-pin UPS Module Power Input Connector (TO_UPS1)</td><td>18</td><td>COM Port PWR Setting Headers (PWR_COM1~4)</td></tr><tr><td>3</td><td>PWR_ADAPTER1</td><td>19</td><td>Digital Input / Output Power Select (JGPIO_PWR)(JGPIO_PWR1)</td></tr><tr><td>4</td><td>SPI_TPM Header (SPI_TPM1)</td><td>20</td><td>Chassis Intrusion Headers (CI1)</td></tr><tr><td>5</td><td>CPU FAN Connector (+12V) (CPU_FAN1)</td><td>21</td><td>ATX/AT Mode Jumper (SIO_AT1)</td></tr><tr><td>6</td><td>SATA Power Output Connector (SATA_PWR1)</td><td>22</td><td>Digital Input / Output Default Value Setting (JGPIO_SET1)</td></tr><tr><td>7</td><td>ESPI Header (ESPI1)</td><td>23</td><td>SMB_TEST1 (SMBUS_TEST1)</td></tr><tr><td>8</td><td>CON_LBKLT_CTL Voltage Level (BLT_PWM2)</td><td>24</td><td>DACC Jumper (DACC1)</td></tr><tr><td>9</td><td>Brightness Control Mode (BLT_PWM1)</td><td>25</td><td>Buzzer Header (BUZZ2)</td></tr><tr><td>10</td><td>Backlight Power Connector (BLT_PWR1)</td><td>26</td><td>3W Audio AMP Output Wafer (SPEAKER1)</td></tr><tr><td>11</td><td>Backlight Volume Control (BLT_VOL1)</td><td>27</td><td>SPDIF Header (SPDIF1)</td></tr><tr><td>12</td><td>eDP and LVDS Panel Power Select (LCD_VCC)(PNL_PWR1)</td><td>28</td><td>Front Panel Audio Header (HD_AUDIO1)</td></tr><tr><td>13</td><td>System Panel Header (PANEL1)</td><td>29</td><td>Battery Connector (BAT1)</td></tr><tr><td>14</td><td>Clear CMOS Header (CLRMOS1)</td><td>30</td><td>PWR_BAT2</td></tr><tr><td>15</td><td>eDP and LVDS Backlight Power Select(LCD_BLT_VCC) (BKT_PWR1)</td><td>31</td><td>VGA Header (VGA2)</td></tr><tr><td>16</td><td colspan="3">4-pin Chassis FAN Connector (+12V) (CHA_FAN1)</td></tr></table>

Figure 3: Component-side connectors

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# 4 Connectors and Jumpers

See 3.1 Connector Locations on page 7.

# 4.1 Rear IO Connectors

# 4.1.1 HDMI

One HDMI 2.0b specification port up to 4096 x 2160 @ 60 Hz.

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>HDMI1_CON_DP2</td><td>2</td><td>GND</td></tr><tr><td>3</td><td>HDMI1_CON_DN2</td><td>4</td><td>HDMI1_CON_DP1</td></tr><tr><td>5</td><td>GND</td><td>6</td><td>HDMI1_CON_DN1</td></tr><tr><td>7</td><td>HDMI1_CON_DP0</td><td>8</td><td>GND</td></tr><tr><td>9</td><td>HDMI1_CON_DN0</td><td>10</td><td>HDMI1_CON_CKP</td></tr><tr><td>11</td><td>GND</td><td>12</td><td>HDMI1_CON_CKN</td></tr><tr><td>13</td><td>N/C</td><td>14</td><td>N/C</td></tr><tr><td>15</td><td>HDMI1_DDC_CLK</td><td>16</td><td>HDMI1_DDC_DATA</td></tr><tr><td>17</td><td>GND</td><td>18</td><td>+5V</td></tr><tr><td>19</td><td>HDMI1_CON_HPD</td><td colspan="2"></td></tr></table>

![19 17\n3 1\n18\n2](.amitx-aln-50m-16009-1010-11/c20a73bdc80aba0ae94359334db69afcc01ac2db644ca243046efa5c10876fb2.jpg)

# 4.1.2 VGA

One VGA, resolution up to 1920x1200 @ 60Hz.

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>VCC</td></tr><tr><td>2</td><td>UV0-</td></tr><tr><td>3</td><td>UV0+</td></tr><tr><td>4</td><td>GND</td></tr></table>

![5\n1\n15\n11](.amitx-aln-50m-16009-1010-11/ccbd480aba67019af688969f81baeede4663fb5e42b6583e13db10bb93705941.jpg)

# 4.1.3 Ethernet Connectors (LAN1, LAN2)

10/100/1000/2500 Mbps LAN Ethernet controllers based on Realtek RTL8125BG, supporting PXE and WOL.

<table><tr><td>Pin</td><td>10BASE-T/100BASE-TX</td><td>1000BASE-T</td></tr><tr><td>1</td><td>TX+</td><td>LAN_MDI0+</td></tr><tr><td>2</td><td>TX-</td><td>LAN_MDI0-</td></tr><tr><td>3</td><td>RX+</td><td>LAN_MDI1+</td></tr><tr><td>4</td><td>--</td><td>LAN_MDI2+</td></tr><tr><td>5</td><td>--</td><td>LAN_MDI2-</td></tr><tr><td>6</td><td>RX-</td><td>LAN_MDI1-</td></tr></table>

![ACT/LINK\nLED\nSPEED\nLED](.amitx-aln-50m-16009-1010-11/4e3e759cd639fa71c68c0e23ffd2069ec4e21df99e6464105e333931d5db8083.jpg)

<table><tr><td>Pin</td><td>10BASE-T/100BASE-TX</td><td>1000BASE-T</td></tr><tr><td>7</td><td>--</td><td>LAN_MDI3+</td></tr><tr><td>8</td><td>--</td><td>LAN_MDI3-</td></tr></table>

LED Behavior

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>VGA_CON_RED</td><td>VGA_CON_GREEN</td><td>2</td></tr><tr><td>3</td><td>VGA_CON_BLUE</td><td>NC</td><td>4</td></tr><tr><td>5</td><td>GND</td><td>GND</td><td>6</td></tr><tr><td>7</td><td>GND</td><td>GND</td><td>8</td></tr><tr><td>9</td><td>+5V_HDMI</td><td>GND</td><td>10</td></tr><tr><td>11</td><td>NC</td><td>VGA_DDCDAT</td><td>12</td></tr><tr><td>13</td><td>VGA_CON_HS</td><td>VGA_CON_VS</td><td>14</td></tr><tr><td>15</td><td>VGA_DDCCLK</td><td colspan="2"></td></tr></table>

# 4.1.4 USB Connectors

1x USB 3.2 Gen2 x1 (Type C)

1x USB 3.2 Gen1 x1

2x USB 2.0

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>+5VDC</td></tr><tr><td>2</td><td>USB_N</td></tr><tr><td>3</td><td>USB_P</td></tr><tr><td>4</td><td>GND</td></tr><tr><td>5</td><td>USB3_RX_N</td></tr><tr><td>6</td><td>USB3_RX_P</td></tr><tr><td>7</td><td>GND</td></tr><tr><td>8</td><td>USB3_TX_N</td></tr><tr><td>9</td><td>USB3_TX_P</td></tr></table>

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>VCC</td></tr><tr><td>2</td><td>UV0-</td></tr><tr><td>3</td><td>UV0+</td></tr><tr><td>4</td><td>GND</td></tr></table>

![This image is a black and white line drawing of a connector, resembling a USB Type-A plug. On the left side, four contact points are labeled vertically from top to bottom with the numbers 1, 2, 3, and 4. On the central rectangular section to the right, a row of contacts is labeled vertically from top to bottom with the numbers 9, 8, 7, 6, and 5.](.amitx-aln-50m-16009-1010-11/ff90c9b5bdc5c3340a144edd29414d07ce3273ef7700df0b2fe1b0191d561130.jpg)

![This image is a line drawing of a USB connector oriented vertically. Inside the connector housing, a central metal plate is visible on the left, and four contacts are arranged on the right. These contacts are labeled with the numbers 4, 3, 2, and 1 in descending order from top to bottom.](.amitx-aln-50m-16009-1010-11/0f3586ed771a82f685f245b5f9ba44adc6065471fd6af5fc9529f2be47fd5793.jpg)

# 4.1.5 Audio Connectors

One Line-out and one Mic-in on rear I/O
Realtek ALC897 codec

# 4.2 Internal Connectors

# 4.2.1 4-Pin DC-In PWR Connector & UPS Module Power Output Connector (Input +12V to +28V) (FROM\_UPS1)

Connect a DC +12V\~+28V power supply to the following pins.

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>DC Input</td></tr><tr><td>3</td><td>DC Input</td></tr><tr><td>4</td><td>GND</td></tr></table>

![The image displays a black and white line drawing of a rectangular object, resembling a stylized cassette tape icon. It features a thick black rectangular outline. Inside the outline is a large white rectangular area. Centered horizontally within this white area is a row of four shapes: three simple circles followed by a square containing a smaller concentric square. At the four corners of the inner white area, there are small vertical rectangular shapes. Additionally, small rectangular cutouts are visible along the top and bottom edges of the outer black border.](.amitx-aln-50m-16009-1010-11/f0f069516c593b9f35f47b4ce17d817f78b9ed74fb8751f5b284b80349505d47.jpg)

# 4.2.2 SATA Connectors (SATA3\_1)

One SATA 6 Gbps ports are available on AmITX-ALN. The Serial ATA3 (SATA3) connector supports SATA data cables for internal storage devices and the current SATA3 interface allows up to 6.0 Gb/s data transfer rate.

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>SATA-A+</td></tr><tr><td>3</td><td>SATA-A-</td></tr><tr><td>4</td><td>GND</td></tr><tr><td>5</td><td>SATA-B-</td></tr><tr><td>6</td><td>SATA-B+</td></tr><tr><td>7</td><td>GND</td></tr></table>

![The image displays a tall, vertical rectangle containing a large serif numeral **1**. To the right of the rectangle, the numbers **7** and **1** are stacked vertically, with the **7** aligned near the top and the **1** aligned near the bottom.](.amitx-aln-50m-16009-1010-11/5976dd4f872c9225b366c1aed7f33c9b70c343a08b1c445bc225a8866ef1ec35.jpg)

# 4.2.3 USB 2.0 Header (USB2\_10\_11)

2x USB 2.0.

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>USB_PWR</td><td>USB_PWR</td><td>2</td></tr><tr><td>3</td><td>P-</td><td>P-</td><td>4</td></tr><tr><td>5</td><td>P+</td><td>P+</td><td>6</td></tr><tr><td>7</td><td>GND</td><td>GND</td><td>8</td></tr><tr><td>9</td><td></td><td>DUMMY</td><td>10</td></tr></table>

![The image displays a schematic symbol for a 10-pin connector or integrated circuit. The pins are arranged in two columns. On the left, the numbers 1, 3, 5, 7, and 9 appear vertically. On the right, the numbers 2, 4, 6, 8, and 10 appear vertically. Inside the rectangular body of the symbol, there are black shapes corresponding to the pins: a square is next to pin 1, horizontal rectangles are next to pins 2 and 3, and circles are next to pins 4 through 10.](.amitx-aln-50m-16009-1010-11/51c57601084c0e831482d75d2ae306cf8661276c27edaad213913cf6b98e3b8e.jpg)

# USB Cable (optional):

USB 2.0 Header to 2x Female Type-A Cable (length 150mm), P/N: 30-21625-0000-B0

![Pure electrical connector diagram showing internal cable and terminal connections without any text or symbols](.amitx-aln-50m-16009-1010-11/9c62810d51ba3d4e4d76173c4bf667a09fccae2332686f2ef78a6d0f65007bf2.jpg)

# 4.2.4 USB 3.2 Gen1 (USB3H\_2-4)

# 1x USB 3.2 Gen1

# • Connector (USB3H\_2)

1x USB 3.2 Gen1 Type-A vertical connector on this motherboard. The maximum supported power current is 0.5A.

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>USB_PWR</td></tr><tr><td>2</td><td>USB_D-</td></tr><tr><td>3</td><td>USB_D+</td></tr><tr><td>4</td><td>GND</td></tr><tr><td>5</td><td>SSRX-</td></tr><tr><td>6</td><td>SSRX+</td></tr><tr><td>7</td><td>GND</td></tr><tr><td>8</td><td>SSTX-</td></tr><tr><td>9</td><td>SSTX+</td></tr></table>

![5 9\n1 4](.amitx-aln-50m-16009-1010-11/c21d8a118c014c20bd87d9f6187d0c0b6349804724004b1f6e02248f47b9fbcf.jpg)

# • Header (USB3H\_3\_4)

This header can support two USB 3.2 Gen1 ports with maximum power current 0.9A per port.

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>DUMMY</td><td>IntA_PA_D+</td><td>2</td></tr><tr><td>3</td><td>IntA_PB_D+</td><td>IntA_PA_D-</td><td>4</td></tr><tr><td>5</td><td>IntA_PB_D-</td><td>GND</td><td>6</td></tr><tr><td>7</td><td>GND</td><td>IntA_PA_SSTX+</td><td>8</td></tr><tr><td>9</td><td>DUMMY</td><td>IntA_PA_SSTX-</td><td>10</td></tr><tr><td>11</td><td>DUMMY</td><td>GND</td><td>12</td></tr><tr><td>13</td><td>GND</td><td>IntA_PA_SSRX+</td><td>14</td></tr><tr><td>15</td><td>DUMMY</td><td>IntA_PA_SSRX-</td><td>16</td></tr><tr><td>17</td><td>DUMMY</td><td>Vbus</td><td>18</td></tr></table>

![2\n20\n1\n19](.amitx-aln-50m-16009-1010-11/0bcf93ecca85832342a55cfdb3fb6e6d915c5af5226a7ecd1a5bd448a91bebda.jpg)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>19</td><td>Vbus</td><td></td><td>20</td></tr></table>

# USB Cable (optional):

USB 3.0 Header to 2x Female Type-A Cable (length 150mm), P/N: 30-21597-1000-A0

![Technical line drawing of a connector with cable and terminal ports (no text or symbols)](.amitx-aln-50m-16009-1010-11/76116e6981e5a1439c2ecffa6a808f684c436496d2d32ed5b1170fa21240ec0b.jpg)

# 4.2.5 Front Panel Audio Header (HD\_AUDIO1)

This is the line out/microphone interface for the front panel audio cable, allowing jack detection, convenient connection, and control of audio devices.

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>MIC2_L</td><td>OUT_RET</td><td>2</td></tr><tr><td>3</td><td>MIC2_R</td><td></td><td>4</td></tr><tr><td>5</td><td>OUT2_R</td><td>PRESENCE#</td><td>6</td></tr><tr><td>7</td><td>J_SENSE</td><td></td><td>8</td></tr><tr><td>9</td><td>OUT2_L</td><td>GND</td><td>10</td></tr></table>

![10\n9\n2\n1](.amitx-aln-50m-16009-1010-11/f1c77466a6ae8bebd10dcde85fa2a0c5a524eb96c0f6a1dcc3b92699a867b7af.jpg)

# 4.2.6 CPU Fan and Chassis Fan Connectors (+12V) (CPU\_FAN1, CHA\_FAN1)

The board offers three 4-pin CPU fan (Smart Fan) connectors which are compatible with 3-pin CPU fan. If you connect a 3-pin CPU fan to the CPU fan connector on this motherboard, use pin 1-3. The maximum current is 1A.

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>+12V</td></tr><tr><td>3</td><td>FAN_SPEED</td></tr><tr><td>4</td><td>FAN_SPEED_CONTROL</td></tr></table>

![The image displays a vertical rectangular outline. Inside the left side, there is a thick vertical black bar. To the right of this bar, four small black squares are arranged in a vertical column. Outside the rectangle on the right side, the number '1' is positioned near the top, and the number '4' is positioned near the bottom.](.amitx-aln-50m-16009-1010-11/437a480fae11a996c93f9187f569d53717b026754be41223762c57087eba3f39.jpg)

# 4.2.7 Serial COM Port Header

There are four 2.54mm-pitch COM port headers (COM1 to COM4) and the serial ports are over-current protected. The maximum current per port is 1A, and the power supply of pin 9 is either 5V or 12V. Use COM Port PWR Setting Jumper to set the power for COM port pin 9.

<table><tr><td>Serial Port</td><td>Functions</td></tr><tr><td>COM1</td><td rowspan="2">SupportsRS232/422/485</td></tr><tr><td>COM2</td></tr><tr><td>COM3</td><td rowspan="2">Supports RS-232</td></tr><tr><td>COM4</td></tr></table>

Please refer to the table below for the pin definition. In addition, COM1, 2 ports (RS232/422/485) can be adjusted in BIOS setup utility > Advanced Screen > Super IO Configuration. You may refer to our user manual for details.

Serial COM Port Header (COM 1-4)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>DDCD#1</td><td>RRXD</td><td>2</td></tr><tr><td>3</td><td>TTXD</td><td>DDTR#</td><td>4</td></tr><tr><td>5</td><td>GND</td><td>DDSR#</td><td>6</td></tr><tr><td>7</td><td>RRTS#</td><td>CCTS#</td><td>8</td></tr><tr><td>9</td><td>PWR</td><td></td><td>10</td></tr></table>

![10\n2\n9\n1](.amitx-aln-50m-16009-1010-11/32f5eeee12d529567338494a837394d5846b8f68c0a5f6e493f52d9b36ec9a87.jpg)

COM 1, 2 Ports Pin Definition

<table><tr><td>Pin</td><td>RS232</td><td>RS422</td><td>RS485</td></tr><tr><td>1</td><td>DCD</td><td>TX-</td><td>RTX-</td></tr><tr><td>2</td><td>RXD</td><td>TX+</td><td>RTX+</td></tr><tr><td>3</td><td>TXD</td><td>RX+</td><td>N/A</td></tr><tr><td>4</td><td>DTR</td><td>RX-</td><td>N/A</td></tr><tr><td>5</td><td>GND</td><td>GND</td><td>GND</td></tr><tr><td>6</td><td>DSR</td><td>N/A</td><td>N/A</td></tr><tr><td>7</td><td>RTS</td><td>N/A</td><td>N/A</td></tr><tr><td>8</td><td>CTS</td><td>N/A</td><td>N/A</td></tr><tr><td>9</td><td>PWR</td><td>PWR</td><td>PWR</td></tr><tr><td>10</td><td>N/A</td><td>N/A</td><td>N/A</td></tr></table>

# COM Cable (optional):

COM Port Cable (length 350mm), P/N: 30-22155-0000-A0

![Diagram of a long straight line connecting two connectors (no text or symbols present)](.amitx-aln-50m-16009-1010-11/eb3e33e6c0d61081fdac67b537fa96c5b28904f90aa652c3c8a3e667ef9de0d1.jpg)

4.2.8 LVDS Panel Connector (LVDS1)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>LCD_VCC</td><td>LCD_VCC</td><td>2</td></tr><tr><td>3</td><td>+3.3V</td><td>NA</td><td>4</td></tr><tr><td>5</td><td>NA</td><td>LVDS_A_DATA0#</td><td>6</td></tr><tr><td>7</td><td>LVDS_A_DATA0</td><td>GND</td><td>8</td></tr><tr><td>9</td><td>LVDS_A_DATA1#</td><td>LVDS_A_DATA1</td><td>10</td></tr><tr><td>11</td><td>GND</td><td>LVDS_A_DATA2#</td><td>12</td></tr><tr><td>13</td><td>LVDS_A_DATA2</td><td>GND</td><td>14</td></tr><tr><td>15</td><td>LVDS_A_DATA3#</td><td>LVDS_A_DATA3</td><td>16</td></tr><tr><td>17</td><td>GND</td><td>LVDS_A_CLK#</td><td>18</td></tr><tr><td>19</td><td>LVDS_A_CLK</td><td>GND</td><td>20</td></tr><tr><td>21</td><td>LVDS_B_DATA0#</td><td>LVDS_B_DATA0</td><td>22</td></tr><tr><td>23</td><td>GND</td><td>LVDS_B_DATA1#</td><td>24</td></tr><tr><td>25</td><td>LVDS_B_DATA1</td><td>GND</td><td>26</td></tr><tr><td>27</td><td>LVDS_B_DATA2#</td><td>LVDS_B_DATA2</td><td>28</td></tr><tr><td>29</td><td>DPLVDD_EN</td><td>LVDS_B_DATA3#</td><td>30</td></tr><tr><td>31</td><td>LVDS_B_DATA3</td><td>GND</td><td>32</td></tr><tr><td>33</td><td>LVDS_B_CLK#</td><td>LVDS_B_CLK</td><td>34</td></tr><tr><td>35</td><td>GND</td><td>CON_LBKLT_EN</td><td>36</td></tr><tr><td>37</td><td>CON_LBKLT_CTL</td><td>LCD_BLT_VCC</td><td>38</td></tr><tr><td>39</td><td>LCD_BLT_VCC</td><td>LCD_BLT_VCC</td><td>40</td></tr></table>

\* eDP pin definition (switch by BIOS)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>LCD_VCC</td><td>LCD_VCC</td><td>2</td></tr><tr><td>3</td><td>N/A</td><td>N/A</td><td>4</td></tr><tr><td>5</td><td>N/A</td><td>N/A</td><td>6</td></tr><tr><td>7</td><td>N/A</td><td>GND</td><td>8</td></tr><tr><td>9</td><td>EDP_TX1#</td><td>EDP_TX1</td><td>10</td></tr><tr><td>11</td><td>GND</td><td>EDP_TX0#</td><td>12</td></tr><tr><td>13</td><td>EDP_TX0</td><td>GND</td><td>14</td></tr><tr><td>15</td><td>N/A</td><td>N/A</td><td>16</td></tr><tr><td>17</td><td>GND</td><td>EDP_AUXN</td><td>18</td></tr><tr><td>19</td><td>EDP_AUXP</td><td>GND</td><td>20</td></tr><tr><td>21</td><td>N/A</td><td>N/A</td><td>22</td></tr><tr><td>23</td><td>GND</td><td>N/A</td><td>24</td></tr><tr><td>25</td><td>N/A</td><td>GND</td><td>26</td></tr></table>

![39\n40\n1\n2](.amitx-aln-50m-16009-1010-11/c0d4f5fa7397d83d7852ccadfcbfe37d4c46fc3c20e25a26881e92497a7e8ffe.jpg)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>27</td><td>N/A</td><td>N/A</td><td>28</td></tr><tr><td>29</td><td>DPLVDD_EN</td><td>N/A</td><td>30</td></tr><tr><td>31</td><td>N/A</td><td>GND</td><td>32</td></tr><tr><td>33</td><td>N/A</td><td>N/A</td><td>34</td></tr><tr><td>35</td><td>GND</td><td>CON_LBKLT_EN</td><td>36</td></tr><tr><td>37</td><td>CON_LBKLT_CTL</td><td>LCD_BLT_VCC</td><td>38</td></tr><tr><td>39</td><td>LCD_BLT_VCC</td><td>LCD_BLT_VCC</td><td>40</td></tr></table>

# 4.2.9 System Panel Header (PANEL1)

This header accommodates several system front panel functions. Connect the power switch, reset switch, and system status indicator on the chassis to this header according to the pin assignments below. Make sure you identify the positive and negative pins before connecting the cables.

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>HDLED+</td><td>PLED+</td><td>2</td></tr><tr><td>3</td><td>HDLED-</td><td>PLED-</td><td>4</td></tr><tr><td>5</td><td>GND</td><td>PWRBTN#</td><td>6</td></tr><tr><td>7</td><td>RESET#</td><td>GND</td><td>8</td></tr><tr><td>9</td><td>GND</td><td></td><td>10</td></tr></table>

![2\n10\n1\n9](.amitx-aln-50m-16009-1010-11/8394a38466da38805c3e47ece76d6060dd88878c9ac202e1e63788fe701f7b54.jpg)

PWRBTN (Power Switch): Connects to the power switch on the chassis front panel. You can configure how to turn off your system using the power switch.

RESET (Reset Switch): Connects to the reset switch on the chassis front panel. Press the reset switch to restart the computer if it freezes and fails to perform a normal restart.

PLED (System Power LED): Connects to the power status indicator on the chassis front panel. The LED is on when the system is operating. It blinks when the system is in the S1 sleep state and turns off when the system is in the S3/S4 sleep state or powered off (S5).

HDLED (Hard Drive Activity LED): Connects to the hard drive activity LED on the chassis front panel. The LED is on when the hard drive is reading or writing data.

The front panel design may differ by chassis. A front panel module mainly consists of power switch, reset switch, power LED, hard drive activity LED, speaker, and more. When connecting your chassis’s front panel module to this header, make sure the wire and pin assignments match.

# 4.2.10 Chassis Intrusion Header

This motherboard supports CASE OPEN detection feature that determines if the chassis cover has been removed. This feature requires a chassis with chassis intrusion detection design.

CI1

<table><tr><td>Setting</td><td>Description</td></tr><tr><td>Close</td><td>Active Case Open</td></tr><tr><td>Open</td><td>Normal (Default)</td></tr></table>

![The image shows a diagram consisting of two large squares positioned side-by-side. Inside each large square is a smaller, centered square. Below the left square is the number '1' and below the right square is the number '2'.](.amitx-aln-50m-16009-1010-11/8130ef7e579121cc8f6967ecd3e6c2e6a22854fb6c2c1fab75ec601c0e506960.jpg)

# 4.2.11 ESPI Header (ESPI1)

The header is reserved for Port 80 code display and for debugging purposes.

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>ESPI_CLK</td><td>GND</td><td>2</td></tr><tr><td>3</td><td>ESPI_CS#</td><td>SMB_CLK_MAIN</td><td>4</td></tr><tr><td>5</td><td>ESPI_RST#</td><td>SMB_DATA_MAIN</td><td>6</td></tr><tr><td>7</td><td>ESPI_IO3</td><td>ESPI_IO2</td><td>8</td></tr><tr><td>9</td><td>+3V</td><td>ESPI_IO1</td><td>10</td></tr><tr><td>11</td><td>ESPI_IO0</td><td>GND</td><td>12</td></tr><tr><td>13</td><td></td><td>S_PWRDWN#</td><td>14</td></tr><tr><td>15</td><td>+3VSB</td><td>DUMMY</td><td>16</td></tr><tr><td>17</td><td>GND</td><td>GND</td><td>18</td></tr></table>

![2\n18\n1\n17](.amitx-aln-50m-16009-1010-11/1421401163cac22e9fe2dff7136a171d2bf9605f9a3b913a742567948fc78437.jpg)

# 4.2.12 8-bit GPIO (JGPIO1)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>SIO_GP34</td><td>SOC_E15</td><td>2</td></tr><tr><td>3</td><td>SIO_GP35</td><td>SOC_E01</td><td>4</td></tr><tr><td>5</td><td>SIO_GP36</td><td>SOC_E02</td><td>6</td></tr><tr><td>7</td><td>SIO_GP37</td><td>SOC_E13</td><td>8</td></tr><tr><td>9</td><td>JGPIO_PWR</td><td>GND</td><td>10</td></tr></table>

![The image displays a horizontal row of five white rectangles with black outlines. Inside each rectangle are two small black squares arranged vertically. The number '2' is positioned above the leftmost rectangle. The number '10' is positioned above the rightmost rectangle. The number '1' is positioned below the leftmost rectangle. The number '9' is positioned below the rightmost rectangle. A thick black shape, resembling an 'L' or bracket, is located in the bottom-left corner.](.amitx-aln-50m-16009-1010-11/80198355de894685babf7946c620f66fa402075abf479751dd5aeccc540abef8.jpg)

4.2.13

4.2.13 M.2 M-Key Socket (M2\_M1)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>GND</td><td>+3.3V</td><td>2</td></tr><tr><td>3</td><td>GND</td><td>+3.3V</td><td>4</td></tr><tr><td>5</td><td>NA</td><td>NA</td><td>6</td></tr><tr><td>7</td><td>NA</td><td>NA</td><td>8</td></tr><tr><td>9</td><td>GND</td><td>SATA_LED</td><td>10</td></tr><tr><td>11</td><td>NA</td><td>+3.3V</td><td>12</td></tr><tr><td>13</td><td>NA</td><td>+3.3V</td><td>14</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>16</td></tr><tr><td>17</td><td>NA</td><td>+3.3V</td><td>18</td></tr><tr><td>19</td><td>NA</td><td>NA</td><td>20</td></tr><tr><td>21</td><td>GND</td><td>NA</td><td>22</td></tr><tr><td>23</td><td>NA</td><td>NA</td><td>24</td></tr><tr><td>25</td><td>PETp2</td><td>NA</td><td>26</td></tr><tr><td>27</td><td>GND</td><td>NA</td><td>28</td></tr><tr><td>29</td><td>NA</td><td>NA</td><td>30</td></tr><tr><td>31</td><td>NA</td><td>GND</td><td>32</td></tr><tr><td>33</td><td>GND</td><td>USB_D+</td><td>34</td></tr><tr><td>35</td><td>NA</td><td>USB_D-</td><td>36</td></tr><tr><td>37</td><td>NA</td><td>NA</td><td>38</td></tr><tr><td>39</td><td>GND</td><td>NA</td><td>40</td></tr><tr><td>41</td><td>PERn0 /</td><td>NA</td><td>42</td></tr><tr><td></td><td>SATA-B+</td><td></td><td></td></tr><tr><td>43</td><td>PERp0 /</td><td>NA</td><td>44</td></tr><tr><td></td><td>SATA-B-</td><td></td><td></td></tr><tr><td>45</td><td>GND</td><td>NA</td><td>46</td></tr><tr><td>47</td><td>PETn0 /</td><td>NA</td><td>48</td></tr><tr><td></td><td>SATA-A-</td><td></td><td></td></tr><tr><td>49</td><td>PETp0 /</td><td>PERST#</td><td>50</td></tr><tr><td></td><td>SATA-A+</td><td></td><td></td></tr><tr><td>51</td><td>GND</td><td>CLKREQ#</td><td>52</td></tr><tr><td>53</td><td>PEFCLKn</td><td>WAKE#</td><td>54</td></tr><tr><td>55</td><td>PEFCLKp</td><td>NA</td><td>56</td></tr><tr><td>57</td><td>GND</td><td>NA</td><td>58</td></tr><tr><td></td><td></td><td></td><td></td></tr><tr><td>67</td><td>NA</td><td>NA</td><td>68</td></tr><tr><td>69</td><td>PEDET</td><td>+3.3V</td><td>70</td></tr><tr><td>71</td><td>GND</td><td>+3.3V</td><td>72</td></tr><tr><td>73</td><td>GND</td><td>+3.3V</td><td>74</td></tr><tr><td>75</td><td>GND</td><td></td><td></td></tr></table>

4.2.14 M.2 B-Key Socket (M2\_B1)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>NA</td><td>+3.3V</td><td>2</td></tr><tr><td>3</td><td>GND</td><td>+3.3V</td><td>4</td></tr><tr><td>5</td><td>GND</td><td>FULL_Card_Power_off</td><td>6</td></tr><tr><td>7</td><td>USB_D+</td><td>W_DISABLE1#</td><td>8</td></tr><tr><td>9</td><td>USB_D-</td><td>WWAN_LED#</td><td>10</td></tr><tr><td>11</td><td>GND</td><td></td><td></td></tr><tr><td></td><td></td><td></td><td></td></tr><tr><td></td><td></td><td>NA</td><td>20</td></tr><tr><td>21</td><td>GND</td><td>NA</td><td>22</td></tr><tr><td>23</td><td>NA</td><td>NA</td><td>24</td></tr><tr><td>25</td><td>NA</td><td>W_DISABLE2#</td><td>26</td></tr><tr><td>27</td><td>GND</td><td>NA</td><td>28</td></tr><tr><td>29</td><td>USB3_RX-</td><td>UIM_RESET</td><td>30</td></tr><tr><td>31</td><td>USB3_RX+</td><td>UIM_CLK</td><td>32</td></tr><tr><td>33</td><td>GND</td><td>UIM_DATA</td><td>34</td></tr><tr><td>35</td><td>USB3_TX-</td><td>UIM_PWR</td><td>36</td></tr><tr><td>37</td><td>USB3_TX+</td><td>NA</td><td>38</td></tr><tr><td>39</td><td>GND</td><td>NA</td><td>40</td></tr><tr><td>41</td><td>PERn0</td><td>NA</td><td>42</td></tr><tr><td>43</td><td>PERp0</td><td>NA</td><td>44</td></tr><tr><td>45</td><td>GND</td><td>NA</td><td>46</td></tr><tr><td>47</td><td>PETn0</td><td>NA</td><td>48</td></tr><tr><td>49</td><td>PETp0</td><td>PERST#</td><td>50</td></tr><tr><td>51</td><td>GND</td><td>CLKREQ#</td><td>52</td></tr><tr><td>53</td><td>PEFCLKn</td><td>WAKE#</td><td>54</td></tr><tr><td>55</td><td>PEFCLKp</td><td>NA</td><td>56</td></tr><tr><td>57</td><td>GND</td><td>NA</td><td>58</td></tr><tr><td>59</td><td>NA</td><td>NA</td><td>60</td></tr><tr><td>61</td><td>NA</td><td>NA</td><td>62</td></tr><tr><td>63</td><td>NA</td><td>NA</td><td>64</td></tr><tr><td>65</td><td>NA</td><td>NA</td><td>66</td></tr><tr><td>67</td><td>NA</td><td>NA</td><td>68</td></tr><tr><td>69</td><td>PEDET</td><td>+3.3V</td><td>70</td></tr><tr><td>71</td><td>GND</td><td>+3.3V</td><td>72</td></tr><tr><td>73</td><td>GND</td><td>+3.3V</td><td>74</td></tr><tr><td>75</td><td>NA</td><td></td><td></td></tr></table>

4.2.15 M.2 E-Key Socket (M2\_E1)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>GND</td><td>+3.3V</td><td>2</td></tr><tr><td>3</td><td>USB_D+</td><td>+3.3V</td><td>4</td></tr><tr><td>5</td><td>USB_D-</td><td>NA</td><td>6</td></tr><tr><td>7</td><td>GND</td><td>NA</td><td>8</td></tr><tr><td>9</td><td>CNV_WGR_D1-</td><td>CNV_RF_</td><td>10</td></tr><tr><td></td><td></td><td>RESET</td><td></td></tr><tr><td>11</td><td>CNV_WGR_</td><td>NA</td><td>12</td></tr><tr><td></td><td>D1+</td><td></td><td></td></tr><tr><td>13</td><td>GND</td><td>MODEM_</td><td>14</td></tr><tr><td></td><td></td><td>CLKREQ</td><td></td></tr><tr><td>15</td><td>CNV_WGR_D0-</td><td>NA</td><td>16</td></tr><tr><td>17</td><td>CNV_WGR_</td><td>GND</td><td>18</td></tr><tr><td></td><td>D0+</td><td></td><td></td></tr><tr><td>19</td><td>GND</td><td>NA</td><td>20</td></tr><tr><td>21</td><td>CNV_WGR_</td><td>CNV_BRI_RSP</td><td>22</td></tr><tr><td></td><td>CLK-</td><td></td><td></td></tr><tr><td>23</td><td>CNV_WGR_</td><td></td><td></td></tr><tr><td></td><td>CLK+</td><td></td><td></td></tr><tr><td></td><td></td><td></td><td></td></tr><tr><td>33</td><td>GND</td><td>CNV_BGI_DT</td><td>32</td></tr><tr><td>35</td><td>PETp</td><td>CNV_RGI_RSP</td><td>34</td></tr><tr><td>37</td><td>PETn</td><td>CNV_BRI_DT</td><td>36</td></tr><tr><td>39</td><td>GND</td><td>NA</td><td>38</td></tr><tr><td>41</td><td>PERp</td><td>NA</td><td>40</td></tr><tr><td>43</td><td>PERn</td><td>NA</td><td>42</td></tr><tr><td>45</td><td>GND</td><td>NA</td><td>44</td></tr><tr><td>47</td><td>PEFCLKp</td><td>NA</td><td>46</td></tr><tr><td>49</td><td>PEFCLKn</td><td>NA</td><td>48</td></tr><tr><td>51</td><td>GND</td><td>SUSCLK</td><td>50</td></tr><tr><td>53</td><td>CLKREQ#</td><td>PERST0#</td><td>52</td></tr><tr><td>55</td><td>NA</td><td>W_DISABLE1#</td><td>54</td></tr><tr><td>57</td><td>GND</td><td>W_DISABLE2#</td><td>56</td></tr><tr><td>59</td><td>CNV_WT_D1-</td><td>SMB_DATA</td><td>58</td></tr><tr><td>61</td><td>CNV_WT_D1+</td><td>SMB_CLK</td><td>60</td></tr><tr><td>63</td><td>GND</td><td>NA</td><td>62</td></tr><tr><td>65</td><td>CNV_WT_D0-</td><td>NA</td><td>64</td></tr><tr><td>67</td><td>CNV_WT_D0+</td><td>NA</td><td>66</td></tr><tr><td>69</td><td>GND</td><td>NA</td><td>68</td></tr><tr><td>71</td><td>CNV_WT_CLK-</td><td>NA</td><td>70</td></tr><tr><td>73</td><td>CNV_WT_</td><td>+3.3V</td><td>72</td></tr><tr><td></td><td>CLK+</td><td></td><td></td></tr><tr><td>75</td><td>GND</td><td>+3.3V</td><td>74</td></tr></table>

# 4.3 Jumper and Switch Settings

# 4.3.1 ATX/AT Mode Jumper (SIO\_AT1)

The header provides auto boot function when AC power on. If you need the function, short SIO\_AT1 pin 1 and pin 2.

<table><tr><td>Setting</td><td>Description</td></tr><tr><td>Open</td><td>ATX Mode (Default)</td></tr><tr><td>Short</td><td>AT Mode</td></tr></table>

![The image displays two white squares positioned side-by-side. Each square is outlined with a thick black border and contains a smaller black square in its center. Below the left square is the number '1', and below the right square is the number '2'. The black border framing the squares is particularly thick on the left and top edges.](.amitx-aln-50m-16009-1010-11/f9bbb1bfd16bd5554a776fa8692a71daa71ef537f72c5b8ab63d6423515bc492.jpg)

# 4.3.2 Clear CMOS Header (CLRMOS1)

CLRMOS1 allows you to clear the data in CMOS. To clear and reset the system parameters to default setup, turn off the computer and unplug the power cord.

<table><tr><td>Setting</td><td>Description</td></tr><tr><td>1-2</td><td>Normal (Default)</td></tr><tr><td>2-3</td><td>Clear CMOS</td></tr></table>

![The image displays a schematic diagram featuring three square outlines arranged horizontally. Inside each square outline is a smaller, solid black square. To the left of the squares, there is a thick black line forming a right-angle bracket shape. Below the leftmost square is the number '1', and below the rightmost square is the number '3'.](.amitx-aln-50m-16009-1010-11/4e2ab542a58fd48893ef6b0694d8f617cb18737e89f2c258a411b819521a7e24.jpg)

# 4.3.3 Brightness Control Mode (BLT\_PWM1)

Set to 1-2 when adjusting brightness by Brightness Control bar under OS, 2-3 when adjusting brightness by BLT\_VOL1.

<table><tr><td>Setting</td><td>Description</td></tr><tr><td>1-2</td><td>From eDP PWM to CON_LBKLT_CTL</td></tr><tr><td>2-3</td><td>From LVDS PWM to CON_LBKLT_CTL (Default)</td></tr></table>

![The image displays a horizontal row of three squares. Inside each square is a smaller, centered black square. Below the first square is the number '1', and below the third square is the number '3'. To the left of the first square is a thick black vertical bar.](.amitx-aln-50m-16009-1010-11/0464a047f49e668602d3b984003bd1a22bfa6eb39a0f8ba41c9b98aca5bb68cb.jpg)

# COM Port PWR Setting Headers (PWR\_COM1\~4 (For COM Port1\~4))

• PWR\_COM1 (For COM Port1)
• PWR\_COM2 (For COM Port2)
• PWR\_COM3 (For COM Port3)
• PWR\_COM4 (For COM Port4)

<table><tr><td>Setting</td><td>Description</td></tr><tr><td>1-2</td><td>+5V (Default)</td></tr><tr><td>2-3</td><td>+12V</td></tr></table>

![The image shows a sequence of three rectangular blocks arranged horizontally. The leftmost block has a thick vertical bar extending downward from its left side. Each of the three rectangles contains a smaller square in its center. Beneath the first rectangle is the number '1', and beneath the third rectangle is the number '3'.](.amitx-aln-50m-16009-1010-11/c2db44b1efc08d1a39eae63830372ac3d429955399cd70a63bfd9cd6b289497f.jpg)

The maximum current per port is 1A, and the power supply is either 5V or 12V. Use the jumper to set the power for COM port pin 9.

# SATA Power Output Connector (SATA\_PWR1)

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>+5V</td></tr><tr><td>2</td><td>GND</td></tr><tr><td>3</td><td>GND</td></tr><tr><td>4</td><td>+12V</td></tr></table>

![The image shows a black vertical bar on the left side containing a white column with four solid black squares stacked vertically. To the right of the black bar, the number '4' is visible near the top and the number '1' is visible near the bottom.](.amitx-aln-50m-16009-1010-11/0d5da6767354127462cb837bd8ef151ab97425ae3d53cd6b8810e43c018aae99.jpg)

# Backlight Volume Control (BLT\_VOL1)

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>GPIO_VOL_UP</td></tr><tr><td>2</td><td>GPIO_VOL_DW</td></tr><tr><td>3</td><td>PWRDN</td></tr><tr><td>4</td><td>BRIGHTNESS_UP</td></tr><tr><td>5</td><td>BRIGHTNESS_DW</td></tr><tr><td>6</td><td>GND</td></tr><tr><td>7</td><td>GND</td></tr></table>

![The image displays a technical diagram of a connector. It features a rectangular outline containing a horizontal row of seven circles. The circle on the far right contains a smaller square within it. Below the diagram, the number '7' is positioned on the left and the number '1' is on the right.](.amitx-aln-50m-16009-1010-11/933c040e1d2e092112be89393811552055eac2a526bba2ff6867a15de7dbaecb.jpg)

Inverter Power Control Wafer (BLT\_PWR1)

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>GND</td></tr><tr><td>3</td><td>CON_LBKLT_CTL</td></tr><tr><td>4</td><td>CON_LBKLT_EN</td></tr><tr><td>5</td><td>LCD_BLT_VCC</td></tr><tr><td>6</td><td>LCD_BLT_VCC</td></tr></table>

![This image displays a black rectangular frame containing a horizontal row of five white circles. The first four circles are plain, while the fifth circle on the far right is enclosed within a black square outline. Below the frame, the number '6' is positioned on the left and the number '1' is positioned on the right.](.amitx-aln-50m-16009-1010-11/db2449164cdeb8878591ba4b936d8d4dc57d06fdafc8417b2fdc84cabd1fc7e8.jpg)

Digital Input / Output Power Select (JGPIO\_PWR) (JGPIO\_PWR1)

<table><tr><td>1-2</td><td>+12V</td></tr><tr><td>2-3</td><td>+5V (Default)</td></tr></table>

![The image shows a row of three identical rectangular boxes with black borders and white interiors, each containing a small black square centered inside. A thick black vertical bar is positioned to the left of the first box. Below the row of boxes, the number '1' appears underneath the first box and the number '3' appears underneath the third box.](.amitx-aln-50m-16009-1010-11/f7630fb9fa66c17c3491990134e411ff6ecff5f4ccf14be707562cc0b5589d21.jpg)

eDP and LVDS Panel Power Select (LCD\_VCC) (PNL\_PWR1)

<table><tr><td>1-2</td><td>LCD_VCC: +3V(Default)</td></tr><tr><td>2-3</td><td>LCD_VCC: +5V</td></tr><tr><td>4-5</td><td>LCD_VCC: +12V</td></tr></table>

![A black horizontal rectangular bar containing five evenly spaced black squares. Below the left end of the bar is the number 1, and below the right end is the number 5.](.amitx-aln-50m-16009-1010-11/9dac582d51983d357d0744c2013b9fda3c5fca39e42b89aa2e72fe9dafaf9676.jpg)

eDP and LVDS Backlight Power Select (LCD\_BLT\_VCC) (BKT\_PWR1)

<table><tr><td>1-2</td><td>LCD_BLT_VCC: +5V(Default)</td></tr><tr><td>2-3</td><td>LCD_BLT_VCC: +12V</td></tr><tr><td>4-5</td><td>LCD_BLT_VCC: DC Input</td></tr></table>

![The image displays a horizontal sequence of five identical square shapes. Each shape features a thick black outer border surrounding a white interior, with a smaller solid black square centered within it. These shapes are enclosed within a long rectangular frame with thick black borders on the top and bottom. Below the first shape on the left is the number '1', and below the fifth shape on the right is the number '5'.](.amitx-aln-50m-16009-1010-11/818202aa1a790410a275c6b72e01d340cf16599e274bdbcd3faa234cabc9ac95.jpg)

CON\_LBKLT\_CTL Voltage Level (BLT\_PWM2)

<table><tr><td>1-2</td><td>3V Level (Default)</td></tr><tr><td>2-3</td><td>5V Level</td></tr></table>

![The image displays a simple line drawing of a rectangular device. On the far left, there is a thick black shape resembling a latch or clamp. To the right of this, three square panels are arranged horizontally within the rectangle. Each panel contains a smaller, solid black square in its center. Below the leftmost panel is the number '1', and below the rightmost panel is the number '3'.](.amitx-aln-50m-16009-1010-11/3ed9c9f3c3ddfdbf06834d2e8525a3b751c8d2bb92ce090cda8f47cebda31d56.jpg)

# Digital Input / Output Default Value Setting (JGPIO\_SET1)

The header is used for GPIO default value setting for either pull high or pull low. Pulling the header to a high/low value means the voltage is anchored to VCC/GND, in a stable, non-floating state.

<table><tr><td>1-2</td><td>Pull-High (Default)</td></tr><tr><td>2-3</td><td>Pull-Low</td></tr></table>

![The image displays a horizontal row of three white squares with black borders. Inside each square is a smaller, centered black square. To the left of the first square is a thick black L-shaped bracket. Below the first square is the number '1', and below the third square is the number '3'.](.amitx-aln-50m-16009-1010-11/999c05c94f186ad85577e801b662083f79223ed6b543091392196d5e98467371.jpg)

DACC Jumper (DACC1)

<table><tr><td>Open</td><td>Normal</td></tr><tr><td>Short</td><td>Auto Clear CMOS(Power off) (Default)</td></tr></table>

![The image displays two white squares with black centers arranged horizontally. To the left of the first square is a thick black vertical bar. Below the squares are the numbers '1' and '2'.](.amitx-aln-50m-16009-1010-11/08d131106c1d1e538b144dfe773458af51e4a9b19cd96cc4406ca5d43cdc96c1.jpg)

SMBUS\_TEST1

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>GP_E01</td></tr><tr><td>2</td><td>SMB_CLK</td></tr><tr><td>3</td><td>SMB_DATA</td></tr><tr><td>4</td><td>GND</td></tr></table>

![4\n1](.amitx-aln-50m-16009-1010-11/e2abb5943ecda7646d7bf14449be68217f17d0fb62ed1c45193e2db30f7d79c1.jpg)

# SPDIF Header (SPDIF1)

SPDIF header provides SPDIF audio output to HDMI VGA card, allowing the system to connect to HDMI Digital TV/projector/LCD devices. Connect the SPDIF connector of the HDMI VGA card to this header.

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>+5V</td></tr><tr><td>2</td><td></td></tr><tr><td>3</td><td>SPDIF OUT</td></tr><tr><td>4</td><td>GND</td></tr></table>

![The image displays a horizontal rectangular bar divided into four equal sections. Below the first section is the number '1' and below the fourth section is the number '4'. The first section features a thick black vertical bar on its left edge and contains a small black square dot in the center. The second section is an empty white square. The third section contains a small black square dot. The fourth section contains a small black square dot.](.amitx-aln-50m-16009-1010-11/1816e33281e1bb42ec841da08460fb250a31e140dad2e6161716916a98ea343e.jpg)

3W Audio AMP Output Wafer (SPEAKER1)

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>OUTLN</td></tr><tr><td>2</td><td>OUTLP</td></tr><tr><td>3</td><td>OUTRP</td></tr><tr><td>4</td><td>OUTRN</td></tr></table>

![The image displays a black-and-white line drawing of a rectangular connector housing. Inside the rectangle, four circular positions are arranged horizontally. The leftmost circle contains a small square, while the other three are empty rings. Below the housing, the number '1' is aligned under the first circle, and the number '4' is aligned under the fourth circle.](.amitx-aln-50m-16009-1010-11/7b71021bb29280dc705d09364fb1a0f0df859d7c6fa3692e4fbfe5b6059a93c8.jpg)

Battery Connector (BAT1)

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>+BAT</td></tr><tr><td>2</td><td>GND</td></tr></table>

![The image displays a black-and-white line drawing of a rectangular object. It features a large central rectangle containing two circles side-by-side. Flanking the central rectangle are two smaller, vertical rectangular sections. Below the left section is the number '1,' and below the right section is the number '2.'](.amitx-aln-50m-16009-1010-11/5acc524e3003481290cc60ce42d540a73ea88d54c9144e6c3b4d5af59ce6b6ae.jpg)

2-pin UPS Module Power Input Connector (TO\_UPS1)

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>DC Input</td></tr></table>

![The image displays a black and white schematic or icon. On the left side, there is a thick vertical black bar. Next to it is a square shape with rounded corners. Inside this shape, a small circle is positioned near the top center, and below it is a smaller square containing a cross (an 'X'). To the right of the main square shape, the numbers '2' and '1' are stacked vertically, with '2' above '1'.](.amitx-aln-50m-16009-1010-11/75280c76121baca7c6e125573033d940446d9e0bd105568295c3a5fa7e5115c2.jpg)

PWR\_ADAPTER1 (PWR\_ADAPTER1)

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>5VA_CONTROL</td></tr><tr><td>3</td><td>5VA</td></tr><tr><td>4</td><td>GND</td></tr></table>

![The image displays a black rectangular outline resembling a socket or connector housing. Inside the rectangle, there are four small shapes arranged horizontally: three hollow circles on the left and a square on the far right. Below the rectangle, the number '4' is positioned under the leftmost shape, and the number '1' is positioned under the rightmost shape.](.amitx-aln-50m-16009-1010-11/cead71af14fec61176fddc0ccb976c3d9fedf3b458b2cabaeacb8c7e27f1c988.jpg)

SPI\_TPM Header (SPI\_TPM1)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>TPM PWR</td><td>RST#</td><td>2</td></tr><tr><td>3</td><td></td><td>CS#</td><td>4</td></tr><tr><td>5</td><td>IRA</td><td>MOSI</td><td>6</td></tr><tr><td>7</td><td>MISO</td><td>GND</td><td>8</td></tr><tr><td>9</td><td>CLK</td><td>GND</td><td>10</td></tr></table>

![A vertical rectangular panel or rack is shown, surrounded by the numbers 10, 9, 2, and 1 at the corners (10 top-left, 9 top-right, 2 bottom-left, 1 bottom-right). Inside the rectangle are five horizontal rows. The top three rows and the bottom row each contain two small black squares. The fourth row from the top contains only a single black square on the left side.](.amitx-aln-50m-16009-1010-11/8aec8d8b2f21baa28e5556ded5a0f1c149768a1e3b2e5cf887b034e8232a1fa5.jpg)

# COM3, COM4 TX RX Selection Headers

(From left to right)

COM4\_RX\_SEL1

COM4\_TX\_SEL1

COM3\_RX\_SEL1

COM3\_TX\_SEL1

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1-2</td><td>TTL: 0V~5V</td></tr><tr><td>2-3</td><td>-5V~+5V (RS-232)(Default)</td></tr></table>

![The image displays a schematic of three horizontally aligned squares, each containing a smaller, central black square. A thick black bracket frames the left side of the first square. Below the arrangement, the number '1' is positioned under the first square, and the number '3' is positioned under the third square.](.amitx-aln-50m-16009-1010-11/18187c55a8f9b4da4611155a3458afcabdf5937dd775fcae1ec0050e49fe72d7.jpg)

# Buzzer Header (BUZZ2)

This header provides additional external Buzzer to boot up debugging.

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>1</td><td>Buzz+</td></tr><tr><td>2</td><td>Buzz-</td></tr></table>

![The image displays a black and white graphic resembling a schematic symbol. On the left is a thick black L-shaped bar. To its right are two adjacent white squares with thick black borders and smaller black squares in their centers. Below the left square is the number '1' and below the right square is the number '2'.](.amitx-aln-50m-16009-1010-11/1859bef7180dee1b264d0b513fc29a85cb3d93ef81c9a2221a11cdd05788e604.jpg)

PWR BAT2

<table><tr><td>Setting</td><td>Description</td></tr><tr><td>Open</td><td>Normal (Default)</td></tr><tr><td>Short</td><td>Charge Battery</td></tr></table>

![The image displays a black line drawing featuring a thick L-shaped bracket on the left side. Adjacent to the bracket are two rectangular boxes positioned side-by-side, each containing a solid square in its center. Below the left box is the number '1', and below the right box is the number '2'.](.amitx-aln-50m-16009-1010-11/53e88287649463bcc88d3924e379416a303125b9257000365538d54d28130463.jpg)

VGA Header (VGA2)

<table><tr><td>Pin</td><td>Signal Name</td><td>Signal Name</td><td>Pin</td></tr><tr><td>1</td><td>RED</td><td>GND</td><td>2</td></tr><tr><td>3</td><td>GREEN</td><td>GND</td><td>4</td></tr><tr><td>5</td><td>BLUE</td><td>GND</td><td>6</td></tr><tr><td>7</td><td>HSYNC</td><td>VSYNC</td><td>8</td></tr><tr><td>9</td><td>DDC_CLK</td><td>DDC_DATA</td><td>10</td></tr></table>

![The image displays a schematic of a rectangular connector housing outlined in black. Inside the rectangle, there are eight small black squares arranged in two vertical columns of four. To the left of the housing, the number '9' is positioned near the top and '1' near the bottom. To the right, the number '10' is near the top and '2' is near the bottom.](.amitx-aln-50m-16009-1010-11/7a1bdf8de2ba3c26110eea72e372c03ecc2b34118a2192ff4a0a68c2da341dce.jpg)

# 5 Driver Installation

Drivers can be downloaded through the following link.

https://www.adlinktech.com/Products/Industrial\_Motherboards\_SBCs/Mini-ITXEmbeddedBoards/AmITX-ALN

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# 6 BIOS Setup

This section presents the primary menus of the UEFI Setup Utility.

2 Options to enter UEFI Setup Utility:

• Press [F2] or [Del] during POST (Power-On-Self-Test)
• Press [Ctl] + [Alt] + [Del] after POST

# 6.1 Menu Structure

This section presents the six primary menus of the BIOS Setup Utility. Use the following table as a quick reference for BIOS Setup Utility. The subsections in this section describe the submenus and setting options for each menu item.

<table><tr><td>Main</td><td>Advanced</td><td>H/W Monitor</td></tr><tr><td>Sets up the system time/date and displays the system information:- System Date- System Time- BIOS Information- Memory Information-</td><td>Contains advanced system configurations, including:► CPU Configuration► Chipset Configuration► Storage Configuration► Super IO Configuration► ACPI Configuration► USB Configuration► Trusted Computing► Instant Flash</td><td>Displays Hardware Status info, including:- Hardware Health Event Monitoring- CPU_FAN1 Setting- CHA_FAN1 Setting- Case Open Feature</td></tr><tr><td>Security</td><td>Boot</td><td>Exit</td></tr><tr><td>Changes or clears the supervisor/user password for the system- Supervisor Password- User Password- Secure Boot</td><td>Configures the boot settings and boot priority for available devices- Boot Option #1- Boot From Onboard LAN- Setup Prompt Timeout- Bootup Num-Lock- Full Screen Logo</td><td>Exits the UEFI Setup Utility while saving or discard the changes made- Save Changes and Exit- Discard Changes and Exit- Discard Changes- Load UEFI Defaults- Launch EFI Shell from filesystem device</td></tr></table>

# 6.2 Main

Upon entering the UEFI Setup Utility, the Main Menu is displayed, providing read-only information about your system and allows you to set the system Date and Time. Refer to the screenshots and tables below for details of the submenus and settings.

<table><tr><td>Feature</td><td>Options</td></tr><tr><td>System Date</td><td>xxx mm/dd/yyyy</td></tr><tr><td>System Time</td><td>hh:mm:ss</td></tr><tr><td colspan="2">BIOS Information</td></tr><tr><td>UEFI Version</td><td>AmlTX-RL-I x.xx.xx</td></tr><tr><td>Processor Type</td><td>Info only</td></tr><tr><td>Processor Speed</td><td>Info only</td></tr><tr><td>Cache Size</td><td>Info only</td></tr><tr><td colspan="2">Memory Information</td></tr><tr><td>Total Memory</td><td>Info only</td></tr><tr><td>DDR4_A1</td><td>Info only</td></tr><tr><td>LVDS Rom Version</td><td>Info only</td></tr></table>

# 6.3 Advanced

Contains the configurations for the following: CPU Configuration, Chipset Configuration, Storage Configuration, Super IO Configuration, ACPI Configuration, USB Configuration, and Trusted Computing.

<table><tr><td>Feature</td></tr><tr><td>▶ CPU Configuration</td></tr><tr><td>▶ Chipset Configuration</td></tr><tr><td>▶ Storage Configuration</td></tr><tr><td>▶ Super IO Configuration</td></tr><tr><td>▶ ACPI Configuration</td></tr><tr><td>▶ USB Configuration</td></tr><tr><td>▶ Trusted Computing</td></tr></table>

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>▶Instant Flash</td><td>A UEFI flash utility embedded in Flash ROM. This convenient UEFI update tool allows you to update system UEFI without entering operating systems first like MS-DOS or Windows®. Just launch this tool and save the new UEFI file to your USB flash drive, floppy disk or hard drive, and then you can update your UEFI in only a few clicks without preparing an additional floppy diskette or other com- plicated flash utility.Please be noted that the USB flash drive or hard drive must use FAT32/16/12 file system. If you execute Instant Flash utility, the utility will show the UEFI files and their respective information. Select the proper UEFI file to update your UEFI, and reboot your system after UEFI update process completes.</td></tr></table>

6.3.1 Advanced > CPU Configuration

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Active Processor E-Cores</td><td>Allows you to select the number of E-Cores to enable in each processor package. NOTE: Number of P-Cores and E-Cores are looked at together. When both are {0,0}, Pcode will enable all cores.</td></tr><tr><td>CPU C States Support</td><td>Allows you to enable CPU C States Support for power saving. It is recommended to keep C3, C6, and C7 enabled for better power saving.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Enhanced Halt State (C1E)</td><td>Allows you to enable Enhanced Halt State (C1E) for lower power consumption.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Package C States Support</td><td>Allows you to enable CPU, PCIe, Memory, Graphics C State Support for power saving.</td></tr><tr><td>CFG Lock</td><td>Allows you to enable or disable the CFG Lock. Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Intel Virtualization Technology</td><td>Allows a platform to run multiple operating systems and applications in independent partitions, so that one computer system can function as multiple virtual systems.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Intel SpeedStep Technology</td><td>Allows processors to switch between multiple frequencies and voltage points for better power saving and heat dissipation. CPU turbo ratio can be fixed when Intel SpeedStep Technology is set to [Disabled] and Intel Turbo Boost Technology is set to [Enabled].Configuration options: [Enabled] [Disabled].If you install Windows® 10 and want to enable this function, please set this item to [Enabled]. This item will be hidden if the current CPU does not support Intel SpeedStep technology.Please note that enabling this function may reduce CPU voltage and lead to system stability or compatibility issues with some power supplies. Please set this item to [Disabled] if above issues occur.</td></tr><tr><td>Intel Turbo Boost Technology</td><td>Enables the processor to run above its base operating frequency when the operating system requests the highest performance state. The default value is [Enabled].Configuration options: [Enabled] [Disabled]</td></tr><tr><td>CPU Thermal Throttling</td><td>Allows you to enable CPU internal thermal control mechanisms to keep the CPU from overheating.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Power Limit 1</td><td>&quot;Power Limit 1 in Milli Watts. BIOS will round to the nearest 1/8W when programming. 0 = no custom override. For 12.50W, enter 12500. Overclocking SKU: Value must be between Max and Min Power Limits (specified by PACKAGE_POWER_SKU_MSR). Other SKUs: This value must be between Min Power Limit and Processor Base Power (TDP) Limit. If value is 0, BIOS will program Processor Base Power (TDP) value.&quot;</td></tr><tr><td>Power Limit 2</td><td>&quot;Power Limit 2 value in Milli Watts. BIOS will round to the nearest 1/8W when programming. If the value is 0, BIOS will program this value as 1.25*Processor Base Power (TDP). For 12.50W, enter 12500. Processor applies control policies such that the package power does not exceed this limit.&quot;</td></tr></table>

6.3.2 Advanced > Chipset Configuration

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>VT-d</td><td>Intel® Virtualization Technology for Directed I/O helps your virtual machine monitor better utilize hardware by improving application compatibility and reliability, and providing additional levels of manageability, security, isolation, and I/O performance. Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Re-Size BAR Support</td><td>If a system has Resizable BAR capable PCIe devices, this option enables or disables Resizable BAR Support.</td></tr><tr><td>Share Memory</td><td>Allows you to configure the size of memory that is allocated to the integrated graphics processor when the system boots up. Configuration options: [Auto][32M][64M][128M][256M][512M] (Options vary depending on the memory you Use on your motherboard.)</td></tr><tr><td>In-Band ECC Support</td><td>Allows you to enable or disable In-Band ECC. Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Render Standby</td><td>Power down the render unit when the GPU is idle for lower power consumption.</td></tr><tr><td>Active LVDS</td><td>Use this option to enable or disable the LVDS. The default value is [Disabled]. Set the item to [Enabled]. Then press &lt;F10&gt; to save the setting and restart the system. Now the default value of Active LVDS is changed to ENABLED (F9 load default is also set to ENABLED). Change the setting from [Enabled] to [Disabled], and then press &lt;F10&gt; to save the setting and restart the system. Likewise, the default value of Active LVDS is changed to DISABLED (F9 load default is also set to DISABLED).</td></tr><tr><td>Onboard LAN1</td><td>Allows you to enable or disable the Onboard LAN1 feature.</td></tr><tr><td>Onboard LAN2</td><td>Allows you to enable or disable the Onboard LAN2 feature.</td></tr><tr><td>Onboard HD Audio</td><td>Allows you to enable or disable the onboard HD audio controller. Set this item to [Auto] to enable the onboard HD and automatically disable it when a sound card is installed. Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Restore on AC/Power Loss</td><td>Allows you to select the power state after a power failure. [Power Off] sets the power to remain off when the power recovers. [Power On] sets the system to start to boot up when the power recovers.</td></tr></table>

6.3.3 Advanced > Storage Configuration

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>SATA Controller(s)</td><td>The option allows you to enable or disable the SATA controllers.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>SATA Mode Selection</td><td>AHCI supports new features that improve performance.Configuration option: [AHCI]</td></tr><tr><td>Hybrid Storage Detection and Configuration Mode</td><td>The option allows you to select Hybrid Storage Detection and Configuration Mode.Configuration options: [Dynamic Configuration for Hybrid Storage Enable] [Disabled]</td></tr><tr><td>SATA Aggressive Link Power Management</td><td>SATA Aggressive Link Power Management allows SATA devices to enter a low power state during periods of inactivity to save power. It is supported only by AHCI mode.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Hard Disk S.M.A.R.T.</td><td>S.M.A.R.T stands for Self-Monitoring, Analysis, and Reporting Technology. It is a monitoring system for computer hard disk drives to detect and report on various indicators of reliability.Configuration options: [Enabled] [Disabled]</td></tr></table>

6.3.4 Advanced > Super IO Configuration

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>COM1 Configuration</td><td>Use this to set parameters of COM1.Type SelectUse this to select COM1 port type: [RS232], [RS422] or [RS485].</td></tr><tr><td>COM2 Configuration</td><td>Use this to set parameters of COM2.Type SelectUse this to select COM2 port type: [RS232], [RS422] or [RS485].</td></tr><tr><td>COM3 Configuration</td><td>Use this to set parameters of COM3.</td></tr><tr><td>COM4 Configuration</td><td>Use this to set parameters of COM4.</td></tr><tr><td>WDT Timeout Reset</td><td>Use this to set the Watch Dog Timer.</td></tr></table>

6.3.5 Advanced > ACPI Configuration

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Suspend to RAM</td><td>Allows you to select [Disabled] for ACPI suspend type S1. It is recommended to select [Auto] for ACPI S3 power saving.Configuration options: [Auto] [Disabled]</td></tr><tr><td>PCIE Devices Power On</td><td>Use this item to enable or disable PCIE devices to turn on the system from the power-soft-off mode.</td></tr><tr><td>RTC Alarm Power On</td><td>Allows the system to be waked up by the real time clock alarm. Set it to By OS to let it be handled by your operating system.Configuration options: [Enabled] [Disabled] [By OS]</td></tr></table>

6.3.6 Advanced > USB Configuration

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>USB Power Control</td><td>Use this option to control USB power.</td></tr><tr><td>M.2 Key B USB Function</td><td>The item enables or disables M.2 Key_B USB function.</td></tr></table>

6.3.7 Advanced > Trusted Computing

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Security Device Support</td><td>Allows you to enable or disable BIOS support for security device.O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Active PCR banks</td><td>Displays active PCR Banks.</td></tr><tr><td>Available PCR Banks</td><td>Displays available PCR Banks.</td></tr><tr><td>SHA256 PCR Bank</td><td>Allows you to enable or disable SHA256 PCR Bank.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>SHA384 PCR Bank</td><td>Allows you to enable or disable SHA384 PCR Bank.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>SM3_256 PCR Bank</td><td>Allows you to enable or disable SM3_256 PCR Bank. Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Pending Operation</td><td>Allows you to schedule an Operation for the Security Device. NOTE: Your computer will reboot during restart in order to change State of the Device. Configuration options: [None] [TPM Clear]</td></tr><tr><td>Platform Hierarchy</td><td>Allows you to enable or disable Platform Hierarchy. Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Storage Hierarchy</td><td>Allows you to enable or disable Storage Hierarchy. Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Endorsement Hierarchy</td><td>Allows you to enable or disable Endorsement Hierarchy. Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Physical Presence Spec Version</td><td>Select this item to tell OS to support PPI spec version 1.2 or 1.3. Please note that some HCK tests might not support version 1.3. Configuration options: [1.2] [1.3]</td></tr><tr><td>TPM 2.0 Interface Type</td><td>Allows you to view the Communication Interface to TPM 2.0 Device: CRB or ITS.</td></tr><tr><td>Device Select</td><td>Allows you to select the TPM device to be supported. [TPM 1.2] restricts support to TPM 1.2 devices. [TPM 2.0] restricts support to TPM 2.0 devices. [Auto] supports both TPM 1.2 and TPM 2.0 devices with the default set to TPM 2.0 de- vices. If TPM 2.0 devices are not found, TPM 1.2 devices will be enumerated.</td></tr></table>

# 6.4 HW Monitor

This screen allows you to monitor the status of your system and installed devices, such as CPU temperature, motherboard temperature, CPU fan speed, chassis fan speed, and the critical voltage.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>CPU_Fan 1 Setting</td><td>Allows you to select a fan mode for CPU Fan 1. The default value is [Full On].Configuration options: [Full On] [Automatic Mode]</td></tr><tr><td>CHA_Fan 1 Setting</td><td>Allows you to set chassis fan 1's speed. The default value is [Full On].Configuration options: [Full On] [Automatic Mode]</td></tr><tr><td>Case Open Feature</td><td>Allows you to enable or disable case open detection feature.The default is value [Disabled].</td></tr><tr><td>Clear Status</td><td>This option appears only when the case open has been detected. Use this option to keep or clear the record of previous chassis intrusion status.</td></tr><tr><td>Supervisor Password</td><td>Set or change the password for the administrator account. Only the administrator has the authority to change the settings in the UEFI Setup Utility. Leave it blank and press enter to remove the password.</td></tr><tr><td>User Password</td><td>Set or change the password for the user account. Users are unable to change the settings in the UEFI Setup Utility. Leave it blank and press enter to remove the password.</td></tr><tr><td>Secure Boot</td><td>Press [Enter] to configure the Secure Boot Settings. The feature protects the system from unauthorized access and malwares during POST.</td></tr><tr><td>Intel(R) Platform Trust Technology</td><td>Enables/disables Intel PTT in ME. Disable this option to use discrete TPM Module.</td></tr><tr><td>Secure Boot Mode</td><td>[Standard] Select this item and the system will automatically load the Secure Boot keys from the BIOS database.[Custom] Select this item and Secure Boot Policy variables can be configured by a physically present user without full authentication.</td></tr><tr><td>Install Default Secure Boot Keys</td><td>Please install default secure boot keys if it's the first time you use secure boot.</td></tr><tr><td>Clear Secure Boot Keys</td><td>This item appears only when you load the default Secure Boot keys. Use this item to clear all default Secure Boot keys.</td></tr><tr><td>Key Management</td><td>Enables expert users to modify Secure Boot Policy variables without full authentication. This appears only when you set Secure Boot Mode to [Custom].</td></tr></table>

# 6.6 Boot

This section displays the available devices on your system for you to configure the boot priority and settings.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Boot From Onboard LAN</td><td>The item allows the system to be waked up by the onboard LAN.Configuration options: [Enabled] [Disabled]</td></tr><tr><td>Setup Prompt Timeout</td><td>The item allows you to configures the number of seconds to wait for the UEFI setup utility.Configuration options: [1] - [65535]</td></tr><tr><td>Bootup Num-Lock</td><td>The item allows you to select whether Num Lock should be turned on or off when the system boots up.Configuration options: [On] [Off]</td></tr><tr><td>Full Screen Logo</td><td>[Enabled] Select this item to display the boot logo.[Disabled] Select this item to show normal POST messages.</td></tr></table>

6.7 Save & Exit

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Save Changes and Exit</td><td>When you select this option, the following message “Save configuration changes and exit setup?” will pop out. Select [Yes] to save the changes and exit the UEFI SETUP UTILITY.</td></tr><tr><td>Discard Changes and Exit</td><td>When you select this option, the following message “Discard changes and exit setup?” will pop out. Select [Yes] to exit the UEFI SETUP UTILITY without saving any changes.</td></tr><tr><td>Discard Changes</td><td>When you select this option, the following message “Discard changes?” will pop out. Select [Yes] to discard all the changes.</td></tr><tr><td>Load UEFI Defaults</td><td>Allows you to load UEFI default values for all options. The F9 key can be used for this operation.</td></tr><tr><td>Launch EFI Shell from filesystem device</td><td>Allows you to copy shellx64.efi to the root directory to launch EFI Shell.</td></tr></table>

# Safety Instructions

Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use.

• Please read these safety instructions carefully.
• Please keep this User‘s Manual for later reference.
• Read the specifications section of this manual for detailed information on the operating environment of this equipment.
• When installing/mounting or uninstalling/removing equipment, turn off the power and unplug any power cords/cables.
• To avoid electrical shock and/or damage to equipment:

 Keep equipment away from water or liquid sources.
 Keep equipment away from high heat or high humidity.
 Keep equipment properly ventilated (do not block or cover ventilation openings).
 Make sure to use recommended voltage and power source settings.
 Always install and operate equipment near an easily accessible electrical socket-outlet.
 Secure the power cord (do not place any object on/over the power cord).
 Only install/attach and operate equipment on stable surfaces and/or recommended mountings.
 If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source.

• Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.

# Getting Service

Ask an Expert: https://www.adlinktech.com/en/Askanexpert

# ADLINK Technology, Inc.

Address: No. 66, Huaya 1st Road, Guishan District Taoyuan City 333, Taiwan

Tel: +886-3-216-5088

Fax: +886-3-328-5723

Email: service@adlinktech.com

# Ampro ADLINK Technology, Inc.

Address: 6450 Via Del Oro, San Jose, CA 95119-1208, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-600-1189

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

Address: 300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area Shanghai, 201203 China

Tel: +86-21-5132-8988

Fax: +86-21-5132-3588

Email: market@adlinktech.com

# ADLINK Technology GmbH

Address: Hans-Thoma-Strasse 8-10, 68163 Mannheim, Germany

Tel: +49-621-43214-0

Fax: +49-621 43214-30

Email: emea@adlinktech.com

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you.
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