# COM Express™ Baseboard (EBX)

# Reference Manual

P/N 5001835A Revision A

# NOTICE

No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, without the prior written permission of Ampro Computers, Incorporated.

# DISCLAIMER

Ampro Computers, Incorporated makes no representations or warranties with respect to the contents of this manual or of the associated Ampro products, and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. Ampro shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this product, even if it has been notified of the possibility of such damages. Ampro reserves the right to revise this publication from time to time without obligation to notify any person of such revisions. If errors are found, please contact Ampro at the address listed below on the Notice page of this document.

# TRADEMARKS

Ampro and the Ampro logo are registered trademarks, and CoreModule, Little Board, LittleBoard, MightyBoard, MightySystem, MiniModule, ReadyBoard, ReadyBox, ReadyPanel, ReadySystem, and RuffSystem are trademarks of Ampro Computers, Inc. All other marks are the property of their respective companies.

REVISION HISTORY

<table><tr><td>Revision</td><td>Reason for Change</td><td>Date</td></tr><tr><td>A, A</td><td>Initial Release</td><td>May/08</td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

Ampro Computers, Incorporated

5215 Hellyer Avenue

San Jose, CA 95138-1007

Tel. 408 360-0200

Fax 408 360-0222

www.ampro.com

© Copyright 2008 Ampro Computers, Incorporated

# Audience Assumptions

This reference manual is for the person who designs computer related equipment, including but not limited to hardware and software design and implementation of the same. Ampro Computers, Inc. assumes you are qualified in designing and implementing your hardware designs and its related software into your prototype computer equipment.

# Contents

# Chapter 1 About this Manual ..

Introduction ...

Purpose of this Manual ..

Reference Material .

# Chapter 2 Product Overview..... 3

COM Express Concept .. .3

Product Description.. 4

Baseboard Features . .4

Block Diagram . ..6

Major Integrated Circuits (ICs).. .7

Header Descriptions .... ..8

Baseboard Jumper Headers...... ..13

Specifications......... ....13

Physical Specifications ...... ..13

Power Specifications ...... ..14

Environmental Specifications.. ..14

# Chapter 3 Hardware... .17

Overview... .17

LPT (Parallel) Port Interface .. ...18

Serial Ports ...19

Audio Interfaces ... ..21

Audio In 1.. ..21

Audio In 2.. ..21

Audio Out.. ..21

Keyboard/Mouse Interface.. .22

I2C Bus ... ..23

CPU Fan 1 . ..23

CPU Fan 2 . ..23

System Fan.. ..23

USB Interfaces . ..24

Video Interfaces ..... ..25

VGA Interface . .26

LVDS Interfaces .27

PanelLink (for DVI interface).. .29

TV-OUT . .29

Miscellaneous (Front Panel) Interface ..30

GPIO .. ..30

ATX Power Supply Interface.. ..31

System Management Bus... ..31

# Chapter 4 BIOS Setup .......... .33

Introduction .. ..33

Entering BIOS Setup (VGA Display).. ..33

Entering BIOS Setup (Remote Access). .33

Logo Screen Utility (Splash Screen).. ..34

Logo Screen Image Requirements.. .34

# Appendix A Technical Support.. ..35

# List of Figures

Figure 2-1. COM Express Baseboard and COM Express Board Assembly ...... . 3

Figure 2-2. Typical Design Flow .. 4

Figure 2-3. Simplified Block Diagram . 6

Figure 2-4. Major Component Locations (Top view).. . 8

Figure 2-5. Main Header Locations (Top view).. .. 11

Figure 2-6. Connector/Header Pin-Out Identification.. .. 12

Figure 2-7. Additional Header and Component Locations (Bottom view).. ... 12

Figure 2-8. Mechanical Dimensions . . 15

# List of Tables

Table 2-1. Major Components (ICs) .

Table 2-2. Header Definitions... 8

Table 2-3. Baseboard Jumper Header Settings . .. 13

Table 2-4. Baseboard Weight and Dimensions ....... .... 13

Table 2-5. Power Supply Requirements..... .. 14

Table 2-6. Environmental Requirements .. . 14

Table 3-1. LPT Port Interface Pin/Signal Definitions (J2) . .... 18

Table 3-2. Serial A (COM1 and COM2) Interface Pin/Signal Descriptions (J3) . .. 19

Table 3-3. Serial B (COM3 and COM4) Interface Pin/Signal Descriptions (J37) .... .. 20

Table 3-4. Audio In 1 Pin/Signal Descriptions (J5) . .. 21

Table 3-5. Audio In 2 Pin/Signal Descriptions (J4) . .. 21

Table 3-6. Audio Out Pin/Signal Descriptions (J6) .... 21

Table 3-7. Keyboard/Mouse Interface Pin/Signal Definitions (J13) .. . 22

Table 3-8. I2C Header Pin/Signal Definitions (J15) ..... .... 23

Table 3-9. CPU Fan 1 Header Pin/Signal Definitions (J16).. . 23

Table 3-10. CPU Fan 2 Header Pin/Signal Definitions (J17).. . 23

Table 3-11. System Fan Header Pin/Signal Definitions (J18) . .. 23

Table 3-12. USB 0 and 1 Interfaces Pin/Signal Definitions (J19) .. . 24

Table 3-13. USB 2 and 3 Interfaces Pin/Signal Definitions (J20) . . 24

Table 3-14. USB 4 and 5 Interfaces Pin/Signal Definitions (J21) .... . 24

Table 3-15. USB 6 and 7 Interfaces Pin/Signal Definitions (J22) . .. 25

Table 3-16. CRT Interface Pin/Signal Definitions (J11).. .. 26

Table 3-17. LVDS 1 Interface Pin/Signal Definitions (J25).. . 27

Table 3-18. LVDS 2 Interface Pin/Signal Definitions (J27).. .. 28

Table 3-19. PanelLink Pin/Signal Descriptions [for DVI] (J26) . .. 29

Table 3-20. TV-Out Header (J12).. . 29

Table 3-21. Miscellaneous (Front Panel) Header (J34).. ... 30

Table 3-22. User GPIO Signals Pin/Signal Descriptions (J36).. .. 30

Table 3-23. SMBus Signals Pin/Signal Descriptions (J14).. .... 31

Table A-1. Technical Support Contact Information .. .. 35

# Introduction

This manual is for designers of systems based on Ampro’s COM family of embedded processors. This manual contains information regarding the use of Ampro’s RoHS compliant COM Express Baseboard when used as connection platform for an Ampro Computer-on-Module (COM) product. The COM Express Baseboard is supplied by Ampro with each COM QuickStart Kit, which provides both a reference design and “gold” environment for developing COM Express Baseboards.

# Purpose of this Manual

This manual provides designers of systems based on a COM Express module with reference material for using the COM Express Baseboard as a development, test, and debug platform.

Information provided in this reference manual includes:

COM Express Baseboard hardware specifications
• Major integrated circuits
COM Express Baseboard connector/pin numbers and definitions

COM Express Baseboard integration details with COM Express modules and any peripheral equipment

Information not provided in this reference manual includes:

Detailed chip specifications
Internal component operation
Internal registers or signal operations
Bus or signal timing for industry standard busses and signals
COM Express module specific information

# Reference Material

The following list of reference material may be helpful for you to complete your evaluation and development successfully. Most of this reference material is also available on the support software CD-ROM or DVD provided with each QuickStart kit, or on Ampro’s InfoCenter web page. The InfoCenter was created for embedded system developers to share Ampro’s knowledge, insight, and expertise.

# Specifications and Manuals

EBX Specification Revision 1.1, 2005
Web site: http://www.pc104.org
• COM Express Design Guide
Web site: http://www.ampro.com
PCI 2.2 Compliant Specifications
Web site: http://www.pcisig.com
• EBX drawings
Web site: http://www.ampro.com

For copies of the PCI specifications, contact the PCI Special Interest Group Office at:

NOTE Check the Ampro web site at www.ampro.com, for the latest version of these Ampro documents.

Major Integrated Circuit (Chip) Specifications used in the COM Express Baseboard design

Intel Corp. and the 82572EI Gigabit Ethernet controller:
Web site:http://www.intel.com
• SMSC and the SCH3114I-NU LPC Super I/O controller:
Web site: http://www.smsc.com
• Realtek and the ALC888 Audio Codec
Web site: http://www.realtek.com.tw
Agere Systems and the L-FW32207T100-DB 1394 controller
Web site: http://www.lsi.com
Chrontel, Inc. and the CH7308A-TF SDVO to LVDS transmitter
Web site: http://www.chrontel.com
Chrontel, Inc. and the CH7307C-DEF SDVO to PanelLink transmitter
Web site: http://www.chrontel.com

This introduction presents general information about the COM Express Baseboard and the COM Express Concept. After reading this chapter you should understand more about the following items:

COM Express Concept and Development Approach
COM Express Baseboard Features
COM Express Baseboard Block Diagram
• Components
Headers and Jumpers

Specifications (Physical, Power, Environmental, Mechanical)

# COM Express Concept

Embedded system designers face increasing pressures to bring products to market quickly. Many products that once incorporated a custom CPU design can no longer afford the time to develop and debug a custom CPU let alone port operating system software to it. Furthermore, CPU subsystem design usually plays a small part in providing any uniqueness to an embedded product. The remainder of the embedded product design adds key circuits that provide a unique product and differentiate it from other products serving the same market. The challenge is to speed these designs to market by eliminating the need for a custom CPU design while providing the flexibility to include all critical elements, which make the embedded product unique.

The COM Express module provides an off-the-shelf CPU subsystem that can be included in virtually any embedded system. COM Express modules work like high-integration chips, plugging into your custom circuit board design to provide specific control for your logic application. See Figure 2-1.

![M2.5 Screws (5)\nM2.5 PEM Nuts\nSpacing 8 mm (5)\nCOM Express Module\nStack Connectors\n(2 pairs)\nCustom Base board Design\nEBXCOMStack](.com-express-ebx-baseboard-manual-rev-a/3bd3284052da956879d1c3d5a3322beb3eed95c64c78729387d1aaa0e8c3e0d9.jpg)

Figure 2-1. COM Express Baseboard and COM Express Board Assembly

COM Express provides a simple, standard interface, independent of the x86 processor used. The COM Express interface includes the industry-standard COM Express bus, I/O signals from the peripheral components on the COM Express module, power, and ground. Visit the Ampro web site (www.ampro.com) for the latest COM Express module processor availability and support information.

The standard COM Express interface lets you try different processors in your actual product environment with the ability to defer a processor choice until late in the project if you so choose. The interface also lets you easily offer different versions of your product with different capabilities by either selecting different COM Express modules for the same baseboard, or by designing different baseboards for the same CPU. This concept allows you to upgrade by selecting a more powerful CPU without baseboard redesign or by enhancing the baseboard without touching the CPU subsystem or the bulk of the applications software.

The COM Express flexibility enables designers to take an accelerated, low risk path by using proven COM Express module designs. Your design flow might look similar to the one shown in Figure 2-2. This diagram gives a typical design flow of hardware and software functions.

![Based on the provided image, here is the accurate and concise description of the flowchart:\n\n**Headers:**\n*   'Hardware Design Path' (Top Left)\n*   'CPU and Software Design Path' (Top Right)\n\n**Left Path Blocks (Hardware):**\nThe blocks in this column are arranged vertically and connected by a large grey arrow pointing downward:\n1.  'Design application-specific baseboard'\n2.  'Fabricate baseboard'\n3.  'Debug baseboard'\n4.  'Revise baseboard if necessary'\n\n**Right Path Blocks (Software/CPU):**\nThe blocks in this column are arranged vertically and connected by a large grey arrow pointing downward:\n1.  'Select CPU'\n2.  'Select OS & Tools'\n3.  'Write and Test Application Code'\n4.  'Write drivers for custom Logic'\n\n**Convergence:**\nBoth large grey arrows from the left and right paths converge and point to the final block at the bottom center:\n*   'Integrate application code'\n\n**Additional Text:**\n*   Vertical text on the far right edge reads: 'EBXdesignfw'](.com-express-ebx-baseboard-manual-rev-a/9c6bbe93470a406293b307e34d1d4a247d0bf44e05497ab097fd0ea2e2f9936d.jpg)

Figure 2-2. Typical Design Flow

# Product Description

The Ampro COM Express Baseboard is the host baseboard for Ampro’s COM Express modules and serves as reference design or “gold board” for the COM Express modules. The EBX module plugs directly into the COM Express Baseboard where the baseboard becomes a design platform for testing and developing your applications.

The Ampro COM Express Baseboard supports connections for a keyboard, mouse, LPT parallel port, eight USB ports, four serial ports, one IDE header (2.54 mm), CompactFlash socket, five video headers, and three audio headers. The COM Express Baseboard also includes connections for a 10BaseT/100BaseTX/ 1000BaseT Ethernet port. Refer to the following items for a more complete feature list.

# Baseboard Features

The COM Express Baseboard includes the following features:

Provides COM Express 8 mm interface height (J33A-B and J33C-D) connectors
IDE interface channel (supporting two devices)

♦ Provides 40-pin, 0.1 in connector (1) on IDE
♦ Provides CompactFlash socket on primary IDE
Supports Type I and II CompactFlash cards

Parallel Printer (LPT) interface
Serial Port interfaces (4)

Provides Full Modem RS-232 and RS422/485 on serial ports 1 and 2
♦ Provides RS-232 on serial ports 3 and 4

PS/2 Keyboard and Mouse ports

Provides Keyboard and Mouse header

USB interfaces (4 headers for 7 ports)

♦ Provide one USB header for Ports 0 & 1
♦ Provide one USB header for Ports 2 & 3
Provide one USB header for Ports 4 & 5
♦ Provide one USB header for Port 6 (Port 7 is dedicated to Mini PCIe)

Ethernet interface

♦ Provides Gigabit Ethernet in standard RJ-45 connectors
♦ Provides Activity/Link and Speed LED on Ethernet connectors
♦ Provides Ethernet Magnetics on baseboard

• Audio interfaces and options

Supports HD Audio and AC'97 (Rev 2.1 standard)
Provides Line In (2), Line Out, and MIC In

Video interfaces (5)

♦ Provides CRT (VGA) Interface
Provides two LVDS Interfaces
♦ Provides one TV-Out Interface
♦ Provides one PanelLink (DVI) Interface

Power interface

♦ Provides ATX power supply In (all standard voltages available to baseboard headers)
+12 Volts needed to power COM Express module

Fan headers

SATA interfaces

♦ Provides two SATA ports

# Block Diagram

Figure 2-3 shows the functional components of the COM Express Baseboard.
![This flowchart details the signal connections from a COM Express Connector to various system components and headers.\n\n**Source Blocks**\n*   **COM Express Connector - Rows A and B** contains: VBattery (RTC), PCIe, SMBus, PWR Mgmt, HDA Link, USB 2.0, I2C, Gb Ethernet, SATA, LPC SIO, TV-OUT, Express Card, 12V Input, 5V Standby, LVDS, AC'97/HDA.\n*   **COM Express Connector - Rows C and D** contains: IDE, PCI, PEG (16), 12V Input.\n\n**Connections from COM Express Connector - Rows A and B**\n*   **LVDS** connects to **LVDS 2 header**.\n*   **VGA** connects to **VGA header**.\n*   **TV-OUT (Y, PB, Pr)** connects to **Component Video header**.\n*   **VBATT (RTC)** connects to **RTC Battery socket**.\n*   **SMBus** connects to **SMBus header**.\n*   **SATA** connects to **SATA connectors (2)**.\n*   **USB** connects to **USB headers (4)**.\n*   **PCIe Lane2** connects to **Mini PCIe connector**.\n*   **PCIe Lane1** connects bidirectionally to **SPI EEPROM** and unidirectionally to **PCIe Bus header**.\n*   **PCIe** connects to **PCIe GigE controller**, which connects to **Gb Ethernet connectors (2)**.\n*   **I2C** connects to **I2C header**.\n*   **LPC** connects to **LPC SIO controller**.\n*   **FWR controller** connects bidirectionally to **LPC**.\n*   **LPC SIO controller** connects to:\n    *   **PS/2**, which connects to **Keyboard and Mouse header**.\n    *   **LPT Port header**.\n    *   **PWR Management controlled Fan headers (2)**.\n    *   **System Fan header**.\n    *   **Front Panel header**.\n    *   **Serial Port I/F**, which connects to **RS232/422/485 Transceiver**, which connects to **Serial Port headers 1 and 2**.\n    *   **Serial Port I/F**, which connects to **RS232 Transceiver**, which connects to **Serial Port headers 3 and 4**.\n*   **Intel - HDA Link** connects to **ALC888 HD Audio Codec**, which connects to **Front Panel Audio header** and **Back Panel Audio header**.\n\n**Connections from COM Express Connector - Rows C and D**\n*   **SDVO** connects to a block labeled **SDVO**.\n    *   From **SDVO**, **Channel - A** connects to **SDVO to LVDS transmitter**, which connects to **LVDS 1 header**.\n    *   From **SDVO**, **Channel - B** connects to **SDVO to PanelLink transmitter**, which connects to **PanelLink header (for DVI)**.\n*   **IDE** connects to a block labeled **IDE**, which connects to **IDE (PATA) header** and **CompactFlash Socket**.\n*   **PCI** connects to a block labeled **PCI**, which connects to:\n    *   **Mini PCI Type III A/B Socket**.\n    *   **GPIO header**.\n    *   **1394 controller**, which connects to **IEEE 1394 header**.](.com-express-ebx-baseboard-manual-rev-a/22399d10f4e0365608a1324a7af39accf81d995f7b2aa6aa10c1859b40704671.jpg)

Figure 2-3. Simplified Block Diagram

# Major Components (ICs)

Table 2-1. Major Components (ICs)

<table><tr><td>Chip Type</td><td>Mfg.</td><td>Model</td><td>Description</td></tr><tr><td>Ethernet Controller (U1)</td><td>Intel</td><td>82572EI</td><td>Provides Gigabit Ethernet with fully integrated Gigabit Ethernet Media Access Control (MAC) and Physical Layer (PHY) port.</td></tr><tr><td>LPC Super I/O Controller (U5 - on back of the board; see Figure 2-7 on page 12.)</td><td>SMSC</td><td>SCH3114I-NU</td><td>Provides Low Pin Count (LPC) interface with 3.3 volt operation.</td></tr><tr><td>Audio Codec (U10)</td><td>Realtek</td><td>ALC888</td><td>Provides ten DAC channels that simultaneously support 7.1 sound playback, plus 2 channels of independent stereo sound output (multiple streaming) through the back panel stereo outputs.</td></tr><tr><td>1394 Controller (U11)</td><td>Agere Systems</td><td>L-FW32207 T100-DB</td><td>Provides a high-performance, PCI-based controller for open host implementation of IEEE 1394a compliant systems or devices.</td></tr><tr><td>SDVO-LVDS Transmitter (U13 - on back of the board; see Figure 2-7 on page 12.)</td><td>Chrontel, Inc.</td><td>CH7308A-TF</td><td>Provides display control which accepts digital graphics input signals and upscales, encodes, and transmits data to an LCD panel.</td></tr><tr><td>SDVO-PanelLink Transmitter (U15 - on back of the board; see Figure 2-7 on page 12.)</td><td>Chrontel, Inc.</td><td>CH7307C-DEF</td><td>Provides display control which accepts digital graphics input signals and upscales, encodes, and transmits data to a DVI panel.</td></tr></table>

![Diagram of a computer motherboard layout with labeled components U10 and U11, showing various electronic components and connectors.](.com-express-ebx-baseboard-manual-rev-a/e4823c20e20bf8b49c2ea482281204aa50004c1dd51ff5dc84a16dfd3484e806.jpg)

Figure 2-4. Major Component Locations (Top view)

# Header Descriptions

The COM Express Baseboard headers and their respective descriptions are listed in the following table and shown in Figures 2-5 and 2-6. Table 2-2 provides pin spacing where applicable.

Note: Refer to connector/header pin-out identification Note on the following page.
Table 2-2. Header Definitions

<table><tr><td>Jack#</td><td>Signal/Device</td><td>Description</td></tr><tr><td>BAT</td><td>RTC Battery (B1)</td><td>2-pin Lithium battery socket (3.0V Lithium, coin)</td></tr><tr><td>SW1</td><td>Switch</td><td>Reset switch, momentary</td></tr><tr><td>SW2</td><td>Switch</td><td>Power On switch, momentary</td></tr><tr><td>J1</td><td>DNP</td><td>Do not populate</td></tr><tr><td>J2</td><td>LPT (Parallel)</td><td>26-pin, 2 mm header for parallel printer port</td></tr><tr><td>J3</td><td>Serial A</td><td>20-pin, 2.54 mm header for serial ports 1 and 2 (COM1 and COM2)</td></tr><tr><td>J4</td><td>Audio In 2</td><td>10-pin, 2 mm header for Expanded Stereo Line In and Stereo Microphone signals</td></tr><tr><td>J5</td><td>Audio In 1</td><td>10-pin, 2 mm header for Stereo Line In and Stereo Microphone</td></tr><tr><td>J6</td><td>Audio Out</td><td>16-pin, 2 mm header for Audio Out signals</td></tr><tr><td>J7</td><td>1394</td><td>8-pin, firewire connector for IEEE 1394 systems or devices</td></tr><tr><td>J8</td><td>ATX Power In</td><td>24-pin, 4.2 mm connector for ATX Power In</td></tr><tr><td>J9</td><td>IDE</td><td>40-pin, 2.54 mm, standard IDE connector</td></tr><tr><td>J10</td><td>CompactFlash (on back of the board; see Figure 2-7 on page 12)</td><td>50-pin, 1.27 mm, CF socket accepts Type I or II CF cards</td></tr><tr><td>J11</td><td>VGA Video</td><td>10-pin, 2.54 mm header for VGA video signals</td></tr><tr><td>J12</td><td>TV-Out</td><td>6-pin, 2.54 mm header for TV-Out signals</td></tr><tr><td>J13</td><td>Keyboard and Mouse</td><td>10-pin, 2 mm header for PS/2 keyboard and mouse signals</td></tr><tr><td>J14</td><td>SMBus</td><td>5-pin, 2.54 mm header for external SMBus interface</td></tr><tr><td>J15</td><td>I2C</td><td>3-pin, 2 mm header for I2C bus</td></tr><tr><td>J16</td><td>CPU Fan1</td><td>3-pin, 2.54 mm header for CPU fan1</td></tr><tr><td>J17</td><td>CPU Fan2</td><td>3-pin, 2.54 mm header for CPU fan2</td></tr><tr><td>J18</td><td>System Fan</td><td>3-pin, 2.54 mm header for system fan</td></tr><tr><td>J19</td><td>USB 0 and 1</td><td>10-pin, 2 mm header for USB 2.0 Ports 0 and 1</td></tr><tr><td>J20</td><td>USB 2 and 3</td><td>10-pin, 2 mm header for USB 2.0 Ports 2 and 3</td></tr><tr><td>J21</td><td>USB 4 and 5</td><td>10-pin, 2 mm header for USB 2.0 Ports 4 and 5</td></tr><tr><td>J22</td><td>USB 6</td><td>10-pin, 2 mm header for USB 2.0 Port 6 (Port 7 is dedicated to Mini PCIe.)</td></tr><tr><td>J23</td><td>Ethernet</td><td>8-pin RJ45 connector with two LEDs for 10BaseT/100BaseTX/1000BaseT from the PCI-Express bus</td></tr><tr><td>J24</td><td>Ethernet</td><td>8-pin RJ45 connector with two LEDs for 10BaseT/100BaseTX/1000BaseT from the COM Express module</td></tr><tr><td>J25</td><td>LVDS 1</td><td>30-pin, 2 mm header for LVDS signals from SDVO-LVDS transmitter</td></tr><tr><td>J26</td><td>PanelLink (for DVI)</td><td>16-pin, 2 mm header for PanelLink output (for DVI) from SDVO-PanelLink transmitter</td></tr><tr><td>J27</td><td>LVDS 2</td><td>30-pin, 2 mm header for LVDS signals from COM Express module</td></tr><tr><td>J28</td><td>SATA 1</td><td>7-pin connector for serial ATA signals from the COM Express interface</td></tr><tr><td>J29</td><td>SATA 2</td><td>7-pin connector for serial ATA signals from the COM Express interface</td></tr><tr><td>J30</td><td>PCIe</td><td>36-pin, standard edge connector for x1 PCI Express interface with six express lanes (one used by the Ethernet controller)</td></tr><tr><td>J31</td><td>N/A</td><td>Not applicable</td></tr><tr><td>J32</td><td>Mini PCI (on back of the board; see Figure 2-7 on page 12)</td><td>124-pin, standard Mini PCI connector</td></tr><tr><td>J33</td><td>COM Express A-D</td><td>440-pin, standard COM Express interface</td></tr><tr><td>J34</td><td>Miscellaneous</td><td>16-pin, 2 mm header for miscellaneous functions</td></tr><tr><td>J35</td><td>N/A</td><td>Not applicable</td></tr><tr><td>J36</td><td>GPIO</td><td>10-pin, 2 mm header for general purpose I/O signals from COM Express interface</td></tr><tr><td>J37</td><td>Serial B</td><td>20-pin, 2.54 mm header for serial ports 3 and 4 (COM3 and COM4)</td></tr><tr><td>J38</td><td>Mini PCI Express (on back of the board; see Figure 2-7 on page 12)</td><td>52-pin, standard connector for Mini PCI Express functions</td></tr></table>

![J29\nJP17\nJ26\nJ25\nJ11\nJ6\nJ28—\nJP5\nJ17\nJ4\nJ5\n—JP7\nJ33\nJ3\n—J18\nJP18\nJ19\nJ20\nJ21\nJ22\nDC B A\nJ37\nJP16\n—J16\nJ23\nJ24\nBAT1\nJ2\nJ36*\nJ7\nJ34\nSW1\nSW2\nJP14—\nJP3—\nJ12\nJ14\nJ15\nJP4—\nJP2—\nJP1—\nJP15—\nJ30\nJ30\nJ8\nJ9\nJ13](.com-express-ebx-baseboard-manual-rev-a/a5effab5e18fac8118f71cc7c4a8d9f8b9d23056858a4408b800b5dc4108ee03.jpg)

Figure 2-5. Main Header Locations (Top view)

# NOTE

Ampro uses an identification method in Chapters 2 & 3 to ease connector pin identification. For example, a 20-pin header with two rows of pins, using odd/ even numbering, where pin 2 is directly across and adjacent to pin 1, is noted in this way: 20-pin, two rows, odd/even (1, 2). Alternately, a 20-pin connector using consecutive numbering, where pin 11 is directly across and adjacent to pin 1, is noted in this way: 20-pin, two rows, consecutive (1, 11). The second number in the parenthesis is always directly across from and adjacent to pin-1, with a few exceptions. See Figure 2-6.

![| Group | Row | Value |\n|-------|-----|-------|\n| 20-pin, two rows, Odd/Even (1, 2) | 19 | 19 |\n| 20-pin, two rows, Odd/Even (1, 2) | 9 | 9 |\n| 20-pin, two rows, Odd/Even (1, 2) | 5 | 5 |\n| 20-pin, two rows, Odd/Even (1, 2) | 3 | 3 |\n| 20-pin, two rows, Odd/Even (1, 2) | 1 | 1 |\n| Or | 20 | 20 |\n| Or | 10 | 10 |\n| Or | 5 | 5 |\n| Or | 4 | 4 |\n| Or | 3 | 3 |\n| Or | 2 | 2 |\n| Or | 1 | 1 |\n| Or | 20 | 20 |\n| Or | 15 | 15 |\n| Or | 11 | 11 |\n| Consecutive (1, 11) | 10 | 10 |\n| Consecutive (1, 11) | 5 | 5 |\n| Consecutive (1, 11) | 4 | 4 |\n| Consecutive (1, 11) | 3 | 3 |\n| Consecutive (1, 11) | 2 | 2 |\n| Consecutive (1, 11) | 1 | 1 |\n| Consecutive (1, 11) | 20 | 20 |\n| Consecutive (1, 11) | 20 | 20 |\n| Consecutive (1, 11) | 20 | 20 |\n| Consecutive (1, 11) | 20 | 20 |\n| Consecutive (1, 11) | 20 | 20 |\n| Consecutive (1, 11) | 20 | 20 |\n| Consecutive(1, 11) | 20 | 20 |\n| Consecutive(1, 11) | 20 | 20 |\n| Consecutive(1, 11) | 20 | 20 |\n| Consecutive(1, 11) | 20 | 20 |\n| Consecutive(1, 11) | 20 | 20 |\n| Consecutive(1, 16) | 20 | 20 |\n| Consecutive(1, 16) | 20 | 20 |\n| Consecutive(1, 16) | 20 | 20 |\n| Consecutive(1, 16) | 20 | 20 |\n| Consecutive(1, 16) | 20 | 20 |\n| Consecutive(1, 16) | 25 | 25 |\n| Consecutive(1, 16) | 25 | 25 |\n| Consecutive(1, 16) | 25 | 25 |\n| Consecutive(1, 16) | 25 | 25 |\n| Consecutive(1, 16) | 25 | 25 |\n| Consecutive(1, 16) | 25 | 25 |\n| Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Consecutive), Consecutive (Cer)](.com-express-ebx-baseboard-manual-rev-a/f49af1cd88cea799abbd9b99e092bef91e8ebe6706682e426ce5aafb706c04be.jpg)

Figure 2-6. Connector/Header Pin-Out Identification

![U13\nU15\nJ38\nU5\nJ32\nJ10](.com-express-ebx-baseboard-manual-rev-a/fe06cd1bf8701c370e56108b4898ead7c17c61ee094900fb6818d4ba5e6cba37.jpg)

Figure 2-7. Additional Connector and Component Locations (Bottom view)

# Baseboard Jumper Headers

Table 2-3 provides the COM Express Baseboard jumper headers and the respective functions.

Table 2-3. Baseboard Jumper Header Settings

<table><tr><td>Jumper Pins</td><td>Installed</td><td>Removed/Installed</td></tr><tr><td>JP1 – COM 2 RS485</td><td>Termination (pins 1-2)</td><td>No Termination (removed) Default</td></tr><tr><td>JP2 – COM 1 RS485</td><td>Termination (pins 1-2)</td><td>No Termination (removed) Default</td></tr><tr><td>JP3 – J_SIDE (ATA Master, CF Slave) Default</td><td>ON (pins 1-2)</td><td>OFF (pins 2-3)</td></tr><tr><td>JP3 – J_SIDE (CF Master, ATA Slave)</td><td>OFF (pins 1-2)</td><td>ON (pins 2-3)</td></tr><tr><td>JP4 – CF Voltage Select</td><td>Enable +3.3V (pins 1-2)</td><td>Enable +5V (pins 2-3) Default</td></tr><tr><td>JP5 – LVDS 1 Voltage Select</td><td>Enable +3.3V (pins 1-2) Default</td><td>Enable +5V (pins 2-3)</td></tr><tr><td>JP7 – LVDS 2 Voltage Select</td><td>Enable +3.3V (pins 1-2) Default</td><td>Enable +5V (pins 2-3)</td></tr><tr><td>JP14 – Power Up Select</td><td>Power Up by signal S3 (pins 1-2) Default</td><td>Power Up by signal S5 (pins 2-3)</td></tr><tr><td>JP15 – Disable BIOS</td><td>Termination (pins 1-2)</td><td>No termination (removed) Default</td></tr><tr><td>JP16 – CPU Fan1 Voltage Select</td><td>Enable +5V (pins 1-2)</td><td>Enable +12V (pins 2-3) Default</td></tr><tr><td>JP17 – CPU Fan2 Voltage Select</td><td>Enable +5V (pins 1-2)</td><td>Enable +12V (pins 2-3) Default</td></tr><tr><td>JP18 – System Fan Voltage Select</td><td>Enable +5V (pins 1-2)</td><td>Enable +12V (pins 2-3) Default</td></tr></table>

Note: When a jumper is removed, it may be placed on one of the jumper pins for safe keeping. The jumper headers use 2 mm pin spacing.

# Specifications

# Physical Specifications

Table 2-4 provides the EBX mounting dimensions. The COM Express Baseboard conforms to the EBX physical standards to ensure accurate design coverage for developers.

Table 2-4. Baseboard Weight and Dimensions

<table><tr><td>Weight</td><td>0.259 kg (0.57 lbs)</td><td rowspan="4">NOTE</td><td rowspan="4">Overall height is measured from the upper board surface to the highest permanent component on the upper board surface. This measurement does not include the COM board or the heatsinks available for COM board.</td></tr><tr><td>Height (overall)</td><td>16.5 mm (0.65&quot;) (without COM board)</td></tr><tr><td>Width</td><td>203 mm (7.99&quot;)</td></tr><tr><td>Length</td><td>208 mm (8.2&quot;)</td></tr></table>

# Power Specifications

The COM Express Baseboard power requirements from the power supply are listed in the following table.

Table 2-5. Power Supply Requirements

<table><tr><td>Parameter</td><td>1.6GHz Characteristics</td></tr><tr><td>Input Type</td><td>Regulated DC voltage</td></tr><tr><td>In-rush Voltage &amp; Current</td><td>6.08A (72.96W)</td></tr><tr><td>Typical Idle Power</td><td>1.04A (12.47W)</td></tr><tr><td>BIT Voltage &amp; Current</td><td>1.85A (22.26W)</td></tr></table>

# Operating conditions:

In-rush operating conditions include CRT video, 512MB DDR RAM, COM 840 1.6 GHz board, and power.
Idle operating conditions include the in-rush conditions as well as IDE hard drive with Windows XP, keyboard, and mouse.
BIT = Burn-In-Test. Operating conditions include idle conditions as well as two serial COM ports with loop-backs, one Ethernet connection, one USB floppy drive, and five USB Compact Flash readers.

# Environmental Specifications

Table 2-6. Environmental Requirements

<table><tr><td>Parameter</td><td>Conditions</td></tr><tr><td>Temperature</td><td></td></tr><tr><td>Operating</td><td>-20° to +70°C (-4° to +158°F)</td></tr><tr><td>Extended</td><td>-40° to +85°C (-40° to +185F°)</td></tr><tr><td>Non-operating</td><td>-55° to +85°C (-67° to +185°F)</td></tr><tr><td>Humidity</td><td></td></tr><tr><td>Operating</td><td>5% to 95% relative humidity, non-condensing</td></tr><tr><td>Non-Operating</td><td>5% to 95% relative humidity, non-condensing</td></tr></table>

# Mechanical Specifications

Refer to Figure 2-8 for simplified mechanical dimensions. For more detailed mechanical dimensions of the Ampro baseboard, refer to the Baseboard Design Library on the specific COM module’s Support Software and Design Library DVD.

![0.00\n0.20\n0.30\n0.00\n0.20\n1.00\n2.61\n5.61\n7.80\n3.73\n5.55\n5.75](.com-express-ebx-baseboard-manual-rev-a/a234aff58ba4d6bb69477e003d21c97091bc5652c7d5fdbdf1202c898bc39614.jpg)

Figure 2-8. Mechanical Dimensions
Note: All Dimensions are shown in inches.

# Overview

This chapter is divided into the following headings with tables and descriptions where appropriate.

Parallel Port Interface (LPT)
Serial Port Interface
• Audio Input/Outputs
• PS/2 Keyboard
. PS/2 Mouse
. I2C Bus
. USB
• Fans
Video Interfaces

♦ CRT
♦ LVDS
♦ PanelLink (for DVI)
TV-Out

Miscellaneous (header for Front Panel functions)
GPIO
System Management Bus
• Power Interfaces
♦ ATX power supply input

# LPT (Parallel) Port Interface

Table 3-1 provides the pins/signals and descriptions for a standard parallel port (LPT1), 26-pin, 2 rows, consecutive (1, 14) with 2 mm pin spacing.

Table 3-1. LPT Port Interface Pin/Signal Definitions (J2)

<table><tr><td>Pin #</td><td colspan="2">Signal</td><td>Descriptions</td></tr><tr><td>1</td><td colspan="2">STROBE*</td><td>Strobe – Output used to strobe data into the printer. I/O pin in ECP/EPP mode.</td></tr><tr><td>2</td><td colspan="2">AFD*</td><td>Auto Feed – This is Request signal to the printer to automatically feed one line after each line is printed.</td></tr><tr><td>3</td><td colspan="2">PD0</td><td>Parallel Port Data 0 – These signals (0 to 7) provide the parallel port data.</td></tr><tr><td>4</td><td colspan="2">ERR*</td><td>Error – This is a Status output signal from the printer. A Low State indicates an error condition on the printer.</td></tr><tr><td>5</td><td colspan="2">PD1</td><td>Parallel Port Data 1 – These signals (0 to 7) provide the parallel port data.</td></tr><tr><td>6</td><td colspan="2">INIT*</td><td>Initialize – This signal used to Initialize printer. Output in standard mode, I/O in ECP/EPP mode.</td></tr><tr><td>7</td><td colspan="2">PD2</td><td>Parallel Port Data 2 – These signals (0 to 7) provide the parallel port data.</td></tr><tr><td>8</td><td colspan="2">SLIN*</td><td>Select In – This signal Output used to select the printer. I/O pin in ECP/EPP mode.</td></tr><tr><td>9</td><td colspan="2">PD3</td><td>Parallel Port Data 3 – These signals (0 to 7) provide the parallel port data.</td></tr><tr><td>11</td><td colspan="2">PD4</td><td>Parallel Port Data 4 – These signals (0 to 7) provide the parallel port data.</td></tr><tr><td>13</td><td colspan="2">PD5</td><td>Parallel Port Data 5 – These signals (0 to 7) provide the parallel port data.</td></tr><tr><td>15</td><td colspan="2">PD6</td><td>Parallel Port Data 6 – These signals (0 to 7) provide the parallel port data.</td></tr><tr><td>17</td><td colspan="2">PD7</td><td>Parallel Port Data 7 – These signals (0 to 7) provide the parallel port data.</td></tr><tr><td colspan="2">19</td><td>ACK*</td><td>Acknowledge – This is a Status output signal from the printer. A Low State indicates it has received the data and is ready to accept new data.</td></tr><tr><td colspan="2">21</td><td>BUSY</td><td>Busy – This is a Status output signal from the printer.</td></tr><tr><td colspan="2">23</td><td>PE</td><td>Paper End – This is a Status output signal from the printer. A High State indicates it is out of paper.</td></tr><tr><td colspan="2">25</td><td>SLCT</td><td>Select – This is a Status output signal from the printer. A High State indicates it is powered on.</td></tr><tr><td colspan="2">26</td><td>Key</td><td>Not connected</td></tr><tr><td colspan="2">27</td><td>PEG</td><td>Not connected</td></tr><tr><td colspan="2">10, 12, 14, 16, 18, 20, 22, 24</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground. The signals marked with \* indicate signal inversion.

# Serial Ports

The Super I/O chip provides serial ports 1 - 4 through headers J3 and J37. Both headers use 20-pin, 2-row, consecutive (1, 6) pin sequences with 2.54 mm spacing. The four serial ports support the following features:

Programmable word length, stop bits and parity
16-bit programmable baud rate generator
Interrupt generator
• Loop-back mode
• Four individual 16-bit FIFOs

Table 3-2. Serial A (COM1 and COM2) Interface Pin/Signal Descriptions (J3)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>DCD1*</td><td>Data Carrier Detect 1 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open).</td></tr><tr><td>2</td><td>DSR1*</td><td>Data Set Ready 1 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR1 for overall readiness to communicate.</td></tr><tr><td>3</td><td>RXD1</td><td>Receive Data 1 – Serial port 1 receive data in</td></tr><tr><td>4</td><td>RTS1*</td><td>Request To Send 1 – Indicates Serial port 1 is ready to transmit data. Used as hardware handshake with CTS3 for low level flow control.</td></tr><tr><td>5</td><td>TXD1</td><td>Transmit Data 1 – Serial port 1 transmit data out</td></tr><tr><td>6</td><td>CTS1*</td><td>Clear To Send 1 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS1 for low level flow control.</td></tr><tr><td>7</td><td>DTR1*</td><td>Data Terminal Ready 1 – Indicates Serial port 1 is powered, initialized, and ready. Used as hardware handshake with DSR1 for overall readiness to communicate.</td></tr><tr><td>8</td><td>RI1*</td><td>Ring Indicator 1 – Indicates external serial communications device is detecting a ring condition. Used by software to initiate operations to answer and open the communications channel.</td></tr><tr><td>9</td><td>GND</td><td>Ground</td></tr><tr><td>10</td><td>NC</td><td>Not connected</td></tr><tr><td>11</td><td>DCD2*</td><td>Data Carrier Detect 2 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open).</td></tr><tr><td>12</td><td>DSR2*</td><td>Data Set Ready 2 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR2 for overall readiness to communicate.</td></tr><tr><td>13</td><td>RXD2</td><td>Receive Data 2 – Serial port 2 receive data in</td></tr><tr><td>14</td><td>RTS2*</td><td>Request To Send 2 – Indicates Serial port 2 is ready to transmit data. Used as hardware handshake with CTS2 for low level flow control.</td></tr><tr><td>15</td><td>TXD2</td><td>Transmit Data 2 – Serial port 2 transmit data out</td></tr><tr><td>16</td><td>CTS2*</td><td>Clear To Send 2 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS2 for low level flow control.</td></tr><tr><td>17</td><td>DTR2*</td><td>Data Terminal Ready 2 – Indicates Serial port 2 is powered, initialized, and ready. Used as hardware handshake with DSR2 for overall readiness to communicate.</td></tr><tr><td>18</td><td>RT2</td><td>Not connected</td></tr><tr><td>19</td><td>GND</td><td>Ground</td></tr><tr><td>20</td><td>NC</td><td>Not connected</td></tr></table>

Note: The shaded area denotes power or ground. The signals marked with \* = Negative true logic.

Table 3-3. Serial B (COM3 and COM4) Interface Pin/Signal Descriptions (J37)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>DCD3*</td><td>Data Carrier Detect 3 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open).</td></tr><tr><td>2</td><td>DSR3*</td><td>Data Set Ready 3 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR3 for overall readiness to communicate.</td></tr><tr><td>3</td><td>RXD3</td><td>Receive Data 3 – Serial port 3 receive data in</td></tr><tr><td>4</td><td>RTS3*</td><td>Request To Send 3 – Indicates Serial port 3 is ready to transmit data. Used as hardware handshake with CTS3 for low level flow control.</td></tr><tr><td>5</td><td>TXD3</td><td>Transmit Data 3 – Serial port 3 transmit data out</td></tr><tr><td>6</td><td>CTS3*</td><td>Clear To Send 3 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS3 for low level flow control.</td></tr><tr><td>7</td><td>DTR3*</td><td>Data Terminal Ready 3 – Indicates Serial port 1 is powered, initialized, and ready. Used as hardware handshake with DSR3 for overall readiness to communicate.</td></tr><tr><td>8</td><td>RI3*</td><td>Ring Indicator 3 – Indicates external serial communications device is detecting a ring condition. Used by software to initiate operations to answer and open the communications channel.</td></tr><tr><td>9</td><td>GND</td><td>Ground</td></tr><tr><td>10</td><td>NC</td><td>Not connected</td></tr><tr><td>11</td><td>DCD4*</td><td>Data Carrier Detect 4 – Indicates external serial communications device is detecting a carrier signal (i.e., a communication channel is currently open).</td></tr><tr><td>12</td><td>DSR4*</td><td>Data Set Ready 4 – Indicates external serial communications device is powered, initialized, and ready. Used as hardware handshake with DTR4 for overall readiness to communicate.</td></tr><tr><td>13</td><td>RXD4</td><td>Receive Data 4 – Serial port 4 receive data in</td></tr><tr><td>14</td><td>RTS4*</td><td>Request To Send 4 – Indicates Serial port 4 is ready to transmit data. Used as hardware handshake with CTS4 for low level flow control.</td></tr><tr><td>15</td><td>TXD4</td><td>Transmit Data 4 – Serial port 4 transmit data out</td></tr><tr><td>16</td><td>CTS4*</td><td>Clear To Send 4 – Indicates external serial communications device is ready to receive data. Used as hardware handshake with RTS4 for low level flow control.</td></tr><tr><td>17</td><td>DTR4*</td><td>Data Terminal Ready 4 – Indicates Serial port 4 is powered, initialized, and ready. Used as hardware handshake with DSR4 for overall readiness to communicate.</td></tr><tr><td>18</td><td>RI4*</td><td>Ring Indicator 4 – Indicates external serial communications device is detecting a ring condition. Used by software to initiate operations to answer and open the communications channel.</td></tr><tr><td>19</td><td>GND</td><td>Ground</td></tr><tr><td>20</td><td>NC</td><td>Not connected</td></tr></table>

Note: The shaded area denotes power or ground. The signals marked with \* = Negative true logic.

# Audio Interfaces

The Audio interfaces use 2-row, odd/even (1, 2) headers. See Tables 3-4 to 3-6 for the audio input/output signals.

# Audio In 1

Table 3-4. Audio In 1 Pin/Signal Descriptions (J5)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>LINE1 L</td><td>Line In signal left channel</td></tr><tr><td>2</td><td>LINE1 R</td><td>Line In signal right channel</td></tr><tr><td>3</td><td>LINE1 JD</td><td>Line In signal JD (Jack Detect)</td></tr><tr><td>4</td><td>GND_AUD</td><td>Ground</td></tr><tr><td>5</td><td>GND_AUD</td><td>Ground</td></tr><tr><td>6</td><td>GND_AUD</td><td>Ground</td></tr><tr><td>7</td><td>MIC1 L</td><td>Microphone signal in left</td></tr><tr><td>8</td><td>MIC1 R</td><td>Microphone signal in right</td></tr><tr><td>9</td><td>MIC1 JD</td><td>Microphone signal in JD (Jack Detect)</td></tr><tr><td>10</td><td>GND_AUD</td><td>Ground</td></tr></table>

Note: The shaded area denotes audio ground.

# Audio In 2

Table 3-5. Audio In 2 Pin/Signal Descriptions (J4)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>MIC2 L</td><td>Microphone signal in left</td></tr><tr><td>2</td><td>GND_AUD</td><td>Ground</td></tr><tr><td>3</td><td>MIC2 R</td><td>Microphone signal in right</td></tr><tr><td>4</td><td>+3V</td><td>+3 Volts power</td></tr><tr><td>5</td><td>LINE2 R</td><td>Line In signal left channel</td></tr><tr><td>6</td><td>MIC2 JD</td><td>Microphone signal JD</td></tr><tr><td>7</td><td>FRONT IO SENSE</td><td>Front IO Sensor (sensor for front panel jack)</td></tr><tr><td>8</td><td>NC</td><td>Not connected</td></tr><tr><td>9</td><td>LINE2 L</td><td>Line In signal left channel</td></tr><tr><td>10</td><td>LINE2 JD</td><td>Line In JD (Jack Detect)</td></tr></table>

Note: The shaded area denotes audio ground or power.

# Audio Out

Note: The shaded area denotes audio ground.
Table 3-6. Audio Out Pin/Signal Descriptions (J6)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>FRONT L</td><td>Front audio out left channel</td></tr><tr><td>2</td><td>FRONT R</td><td>Front audio out right channel</td></tr><tr><td>3</td><td>FRONT JD</td><td>Front audio out (Jack Detect)</td></tr><tr><td>4</td><td>GND_AUD</td><td>Ground</td></tr><tr><td>5</td><td>LFE OUT</td><td>LFE out (Low Frequency Output)</td></tr><tr><td>6</td><td>CEN OUT</td><td>Center audio out</td></tr><tr><td>7</td><td>CEN JD</td><td>Center JD (Jack Detect) out</td></tr><tr><td>8</td><td>GND_AUD</td><td>Ground</td></tr><tr><td>9</td><td>SURR L</td><td>Surround left</td></tr><tr><td>10</td><td>SURR R</td><td>Surround right</td></tr><tr><td>11</td><td>SURR JD</td><td>Surround JD (Jack Detect)</td></tr><tr><td>12</td><td>GND_AUD</td><td>Ground</td></tr><tr><td>13</td><td>SIDESURR L</td><td>Side surround left</td></tr><tr><td>14</td><td>SIDESURR R</td><td>Side surround right</td></tr><tr><td>15</td><td>SIDESURR JD</td><td>Side surround JD (Jack Detect)</td></tr><tr><td>16</td><td>GND_AUD</td><td>Ground</td></tr></table>

# Keyboard/Mouse Interface

The keyboard and mouse use a 6-pin, 2-row, odd/even (1, 2) header for PS/2 signals. See Table 3-7 for pin signals.

Table 3-7. Keyboard/Mouse Interface Pin/Signal Definitions (J13)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>KEY VCC</td><td>+5 Volts</td></tr><tr><td>2</td><td>KEY DATA</td><td>Keyboard data</td></tr><tr><td>3</td><td>KEY CLK</td><td>Keyboard clock</td></tr><tr><td>4</td><td>KEY GND</td><td>Keyboard ground</td></tr><tr><td>5</td><td>KEY GND</td><td>Keyboard ground</td></tr><tr><td>6</td><td>KEY GND</td><td>Keyboard ground</td></tr><tr><td>7</td><td>KEY VCC</td><td>+5 Volts</td></tr><tr><td>8</td><td>CON DAT MOUSE</td><td>Mouse data</td></tr><tr><td>9</td><td>CON CLK MOUSE</td><td>Mouse clock</td></tr><tr><td>10</td><td>KEY GND</td><td>Keyboard ground</td></tr></table>

Note: The shaded area denotes power or ground.

# I 2C Bus

Table 3-8 lists the pin signals for the $\mathrm { I } ^ { 2 } \mathrm { C }$ bus.
Table 3-8. I2C Header Pin/Signal Definitions (J15)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td> $I^{2}C$  CK</td><td> $I^{2}C$  clock and 3.3 volts power</td></tr><tr><td>2</td><td> $I^{2}C$  DAT</td><td> $I^{2}C$  data and 3.3 volts power</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

# CPU Fan 1

Table 3-9 lists the pin signals for the CPU Fan 1 header.
Table 3-9. CPU Fan 1 Header Pin/Signal Definitions (J16)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>FAN_TACH1</td><td>Fan tachometer</td></tr><tr><td>2</td><td>VCC_FAN1</td><td>+5/12 volts power</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

# CPU Fan 2

Table 3-10 lists the pin signals for the CPU Fan 2 header.
Table 3-10. CPU Fan 2 Header Pin/Signal Definitions (J17)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>FAN_TACH2</td><td>Fan tachometer</td></tr><tr><td>2</td><td>VCC_FAN2</td><td>+5/12 volts power</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

# System Fan

Table 3-11 lists the pin signals for the System Fan header.
Table 3-11. System Fan Header Pin/Signal Definitions (J18)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>FAN_TACH3</td><td>Fan tachometer</td></tr><tr><td>2</td><td>VCC_FAN3</td><td>+5/12 volts power</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

# USB Interfaces

The COM Express Baseboard has eight USB ports using 10-pin, 2-row, odd/even (1, 2) headers. See Tables 3-12 to 3-15.

Table 3-12. USB 0 and 1 Interfaces Pin/Signal Definitions (J19)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>USB POWER 0</td><td>+5 volts power</td></tr><tr><td>2</td><td>USB POWER 1</td><td>+5 volts power</td></tr><tr><td>3</td><td>CONN USB0 N</td><td>USB0 data negative</td></tr><tr><td>4</td><td>CONN USB1 N</td><td>USB1 data negative</td></tr><tr><td>5</td><td>CONN USB0 P</td><td>USB0 data positive</td></tr><tr><td>6</td><td>CONN USB1 P</td><td>USB1 data positive</td></tr><tr><td>7</td><td>USB GND0</td><td>Ground</td></tr><tr><td>8</td><td>USB GND2</td><td>Ground</td></tr><tr><td>9</td><td>USB GND1</td><td>Ground</td></tr><tr><td>10</td><td>USB GND2</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

Table 3-13. USB 2 and 3 Interfaces Pin/Signal Definitions (J20)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>USB POWER 2</td><td>+5 volts power</td></tr><tr><td>2</td><td>USB POWER 3</td><td>+5 volts power</td></tr><tr><td>3</td><td>CONN USB2 N</td><td>USB2 data negative</td></tr><tr><td>4</td><td>CONN USB3 N</td><td>USB3 data negative</td></tr><tr><td>5</td><td>CONN USB2 P</td><td>USB2 data positive</td></tr><tr><td>6</td><td>CONN USB3 P</td><td>USB3 data positive</td></tr><tr><td>7</td><td>USB GND2</td><td>Ground</td></tr><tr><td>8</td><td>USB GND3</td><td>Ground</td></tr><tr><td>9</td><td>USB GND2</td><td>Ground</td></tr><tr><td>10</td><td>USB GND3</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

Note: The shaded area denotes power or ground.
Table 3-14. USB 4 and 5 Interfaces Pin/Signal Definitions (J21)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>USB POWER 4</td><td>+5 volts power</td></tr><tr><td>2</td><td>USB POWER 5</td><td>+5 volts power</td></tr><tr><td>3</td><td>CONN USB4 N</td><td>USB4 data negative</td></tr><tr><td>4</td><td>CONN USB5 N</td><td>USB5 data negative</td></tr><tr><td>5</td><td>CONN USB4 P</td><td>USB4 data positive</td></tr><tr><td>6</td><td>CONN USB5 P</td><td>USB5 data positive</td></tr><tr><td>7</td><td>USB GND4</td><td>Ground</td></tr><tr><td>8</td><td>USB GND5</td><td>Ground</td></tr><tr><td>9</td><td>USB GND4</td><td>Ground</td></tr><tr><td>10</td><td>USB GND5</td><td>Ground</td></tr></table>

Table 3-15. USB 6 Interface Pin/Signal Definitions (J22)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>USB POWER 6</td><td>+5 volts power</td></tr><tr><td>2</td><td>USB POWER 7</td><td>+5 volts power</td></tr><tr><td>3</td><td>CONN USB6 N</td><td>USB6 data negative</td></tr><tr><td>4</td><td>NC</td><td>Port 7 (dedicated to Mini PCIe)</td></tr><tr><td>5</td><td>CONN USB6 P</td><td>USB6 data positive</td></tr><tr><td>6</td><td>NC</td><td>Port 7 (dedicated to Mini PCIe)</td></tr><tr><td>7</td><td>USB GND6</td><td>Ground</td></tr><tr><td>8</td><td>USB GND7</td><td>Ground</td></tr><tr><td>9</td><td>USB GND6</td><td>Ground</td></tr><tr><td>10</td><td>USB GND7</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground.

# Video Interfaces

Five supported video connections reside on the baseboard to support the video functions provided by selected COM Express modules. The VGA (10-pin) header (J11) is used for the standard VGA (CRT) video display. The LVDS (30-pin) headers (J25 and J27) support LVDS flat panel displays. The PanelLink (16- pin) header (J26) allows for interface with DVI panels. The TV-OUT (6-pin) header (J12) provides TV output signals.

# VGA Interface

Table 3-16 provides the standard VGA CRT monitor interface pin/signal descriptions on a 10-pin header using 2 rows, consecutive (1, 6) with 2.54 mm pin spacing.
Table 3-16. CRT Interface Pin/Signal Definitions (J11)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>RED</td><td>Red – This signal is the Red analog output to the CRT.</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>GREEN</td><td>Green – This signal is the Green analog output to the CRT.</td></tr><tr><td>4</td><td>GND</td><td>Ground</td></tr><tr><td>5</td><td>BLUE</td><td>Blue – This signal is the Blue analog output to the CRT.</td></tr><tr><td>6</td><td>GND</td><td>Ground</td></tr><tr><td>7</td><td>HSYNC</td><td>Horizontal Sync – This signal is used for the digital horizontal sync output to the CRT. Also used (with VSYNC) to pass signal power management state information to the CRT per the VESA $^{TM}$  DPMS $^{TM}$  standard.</td></tr><tr><td>8</td><td>GND</td><td>Ground</td></tr><tr><td>9</td><td>VSYNC</td><td>Vertical Sync – This signal is used for the digital vertical sync output to the CRT. Also used (with HSYNC) to pass signal power management state information to the CRT per the VESA $^{TM}$  DPMS $^{TM}$  standard.</td></tr><tr><td>10</td><td>PWR</td><td>Power</td></tr></table>

Note: The shaded area denotes power or ground.

# LVDS Interfaces

The COM Express Baseboard provides two Low Voltage Differential Signal (LVDS) headers. The two headers, LVDS1 (J25) and LVDS2 (J27) both are 30-pin headers.

# NOTE

The LVDS Voltage Select jumper pins (JP5 and JP7) only control the voltage to the LVDS panel, not the panel signal level voltages, which remain at +3.3V CMOS logic levels regardless of the position of the LVDS voltage select jumper. Ensure you use a flat panel with +3.3V CMOS logic.

Table 3-17 describes LVDS 1 pin/signals on 30-pins, 2 rows, odd/even (1, 2) with 2 mm pin spacing.
Table 3-17. LVDS 1 Interface Pin/Signal Definitions (J25)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td><td>Line</td><td>Channel</td></tr><tr><td>1</td><td>+12V</td><td colspan="3">+12 volts for flat panel and backlight</td></tr><tr><td>2</td><td>+VCC</td><td colspan="3">VCC Voltage selected by LVDS Voltage Select (JP5) jumper at +3.3V or +5V.</td></tr><tr><td>3</td><td>GND</td><td>Ground</td><td rowspan="2">Gnd</td><td></td></tr><tr><td>4</td><td>GND</td><td>Ground</td><td></td></tr><tr><td>5</td><td>CLK_LVDS1_BP</td><td>Clock Positive Output</td><td rowspan="2">Clk</td><td rowspan="10">Channel 2</td></tr><tr><td>6</td><td>CLK_LVDS1_BN</td><td>Clock Negative Output</td></tr><tr><td>7</td><td>LVDS1_B3P</td><td>Data Positive Output</td><td rowspan="2">3</td></tr><tr><td>8</td><td>LVDSB_B3N</td><td>Data Negative Output</td></tr><tr><td>9</td><td>LVDS1_B2P</td><td>Data Positive Output</td><td rowspan="2">2</td></tr><tr><td>10</td><td>LVDS1_B2N</td><td>Data Negative Output</td></tr><tr><td>11</td><td>LVDS1_B1P</td><td>Data Positive Output</td><td rowspan="2">1</td></tr><tr><td>12</td><td>LVDS1_B1N</td><td>Data Negative Output</td></tr><tr><td>13</td><td>LVDS1_B0P</td><td>Data Positive Output</td><td rowspan="2">0</td></tr><tr><td>14</td><td>LVDS1_B0N</td><td>Data Negative Output</td></tr><tr><td>15</td><td>BKL_Control</td><td colspan="3">Backlight Control, if supported.</td></tr><tr><td>16</td><td>VDDEN</td><td colspan="3">Enable VDD</td></tr><tr><td>17</td><td>CLK_LVDS1_AP</td><td>Data Positive Output</td><td rowspan="2">Clk</td><td rowspan="10">Channel 1</td></tr><tr><td>18</td><td>CLK_LVDS1_AN</td><td>Data Negative Output</td></tr><tr><td>19</td><td>LVDS1_A3P</td><td>Data Positive Output</td><td rowspan="2">3</td></tr><tr><td>20</td><td>LVDS1_A3N</td><td>Data Negative Output</td></tr><tr><td>21</td><td>LVDS1_A2P</td><td>Data Positive Output</td><td rowspan="2">2</td></tr><tr><td>22</td><td>LVDS1_A2N</td><td>Data Negative Output</td></tr><tr><td>23</td><td>LVDS1_A1P</td><td>Data Positive Output</td><td rowspan="2">1</td></tr><tr><td>24</td><td>LVDS1_A1N</td><td>Data Negative Output</td></tr><tr><td>25</td><td>LVDS1_A0P</td><td>Data Positive Output</td><td rowspan="2">0</td></tr><tr><td>26</td><td>LVDS1_A0N</td><td>Data Negative Output</td></tr><tr><td>27</td><td>DDC_CLK</td><td>Display Channel Clock</td><td></td><td></td></tr><tr><td>28</td><td>DDC_DATA</td><td>Display Channel Data</td><td></td><td></td></tr><tr><td>29</td><td>LBKLT_EN</td><td colspan="3">Backlight Enable, if supported.</td></tr><tr><td>30</td><td>NC</td><td>Not connected</td><td></td><td></td></tr></table>

Note: The shaded area denotes power or ground.

Table 3-18 describes LVDS 2 pin/signals on 30-pins, 2 rows, odd/even (1, 2) with 2 mm pin spacing.
Table 3-18. LVDS 2 Interface Pin/Signal Definitions (J27)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td><td>Line</td><td>Channel</td></tr><tr><td>1</td><td>+12V</td><td colspan="3">+12 volts for flat panel and backlight</td></tr><tr><td>2</td><td>+VCC</td><td colspan="3">VCC Voltage selected by LVDS Voltage Select (JP7) jumper at +3.3V or +5V.</td></tr><tr><td>3</td><td>GND</td><td>Ground</td><td rowspan="2">Gnd</td><td></td></tr><tr><td>4</td><td>GND</td><td>Ground</td><td></td></tr><tr><td>5</td><td>CLK_LVDS1_BP</td><td>Clock Positive Output</td><td rowspan="2">Clk</td><td rowspan="10">Channel 2</td></tr><tr><td>6</td><td>/LVDSB_CLK</td><td>Clock Negative Output</td></tr><tr><td>7</td><td>LVDSB_DATA3</td><td>Data Positive Output</td><td rowspan="2">3</td></tr><tr><td>8</td><td>/LVDSB_DATA3</td><td>Data Negative Output</td></tr><tr><td>9</td><td>LVDSB_DATA2</td><td>Data Positive Output</td><td rowspan="2">2</td></tr><tr><td>10</td><td>/LVDSB_DATA2</td><td>Data Negative Output</td></tr><tr><td>11</td><td>LVDSB_DATA1</td><td>Data Positive Output</td><td rowspan="2">1</td></tr><tr><td>12</td><td>/LVDSB_DATA1</td><td>Data Negative Output</td></tr><tr><td>13</td><td>LVDSB_DATA0</td><td>Data Positive Output</td><td rowspan="2">0</td></tr><tr><td>14</td><td>/LVDSB_DATA0</td><td>Data Negative Output</td></tr><tr><td>15</td><td>BKL_Control</td><td colspan="3">Backlight Control, if supported.</td></tr><tr><td>16</td><td>VDDEN</td><td colspan="3">Enable VDD (DIGON)</td></tr><tr><td>17</td><td>LVDSA_CLK</td><td>Data Positive Output</td><td rowspan="2">Clk</td><td rowspan="10">Channel 1</td></tr><tr><td>18</td><td>/LVDSA_CLK</td><td>Data Negative Output</td></tr><tr><td>19</td><td>LVDSA_DATA3</td><td>Data Positive Output</td><td rowspan="2">3</td></tr><tr><td>20</td><td>/LVDSA_DATA3</td><td>Data Negative Output</td></tr><tr><td>21</td><td>LVDSA_DATA2</td><td>Data Positive Output</td><td rowspan="2">2</td></tr><tr><td>22</td><td>/LVDSA_DATA2</td><td>Data Negative Output</td></tr><tr><td>23</td><td>LVDSA_DATA1</td><td>Data Positive Output</td><td rowspan="2">1</td></tr><tr><td>24</td><td>/LVDSA_DATA1</td><td>Data Negative Output</td></tr><tr><td>25</td><td>LVDSA_DATA0</td><td>Data Positive Output</td><td rowspan="2">0</td></tr><tr><td>26</td><td>/LVDSA_DATA0</td><td>Data Negative Output</td></tr><tr><td>27</td><td>DDC_CLK</td><td>Display Channel Clock</td><td></td><td></td></tr><tr><td>28</td><td>DDC_DATA</td><td>Display Channel Data</td><td></td><td></td></tr><tr><td>29</td><td>LBKLT_EN</td><td colspan="3">Backlight Enable, if supported.</td></tr><tr><td>30</td><td>NC</td><td>Not connected</td><td></td><td></td></tr></table>

Note: The shaded area denotes power or ground.

# PanelLink (for DVI interface)

The PanelLink header provides TMDS signals for a DVI (Digital Visual Interface) interface and uses 16- pins, 2 rows, odd/even (1, 2) with 2 mm pin spacing.

Table 3-19. PanelLink Pin/Signal Descriptions [for DVI] (J26)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>TDC2_P</td><td>TMDS Data 2 Positive</td></tr><tr><td>2</td><td>VCC5</td><td>+5 Volt Power</td></tr><tr><td>3</td><td>TDC2_N</td><td>TMDS Data 2 Negative</td></tr><tr><td>4</td><td>HPDET</td><td>Hot Plug Detect</td></tr><tr><td>5</td><td>TDC1_P</td><td>TMDS Data 1 Positive</td></tr><tr><td>6</td><td>GND</td><td>Digital Ground</td></tr><tr><td>7</td><td>TDC1_N</td><td>TMDS Data 1 Negative</td></tr><tr><td>8</td><td>GND</td><td>Digital Ground</td></tr><tr><td>9</td><td>TDC0_P</td><td>TMDS Data 0 Positive</td></tr><tr><td>10</td><td>SDADDC</td><td>DDC Data</td></tr><tr><td>11</td><td>TDC0_N</td><td>TMDS Data 0 Negative</td></tr><tr><td>12</td><td>SCLDDC</td><td>DDC Clock</td></tr><tr><td>13</td><td>TLC_P</td><td>TMDS Clock Positive</td></tr><tr><td>14</td><td>GND</td><td>Digital Ground</td></tr><tr><td>15</td><td>TLC_N</td><td>TMDS Clock Negative</td></tr><tr><td>16</td><td>GND</td><td>Digital Ground</td></tr></table>

Note: The shaded area denotes power or ground.

# TV-OUT

The TV-OUT interface is a 6-pin, 2.54 mm header using 2 rows, odd/even (1, 2) for TV-Out signals.

Table 3-20. TV-Out Header (J12)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>TV_Pb</td><td>Chrominance analog signal</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>TV_Y</td><td>Luminance analog signal</td></tr><tr><td>4</td><td>GND</td><td>Ground</td></tr><tr><td>5</td><td>TV_Pr</td><td>Chrominance analog signal</td></tr><tr><td>6</td><td>GND</td><td>Ground</td></tr></table>

# Miscellaneous (Front Panel) Interface

The miscellaneous header is a 16-pin, 2 mm interface using 2 rows, odd/even (1, 2) for miscellaneous, Front Panel functions.

Table 3-21. Miscellaneous (Front Panel) Header (J34)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>+5V CONN</td><td>+5 volts</td></tr><tr><td>2</td><td>IDE LED_R</td><td>IDE LED signals</td></tr><tr><td>3</td><td>+5V CONN</td><td>+5v</td></tr><tr><td>4</td><td>IDE LED</td><td>IDE LED signals</td></tr><tr><td>5</td><td>GND</td><td>Ground</td></tr><tr><td>6</td><td>/PWRBTN</td><td>Power Button</td></tr><tr><td>7</td><td>+5V CONN</td><td>+5 volts</td></tr><tr><td>8</td><td>GND</td><td>Ground</td></tr><tr><td>9</td><td>NC</td><td>Not connected</td></tr><tr><td>10</td><td>/SYS_RESET</td><td>System Reset</td></tr><tr><td>11</td><td>NC</td><td>Not Connected</td></tr><tr><td>12</td><td>GND</td><td>Ground</td></tr><tr><td>13</td><td>SPEAKER</td><td>Speaker</td></tr><tr><td>14, 15, 16</td><td>NC</td><td>Not Connected</td></tr></table>

Note: The shaded area denotes power or ground. The signals marked with \* = Negative true logic.

# GPIO

The COM Express Baseboard provides GPIO (General Purpose I/O) pins for custom use through the COM Express C-D connector. The GPIO header is a 10-pin, 2mm interface using a 2 row, odd/even (1, 2) pin sequence.

Table 3-22. User GPIO Signals Pin/Signal Descriptions (J36)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>+3.3V</td><td>+3.3 Volts Power</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>GPIO0</td><td>User defined</td></tr><tr><td>4</td><td>GPO0</td><td>User defined</td></tr><tr><td>5</td><td>GPI1</td><td>User defined</td></tr><tr><td>6</td><td>GPO1</td><td>User defined</td></tr><tr><td>7</td><td>GPI2</td><td>User defined</td></tr><tr><td>8</td><td>GPO2</td><td>User defined</td></tr><tr><td>9</td><td>GPI3</td><td>User defined</td></tr><tr><td>10</td><td>GPO3</td><td>User defined</td></tr></table>

Note: The shaded area denotes power or ground.

# ATX Power Supply Interface

The power supply interface, J8, uses a 24-pin connector for direct interface with a standard ATX power supply. The power supply interface provides +3.3V, +5V, and +12V to the baseboard. The COM Express modules require +12 volts for operation.

# System Management Bus

The System Management Bus (SMBus) addresses are based on components connected to the SMBus on the Ampro COM board.

Table 3-23 lists the SMBus pin/signals on 5-pins, 1 row, 2 mm pin spacing on the SMBus header (J14).

Table 3-23. SMBus Signals Pin/Signal Descriptions (J14)

<table><tr><td>Pin #</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>+VSMBUS</td><td>+5V</td></tr><tr><td>2</td><td>SMBCLK</td><td>SMBus Clock</td></tr><tr><td>3</td><td>SMBDATA</td><td>SMBus Data</td></tr><tr><td>4</td><td>/SMBALERT*</td><td>SMBus Alert</td></tr><tr><td>5</td><td>GND</td><td>Ground</td></tr></table>

Note: The shaded area denotes power or ground. The signals marked with \* = Negative true logic.

# Introduction

This section assumes the user is familiar with BIOS Setup and does not attempt to describe the inner workings of BIOS functions. Refer to the appropriate PC reference manuals for information about the onboard, ROM-BIOS software interface. If Ampro has added to or modified the standard functions, these functions will be described.

# Entering BIOS Setup (VGA Display)

To enter BIOS Setup using a VGA display for the COM Express Baseboard:

1. Turn on the monitor and the power supply to the COM Express Baseboard.
2. Start Setup by pressing the [Del] key, when the following message appears on the boot screen.

Press DEL to run Setup

# NOTE

If the setting for Memory Test is set to Fast, you may not see this prompt appear on screen if the monitor is too slow to display it on start up. If this happens, press the &lt;Del&gt; key early in the boot sequence to enter BIOS Setup.

3. Use the &lt;Enter&gt; key to select the screen menus listed in the Opening BIOS screen.
4. Follow the instructions at the bottom of each screen to navigate through the selections and modify any settings.

# Entering BIOS Setup (Remote Access)

Once you set up the BIOS Utility for Remote Access (serial console or console redirection) in VGA mode, entering the BIOS in the remote access mode is very similar to the method used when entering the BIOS with a VGA display.

1. Turn on the power supply to the COM Express Baseboard and access the BIOS Setup Utility in VGA mode.
2. Set the BIOS feature Remote Access to [Enabled] under the Advanced menu.
3. Accept the default options or make your own selections for the balance of the Remote Access fields and record your settings.
4. Ensure you select the type of remote serial terminal you will be using and record your selection.
5. Select Save Changes and Exit and then shut down the COM Express Baseboard.
6. Connect the remote serial terminal (or the PC with communications software) to the COM port you selected on the COM Express Baseboard using a Hot Cable or a standard null-modem serial cable.
7. Turn on the remote serial terminal (or the PC with communications software) and set it to the settings you selected and recorded earlier in the BIOS Setup Utility.

COM1, 115200, 8 bits, 1 stop bit, no parity, no flow control, and [Always] for Redirection After BIOS POST are the default settings for the COM Express Baseboard.

8. Restore power to the COM Express Baseboard and look for the screen prompt shown below.

Press ^C to run SETUP

9. Press the CTRL–C keys to enter Setup early in the boot sequence if Quick Boot is set to [Enabled].

If Quick Boot is set to [Enabled], you may never see the screen prompt.

10. Use the &lt;Enter&gt; key to select the screen menus listed in the Opening BIOS screen.

NOTE The serial console port is not hardware protected, and is not listed in the COM table within BIOS Setup Utility. Diagnostic software that probes hardware addresses may cause a loss or failure of the serial console functions.

# Logo Screen Utility (Splash Screen)

The COM Express Baseboard BIOS supports a graphical logo utility, which can be customized by the user and displayed on screen when enabled through the BIOS Setup Utility. The graphical image can be a company logo or any custom image the user wants to display during the boot process. The custom image can be displayed as the first image displayed on screen during the boot process and remain there, depending on the options selected in BIOS Setup, while the OS boots.

# Logo Screen Image Requirements

The user’s image may be customized with any image editing tool, and the system will automatically convert the image into an acceptable format to the tools (files and utilities) provided by Ampro.

The COM Express Baseboard OEM logo screen utility supports the following image formats:

Bitmap image
Exactly 640 x 480 pixels
Exactly 16 colors

NOTE For procedures on loading custom images, see the logo screen utility document available on the Ampro web site.

• Bitmap image
16-Color, 640x480 pixels
256-Color, 640x480 pixels
. JPG image
16-Color, 640x480 pixels
256-Color, 800x600 pixels
256-Color, 1024x768 pixels
• PCX image
♦ 256-Color, 640x480 pixels

• A file size of not larger than the sample image

NOTE For procedures on loading custom images, see the OEM Logo Utility document available on the Ampro web site.

Ampro Computers, Inc. provides a number of methods for contacting Technical Support listed in the Table A-1 below. Requests for support through the Ask an Expert are given the highest priority, and usually will be addressed within one working day.

Ampro Ask an Expert – This is a comprehensive support center designed to meet all your technical needs. This service is free and available 24 hours a day through the Ampro web site at http:// ampro.custhelp. This includes a searchable database of Frequently Asked Questions, which will help you with the common information requested by most customers. This is a good source of information to look at first for your technical solutions. However, you must register online if you wish to use the Ask a Question feature.
Personal Assistance – You may also request personal assistance by creating an Ask an Expert account and then going to the Ask a Question feature. Requests can be submitted 24 hours a day, 7 days a week. You will receive immediate confirmation that your request has been entered. Once you have submitted your request, you must log in to go to My Stuff area where you can check status, update your request, and access other features.
InfoCenter – This service is also free and available 24 hours a day at the Ampro web site at http:// www.ampro.com. However, you must sign up online before you can login to access this service.

The InfoCenter was created as a resource for embedded system developers to share Ampro's knowledge, insight, and expertise. This page contains links to White Papers, Specifications, and additional technical information.

Table A-1. Technical Support Contact Information

<table><tr><td>Method</td><td>Contact Information</td></tr><tr><td>Ask an Expert</td><td>http://ampro.custhelp.com</td></tr><tr><td>Web Site</td><td>http://www.ampro.com</td></tr><tr><td>Standard Mail</td><td>Ampro Computers, Incorporated5215 Hellyer AvenueSan Jose, CA 95138-1007, USA</td></tr></table>
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