# COM-HPC Server Base User’s Guide ![Close-up of a black printed circuit board with various electronic components and connectors (no readable text or symbols)](.com-hpc-server-base-manual-50m-77106-1000-10-230720/e7e104affcf2997afc4fd107cbc7c03abbbacd1736c340b9588157acfae9b3c9.jpg) Revision History

Revision	Description	Date	Author
1.0	Initial release	2023-07-20	CC

# Preface # Disclaimer Information in this document is provided in connection with ADLINK products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in ADLINK´s Terms and Conditions of Sale for such products, ADLINK assumes no liability whatsoever, and ADLINK disclaims any express or implied warranty, relating to sale and/or use of ADLINK products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. If you intend to use ADLINK products in or as medical devices, you are solely responsible for all required regulatory compliance, including, without limitation, Title 21 of the CFR (US), Directive 2007/47/EC (EU), and ISO 13485 & 14971, if any. ADLINK may make changes to specifications and product descriptions at any time, without notice. # Environmental Responsibility ADLINK is committed to fulfil its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company. ![The image features a yellow triangle with a thick black border. Inside the triangle is a black exclamation point.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/6e8417c37c6e0aba6fbf81e573cc40a23b52581afea9882a568cea22e3979a06.jpg) California Proposition 65 Warning: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3- dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov. ![The image displays a black and white graphic featuring a wastebasket with a lid and two wheels at the bottom. A large, black 'X' is superimposed over the wastebasket, indicating it should not be thrown away in general waste. Below this symbol, there is a solid black rectangular block. There is no other text visible.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/98bdc29db29a1bd5da92d6d389f46f238ba8785fdeadf8d0dc1c26d69c36aa00.jpg) # Trademarks Product names mentioned herein are used for identification purposes only and may be trademarks / registered trademarks of respective companies. # Copyright © 2023 ADLINK Technology Incorporated This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. # Safety Instructions For user safety, please read and follow all Instructions, WARNINGs, CAUTIONs, and NOTEs marked in this manual and on the associated equipment before handling/operating the equipment. Read these safety instructions carefully. Keep this manual for future reference. • Read the specifications section of this manual for detailed information on the operating environment of this equipment. • Turn off power and unplug any power cords/cables when installing/mounting or un-installing/removing equipment. • To avoid electrical shock and/or damage to equipment: Keep equipment away from water or liquid sources; Keep equipment away from high heat or high humidity; • Keep equipment properly ventilated (do not block or cover ventilation openings); • Make sure to use recommended voltage and power source settings; • Always install and operate equipment near an easily accessible electrical socket outlet; • Secure the power cord (do not place any object on/over the power cord); • Only install/attach and operate equipment on stable surfaces and/or recommended mountings; • If the equipment will not be used for long periods of time, turn off the power source and unplug the equipment. # Conventions The following conventions may be used throughout this manual, denoting special levels of information ![The image displays a red icon resembling a document or file. It features a thick red border forming a rounded square, with the bottom-right corner folded inward. Inside the white central area, there are two horizontal red lines centered one above the other.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/73f0210fbff7fe4fdf17c19197cd5e902db0d2c7d466b0fff91f49a23b2716b7.jpg) Note: This information adds clarity or specifics to text and illustrations. ![The image displays a standard warning symbol: a yellow triangle with rounded corners pointing upward, containing a black exclamation mark in the center.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/f9eddd42e617b6d87f0f13b7e04e3e5c99defe98941652be9257f5d2fe372e2b.jpg) Caution: This information indicates the possibility of minor physical injury, component damage, data loss, and/or program corruption. ![A red triangular warning sign featuring a white exclamation point in the center.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/865a7caa8b2e66244ee072fd697fe73ed73d284233e2ba68edf4d287ec0f40c1.jpg) Warning: This information warns of possible serious physical injury, component damage, data loss, and/or program corruption. # Getting Service Ask an Expert: https://www.adlinktech.com/en/Askanexpert # ADLINK Technology, Inc. No. 66, Huaya 1st Rd., Guishan District, Taoyuan City 333411, Taiwan Tel: +886-3-216-5088 Fax: +886-3-328-5706 Email: service@adlinktech.com # Ampro ADLINK Technology, Inc. 6450 Via Del Oro, San Jose, CA 95119-1208, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-600-1189 Email: info@adlinktech.com # ADLINK Technology (China) Co., Ltd. 300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area, Shanghai, 201203, China Tel: +86-21-5132-8988 Fax: +86-21-5132-3588 Email: market@adlinktech.com # ADLINK Technology GmbH Hans-Thoma-Strasse 11, D-68163 Mannheim, Germany Tel: +49-621-43214-0 Fax: +49-621 43214-30 Email: emea@adlinktech.com Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you. # Table of Contents Revision History .. Preface . 1. Introduction .. .10 2. Special Features...... ..11 2.1. Three PCI Express x16.... 11 2.2. Out-of-Band Management.. ..12 2.3. High Speed Ethernet Expansion .... ..13 3. Component Location....... ..14 4. Functional Diagram... .15 5. Mechanical Dimension... .16 6. Connectors and Pinouts... .17 6.1. Carrier Board Signals — Server Type... ..17 6.2. Connector Location and Pinout Compatibility.. ..18 6.3. Carrier Board Design .. ..19 6.4. COM-HPC Board-to-board Connectors .. ..19 6.5. PCIe x16 Connectors.. ..25 6.6. PCIe x4 Connector .. ..26 6.7. KEY-M Slot Connector... ..27 6.8. USB2.0 Ports Header... ..28 6.9. USB3.x Ports Header... ..28 6.10. SATA Port... ..29 6.11. eSPI Debug Connector.. ..30 6.12. BMC Debug Connector... ..30 6.13. COM Port Connector..... ..31 6.14. I2C0/1 and SMBus Header .. ..32 6.15. GPIO Header... ..32 6.16. External SMBus Header . ..33 6.17. Fan Header .... ..33 6.18. General Purpose SPI Header... ..35 6.19. IPMI Header .. ..35 6.20. Front Panel Control. ... 36 6.21. Power Connectors . ... 37 6.22. Carrier EEPROM Address Switch .. ... 38 6.23. Module (I2C0) / BMC (I2C8) Jumpers.. ... 39 6.24. Other Jumpers... ... 39 6.25. Power Jumpers.. ... 40 7. Secondary BIOS .. ..42 8. Switches, POST and LEDs.. ..43 8.1. Switches (S0-S5) .. ... 43 8.2. POST and inductors LEDs.. ... 45 8.3. ATX Power Connectors . ... 46 8.4. AT Power Mode... ... 47 # List of Figures Figure 1 – Carrier top view... 11 Figure 2 – Component location ........... ...14 Figure 3 – Functional diagram.............. ..15 Figure 4 – Mechanical dimensions ..... ...16 Figure 5 – Carrier board signals, Server type pinout......... .17 Figure 6 – Connector location and pinout compatibility.......... ..18 # 1. Introduction ![The image shows a red, upward-pointing triangle containing a white exclamation point in its center, set against a white background.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/ac4aa0329c2ee201708c44dcc4cb25c31b91e49f3b94aafcdb9b6fa5cb3639be.jpg) Warning: This is an EA (early available) engineering manual. The contents may not accurately reflect the actual or final version of this product. The COM-HPC modular approach of custom carrier combined with off-the-shelf system cores relives developers and manufacturers the need to design their own system core, thereby not only accelerating their proof of concept significantly but also empowers them to upgrade to later generation processors without redesign. The COM-HPC concept reduces engineering complexity, lowers the threshold for total project quantity, and last but not least brings your product to the market in no time. The average time to design a carrier board is less than half the time of a full custom board. The COM-HPC Server Base, based on PICMG COM-HPC R1.0, is an Extended ATX size carrier board, supplied by ATX and AT power source through 24+8 power connector. Together with the COM-HPC Server Type module of your choice and off-the-shelf add-on cards, you can quickly emulate the functionality of your desired end product for software development and hardware verification. To build a functional prototype of your target system you will need: COM-HPC Server Type module COM-HPC Server Base carrier PCI Express-based storage or SATA storage (SATA storage solutions are dependent on module specifications) The COM-HPC Server Base is compatible with Size E and Size D COM-HPC Server Type modules and may accommodate: 1x Remote management IPMI BMC and pin header for IPMB 3x PCI Express x16 slot, 2x PCI Express x4 slots, and 2x M.2 M-key connector OCP connectors for dedicated OCP 10GbE Mezzanines 1x VGA, 1x general purpose LAN, 1x remote management LAN, 4x USB 3.0/2.0, 1x DB-9 COM port (at rear I/O) 1x USB connector (2-in-1), 2x USB 10 pin header (2-in-1) for front panel # 2. Special Features # 2.1. Three PCI Express x16 Maximum 2x FHFL PCI Express cards at PCIE16-31 slot and PCIE32-47 slot, and 1x FHHL PCI Express card at PCIE48-63 slot PCIE16-31 and PCIE32-47 slots can accommodate up to 2-slot-width PCI Express cards, in the condition of not using PCIE4-7 slot ![J1\nJ2\nPCIE16-31\nPCIE32-47\nPCIE4-7\nPCIE48-63\nCOM+PC](.com-hpc-server-base-manual-50m-77106-1000-10-230720/cb1d5cfa6ca96c451d5b74fd59d28b9ebba8468c0db3f6df6a680f44bdf08934.jpg) Figure 1 – Carrier top view # 2.2. Out-of-Band Management Out-of-band (OOB) management features, such as firmware update, power and reset control, performance monitoring and more, are defined by PICMG COM-HPC specifications. The management architecture is divided into BMC (Board Management Controller, also called IPMI BMC or Carrier BMC) and MMC (Module Management Controller). As defined, BMC is located on the COM-HPC carrier, while MMC is located on the COM-HPC module. Carrier BMC communicates with MMC through IPMB interface, an I2 C interface with IPMI protocol support. ![Close-up of a computer motherboard with visible components and a 'Rem' annotation (no readable text or symbols beyond label)](.com-hpc-server-base-manual-50m-77106-1000-10-230720/12e0aa61bd73672f199692ca8075ed098c609af72f249386b130bbd6eda250da.jpg) # note/Local Managementby scenario ·IPMI BMC Dedicate Ethernet forremote,VGAand COM portfor local ![The image displays a red-outlined icon of a document or piece of paper with a folded top-right corner. Inside the white area, there are two horizontal red lines stacked vertically, resembling an equals sign. This is a standard graphic symbol often used to represent a text file or document.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/658b2b12dae0d53305fabdef9be12426ff04c7447e30c46016f24f031abb1a32.jpg) Note: OOB management support and features are dependent on the module used. # 2.3. High Speed Ethernet Expansion The high-speed Ethernet MACs are located on the COM-HPC module used. The PHY is (if used) located on the COM-HPC carrier as defined by PICMG COM-HPC specifications. PHY may vary due to the silicon platform or Ethernet controller used, thus a connector-style design instead of a PHY chip on carrier is adopted for further expansion purposes. OCP connector is adopted and supports dedicated OCP mezzanine card (by choice). ![Close-up of a computer motherboard with various electronic components and connectors (no visible text or symbols)](.com-hpc-server-base-manual-50m-77106-1000-10-230720/bc316cbc82ba836f2d5367dd39ec5b05cb7fc921ad04fa32f00404c66c17c7c0.jpg) # High Speed Ethernet Expansion by choice ·OCP style Optical or Copper 10GbE # 3. Component Location ![GP_SPI 12xGPIO\nSMB/I2C0,1 IPMI\nJP31\nJP32\nJP33\nJP35\nSW1\nBMC_DBG\nPWR_ON\n5VSB BMC_HB\nS3 WDT PCIE48-63\nPCIE4-7\nPCIE32-47\nPCIE0-3\nIPMI\nBMC\nA5T2500\nPCIE16-31\nJ2\nFAN_4\nFAN_5\nUSB6_7\nJP36\nCN35\nPWR_BTN\nUSB Hub\nUSB7206\nMEZZ_C\nMEZZ_B\nATX_8\nATX_24\nJ1\nRTC JP30 JP_S0 SATA0 SATA1 JP_S1 BMC_BTN FAN_1 FAN_2 ESPI FAN_0 JP27 JP28 JP29 JP9 COM1 JP34 VGA_COM0](.com-hpc-server-base-manual-50m-77106-1000-10-230720/32ddc6d387796b934eba9198ce7dc462c56529178314e49de44692a67af36903.jpg) Figure 2 – Component location # 4. Functional Diagram ![**Labeled Blocks:**\n* **OCP**\n* **AST2500 IPMI BMC**\n* **J1**\n* **J2**\n* **i210** (top and bottom instances)\n* **M.2 PCle x4** (two instances)\n* **PCIe x4** (two instances)\n* **FRU EEPROM**\n* **2x Thermal Sensor 4x System FAN**\n* **MUX** (three instances)\n* **USB 3.1 Gen2 Hub**\n* **LEDs PWR BTN**\n* **I2C to I/O Expander**\n* **Gen4 Clock Buffer** (two instances)\n* **BIOS Socket**\n* **SPI**\n* **10G SFI Re-timer SFI**\n* **10G KR/SFI MUX**\n* **BMC PCIe Clock**\n* **2x SATA**\n* **USB2.0_0, 1**\n* **USB3.1_0, 1**\n* **USB2.0_4, 5, 6, 7**\n* **1x Module FAN**\n* **IPMB** (two instances)\n* **10G KR**\n* **VGA Monitor**\n* **COM0**\n* **COM1**\n* **IB Management LAN**\n* **2x USB 3.0** (two instances)\n* **OB Management LAN**\n* **ATX Power IN AT Power IN**\n* **PCIe x16** (three instances)\n* **ETH_KR_CE1 sideband**\n* **SATA 2x**\n* **NBASE-T 0**\n* **USB2.0 8x**\n* **USB3 2x**\n* **ETH_KR 2x 4 (max. 25G/lane)**\n* **FAN(PWM#/TACH)**\n* **PCIe_REFCLK_LO**\n* **PCIe Lane 8-11**\n* **PCIe Lane 12-15**\n* **PCIe_REFCLK_HI**\n* **PCIe Lane 0-3**\n* **PCIe lane 4-7**\n* **BOOT SPI**\n* **BMC PCIe**\n* **eSPI**\n* **I2C 0/I2C 1**\n* **SMBus**\n* **UART0**\n* **UART1**\n* **USB4/3 2x**\n* **USB2.0_3, USB3.1_3**\n* **USB2.0_2, USB3.1_2**\n* **COM-HPC Server Base**\n\n**Connections:**\n* **OCP** connects to **i210**, **10G KR/SFI MUX**, **10G SFI Re-timer SFI**, **BMC PCIe Clock**, **VGA Monitor**, **IB Management LAN**, **2x USB 3.0**, and **ETH_KR_CE1 sideband** (via J2).\n* **AST2500 IPMI BMC** connects to **FRU EEPROM**, **2x Thermal Sensor 4x System FAN**, **MUX** (UART1), **MUX** (UART0), **SPI**, **BMC PCIe Clock**, **USB 3.1 Gen2 Hub**, **I2C_0**, **UART0**, and **UART1**.\n* **J1** connects to **2x SATA**, **i210** (via NBASE-T 0), **USB2.0_0, 1**, **USB3.1_0, 1**, **10G KR/SFI MUX** (via ETH_KR 2x 4), **1x Module FAN**, **IPMB**, **Gen4 Clock Buffer** (top), **M.2 PCle x4** (two instances), **Gen4 Clock Buffer** (bottom), **PCIe x4** (two instances), **SPI** (via BOOT SPI), **AST2500 IPMI BMC** (via multiple lines), and **USB 3.1 Gen2 Hub** (via USB4/3 2x).\n* **J2** connects to **OCP**, **PCIe x16** (three instances).\n* **USB 3.1 Gen2 Hub** connects to **USB2.0_3, USB3.1_3**, **USB2.0_2, USB3.1_2**, **I2C to I/O Expander**, and **LEDs PWR BTN**.\n* **2x USB 3.0** (bottom left instance) connects to **USB 3.1 Gen2 Hub**.\n* **OB Management LAN** connects to **i210** (bottom instance).\n* **10G KR/SFI MUX** connects to **10G KR**, which connects to **10G SFI Re-timer SFI**.\n* **SPI** connects to **BIOS Socket**, **MUX** (near BIOS), and **AST2500 IPMI BMC**.\n* **ATX Power IN AT Power IN** provides power input to the system.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/0679927327f4f0fe0bb1d93953437293a442e9b86ed02adced245dd67cb74d1d.jpg) Figure 3 – Functional diagram # 5. Mechanical Dimension ![| Component | Value |\n| --------- | ------ |\n| Display | 16.51 |\n| Computer | 0 |\n| Tablet | 118.67 |\n| Display | 119.29 |\n| Tablet | 124.46 |\n| Display | 135.12 |\n| Tablet | 190.72 |\n| Display | 221.09 |\n| Display | 271.29 |\n| Display | 281.94 |\n| Display | 288.29 |\n| Display | 39.48 |\n| Display | 50.15 |\n| Display | 92.65 |\n| Display | 107.04 |\n| Display | 127.04 |\n| Display | 154.94 |\n| Display | 163.04 |\n| Display | 173.18 |\n| Display | 227.33 |\n| Display | 233.18 |\n| Display | 243.04 |\n| Display | 279.04 |\n| Display | 299.04 |\n| Display | 312.42 |\n| Display | 312.42 |\n| Computer | 5.08 |\n| Tablet | 0 |\n| Display | 18.20 |\n| Tablet | 43.20 |\n| Display | 58.42 |\n| Display | 78.74 |\n| Display | 119.29 |\n| Display | 124.46 |\n| Display | 129.29 |\n| Display | 224.76 |\n| Display | 261.29 |\n| Display | 269.29 |\n| Display | 271.29 |\n| Display | 281.94 |\n| Display | 312.42 |\nThe chart displays the dimensions and component values of various electronic devices.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/a5611b3c2088bef736cf33eb4db69e388c998e0c85d40bb0b1290b0b9e0de685.jpg) Figure 4 – Mechanical dimensions ![The image displays a red-orange icon on a white background. It features a stylized representation of a document or page with a folded corner at the top right. Inside the document shape are three horizontal lines stacked vertically, resembling lines of text.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/13b24aa06d8b3bf1a07fa4767ed957c58e1bd6fccbf293bbc08fff22cf94accc.jpg) Note: All dimensions are shown in millimeters with a tolerance of ± 0.25mm unless otherwise noted. # 6. Connectors and Pinouts # 6.1. Carrier Board Signals — Server Type ![| Category | Label | Value |\n| -------- | ----- | ----- |\n| J2 (E/F/G/H) | ETH_KR CEI sideband | 48x (3x 16) |\n| J2 (E/F/G/H) | PCIe 48x | 48x (3x 16) |\n| J2 (E/F/G/H) | PCIe Target | - |\n| J2 (E/F/G/H) | RSVD | - |\n| J1 (A/B/C/D) | 12V 5Vsb | 12V |\n| J1 (A/B/C/D) | USB 2.0 8x | USB 2.0 |\n| J1 (A/B/C/D) | ETH_KR 2x 4 (max. 25G per lane) | 2x |\n| J1 (A/B/C/D) | USB 3.x upgrade | 2x |\n| J1 (A/B/C/D) | USB 4/3.x upgrade | 2x |\n| J1 (A/B/C/D) | eSPI | - |\n| J1 (A/B/C/D) | SATA 2x | - |\n| J1 (A/B/C/D) | IPMB & PCIe | - |\n| J1 (A/B/C/D) | PCIe 16x | - |\n| J1 (A/B/C/D) | NBASE-T max. 10G | - |](.com-hpc-server-base-manual-50m-77106-1000-10-230720/1a341af152791321066d62123b566a47eeb2cb1c7f9b36d31b487a7a4cdaf0d8.jpg) Figure 5 – Carrier board signals, Server type pinout # 6.2. Connector Location and Pinout Compatibility Connector positions and pinouts comply with pinout and signal descriptions within PICMG COM-HPC Carrier Design Guide R2. This document includes: descriptions of pinouts, signals, and mechanical characteristics of the COM-HPC specification. The COM-HPC Server Base carrier is compatible with COM-HPC modules in Size E and D form factor, Server Type pinout, COM-HPC Module Base Specification R1.0. ![pin H100\nJ2 upper side\npin E01\npin D100\nJ1 lower side\npin A01](.com-hpc-server-base-manual-50m-77106-1000-10-230720/dd90b2e63384e7667283dada3c28bd6669249b6eec78717aa8560b72d60cbdec.jpg) Figure 6 – Connector location and pinout compatibility # 6.3. Carrier Board Design COM-HPC Server Base follows the PICMG COM-HPC Carrier Design Guide where possible, and its design and schematic have been fully verified. It is recommend to utilize them as references for your carrier board design. COM-HPC Server Base schematics and mechanical files, as well as the CDG, can be downloaded from ADLINK COM’s webpage. # 6.4. COM-HPC Board-to-board Connectors Signals and Pinouts for COM-HPC Server Type (Size D & E)

Row A		Row B		Row C		Row D
A1	VCC	B1	VCC	C1	VCC	D1	VCC
A2	VCC	B2	PWRBTN#	C2	RSTBTN#	D2	VCC
A3	VCC	B3	VCC	C3	VCC	D3	VCC
A4	VCC	B4	THERMTRIP#	C4	CARRIER_HOT#	D4	VCC
A5	VCC	B5	VCC	C5	VCC	D5	VCC
A6	VCC	B6	TAMPER#	C6	VIN_PWR_OK	D6	VCC
A7	VCC	B7	VCC	C7	VCC	D7	VCC
A8	VCC	B8	SUS_S3#	C8	SUS_S4_S5#	D8	VCC
A9	VCC	B9	VCC	C9	VCC	D9	VCC
A10	GND	B10	WD_STROBE#	C10	GND	D10	WAKE0#
A11	BATLOW#	B11	WD_OUT	C11	FAN_PWMOUT	D11	WAKE1#
A12	PLTRST#	B12	GND	C12	FAN_TACHIN	D12	GND
A13	GND	B13	USB5-	C13	GND	D13	USB1-
A14	USB7-	B14	USB5+	C14	USB3-	D14	USB1+
A15	USB7+	B15	GND	C15	USB3+	D15	GND
A16	GND	B16	USB4-	C16	GND	D16	USB0-
A17	USB6-	B17	USB4+	C17	USB2-	D17	USB0+
A18	USB6+	B18	GND	C18	USB2+	D18	GND
A19	GND	B19	RSVD	C19	GND	D19	ETH0_RX-
A20	ETH4_RX-	B20	RSVD	C20	ETH0_TX-	D20	ETH0_RX+
A21	ETH4_RX+	B21	RSVD	C21	ETH0_TX+	D21	GND
A22	GND	B22	RSVD	C22	GND	D22	ETH1_RX-
A23	ETH5_RX-	B23	RSVD	C23	ETH1_TX-	D23	ETH1_RX+
A24	ETH5_RX+	B24	VCC_5V_SBY	C24	ETH1_TX+	D24	GND
A25	GND	B25	USB67_OC#	C25	GND	D25	ETH2_RX-
A26	ETH6_RX-	B26	USB45_OC#	C26	ETH2_TX-	D26	ETH2_RX+
A27	ETH6_RX+	B27	USB23_OC#	C27	ETH2_TX+	D27	GND
A28	GND	B28	USB01_OC#	C28	GND	D28	ETH3_RX-
A29	ETH7_RX-	B29	SML1_CLK	C29	ETH3_TX-	D29	ETH3_RX+
A30	ETH7_RX+	B30	SML1_DAT	C30	ETH3_TX+	D30	GND
A31	GND	B31	PMCALERT#	C31	GND	D31	USB3_SSTX-
A32	RSVD	B32	SML0_CLK	C32	USB3_SSRX-	D32	USB3_SSTX+
A33	RSVD	B33	SML0_DAT	C33	USB3_SSRX+	D33	GND
A34	GND	B34	USB_PD_ALERT#	C34	GND	D34	USB2_SSTX-
A35	ETH4_TX-	B35	USB_PD_I2C_CLK	C35	USB2_SSRX-	D35	USB2_SSTX+
A36	ETH4_TX+	B36	USB_PD_I2C_DAT	C36	USB2_SSRX+	D36	GND
A37	GND	B37	USB_RT_ENA	C37	GND	D37	USB1_SSTX0-
A38	ETH5_TX-	B38	USB1_LSRX	C38	USB1_SSRX0-	D38	USB1_SSTX0+
A39	ETH5_TX+	B39	USB1_LSTX	C39	USB1_SSRX0+	D39	GND
A40	GND	B40	USB0_LSRX	C40	GND	D40	USB1_SSTX1-
A41	ETH6_TX-	B41	USB0_LSTX	C41	USB1_SSRX1-	D41	USB1_SSTX1+
A42	ETH6_TX+	B42	GND	C42	USB1_SSRX1+	D42	GND
A43	GND	B43	USB0_AUX-	C43	GND	D43	USB0_SSTX0-
A44	ETH7_TX-	B44	USB0_AUX+	C44	USB0_SSRX0-	D44	USB0_SSTX0+
A45	ETH7_TX+	B45	RSVD	C45	USB0_SSRX0+	D45	GND
A46	GND	B46	RSVD	C46	GND	D46	USB0_SSTX1-
A47	USB1_AUX-	B47	VCC_BOOT_SPI	C47	USB0_SSRX1-	D47	USB0_SSTX1+
A48	USB1_AUX+	B48	BOOT_SPI_CS#	C48	USB0_SSRX1+	D48	GND
A49	GND	B49	BSEL0	C49	GND	D49	SATA0_RX-
A50	eSPI_IO0	B50	BSEL1	C50	BOOT_SPI_IO0	D50	SATA0_RX+
A51	eSPI_IO1	B51	BSEL2	C51	BOOT_SPI_IO1	D51	GND
A52	eSPI_IO2	B52	eSPI_ALERT0#	C52	BOOT_SPI_IO2	D52	SATA0_TX-
A53	eSPI_IO3	B53	eSPI_ALERT1#	C53	BOOT_SPI_IO3	D53	SATA0_TX+
A54	eSPI_CLK	B54	eSPI_CS0#	C54	BOOT_SPI_CLK	D54	GND
A55	GND	B55	eSPI_CS1#	C55	GND	D55	SATA1_RX-
A56	PCIe_CLKREQ0_LO#	B56	eSPI_RST#	C56	PCIe_REFCLK0_HI-	D56	SATA1_RX+
A57	PCIe_CLKREQ0_HI#	B57	GND	C57	PCIe_REFCLK0_HI+	D57	GND
A58	GND	B58	PCIe_BMC_RX-	C58	GND	D58	SATA1_TX-
A59	PCIe_BMC_TX-	B59	PCIe_BMC_RX+	C59	PCIe_REFCLK0_LO-	D59	SATA1_TX+
A60	PCIe_BMC_TX+	B60	GND	C60	PCIe_REFCLK0_LO+	D60	GND
A61	GND	B61	PCIe08_RX-	C61	GND	D61	PCIe00_TX-
A62	PCIe08_TX-	B62	PCIe08_RX+	C62	PCIe00_RX-	D62	PCIe00_TX+
A63	PCIe08_TX+	B63	GND	C63	PCIe00_RX+	D63	GND
A64	GND	B64	PCIe09_RX-	C64	GND	D64	PCIe01_TX-
A65	PCIe09_TX-	B65	PCIe09_RX+	C65	PCIe01_RX-	D65	PCIe01_TX+
A66	PCIe09_TX+	B66	GND	C66	PCIe01_RX+	D66	GND
A67	GND	B67	PCIe10_RX-	C67	GND	D67	PCIe02_TX-
A68	PCIe10_TX-	B68	PCIe10_RX+	C68	PCIe02_RX-	D68	PCIe02_TX+
A69	PCIe10_TX+	B69	GND	C69	PCIe02_RX+	D69	GND
A70	GND	B70	PCIe11_RX-	C70	GND	D70	PCIe03_TX-
A71	PCIe11_TX-	B71	PCIe11_RX+	C71	PCIe03_RX-	D71	PCIe03_TX+
A72	PCIe11_TX+	B72	GND	C72	PCIe03_RX+	D72	GND
A73	GND	B73	PCIe12_RX-	C73	GND	D73	PCIe04_TX-
A74	PCIe12_TX-	B74	PCIe12_RX+	C74	PCIe04_RX-	D74	PCIe04_TX+
A75	PCIe12_TX+	B75	GND	C75	PCIe04_RX+	D75	GND
A76	GND	B76	PCIe13_RX-	C76	GND	D76	PCIe05_TX-
A77	PCIe13_TX-	B77	PCIe13_RX+	C77	PCIe05_RX-	D77	PCIe05_TX+
A78	PCIe13_TX+	B78	GND	C78	PCIe05_RX+	D78	GND
A79	GND	B79	PCIe14_RX-	C79	GND	D79	PCIe06_TX-
A80	PCIe14_TX-	B80	PCIe14_RX+	C80	PCIe06_RX-	D80	PCIe06_TX+
A81	PCIe14_TX+	B81	GND	C81	PCIe06_RX+	D81	GND
A82	GND	B82	PCIe15_RX-	C82	GND	D82	PCIe07_TX-
A83	PCIe15_TX-	B83	PCIe15_RX+	C83	PCIe07_RX-	D83	PCIe07_TX+
A84	PCIe15_TX+	B84	GND	C84	PCIe07_RX+	D84	GND
A85	GND	B85	RSVD	C85	GND	D85	NBASET0_MD10-
A86	VCC_RTC	B86	RSMRST_OUT#	C86	SMB_CLK	D86	NBASET0_MD10+
A87	SUS_CLK	B87	UART1_TX	C87	SMB_DAT	D87	GND
A88	GPIO_00	B88	UART1_RX	C88	SMB_ALERT#	D88	NBASET0_MD11-
A89	GPIO_01	B89	UART1_RTS#	C89	UART0_TX	D89	NBASET0_MD11+
A90	GPIO_02	B90	UART1_CTS#	C90	UART0_RX	D90	GND
A91	GPIO_03	B91	IPMB_CLK	C91	UART0_RTS#	D91	NBASET0_MD12-
A92	GPIO_04	B92	IPMB_DAT	C92	UART0_CTS#	D92	NBASET0_MD12+
A93	GPIO_05	B93	GPSPI_MOSI	C93	I2C0_CLK	D93	GND
A94	GPIO_06	B94	GPSPI_MISO	C94	I2C0_DAT	D94	NBASET0_MD13-
A95	GPIO_07	B95	GPSPI_CS0#	C95	I2C0_ALERT#	D95	NBASET0_MD13+
A96	GPIO_08	B96	GPSPI_CS1#	C96	I2C1_CLK	D96	GND
A97	GPIO_09	B97	GPSP1_CS2#	C97	I2C1_DAT	D97	NBASET0_LINK_MAX#
A98	GPIO_10	B98	GPSP1_CS3#	C98	NBASET0_SDP	D98	NBASET0_LINK_MID#
A99	GPIO_11	B99	GPSP1_CLK	C99	NBASET0_CTREF	D99	NBASET0_LINK_ACT#
A100	TYPE0	B100	GPSP1_ALERT#	C100	TYPE1	D100	TYPE2

Row E		Row F		Row G		Row H
E1	RAPID_SHUTDOWN	F1	ETH2_SDP	G1	VCC_5V_SBY	H1	RSVD
E2	GND	F2	ETH3_SDP	G2	RSVD	H2	RSVD
E3	RSVD	F3	ETH4_SDP	G3	RSVD	H3	RSVD
E4	RSVD	F4	ETH5_SDP	G4	RSVD	H4	RSVD
E5	GND	F5	ETH6_SDP	G5	RSVD	H5	RSVD
E6	RSVD	F6	ETH7_SDP	G6	RSVD	H6	RSVD
E7	RSVD	F7	ETH4-7_I2C_CLK	G7	RSVD	H7	RSVD
E8	GND	F8	ETH4-7_I2C_DAT	G8	RSVD	H8	RSVD
E9	RSVD	F9	ETH4-7_INT#	G9	RSVD	H9	RSVD
E10	RSVD	F10	ETH4-7_MDIO_CLK	G10	RSVD	H10	RSVD
E11	GND	F11	ETH4-7_MDIO_DAT	G11	RSVD	H11	RSVD
E12	RSVD	F12	ETH4-7_PHY_INT#	G12	RSVD	H12	RSVD
E13	RSVD	F13	ETH4-7_PHY_RST#	G13	RSVD	H13	RSVD
E14	GND	F14	ETH4-7_PRSNT#	G14	GND	H14	RSVD
E15	RSVD	F15	RSVD	G15	RSVD	H15	RSVD
E16	RSVD	F16	RSVD	G16	RSVD	H16	RSVD
E17	GND	F17	RSVD	G17	RSVD	H17	RSVD
E18	RSVD	F18	RSVD	G18	RSVD	H18	RSVD
E19	RSVD	F19	GND	G19	RSVD	H19	GND
E20	GND	F20	PCIe32_RX-	G20	GND	H20	PCIe40_TX-
E21	PCIe32_TX-	F21	PCIe32_RX+	G21	PCIe40_RX-	H21	PCIe40_TX+
E22	PCIe32_TX+	F22	GND	G22	PCIe40_RX+	H22	GND
E23	GND	F23	PCIe33_RX-	G23	GND	H23	PCIe41_TX-
E24	PCIe33_TX-	F24	PCIe33_RX+	G24	PCIe41_RX-	H24	PCIe41_TX+
E25	PCIe33_TX+	F25	GND	G25	PCIe41_RX+	H25	GND
E26	GND	F26	PCIe34_RX-	G26	GND	H26	PCIe42_TX-
E27	PCIe34_TX-	F27	PCIe34_RX+	G27	PCIe42_RX-	H27	PCIe42_TX+
E28	PCIe34_TX+	F28	GND	G28	PCIe42_RX+	H28	GND
E29	GND	F29	PCIe35_RX-	G29	GND	H29	PCIe43_TX-
E30	PCIe35_TX-	F30	PCIe35_RX+	G30	PCIe43_RX-	H30	PCIe43_TX+
E31	PCIe35_TX+	F31	GND	G31	PCIe43_RX+	H31	GND
E32	GND	F32	PCIe36_RX-	G32	GND	H32	PCIe44_TX-
E33	PCIe36_TX-	F33	PCIe36_RX+	G33	PCIe44_RX-	H33	PCIe44_TX+
E34	PCIe36_TX+	F34	GND	G34	PCIe44_RX+	H34	GND
E35	GND	F35	PCIe37_RX-	G35	GND	H35	PCIe45_TX-
E36	PCIe37_TX-	F36	PCIe37_RX+	G36	PCIe45_RX-	H36	PCIe45_TX+
E37	PCIe37_TX+	F37	GND	G37	PCIe45_RX+	H37	GND
E38	GND	F38	PCIe38_RX-	G38	GND	H38	PCIe46_TX-
E39	PCIe38_TX-	F39	PCIe38_RX+	G39	PCIe46_RX-	H39	PCIe46_TX+
E40	PCIe38_TX+	F40	GND	G40	PCIe46_RX+	H40	GND
E41	GND	F41	PCIe39_RX-	G41	GND	H41	PCIe47_TX-
E42	PCIe39_TX-	F42	PCIe39_RX+	G42	PCIe47_RX-	H42	PCIe47_TX+
E43	PCIe39_TX+	F43	GND	G43	PCIe47_RX+	H43	GND
E44	GND	F44	PCIe16_RX-	G44	GND	H44	PCIe24_TX-
E45	PCIe16_TX-	F45	PCIe16_RX+	G45	PCIe24_RX-	H45	PCIe24_TX+
E46	PCIe16_TX+	F46	GND	G46	PCIe24_RX+	H46	GND
E47	GND	F47	PCIe17_RX-	G47	GND	H47	PCIe25_TX-
E48	PCIe17_TX-	F48	PCIe17_RX+	G48	PCIe25_RX-	H48	PCIe25_TX+
E49	PCIe17_TX+	F49	GND	G49	PCIe25_RX+	H49	GND
E50	GND	F50	PCIe18_RX-	G50	GND	H50	PCIe26_TX-
E51	PCIe18_TX-	F51	PCIe18_RX+	G51	PCIe26_RX-	H51	PCIe26_TX+
E52	PCIe18_TX+	F52	GND	G52	PCIe26_RX+	H52	GND
E53	GND	F53	PCIe19_RX-	G53	GND	H53	PCIe27_TX-
E54	PCIe19_TX-	F54	PCIe19_RX+	G54	PCIe27_RX-	H54	PCIe27_TX+
E55	PCIe19_TX+	F55	GND	G55	PCIe27_RX+	H55	GND
E56	GND	F56	PCIe20_RX-	G56	GND	H56	PCIe28_TX-
E57	PCIe20_TX-	F57	PCIe20_RX+	G57	PCIe28_RX-	H57	PCIe28_TX+
E58	PCIe20_TX+	F58	GND	G58	PCIe28_RX+	H58	GND
E59	GND	F59	PCIe21_RX-	G59	GND	H59	PCIe29_TX-
E60	PCIe21_TX-	F60	PCIe21_RX+	G60	PCIe29_RX-	H60	PCIe29_TX+
E61	PCIe21_TX+	F61	GND	G61	PCIe29_RX+	H61	GND
E62	GND	F62	PCIe22_RX-	G62	GND	H62	PCIe30_TX-
E63	PCIe22_TX-	F63	PCIe22_RX+	G63	PCIe30_RX-	H63	PCIe30_TX+
E64	PCIe22_TX+	F64	GND	G64	PCIe30_RX+	H64	GND
E65	GND	F65	PCIe23_RX-	G65	GND	H65	PCIe31_TX-
E66	PCIe23_TX-	F66	PCIe23_RX+	G66	PCIe31_RX-	H66	PCIe31_TX+
E67	PCIe23_TX+	F67	GND	G67	PCIe31_RX+	H67	GND
E68	GND	F68	PCIe48_RX-	G68	GND	H68	PCIe56_TX-
E69	PCIe48_TX-	F69	PCIe48_RX+	G69	PCIe56_RX-	H69	PCIe56_TX+
E70	PCIe48_TX+	F70	GND	G70	PCIe56_RX+	H70	GND
E71	GND	F71	PCIe49_RX-	G71	GND	H71	PCIe57_TX-
E72	PCIe49_TX-	F72	PCIe49_RX+	G72	PCIe57_RX-	H72	PCIe57_TX+
E73	PCIe49_TX+	F73	GND	G73	PCIe57_RX+	H73	GND
E74	GND	F74	PCIe50_RX-	G74	GND	H74	PCIe58_TX-
E75	PCIe50_TX-	F75	PCIe50_RX+	G75	PCIe58_RX-	H75	PCIe58_TX+
E76	PCIe50_TX+	F76	GND	G76	PCIe58_RX+	H76	GND
E77	GND	F77	PCIe51_RX-	G77	GND	H77	PCIe59_TX-
E78	PCIe51_TX-	F78	PCIe51_RX+	G78	PCIe59_RX-	H78	PCIe59_TX+
E79	PCIe51_TX+	F79	GND	G79	PCIe59_RX+	H79	GND
E80	GND	F80	PCIe52_RX-	G80	GND	H80	PCIe60_TX-
E81	PCIe52_TX-	F81	PCIe52_RX+	G81	PCIe60_RX-	H81	PCIe60_TX+
E82	PCIe52_TX+	F82	GND	G82	PCIe60_RX+	H82	GND
E83	GND	F83	PCIe53_RX-	G83	GND	H83	PCIe61_TX-
E84	PCIe53_TX-	F84	PCIe53_RX+	G84	PCIe61_RX-	H84	PCIe61_TX+
E85	PCIe53_TX+	F85	GND	G85	PCIe61_RX+	H85	GND
E86	GND	F86	PCIe54_RX-	G86	GND	H86	PCIe62_TX-
E87	PCIe54_TX-	F87	PCIe54_RX+	G87	PCIe62_RX-	H87	PCIe62_TX+
E88	PCIe54_TX+	F88	GND	G88	PCIe62_RX+	H88	GND
E89	GND	F89	PCIe55_RX-	G89	GND	H89	PCIe63_TX-
E90	PCIe55_TX-	F90	PCIe55_RX+	G90	PCIe63_RX-	H90	PCIe63_TX+
E91	PCIe55_TX+	F91	GND	G91	PCIe63_RX+	H91	GND
E92	GND	F92	PCIe_REFCLK2-	G92	GND	H92	PCIe_REFCLKIN0-
E93	PCIe_REFCLK1-	F93	PCIe_REFCLK2+	G93	PCIe_REFCLK3-	H93	PCIe_REFCLKIN0+
E94	PCIe_REFCLK1+	F94	GND	G94	PCIe_REFCLK3+	H94	GND
E95	GND	F95	PCIe_CLKREQ3#	G95	GND	H95	PCIe_REFCLKIN1-
E96	PCIe_CLKREQ1#	F96	ETH0-3_PRSNT#	G96	ETH0-3_I2C_CLK	H96	PCIe_REFCLKIN1+
E97	PCIe_CLKREQ2#	F97	ETH0-3_PHY_RST#	G97	ETH0-3_I2C_DAT	H97	GND
E98	PCIe_CLKREQ_OUT0#	F98	ETH0_SDP	G98	ETH0-3_PHY_INT#	H98	ETH0-3_MDIO_CLK
E99	PCIe_CLKREQ_OUT1#	F99	ETH1_SDP	G99	ETH0-3_INT#	H99	ETH0-3_MDIO_DAT
E100	PCIe_PERST_IN0#	F100	PCIe_PERST_IN1#	G100	PCIe_WAKE_OUT0#	H100	PCIe_WAKE_OUT1#

# 6.5. PCIe x16 Connectors CN5: PCIe x16 Slot1: Group 1 Lanes 16:31 assigned PCIe Slot CN6: PCIe x16 Slot2: Group 2 Lanes 32:47 assigned PCIe Slot CN7: PCIe x16 Slot3: Group 3 Lanes 48:63 assigned PCIe Slot ![Pure electrical circuit lines without any symbols](.com-hpc-server-base-manual-50m-77106-1000-10-230720/6034a08097f79a5a88414bf51cbd78791785997982b9f667702d09fdab8fd151.jpg)

Pin	Signal	Pin	Signal
B1	+ 12V	A1	PRSNT
B2	+ 12V	A2	+ 12V
B3	+ 12V	A3	+ 12V
B4	GND	A4	GND
B5	SMB_CLK	A5	JTAG
B6	SMB_DAT	A6	JTAG
B7	GND	A7	JTAG
B8	+3.3V	A8	JTAG
B9	JTAG	A9	+ 3.3V
B10	+ 3.3VAUX	A10	+ 3.3V
B11	WAKE#	A11	PERST#
B12	RSVD	A12	GND
B13	GND	A13	REFCLK+
B14	PETp0	A14	REFCLK-
B15	PETn0	A15	GND
B16	GND	A16	PERp0
B17	PRSNT	A17	PERn0
B18	GND	A18	GND
B19	PETp1	A19	RSVD
B20	PETn1	A20	GND
B21	GND	A21	PERp1

Pin	Signal	Pin	Signal
B22	GND	A22	PERn1
B23	PETp2	A23	GND
B24	PETn2	A24	GND
B25	GND	A25	PERp2
B26	GND	A26	PERn2
B27	PETp3	A27	GND
B28	PETn3	A28	GND
B29	GND	A29	PERp3
B30	RSVD	A30	PERn3
B31	PRSNT	A31	GND
B32	GND	A32	RSVD
B33	PETp4	A33	RSVD
B34	PETn4	A34	GND
B35	GND	A35	PERp4
B36	GND	A36	PERn4
B37	PETp5	A37	GND
B38	PETn5	A38	GND
B39	GND	A39	PERp5
B40	GND	A40	PERn5
B41	PETp6	A41	GND
B42	PETn6	A42	GND

Pin	Signal	Pin	Signal
B43	GND	A43	PERp6
B44	GND	A44	PERn6
B45	PETp7	A45	GND
B46	PETn7	A46	GND
B47	GND	A47	PERp7
B48	PRSNT	A48	PERn7
B49	GND	A49	GND
B50	PETp8	A50	RSVD
B51	PETn8	A51	GND
B52	GND	A52	PERp8
B53	GND	A53	PERn8
B54	PETp9	A54	GND
B55	PETn9	A55	GND
B56	GND	A56	PERp9
B57	GND	A57	PERn9
B58	PETp10	A58	GND
B59	PETn10	A59	GND
B60	GND	A60	PERp10
B61	GND	A61	PERn10
B62	PETp11	A62	GND
B63	PETn11	A63	GND
B64	GND	A64	PERp11
B65	GND	A65	PERn11
B66	PETp12	A66	GND
B67	PETn12	A67	GND
B68	GND	A68	PERp12
B69	GND	A69	PERn12
B70	PETp13	A70	GND

Pin	Signal	Pin	Signal
B71	PETn13	A71	GND
B72	GND	A72	PERp13
B73	GND	A73	PERn13
B74	PETp14	A74	GND
B75	PETn14	A75	GND
B76	GND	A76	PERp14
B77	GND	A77	PERn14

Pin	Signal	Pin	Signal
B78	PETp15	A78	GND
B79	PETn15	A79	GND
B80	GND	A80	PERp15
B81	PRSNT	A81	PERn15
B82	RSVD	A82	GND

# 6.6. PCIe x4 Connector PCIEA1: PCIe x4 Slot: Group 0 Lanes 0:3 assigned PCIe Slot PCIEA2: PCIe x4 Slot: Group 0 Lanes 4:7 assigned PCIe Slot ![The image displays a horizontal, rectangular device, resembling a server chassis or storage array. It has a dark front panel featuring two large upper rectangular sections and a narrower lower section, all filled with vertical parallel lines suggesting ventilation slots or drive bays. A lighter grey vertical panel is located on the far left edge. Along the bottom edge, six small, light grey oval shapes are spaced evenly, representing feet. There is no text in the image.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/54141b3131ed3addc10cdf1b3da13919b82f334c9105fa15a96eeba2caa35542.jpg)

Pin	Signal	Pin	Signal
B1	+12V	A1	PRSNT
B2	+12V	A2	+12V
B3	+12V	A3	+12V
B4	GND	A4	GND
B5	SMB_CLK	A5	JTAG
B6	SMB_DAT	A6	JTAG
B7	GND	A7	JTAG
B8	+3.3V	A8	JTAG
B9	JTAG	A9	+3.3V
B10	+3.3VAUX	A10	+3.3V
B11	WAKE	A11	PERST#

Pin	Signal	Pin	Signal
B12	RSVD	A12	GND
B13	GND	A13	REFCLK+
B14	PETp0	A14	REFCLK-
B15	PETn0	A15	GND
B16	GND	A16	PERp0
B17	PRSNT	A17	PERn0
B18	GND	A18	GND
B19	PETp1	A19	RSVD
B20	PETn1	A20	GND
B21	GND	A21	PERp1
B22	GND	A22	PERn1

Pin	Signal	Pin	Signal
B23	PETp2	A23	GND
B24	PETn2	A24	GND
B25	GND	A25	PERp2
B26	GND	A26	PERn2
B27	PETp3	A27	GND
B28	PETn3	A28	GND
B29	GND	A29	PERp3
B30	RSVD	A30	PERn3
B31	PRSNT	A31	GND
B32	GND	A32	RSVD

# 6.7. KEY-M Slot Connector M2\_0: Group 0 Lanes 8-11 assigned M.2 Slot 1 M2\_1: Group 0 Lanes 12-15 assigned M.2 Slot 2 ![The image displays a vertical, black rectangular label featuring the white text 'M.2' printed vertically along its length.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/845abfa0e04f291626ef3148ff4f48afc0b5eb1e12a5376912d888b36678bb28.jpg)

Pin	Signal	Pin	Signal
1	CONFIG	2	+3.3V
3	GND	4	+3.3V
5	PERn3	6	N.C
7	PERp3	8	N.C
9	GND	10	DAS/DSS#
11	PETn3	12	+3.3V
13	PETp3	14	+3.3V
15	GND	16	+3.3V
17	PERn2	18	+3.3V
19	PERp2	20	N.C
21	CONFIG	22	N.C
23	PETn2	24	N.C

Pin	Signal	Pin	Signal
25	PETp2	26	N.C
27	GND	28	N.C
29	PERn1	30	N.C
31	PERp1	32	N.C
33	GND	34	N.C
35	PETn1	36	N.C
37	PETp1	38	DEVSLP
39	GND	40	N.C
41	PERn0	42	N.C
43	PERp0	44	N.C
45	GND	46	N.C
47	PETn0	48	N.C

Pin	Signal	Pin	Signal
49	PETp0	50	PETST#
51	GND	52	CLKREQ#
53	REFCLKN	54	PEWAKE#
55	REFCLKP	56	N.C
57	GND	58	N.C

67	N.C	68	SUSCLK
69	CONFIG	70	+3.3V
71	GND	72	+3.3V
73	GND	74	+3.3V
75	CONFIG

# 6.8. USB2.0 Ports Header USB4\_5: USB2.0 Port 4 and Port 5 header USB6\_7: USB2.0 Port 6 and Port 7 header

Pin	Signal
1	+5V	2	+5V
3	U2_USB_R_N	4	U2_USB_R_N
5	U2_USB_R_P	6	U2_USB_R_P
7	GND	8	GND
9	GND	10	NC

![A vertical column of six rounded rectangular shapes. The topmost shape contains a small square inside a square. The remaining five shapes each contain a small circle.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/17f77624e0fcc354952cd3c63cd9dfff0c45202bcb304225ae7e9d6ddca76c6a.jpg) # 6.9. USB3.x Ports Header FP\_USB: USB Front Panel Header

Pin	Signal
1	TP336	2	USB_DS3_DP_CN
3	USB2_P_CN	4	USB_DS3_DN_CN
5	USB2_N_CN	6	GND
7	GND	8	USB_SSTX5_P_CN
9	USB_SSTX4_P_CN	10	USB_SSTX5_N_CN
11	USB_SSTX4_N_CN	12	GND
13	GND	14	USB_SSRX5_P_CN
15	USB_SSRX4_P_CN	16	USB_SSRX5_N_CN
17	USB_SSRX4_N_CN	18	USB_VBUS
19	+5V

![The image displays a vertical black rectangular strip containing white circular dots arranged in columns. From left to right, the sequence consists of a single white dot, a vertical black separator, eight columns of two vertically aligned white dots, a vertical black separator, and two single vertically aligned white dots.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/6368ebb7594bda05b3224bfe2213960e6a7099d480cbc2e36b975c8832000d76.jpg) # 6.10. SATA Port SATA0/SATA1: Serial ATA Port

Pin	Signal
1	GND
2	TX_P
3	TX_N
4	GND
5	RX_P
6	RX_N
7	SATA0_P7

![The image shows a horizontal grey rectangular object with a black outline. Inside the object, there is a dark grey horizontal rectangle near the top center. Below that is a row of seven dark grey vertical rectangles. On the far left and far right sides, there are white circles.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/7d3bfb4f77072a671eff8be83317ddd860ad5cb773f46d12b53f5a295cda779e.jpg) JP\_S0/JP\_S1: Voltage supply switching for +3.3V or 5V for SATA DOM.

Pin	Status
1-2	+3.3V for SATA
2-3	+5V for SATA
NC	Default

![The image displays a vertical column of numbers on the left: '1', '2', and '3'. To the right of each number is a grey circle. Inside the top circle (aligned with '1') is a black square. Inside the middle circle (aligned with '2') is a white square. Inside the bottom circle (aligned with '3') is a white square.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/34dd8edf2b3237dbda7f73d4a296f1054deccbfc31e59e910833436519789d2d.jpg) # 6.11. eSPI Debug Connector ESPI: for eSPI debugging connection purpose

Pin	Signal	Pin	Signal
1	eSPI_CLK	2	GND
3	eSPI_CS0	4	eSPI_RST
5	RST_DBG_L	6	+5V
7	eSPI_IO_3	8	eSPI_IO_1
9	+ 3.3VSB	10	eSPI_IO_1
11	eSPI_IO_0	12	GND
13	SMB_CK	14	CN_SNB_DAT
15	BIOSRST	16	NC
17	GND	18	eSPI_CS1#
19	eSPI_ALEART0#	20	eSPI_ALEART1#

![This image displays a vertical column of twelve identical remote control buttons. Each button is a light gray, rounded rectangle (pill shape) with a black outline. Inside each button is a black icon consisting of a square centered within a larger square outline. The buttons are stacked vertically with small gaps between them against a plain, light background.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/d46f7c36d38644206f73c2c0a374c1a5de1b09a5087d546ea3283cab6f13f5df.jpg) # 6.12. BMC Debug Connector BMC\_DBG: UART5 for BMC firmware debugging

Pin	Signal
1	UART_DBG_TXD5
2	GND
3	UART_DBG_RXD5

![The image displays a vertical column of three identical light-grey, rounded rectangular shapes against a black background. Inside each grey shape is a centered white square with a black border, and within that white square is a smaller, solid black square.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/db6aee1bd06e4294ae0bf81ea1c4a5164440a4d44367183d6a462e65c11c8ae2.jpg) # 6.13. COM Port Connector COM1: the Module UART port1

Pin	Signal
1	CM1_DCD	2	CN1_DSR
3	SER1_RX	4	SER1_RTS_L
5	SER1_TX	6	SER1_CTS_L
7	CM1_DTR	8	CM1_RI
9	GND	10	NC

![The image displays a black rectangle with rounded corners set against a white background. Inside the black rectangle, there is a white pill-shaped outline at the top center. Below this outline, twelve white dots are arranged in a grid of three rows and four columns.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/fcac0742ed3d87ea225e9898f0eb1eeb38ca7fbaf07f26497fb6103ec5163055.jpg) JP9: MUX of Module UART1 or BMC UART SOL

Jumper	Status
1-2	BMC UART2 SOL <<<
2-3	Module’s UART1

![The image features a vertical column of black numbers '1', '2', and '3' on the left side. To the right is a grey rectangular outline containing three vertically stacked circles. The top circle contains a single black square in its center. The middle circle contains four small white squares arranged in a square pattern. The bottom circle is empty.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/bb9ad5bc1ac06d65ee0a74c009536519b4e35135c9994c813eda22127c3ce60e.jpg) JP34: MUX of Module UART0 or BMC UART1 (Console)

Jumper	Status
1-2	BMC UART1 Console
2-3	Module UART0 <<<

![The image displays a vertical column of numbers on the left reading 1, 2, and 3. To the right is a corresponding column of three gray circles. The top circle features a black square with a white center. The bottom two circles are enclosed within a thin rectangular outline and each contains a white square with a black center.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/a6b2bed5bae694e608d0ee31ade870eeaace75f9988a109dcf7c6a7a052d0e3c.jpg) # 6.14. I2C0/1 and SMBus Header CN23: Module outputs I2C0/1 and SMBus external header

Pin	Signal	Pin	Signal
1	+3.3V	2	+3.3V
3	SMB_CLK	4	I2C0_CLK
5	SMB_DAT	6	I2C0_DAT
7	+3.3V	8	I2C0_ALERT-L
9	I2C1_CLK	10	GND
11	I2C1_DAT	12	GND

![A horizontal row of six grey, rectangular light switch plates arranged against a white background. Each plate is labeled with a small number near the top, reading sequentially from 1 to 6 from left to right.\n\nFrom left to right:\n- The first switch (1) is toggled up (ON) with a white rectangular toggle.\n- The second switch (2) is toggled down (OFF) with a white rectangular toggle.\n- The third switch (3) is toggled up (ON) with a white rectangular toggle.\n- The fourth switch (4) is toggled down (OFF) with a white rectangular toggle.\n- The fifth switch (5) is toggled up (ON) with a white rectangular toggle.\n- The sixth switch (6) is toggled down (OFF) but features a black square toggle, distinct from the white toggles on the other switches.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/3e368aad456464e8bc078adcb1c4247eae37676d9479f3f14793eede39386214.jpg) # 6.15. GPIO Header CN24: Module outputs GPIO Header

Pin	Signal	Pin	Signal
1	+3.3V	2	GPIO_06
3	GPIO_00	4	GPIO_07
5	GPIO_01	6	GPIO_08
7	GPIO_02	8	GPIO_09
9	GPIO_03	10	GPIO_10
11	GPIO_04	12	GPIO_11
13	GPIO_05	14	GND

![The image displays a horizontal row of eight identical grey, capsule-shaped objects against a white background. Each capsule has a thick black outline and features three small black squares arranged in a vertical column in the center. There is no text in the image.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/452ab68eb8898b05da9b56e0c48fd248149fcb13dd6ba9796a20a4922e09efec.jpg) # 6.16. External SMBus Header CN35: External SMBus for connecting to the MUX of KR/SFI

Pin	Signal
1	GND
2	N.C
3	RT_SDC
4	RT_SDA

![The image displays four identical grey circles arranged horizontally in a row. Each circle has a black border and contains a smaller, lighter grey square in its center. There is no text present in the image.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/d112b55f6ce5c4b1388737cda873276fa142f85c8c11e06df921386674e1212a.jpg) # 6.17. Fan Header FAN\_0: Module controlled FAN

Pin	Signal
1	GND
2	+12V_5V_FAN
3	SENSE_FAN
4	PWMOUT_FAN

![The image displays a simple black-and-white line drawing of a refrigerator. On the left side, there is a door featuring a vertical handle. On the right side, a control panel is depicted, consisting of a square at the top followed by four smaller squares arranged vertically below it.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/a21b8de1db11523ce5e28e91b41fd834eaa183313a90c4177a3319113db54622.jpg) FAN\_1: BMC controlled FAN 1

Pin	Signal
1	GND
2	+12V_5V_FAN0
3	SENSE_FAN0
4	PWMOUT_FAN0

![The image displays a simple black and white line drawing resembling a schematic or block diagram. On the left side, two narrow vertical rectangles are positioned side-by-side. To their right, a larger section contains a vertical column of four squares. The top square features a small black square in its center, while the three squares beneath it are empty outlines. There is no text present in the image.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/7131c324eef826c85d7cabe35e2ada1764c6b4c08876293e59af99a96c78bad5.jpg) FAN\_2: BMC controlled FAN 2

Pin	Signal
1	GND
2	+12V_5V_FAN1
3	SENSE_FAN1
4	PWMOUT_FAN1

![This is a black-and-white line drawing depicting a schematic of a door. On the left side, a vertical rectangular frame is shown, containing a horizontal rectangle near the top and a long vertical rectangle below it. To the right is the main door panel, which features a vertical column of four small squares aligned near its left edge; the top square is filled in solid black, while the three squares below it are white outlines.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/205ba8faa2ab96f033481d808895ca04d4512b9fecf1502bda601f98836cac17.jpg) FAN\_4: BMC controlled FAN 4

Pin	Signal
1	GND
2	+12V_5V_FAN3
3	SENSE_FAN3
4	PWMOUT_FAN3

![The image is a black and white line drawing of a vertical rectangle. On the left side, there is a vertical assembly consisting of a small square at the top and long rectangular shapes below it. On the right side, there is a large area containing a vertical column of four small squares.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/06d69adabed69b0fef1c2682dde2f25edf111d70ed2fc5d54ffb3da490bc6ec1.jpg) FAN\_5: BMC controlled FAN 5

Pin	Signal
1	GND
2	+12V_5V_FAN4
3	SENSE_FAN4
4	PWMOUT_FAN4

![The image is a black and white line drawing depicting a vertical rectangular object divided into two main sections.\n\nOn the left side, there is a narrower vertical column containing three rectangular compartments stacked vertically: a small top rectangle, a larger middle rectangle, and a small bottom rectangle.\n\nOn the right side, there is a wider vertical column containing four small squares arranged in a vertical stack. The top square is filled solid black. The three squares below it are outlined and each contains a smaller solid black square in its center.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/7fbcc5d9f94b5554f67dde69b3be2bc4a67058560c2ef5415cceb913c8eff6bd.jpg) # 6.18. General Purpose SPI Header GP\_SPI: General Purpose SPI connector for widely used interfaces

Pin	Signal	Pin	Signal
1	+3.3V	2	NC
3	GP_SPI_CLK	4	GP_SPI_MOSI
5	GP_SPI_CS2	6	GP_SPI_MISO
7	GP_SPI_CS3	8	GP_SPI_CS0
9	GP_SPI_ALT	10	GP_SPI_CS1
11	NC	12	GND

![The image displays a horizontal row of eight rounded rectangular shapes. The first seven shapes from the left are identical, featuring a grey border, a light grey interior, and three small white circles arranged vertically within each. The eighth shape on the far right has a black border. Inside this final shape, the top element is a black-outlined square, while the middle and bottom elements are small white circles.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/2c28211b014577d0350681a3a605794ec325b2b78fbc6a7a4f30b4f0c2a0876d.jpg) # 6.19. IPMI Header IPMI: Intelligent Platform Management Bus for platform management functions

Pin	Signal
1	+3.3V
2	IPMB_DAT
3	IPMB_CLK
4	GND

![The image displays four grey circles with black outlines arranged in a horizontal row against a white background. Each circle contains a small black square in its center. A thin black line runs across the top edge of the image.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/fb53ba9ce8ec82c2a1850f2e254567c8f354b400f8bbca62316616317bc4eefb.jpg) # 6.20. Front Panel Control FRONT\_PANEL: Power Button, Reset Button, HDD LED, Power LED for front panel header

Pin	Signal	Pin	Signal
23	LAN2_LED_N	24	NMI_SW
21	LAN2_LED_P	22	GND
19	CASE_OPEN_N	20	R_UID_BUT_P
17	SENSOR_SCL	18	GND
15	SENSOR_SDA	16	RST_BUT_P
13	LAN1_LED_N	14	GND
11	LAN1_LED_P	12	PWR_BUT_P
9	SLED_R	10	HDD_LED_N
7	SLED_G	8	HDD_LED_P
5	UID_LED_P	6	PWR_LED_N
3	UID_LED_N	4	FAN_FAIL_LED_N
1	5VSB	2	PWR_LED_P

![A vertical column of ten grey buttons with rounded corners. Each button contains a small square on the left and a small circle on the right. The top nine buttons display white squares and white circles, while the bottom button displays a black square and a white circle.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/769e701e9299365acc13d7eeeeea55ff34ac87113933d85203b04b3059972d00.jpg) # 6.21. Power Connectors # ATX\_24: ATX 24-pin Power Connector Connect the ATX 24-pin (or 20-pin) connector to supply power to COM-HPC Server Base carrier.

Pin	Signal	Pin	Signal
1	+3.3V	13	+3.3V
2	+3.3V	14	-12V
3	GND	15	COM
4	+5V	16	PWR_ON
5	GND	17	COM
6	+5V	18	COM
7	GND	19	COM
8	PWR_GOOD	20	-5V
9	+5VSB	21	+5V
10	+12V	22	+5V
11	+12V	23	+5V
12	+3.3V	24	COM

![Simple line drawing of a vertical door with multiple compartments and a handle (no text or symbols)](.com-hpc-server-base-manual-50m-77106-1000-10-230720/54c2d0110f1080dbde319950247147d42ddda47a080b557f95a05ade666ce53b.jpg) # ATX\_8: ATX 12V 8-pin Connector. Connect the ATX 12V 8-pin connector to supply power to the COM-HPC Server module.

Pin	Signal
1	GND
2	GND
3	GND
4	GND
5	+12V
6	+12V
7	+12V
8	+12V

![The image is a black and white line drawing of a floor plan. It depicts a large rectangle divided into a grid of 12 smaller rectangular rooms arranged in three columns and four rows.\n\nInside each room is a semi-circle shape, likely representing a bed. The orientation of these shapes varies by column:\n* **Left Column:** The semi-circles in all four rooms have their flat sides against the right wall (curved side facing left).\n* **Middle Column:** The semi-circles in all four rooms have their flat sides against the left wall (curved side facing right).\n* **Right Column:** The semi-circles in the top, second, and bottom rooms have their flat sides against the left wall. However, the room in the third row from the top is different: its semi-circle has its flat side against the right wall. Additionally, this specific room features a small rectangular door on its left wall that opens into the adjacent room in the middle column.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/d2b0b02ea706bd7818f8b340d2bf2da6716d06e824965ac1aed2585c58cae050.jpg) # 6.22. Carrier EEPROM Address Switch SW1: COM-HPC Carrier Board EEPROM address setting Default Address: AEh

1	0	1	0	A2	A1	A0	R/W
MSB LSB

SW1	I2C EEPROM_U53
1-8	A2_OFF
2-7	A1_OFF
3-6	A0_OFF

![The image displays a black rectangular panel featuring four white slide switches arranged in a horizontal row. Above the switches, the text 'ON DIP' is printed in white capital letters. Below the switches, the numbers '1 2 3 4' are printed in white, corresponding to each switch from left to right. All four switches are currently in the upward position.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/fecf917642c727f0ccf1f31f128d4b8bc402d3583daf393ae74837bf0a6b4f17.jpg) # 6.23. Module (I2C0) / BMC (I2C8) Jumpers JP2: I2C CLK switch for I2C8 (BMC) or I2C0 (module)

Jumper	Status
1-2	I2C8, BMC
2-3	I2C0, Module

![The image displays the numbers 1, 2, and 3 arranged vertically on the left side. To the right of these numbers is a rectangular outline containing three grey circles stacked vertically. The top circle, aligned with the number 1, contains a small black square in its center. The middle circle, aligned with the number 2, also contains a small black square. The bottom circle, aligned with the number 3, is a solid grey circle without an inner shape.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/e68ac91e5e63f3704d7fa68484f4d736258958cfcccd8b01c5e34eb75a3ed816.jpg) JP3: I2C DAT switch for I2C8 (BMC) or I2C0 (module)

Jumper	Status
1-2	I2C8, BMC
2-3	I2C0, Module

![The image shows three rows. On the left, the numbers 1, 2, and 3 are listed vertically in black. On the right, corresponding to each number, is a vertical column of three grey circles. Inside the top circle is a small black square. Inside the middle circle is a small white square. Inside the bottom circle is a small grey square.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/f3e5f4562ecd42cc393511d1c6b15fd17d45e3d4a0629e946510ef8b8918ba9d.jpg) # 6.24. Other Jumpers JP27/28/29: BIOS Selection. Boot from SPI Secondary BIOS, see below for details. Setting Boot from Module BIOS

JP29	JP28	JP27	BOOT
1-2	1-2	1-2	Module BIOS <<<

![The image displays three vertical columns of black text and graphics on a white background. From left to right, the text reads 'JP29', 'JP28', and 'JP27'. The text is oriented vertically, reading downwards in each column. Below each text label is a graphic consisting of a square outline containing two vertically stacked grey circles. Inside each circle is a small white square with a black border.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/7e8fc7984a1b92c039d48b817c74bdb61581455c01da79304d3e6636c912299f.jpg) Setting Boot from Carrier BIOS

JP29	JP28	JP27	BOOT
1-2	1-2	2-3	Carrier BIOS <<<<

![The image displays three vertical columns of black text and diagrams on a white background. From left to right, the text labels are arranged vertically, reading 'JP29', 'JP28', and 'JP27'. Below each label is a square outline. Inside each square are three grey circles, each containing a small white square in its center. The circles are positioned in the top-left, bottom-left, and bottom-right corners, leaving the top-right corner empty. The diagrams appear identical in all three columns.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/229aca7929f5087ba6119c6d84c4e877d439886e72ffb573c0494145f98b6ab5.jpg) JP30: Clear CMOS To clear CMOS, shut down the power and short pins 2 and 3 (short VBT to ground)

Jumper	Status
1-2	Normal <<<
2-3	Clear CMOS

![The image displays a vertical list of numbers 1, 2, and 3. To the right of these numbers is a column of three gray circles enclosed within a thin rectangular border. Inside the top circle is a small black square. Inside the middle and bottom circles are small white squares.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/2b07da5fcd3c369ead3d5d39dd60f825bcf4c1fc9b2252cfbc4c3bfa7f8de11b.jpg) # 6.25. Power Jumpers JP31: AT/ATX Mode In AT mode, put PS\_ON# to ground as short pin 2-3 to force power on.

Jumper	Status
1-2	ATX Mode
2-3	AT Mode <<<<

![The image shows a vertical list with two columns. On the left are the numbers **1**, **2**, and **3** stacked vertically in black text. On the right are three grey circular buttons stacked vertically, aligned with the numbers. The top button, next to the number 1, features a large, solid black square in its center. The middle button, next to the number 2, features a small square in its center. The bottom button, next to the number 3, features a small square in its center.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/f1cb66e219c390976d016e24d16ed0be7bf5e882bce666d629b0dfaa6e87dbe8.jpg) # JP32: ATX S3 signal switching In AT mode, put pin 2-3 for S5 output instead Power Button (S3)

Jumper	Status
1-2	ATX (SUS_S3#) < < < <
2-3	AT (SUS_S5#)

![The image displays a vertical list of numbers on the left side: 1, 2, and 3. To the right of these numbers is a column of three grey circles, all enclosed within a thin black rectangular border. The top circle, aligned with the number 1, contains a small black square in its center. The middle and bottom circles, aligned with numbers 2 and 3 respectively, are plain grey without any central markings.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/bf23dbb56d338ca7bf53ed0f3bf748e69db5eebe2131b9f1dcdb7046f225c950.jpg) JP33: VCC\_12V On/Off during S3/S5 In AT mode, put pin 2-3 to output 12V during S3/S5.

Jumper	Status
1-2	ATX Mode
2-3	AT Mode <<<

![The image displays a vertical list with numbers on the left and icons on the right. On the left, the numbers '1', '2', and '3' are stacked vertically in black text. On the right, there are three rounded rectangular buttons stacked vertically. Next to '1', there is a grey circle containing a black square with a small white dot in the center. Next to '2' and '3', there are grey circles containing concentric circles (grey, black, white, grey, black) and a white dot in the center.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/22546b98f9e99cf7717d026f1ca8c265767f2a948fb952c84f88099a8bbf6fcf.jpg) JP35: +5V\_SBY supply In AT mode, put pin 3-4 to output +5V\_SBY directly.

Jumper	Status
2-3	ATX PSU <<<
3-4	AT (DC to DC)

![A vertical column of the numbers 1, 2, 3, and 4 is on the left side. To the right of each number is a gray circle. The top circle contains a small black square.](.com-hpc-server-base-manual-50m-77106-1000-10-230720/a2b53cf746f0cfe08febdc99a539dbe97f40cdf1a3bfc1521bb3c1015da014d0.jpg) # 7. Secondary BIOS The COM-HPC Server-Base supports Secondary BIOS, using Boot Serial Peripheral Interface (SPI) for COM-HPC modules. Secondary BIOS solutions can be used as an alternative to the on-module BIOS and provide support for the following: • Testing new BIOS versions • Development of firmware modifications • Recovery if soldered BIOS on module is corrupted To use the BIOS on the module; short pins 1-2 on JP27, JP28, JP29, reference section 6.23 To use the BIOS on the carrier board; Short pins 2-3 on JP27, and keep pin 1-2 on JP28, JP29, reference section 6.23 Make sure that the secondary BIOS flash chip has been properly installed into the Carrier BIOS socket before BOOT BIOS adjusting. ![COM1\nJP9\nJP29\nJP28\nJP27\nFAN_0\nESPI\nCarrier BIOS\nCOM+HPC™](.com-hpc-server-base-manual-50m-77106-1000-10-230720/a64660d6626eb75c0ecb814ad3af1ec50dec780c20897e65efc733a4ab44c803.jpg) # 8. Switches, POST and LEDs # 8.1. Switches (S0-S5) There are two switches, at the center and lower-right of the carrier. # PWR\_BTN Indicates getting into S0 from S5 of the system. ![ATX_24\nATX_8\nPWR_BTN\nCN35\nJP36](.com-hpc-server-base-manual-50m-77106-1000-10-230720/5bf6f614da351845be1cd65e85af68cfd19f5bae102a621c25e9f2efa9332259.jpg) # RST\_BTN Indicates resetting of the system. ![USB4_5\nFRONT PANEL\nM2-0\nM2-1\nRST_BTN\nLED3\nGP_SP1](.com-hpc-server-base-manual-50m-77106-1000-10-230720/b7afb9863c4885a07fc569b15b12756f063d601eade7f453d0678439fcffd022.jpg) # 8.2. POST and inductors LEDs An eSPI-based POST display is added for debugging. The two 7-SEG LEDs shows the actual POST data. ![M2_1\n0 M2 OCPLB\nRST_BT\nLED3\n8.8.\nGP_SPI](.com-hpc-server-base-manual-50m-77106-1000-10-230720/fc9e0f0f1ff2a834d353975161c8fe16fcbd25d3e724273d8cc5f587efafb10b.jpg) A row of mini-LEDs below the POST display indicates the following: 5VSB: ATX power attached on standby or active S3: Indicates S3 status PWR\_ON: Indicates power on WDT: Indicates WDT (watchdog timer) activity BMC\_HB: Heart beat LED indicator output ![5VSB\nS3\nPWR_ON\nWDT\nBMC_HB](.com-hpc-server-base-manual-50m-77106-1000-10-230720/14c2a054c2d36443677b0306e2dd9701da7731e6fd832312408796e64f1f9fd8.jpg) # 8.3. ATX Power Connectors The COM-HPC Server Base has one ATX 24-pin connector to supply power to the carrier board and one ATX 12V 8-pin connector to supply power to the COM-HPC module. The system will not power on unless an ATX 12V 8-pin connector is connected. If your power supply has a 24-pin ATX connector, then attach the connectors as shown. ![ATX_24\nATX_8\nPWR_BTN](.com-hpc-server-base-manual-50m-77106-1000-10-230720/a0778dfea78c3a0d566abdcb72803e4158ea1f2ac19928fc1f8aa9a2edf06b27.jpg) # 8.4. AT Power Mode To operate the system in AT Mode with an ATX power supply, Refer to section 6.24 jumper settings for details, or follow the instruction below. Jumper Settings for ATX mode

JP31	JP32	JP33	JP35	POWER MODE
1-2	1-2	1-2	2-3	ATX Mode

![JP33 JP32 JP31\nJP35](.com-hpc-server-base-manual-50m-77106-1000-10-230720/14fee646e381ca450492dfbaee91218bf2454d287c73b2ab373588d3c495228d.jpg) Jumper Settings for AT mode

JP31	JP32	JP33	JP35	POWER MODE
2-3	2-3	2-3	3-4	AT Mode

![JP33 JP32 JP31\nJP35](.com-hpc-server-base-manual-50m-77106-1000-10-230720/4719751eb59af6966aabc983085a60b956c0ed5200567344ea23fbc51e2b232e.jpg) ![S\nIPMI\nJP33 JP32 JP31\nJP35\nJP3\nJP2\nBMC_DBG](.com-hpc-server-base-manual-50m-77106-1000-10-230720/cc51efb78d0e36a469f38441bde22aa0afeab99bfdae43618f5e20f708f0dc65.jpg) [🔗 Link to the original document](.com-hpc-server-base-manual-50m-77106-1000-10-230720/com-hpc-server-base-manual-50m-77106-1000-10-230720.pdf)