# cPCI-3915 Series

3U CompactPCI Single Board Computers with

Intel® Pentium® M/ Celeron® M Processors

User's Manual

Manual Rev. 2.02

Revision Date: March 27, 2012

Part No: 50-15055-1020

![Circular black-and-white recycling symbol with three chasing arrows forming a triangle (no text or symbols)](.cpci-3915-50-15055-1020-202-en/fcacf2b177aef1217646ed394171b899784a22162a7404fa2890ad8e22bfb042.jpg)

Recycled Paper

# Revision History

<table><tr><td>Revision</td><td>Release Date</td><td>Description of Change(s)</td></tr><tr><td>2.01</td><td>2008/01/17</td><td>Previous release</td></tr><tr><td>2.02</td><td>2012/03/27</td><td>Remove LVDS function (LVDS connector is not supported on cPCI-R3915 RTMs with part number ending in “0200” and higher)</td></tr></table>

# Preface

# Copyright 2008-12 ADLINK Technology, Inc.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Conventions

Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly.

![The image displays a white document icon featuring faint horizontal gray lines, resembling a piece of paper or a form. The top-left corner of the document is folded down. A large, bold red checkmark is superimposed over the center of the paper.](.cpci-3915-50-15055-1020-202-en/5a8d0b70d515159cbbb600789188de1e6c1a2f01661ec70e9ed8981560c4835c.jpg)
NOTE:

Additional information, aids, and tips that help users perform tasks.

![The image shows a yellow triangular warning sign with a black border. In the center is a large black exclamation point.](.cpci-3915-50-15055-1020-202-en/cdd4f8d340383826a03fa49981cda2fa64ebeeba4abe43b8b2cca86e8627f02a.jpg)
CAUTION:

Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.

![The image displays a standard warning sign: a red equilateral triangle with a thick white border. Inside the triangle is a large, white exclamation point centered vertically and horizontally. The sign is set against a plain white background.](.cpci-3915-50-15055-1020-202-en/e38def8c35c8e58e086c9ecb383ec3435e7189d422b42fbf1171038663016c76.jpg)
WARNING:

Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task.

# Table of Contents

# Revision History...... ii

# Preface...... iii

# List of Tables ix

# List of Figures ...... xi

# 1 Overview .... 1

1.1 Introduction.... 1
1.2 Features.... 1
1.3 Board Diagram.... 2
1.4 Product List.... 3

SBC 3

Transition module 3

1.5 Package contents 3

CPU module 3

Rear transition module .... 3

# 2 Specifications.... 5

2.1 CPU, memory, and chipset.... 5
2.2 Interfaces 5
2.3 Software 6
2.4 General 6
2.5 I/O Connectivity Table 8
2.6 Power Consumption 8

# 3 Functional Description 11

3.1 Processor.... 11
3.2 Chipset.... 11
3.3 Memory.... 12
3.4 Intel® 915GM Graphics Memory Control Hub.... 12
3.5 Direct Media Interface (DMI).... 12
3.6 I/O Controller Hub (ICH6-M) 13

Ultra ATA100/66/33 IDE 13

USB 2.0 13

LPC/ Firmware Hub 14

System Management Bus 14

Watch Dog Timer 14

Real Time Clock 14

Serial ATA (SATA) Controller 14

3.7 PCI Express® Interface 15

Marvell® 88E8052 Gigabit Ethernet Controller ...... 15

3.8 Hardware Monitor 16

3.9 PCI Resource Allocation 16

# 4 Jumpers and Connectors.... 17

4.1 cPCI-3915 Series Board Outline.... 18

cPCI-3915A 18

cPCI-3915B 18

cPCI-R3915 19

cPCI-3915 PCB Layout 20

DB-3915CF PCB Layout 21

DB-3915L2 PCB Layout 22

cPCI-R3915 PCB Layout 23

4.2 Connector Pin Assignments.... 24

USB Connectors 24

Ethernet (RJ-45) Connector 24

VGA Connector 26

RS-232 DB-9 Serial Port Connector (COM1, COM2) ... 26

SATA Connector 28

IDE Connector 28

DVI Connector 30

PS2 Connector 31

CompactFlash Connector 32

General Purpose LED definitions 34

To DB-3915L2 Connector 34

To DB-3915CF Connector 35

CompactPCI J1 Pin Assignment 36

CompactPCI J2 Pin Assignment 37

4.3 Switch and Jumper Settings 38

CF Master-Slave Select Jumper 38

RS-232, RS-422, RS-485, RS-485+ Select Jumper for COM2 in RTM 38

CPU clock select switch 38

# 5 Getting Started.... 39

5.1 Installing the CPU and Heatsink 39

CPU Installation 39
Heat Sink Installation 41
5.2 Installing a Memory Module.... 42
5.3 Installing the Hard Disk Drive 44
5.4 CF Card Installation 46
5.5 Installing the cPCI-3915 to the Chassis.... 47
5.6 RTM (cPCI-R3915) Installation 48

# 6 Windows® Driver Installation 49

# 7 Utilities 51

7.1 Watch Dog Timer.... 51
7.2 Using the Watchdog in an Application 52
7.3 Intel® Preboot Execution Environment (PXE) 52

# 8 BIOS.... 53

8.1 BIOS Setup Introduction 53
8.2 Standard CMOS Features 54
8.3 Advanced BIOS Features 60
8.4 Advanced Chipset Features 64
8.5 Integrated Peripherals 68
8.6 PNP/PCI Configuration 72
8.7 PC Health Status 74
8.8 Load Fail-Safe Defaults 75
8.9 Set Supervisor / User Password.... 76
8.10 Save & Exit Setup 77

# Important Safety Instructions.... 79

# Getting Service.... 81

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# List of Tables

Table 2-1: Power consumption of Intel® Pentium® M ...... 9

Table 2-2: Power consumption of Intel® Celeron® M ...... 9

Table 3-1: PCI Resource Allocation 16

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# List of Figures

Figure 1-1: cPCI-3915 Block Diagram 2

Figure 5-1: CPU Installation.... 40

Figure 5-2: Heat Sink Installation.... 42

Figure 5-3: Memory Installation 43

Figure 5-4: 2.5" Hard Disk Installation 46

Figure 5-5: Compact Flash Card Installation 47

Figure 7-1: cPCI-3915 Watch Dog Timer Architecture .... 51

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# 1 Overview

# 1.1 Introduction

The cPCI-3915 is a 3U CompactPCI single board computer that comes in two compact PCI form factors: single-slot cPCI-3915A and dual-slot cPCI-3915B. Featuring support for single Intel® Celeron® M processor with 1 MB L2 cache or Intel® Pentium® M processor with 2 MB L2 cache in μFC-PGA package, the cPCI-3915 incorporates the Intel® 915GM chipset with 400/533 MHz FSB, integrated graphics, and up to 1 GB, 64-bit wide system memory using a non-ECC DDR2 SODIMM.

Providing extensive support for I/O interfaces, the Intel® ICH6-M Southbridge backs up two Marvell® 88E8052 gigabit Ethernet controllers and three USB 2.0 ports. The optional cPCI-R3915 rear transition module supports additional I/O connectors including a single-channel SATA port, DVI port, and UART compatible RS-232 serial port capable of supporting RS-232, RS-422, RS-485, or RS-485+ devices via a jumper setting.

The high-performance computing and communications capability of the cPCI-3915 is a best solution for telecom, data center, and Internet applications.

# 1.2 Features

▶ Low power consumption, high-performance Intel® Cel-eron®/Intel® Pentium® M processor with up to 2.0 GHz core speed and 1 MB/2 MB L2 cache
▶ Up to 1 GB system memory via a single slot for DDR2 400/533 MHz SODIMM
▶ Dual gigabit Ethernet ports utilizing the PCI Express® bus architecture
▶ Multiple storage interface including Serial ATA, IDE, and CompactFlash
▶ High-resolution, dual-channel or multiple display support for VGA monitors (up to 2048 x 1536 resolution) and DVI-enabled displays (up to 165 MB/s)
▶ Up to three USB 2.0 port (2 on front and 1 on rear panel)

# 1.3 Board Diagram

![Based on the provided flowchart, here is the accurate description of the labeled blocks and their connections:\n\n**Central Processors and Chipsets**\n*   **GMCH 915GM** is the central northbridge component.\n*   **ICH6-M** is the central southbridge component.\n*   **GMCH 915GM** connects to **Pentium M** via a connection labeled **FSB WF**.\n*   **GMCH 915GM** connects to **Channel A 200pin SODIMM** (labeled **DDR2 DIMM Modules**) via **DDR2 400 / 533 MHz**.\n*   **GMCH 915GM** connects to **ICH6-M** via **DMI 2GB/s**.\n\n**Graphics and Display Connections (Left/Top)**\n*   **GMCH 915GM** connects via **RGB** to **DB-15 CONN**.\n*   **GMCH 915GM** connects via **SDVO** to **J2 CONN**.\n*   **GMCH 915GM** connects via **LVDS** to **J2 CONN**.\n*   The **J2 CONN** (from SDVO) connects via a dashed line to **Chrontel CH7307C**, which connects via a dashed line to **DVI CONN**.\n*   The **J2 CONN** (from LVDS) connects via a dashed line to **LVDS CONN**.\n\n**Storage and Expansion Connections (Right)**\n*   **ICH6-M** connects via **PCIe x1** (twice) to **MARYELL 88E8052**.\n*   **MARYELL 88E8052** connects via **GigaLAN** to two **RJ-45** blocks.\n*   **ICH6-M** connects via **ATA** to **TO D/B CONN**.\n*   **TO D/B CONN** connects via dashed lines to **CF SOCKET** and **IDE CONN**.\n*   **ICH6-M** connects via **SATA x 2** to **J2 CONN**.\n*   This **J2 CONN** connects via dashed lines to two **SATA CONN** blocks.\n*   **ICH6-M** connects via **PCI 32-bit/33MHz** to **J1/J2 CONN**.\n*   **J1/J2 CONN** connects via a dashed line to a circle labeled **COMBO**.\n\n**USB and Serial Connections (Bottom)**\n*   **ICH6-M** connects via **USB 2.0 x 3** to three **USB CONN** blocks.\n*   These **USB CONN** blocks connect via dashed lines to **TO L2 CONN** and **J2 CONN**.\n*   **ICH6-M** connects via **LPC** to **BIOS**.\n*   **ICH6-M** connects via **KBMS** to **SIO IT8712F**.\n*   **SIO IT8712F** connects to **T0 L2 CONN**, which connects via a dashed line to **J2 CONN**.\n*   **SIO IT8712F** connects via **COM1** to a **DB-9 CONN**, which connects via a dashed line to **TO L2 CONN**.\n*   **SIO IT8712F** connects via **COM2** to a **DB-9 CONN**, which connects via a dashed line to **J2 CONN**.\n*   **SIO IT8712F** connects to a third **DB-9 CONN** at the bottom, which connects via a dashed line to **TO L2 CONN**.\n\n**Other Blocks**\n*   **CH410M IC9354206** is a block in the top left corner.\n*   **IMVP4V**, **SYSTEM POWER**, and **MISC POWER** are blocks in the top right corner.](.cpci-3915-50-15055-1020-202-en/7172cf626ddb9d86a454227e2b4848f7fb07848b8c67e95612b8223cdd3a9c2a.jpg)

Figure 1-1: cPCI-3915 Block Diagram

# 1.4 Product List

Products included in the cPCI-3915 series include:

# SBC

▶ cPCI-3915A: Single-slot 3U SBC featuring Intel® Pentium® M/Celeron® M processor with dual GbE, single USB, and VGA output (assembled with DB-3915CF daughter board)
▶ cPCI-3915B: Dual-slot 3U SBC featuring Intel® Pentium® M/Celeron® M processor with dual GbE, dual USB, dual COM, and VGA output (assembled with DB-3915L2 and DB-3915CF daughter boards)

# Transition module

▶ cPCI-R3915: Rear transition module for cPCI-3915 SBCs

# 1.5 Package contents

Before opening the package, check the shipping carton for any damages. If the shipping carton is damaged, contact your dealer immediately for a replacement. Do not discard the shipping carton and original packing material for inspection. Obtain authorization from the dealer before returning any product to ADLINK.

Check the following items in the package. If any of the items is damaged or missing, contact your dealer immediately.

# CPU module

▶ cPCI-3915A/B single board computer\*
▶ Heat sink kit including thermal pad, heat sink paste, and four screws
▶ HDD bracket
▶ 44-pin IDE cable
▶ Y-cable for PS/2 combo port (cPCI-3915B only)
▶ ADLINK All-in-One CD
▶ User's manual

# Rear transition module

▶ cPCI-R3915 RTM

\*CPU, memory, and HDD specifications may vary depending on the selected configuration

Note: The contents of non-standard cPCI-3915 configurations may vary depending on the customer's requirements.

CAUTION: This product must be protected from static discharge and physical shock. Never remove any of the components except at a static-free workstation. Use the anti-static bag shipped with the product when putting the board on a surface. Wear an anti-static wrist strap properly grounded on one of the system's ESD ground jacks when installing or servicing system components.

# 2 Specifications

# 2.1 CPU, memory, and chipset

<table><tr><td rowspan="2">Processor</td><td>Intel® Pentium® M 1.5 GHz to 2.0 GHz processor in μFC-PGA package, 90 nm process with 2 MB L2 cache</td></tr><tr><td>Intel® Celeron® M 1.3 GHz to 1.5 GHz processor in μFC-PGA package, 90nm process with 1 MB L2 cache</td></tr><tr><td>Front side bus</td><td>400/533 MHz</td></tr><tr><td>Memory</td><td>Up to 1 GB system memory using single non-ECC DDR2 SODIMM</td></tr><tr><td rowspan="2">Chipset</td><td>Intel® 915GM Graphic Memory Controller Hub</td></tr><tr><td>Intel® ICH6-M I/O Controller Hub</td></tr></table>

# 2.2 Interfaces

\*Note: The LVDS connector is not supported on cPCI-R3915 RTMs with part number ending in "0200" and higher.

<table><tr><td>Standard</td><td>PICMG 2.0 R.3.0</td></tr><tr><td>CompactPCI bus</td><td>32-bit/33 MHz PCI bus</td></tr><tr><td rowspan="3">Display</td><td>Intel® 915GM integrated graphics</td></tr><tr><td>Supports analog VGA, Serial Digital Video Output (SDVO) interfaces, LVDS (1 x 18 bpp)*</td></tr><tr><td>Supports up to 2048 x 1536 resolution</td></tr><tr><td>Ethernet</td><td>Marvell® 88E8052 dual Gigabit Ethernet controller on PCI Express® bus</td></tr><tr><td>Storage</td><td>44-pin UltraATA 100/66/33 connector and Type II CompactFlash slot</td></tr><tr><td rowspan="10">Front panel I/O</td><td>cPCI-3915 module</td></tr><tr><td>2 x GbE port</td></tr><tr><td>2 x USB 2.0 port</td></tr><tr><td>1 x VGA port</td></tr><tr><td>1 x system reset button</td></tr><tr><td>HDD LED and Power/Watchdog LED</td></tr><tr><td>DB-3915L2 daughter board</td></tr><tr><td>2 x RS-232 port</td></tr><tr><td>PS/2 combo port for keyboard and mouse</td></tr><tr><td>1 x USB 2.0 port</td></tr><tr><td rowspan="9">Board I/O interfaces</td><td>cPCI-3915 module</td></tr><tr><td>Single-channel SATA port</td></tr><tr><td>DB-3915CF daughter board</td></tr><tr><td>Single channel, ATA100/66/33 IDE connector (44-pin)</td></tr><tr><td>Hot-swappable CompactFlash slot</td></tr><tr><td>cPCI-R3915 rear transition module</td></tr><tr><td>DVI transmitter</td></tr><tr><td>Single-channel SATA port</td></tr><tr><td>Single-channel LVDS connector*</td></tr><tr><td rowspan="3">Rear panel I/O</td><td>1 x USB 2.0 port</td></tr><tr><td>1 x DVI port</td></tr><tr><td>1 x RS-232 port (supports RS-232, RS-422, RS-485, or RS-485+ via jumper setting)</td></tr></table>

# 2.3 Software

<table><tr><td>BIOS</td><td>Phoenix-Award</td></tr><tr><td rowspan="7">Supported OS</td><td>Microsoft® Windows® 2000</td></tr><tr><td>Microsoft® Windows NT®</td></tr><tr><td>Microsoft® Windows serverTM 2003</td></tr><tr><td>Microsoft® Windows® XP</td></tr><tr><td>Microsoft® Windows® XP Embedded (Contact ADLINK for availability)</td></tr><tr><td>RedHat FedoraTM Core 4 &amp; 5</td></tr><tr><td>VxWorks (contact ADLINK for availability)</td></tr></table>

# 2.4 General

<table><tr><td rowspan="2">Form factor</td><td>cPCI-3915 : 3U 4HP/ 8HP CompactPCI</td></tr><tr><td>cPCI-R3915 (RTM) : 3U 4HP CompactPCI</td></tr><tr><td rowspan="2">Dimensions</td><td>cPCI-3915 : 100mm x 160mm (L x W)</td></tr><tr><td>cPCI-R3915 (RTM) : 100mm x 50mm (L x W)</td></tr><tr><td>Operating temperature</td><td>-20°C to 65°C- 40°C to 80°C for specific CPU</td></tr><tr><td>Storage temperature</td><td>- 40°C to 80°C</td></tr><tr><td>Humidity</td><td>5% to 95% non-condensing</td></tr><tr><td>Shock</td><td>15G peak-to-peak, 11ms duration, non-operation</td></tr><tr><td>Vibration</td><td>Non-operating: 1.88G rms, 5 to 500 Hz, each axis</td></tr><tr><td></td><td>Operating: 0.5G rms. 5 to 500 Hz, each axis, with 2.5” HDD and CompactFlash card</td></tr><tr><td>Compliance</td><td>CE, FCC Class A</td></tr></table>

# 2.5 I/O Connectivity Table

<table><tr><td></td><td colspan="2">cPCI-3915A</td><td colspan="2">cPCI-3915B</td><td colspan="2">cPCI-R3915</td></tr><tr><td></td><td>Faceplate</td><td>Board</td><td>Faceplate</td><td>Board</td><td>Faceplate</td><td>Board</td></tr><tr><td>VGA</td><td>Y (DB-15)</td><td>--</td><td>Y (DB-15)</td><td>--</td><td>--</td><td>--</td></tr><tr><td>DVI</td><td>--</td><td>--</td><td>--</td><td>--</td><td>Y (DVI-I)</td><td>--</td></tr><tr><td>LVDS</td><td>--</td><td>--</td><td>--</td><td>--</td><td>--</td><td>Y*</td></tr><tr><td>LAN</td><td>Y(RJ-45) x 2</td><td>--</td><td>Y(RJ-45) x 2</td><td>--</td><td>--</td><td>--</td></tr><tr><td>USB</td><td>Y x 1</td><td>--</td><td>Y x 2</td><td>--</td><td>Y x 1</td><td>--</td></tr><tr><td>PS2</td><td>--</td><td>--</td><td>Y (Combo)</td><td>--</td><td>--</td><td>--</td></tr><tr><td>COM1</td><td>--</td><td>--</td><td>Y (DB-9)</td><td>--</td><td>--</td><td>--</td></tr><tr><td>COM2</td><td>--</td><td>--</td><td>Y (DB-9)</td><td>--</td><td>Y (DB-9)</td><td>--</td></tr><tr><td>SATA</td><td>--</td><td>Y</td><td>--</td><td>Y</td><td>--</td><td>Y</td></tr><tr><td>PATA</td><td>--</td><td>Y (44-pin)</td><td>--</td><td>Y (44-pin)</td><td>--</td><td>--</td></tr><tr><td>CF</td><td>--</td><td>Y</td><td>--</td><td>Y</td><td>--</td><td>--</td></tr><tr><td>Reset</td><td>Y</td><td>--</td><td>Y</td><td>--</td><td>--</td><td>--</td></tr><tr><td>LEDs</td><td>Y</td><td>--</td><td>Y</td><td>--</td><td>--</td><td>--</td></tr></table>

\*Note: The LVDS connector is not supported on cPCI-R3915 RTMs with part number ending in "0200" and higher.

# 2.6 Power Consumption

This section provides information on the power consumption of cPCI-3915 when using Intel® Pentium® M 1.8 GHz and Intel® Celeron® M 1.3 GHz processors. The cPCI-3915 was tested with the following specifications:

<table><tr><td>Operating system:</td><td>Microsoft® Windows® XP environment</td></tr><tr><td>System memory:</td><td>DDR2 512MB RAM</td></tr><tr><td>Storage:</td><td>20 GB IDE HDD, 512 MB CompactFlash card, and two 80 GB SATA HDD</td></tr><tr><td>Network:</td><td>Dual GbE</td></tr><tr><td>Peripherals:</td><td>USB 3.5” HDD, two RS-232 serial port devices</td></tr><tr><td>Chassis:</td><td>cBP-3208 8-slot CompactPCI backplane and power supply</td></tr></table>

The following tables show the cPCI power consumption during light loading (no software is running) and full loading.

Power

<table><tr><td>Voltage</td><td>+3.3V</td><td>+5V</td><td>+12V</td><td>-12V</td><td>Total</td></tr><tr><td>Light-loading</td><td>13.93W</td><td>12.65W</td><td>0.17W</td><td>0.36W</td><td>27.11W</td></tr><tr><td>Full-loading</td><td>15.15W</td><td>29.15W</td><td>0.11W</td><td>0.6W</td><td>45.01W</td></tr></table>

Table 2-1: Power consumption of Intel® Pentium® M Power

<table><tr><td>Voltage</td><td>+3.3V</td><td>+5V</td><td>+12V</td><td>-12V</td><td>Total</td></tr><tr><td>Light-loading</td><td>13.93W</td><td>8.6W</td><td>0.17W</td><td>0.36W</td><td>23.06W</td></tr><tr><td>Full-loading</td><td>15.15W</td><td>19.1W</td><td>0.11W</td><td>0.6W</td><td>34.96W</td></tr></table>

Table 2-2: Power consumption of Intel® Celeron® M

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# 3 Functional Description

The following sections describe the cPCI-3915 main functions.

# 3.1 Processor

The cPCI-3915 supports a single Intel® Pentium® M/Intel® Celeron® M processor with 2 MB/1 MB L2 cache in μFC-PGA package. The Intel® Pentium® M/Intel® Celeron® M processor is a high-performance, low-power mobile processor with several enhancements over previous mobile processors.

These processors feature:

Intel® Architecture with Intel® Wide Dynamic Execution
▶ On-die, primary 32 KB instruction cache and 32 KB write-back data cache
▶ On-die, 2 MB/1 MB second level cache with Advanced Transfer Cache (ATC) architecture
▶ Data Prefetch Logic
▶ Streaming SIMD Extensions 2 (SSE2)
▶ 533 MHz/400 MHz source-synchronous FSB
▶ Lead-free

# 3.2 Chipset

The cPCI-3915 is based on the Mobile Intel® 915GM Express Chipset, consisting of the Intel® 915GM Graphics Memory Controller Hub (GMCH) and Intel® ICH6-M I/O Controller Hub.

The Intel® 915GM is equipped with the Graphics Memory Controller Hub (GMCH) and supports system memory, DMI, VGA, LVDS\* and SDVO interfaces.

\*Note: The LVDS connector is not supported on cPCI-R3915 RTMs with part number ending in "0200" and higher.

# 3.3 Memory

The cPCI-3915 supports a single-channel, unbuffered, non-ECC DDR2 SDRAM operating at 533/400 MHz. The GMCH supports a 128 MB, 256 MB, 512 MB, or 1 GB memory module in SODIMM package. The memory interface supports the following:

▶ 256 MB, 512 MB, and 1 GB technology supported using x8 or x16 devices
▶ High-density memory package for DDR2 type devices
▶ 128 MB minimum memory, 1 GB maximum memory
▶ Configurations defined in the JEDEC DDR2 SODIMM specification only
▶ DDR2 533/400 MHz memory devices
▶ On-Die Termination (ODT) for DDR2
▶ Single-channel configuration with one, two, three, or four ranks
▶ Double-sided unbuffered SODIMMs (4 rows populated)

# 3.4 Intel® 915GM Graphics Memory Control Hub

The Intel® 915GM GMCH in a 1257-pin Micro-FCBGA package provides the display interface for a variety of display devices, including:

▶ Analog VGA DAC
▶ Digital LVDS\*
▶ Serial Digital Video Output (SDVO)

\*Note: LVDS connector is not supported on cPCI-R3915 RTMs with part number ending in "0200" and higher

# 3.5 Direct Media Interface (DMI)

Direct Media Interface (DMI) is the chip-to-chip connection between the Graphics Memory Controller Hub (GMCH) and the I/O Controller Hub. This high-speed interface integrates advanced priority-based servicing allowing concurrent traffic and true isochronous transfer capabilities. Base functionality is completely software-transparent, permitting current and legacy software to operate normally.

# 3.6 I/O Controller Hub (ICH6-M)

The ICH6-M provides extensive I/O support, including:

PCI Express® base specification Revision 1.0a-compliant.
▶ PCI local bus specification, Revision 2.3 with support for 33 MHz PCI operations
▶ ACPI Power Management Logic Support
▶ Enhanced DMA controller, interrupt controller, and timer functions
▶ Integrated Serial ATA host controller with independent DMA operation on two ports and AHCI support
▶ Integrated IDE controller supports Ultra ATA100/66/33 HDD
▶ USB host interface supporting up to eight USB ports, four UHCI host controller, one EHCI high-speed USB 2.0 host controller
▶ System Management Bus (SMBus) specification, Version 2.0 with additional support for I2C devices
▶ Low Pin Count (LPC) interface
▶ Firmware Hub (FWH) interface

# Ultra ATA100/66/33 IDE

The cPCI-3915 supports a single Ultra ATA100 IDE channel, while the DB-3915CF daughter board comes with a 2.5" hard disk drive bay and a CompactFlash slot. The IDE interface supports PIO data transfer rates of up to 16 MB/sec and Ultra ATA data transfer rates of up 100 MB/sec. It also integrates a 16x32-bit buffer for optimal transfers. For Ultra ATA100/66 operation, proper IDE cables must be used. The cPCI-3915 does not use any legacy DMA resources.

# USB 2.0

Onboard the cPCI-3915 is an Enhanced Host Controller Interface (EHCI) that supports high-speed USB signaling. High-speed USB 2.0 allows data transfers of up to 480 Mb/s, 40 times faster than full-speed USB. It also features four Universal Host Controller Interfaces (UHCI) that support USB full-speed and low-speed signaling. The cPCI-3915 comes with three USB 2.0 ports: one each on the cPCI-3915 board, DB-3915L2 daughter board on the cPCI-R3915 board. All USB ports implement over-current detection and support USB floppy boot. USB legacy devices, such as keyboard, mouse, and floppy drive are supported and can be enabled or disabled in the BIOS.

# LPC/ Firmware Hub

The 4 Mb PMC Pm49FL004T chip holds the system BIOS. BIOS write-protect function can be enabled/disabled through the BIOS menu.

# System Management Bus

The Intel® ICH6-M supports a System Management Bus (SMBus) Specification Version 2.0-compliant host controller and an SMBus slave interface. The host controller provides a mechanism for the processor to initiate communications with SMBus peripherals (slaves) as well as I2C-compatible devices. The slave interface allows an external master to read from or write to the Intel® ICH6-M.

# Watch Dog Timer

The cPCI-3915's watch dog timer (WDT) is embedded on the Super I/O iTE8712F chip. The WDT resets the cPCI-3915 when it receives a WDT-L low signal.

# Real Time Clock

The Intel® ICH6-M contains a Motorola MC146818A-compatible real-time clock (RTC) with 256 bytes of battery-backed RAM. The real-time clock keeps track of the time and day, and stores specific system data even when the system power is shut down. The RTC operates on a 32.768 KHz crystal and a 3 V battery.

# Serial ATA (SATA) Controller

The Intel® ICH6-M features an integrated SATA host controller that allows data transfer rates of up to 1.5 Gb/s (150 MB/s). The SATA host controller has two modes of operation: legacy mode using I/O space and AHCI mode using memory space. The Intel® ICH6-M supports the Serial ATA Specification Revision 1.0a on two SATA ports. The SATA ports are located on the cPCI-3915 board and cPCI-R3915 board.

# 3.7 PCI Express® Interface

The Intel® ICH6-M supports four PCI Express® root ports compliant with the PCI Express Base Specification Revision 1.0a. The PCI Express® root ports can be statically configured as four x1 ports or combined to form one x4 port. Each root port supports 2.5 Gb/s bandwidth in single direction (5 Gb/s bandwidth on concurrent direction) and two virtual channels for full isochronous data support. In addition, the cPCI-3915 implements PCI Express® bus on the onboard gigabit Ethernet controllers.

# Marvell® 88E8052 Gigabit Ethernet Controller

The Marvell® 88E8052 gigabit Ethernet controller is compliant with the PCI Express 1.0a specification and is optimized for maximum throughput and low CPU utilization. The controller supports the following:

▶ x1 PCI Express® interface with 2.5 GHz signaling

▶ Advanced error reporting

▶ Message signaled interrupts

▶ TCP segmentation offload/large-send support

▶ 802.3x flow control-compliant

▶ IEEE 802.1p and 802.1q support

▶ 10/100/1000 IEEE 802.3-compliant

▶ Automatic MDI/MDIX crossover at all speeds

▶ Wake-On-LAN (WOL) power management support

▶ ACPI 2.0 specification

▶ Wake-On-Link feature

▶ Fully integrated ASF 2.0 functionality with on-chip $\mu$ c

▶ SMBus 2.0 master interface for ASF functionality

▶ Serial Peripheral Interface (SPI) for ASF firmware and for remote boot (PXE 2.1)

# 3.8 Hardware Monitor

The IT8712F chip monitors several critical hardware parameters, including system and CPU voltages and temperatures. All hardware status information can be viewed and configured through the BIOS menu, and run-time utilities. Once the preset thresholds of hardware conditions reach critical limits, the IT8712F alerts or resets the system.

# 3.9 PCI Resource Allocation

The single PCI bus on the cPCI-3915 platform and the IDSEL, INT#, and REQ#/GNT# routings of the cPCI-Bus slots on backplane follow standard definitions, where the interrupt controller is the onboard Intel® ICH6-M on board. Table 3.1 lists the PCI resource allocation.

<table><tr><td>Device</td><td>Host</td><td>IDSEL</td><td>INT#</td><td>REQ#/GNT#</td></tr><tr><td>J1 Connector</td><td>ICH6-M</td><td></td><td>IRQA, IRQB, IRQC, IRQD</td><td>REQ#0/GNT#0</td></tr></table>

Table 3-1: PCI Resource Allocation

# 4 Jumpers and Connectors

This chapter illustrates the board layout, connector pin assignments, and jumper settings to familiarize the users on the cPCI-3915.

# 4.1 cPCI-3915 Series Board Outline

cPCI-3915A
![162.54\n99.85±0.15](.cpci-3915-50-15055-1020-202-en/faa01b61c7d3c7de044ebe757151aa84b6403d8a71544d39b9b429febb6eb3c9.jpg)

cPCI-3915B
![162.54\n99.85+0.15](.cpci-3915-50-15055-1020-202-en/d4bddf4d3da93552e5590efea03ca451fc57cae79e810c453004ae9b56d75938.jpg)

cPCI-R3915
![DVI\nUSB\nCOM2\nADLINK](.cpci-3915-50-15055-1020-202-en/e2be4c017cee23677002a9feb78bfc13cf813aae9ba90161986802c5f0dc0f02.jpg)

![99.85±0.15\n52.54](.cpci-3915-50-15055-1020-202-en/e0f10baf27f284fe0a7054be5db85652cfbe074516bdeb8a6e7589dbb75a534d.jpg)

cPCI-3915 PCB Layout
![Diagram of a computer layout with labeled components and connectors, including CPU socket, memory, and monitor sections.](.cpci-3915-50-15055-1020-202-en/c43810e1037de7b51d6ca16524cfb835ac05b3e3f4be611bb64450c06d1c2e29.jpg)

<table><tr><td>A</td><td>CPU</td><td>J</td><td>LAN (88E8052)</td></tr><tr><td>B</td><td>North Bridge (915GM)</td><td>K</td><td>DDR2 DIMM SOCKET</td></tr><tr><td>C</td><td>South Bridge (ICH6-M)</td><td>L</td><td>SATA CONNECTOR</td></tr><tr><td>D</td><td>LED</td><td>M</td><td>SIO (IT8712F)</td></tr><tr><td>E</td><td>USB Connector</td><td>N</td><td>To DB-3915L2 Connector</td></tr><tr><td>F</td><td>VGA Connector</td><td>O</td><td>To DB-3915CF Connector</td></tr><tr><td>G</td><td>LAN Connector</td><td>P</td><td>cPCI J1</td></tr><tr><td>H</td><td>LAN Connector</td><td>Q</td><td>cPCI J2</td></tr><tr><td>I</td><td>LAN (88E8052)</td><td></td><td></td></tr></table>

DB-3915CF PCB Layout
![A\n×\nB\n×\nC\nD\nE](.cpci-3915-50-15055-1020-202-en/c43a1f05ca0b2e20d161ee3360d9b3c2fc3e4f953c78bf4309ac3c91aa8b114d.jpg)

<table><tr><td>A</td><td>BATTERY HOLDER</td></tr><tr><td>B</td><td>BUZZER</td></tr><tr><td>C</td><td>CF SOCKET</td></tr><tr><td>D</td><td>44 PINS IDE CONNECTOR</td></tr><tr><td>E</td><td>TO MB CONNECTOR</td></tr><tr><td>F</td><td>Select CF Master/Slave</td></tr></table>

DB-3915L2 PCB Layout
![A\nB\nC\nD\nE](.cpci-3915-50-15055-1020-202-en/1e45e5338e39145d9a93d73bcf0539890491aafd9381a1702251d4e2fdecfa9a.jpg)

<table><tr><td>A</td><td>USB CONNECTOR</td></tr><tr><td>B</td><td>KB/MS COMBO CONNECTOR</td></tr><tr><td>C</td><td>RS232 CONNECTOR</td></tr><tr><td>D</td><td>RS232 CONNECTOR</td></tr><tr><td>E</td><td>TO M/B CONNECTOR</td></tr></table>

cPCI-R3915 PCB Layout
![D\nE\nF\nB\nC\nJ\n1\nA\nG\nH](.cpci-3915-50-15055-1020-202-en/efd65b21f6b341b5686706d85253e2ebedb496a485cd6a1f190b34e59d7adf10.jpg)

<table><tr><td>A</td><td>cPCI J2</td><td>F</td><td>RS232 CONNECTOR</td></tr><tr><td>B</td><td>SATA CONNECTOR</td><td>G</td><td>Header for Select COM PORT type</td></tr><tr><td>C</td><td>LVDS CONNECTOR*</td><td>H</td><td>Header for Select COM PORT type</td></tr><tr><td>D</td><td>DVI CONNECTOR</td><td>I</td><td>Header for Select COM PORT type</td></tr><tr><td>E</td><td>USB CONNECTOR</td><td>J</td><td>Header for Select COM PORT type</td></tr></table>

\*Note: The LVDS connector is not supported on cPCI-R3915 RTMs with part number ending in "0200" and higher.

# 4.2 Connector Pin Assignments

# USB Connectors

![1\n2\n3\n4](.cpci-3915-50-15055-1020-202-en/cac7787f9750c85d617ecda7bb06be0824778ddf72f88ab87858b996a09fedc8.jpg)

<table><tr><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>Vcc</td></tr><tr><td>2</td><td>USB-</td></tr><tr><td>3</td><td>USB+</td></tr><tr><td>4</td><td>GND</td></tr></table>

# Ethernet (RJ-45) Connector

![Green LED\nAmber/Green LED](.cpci-3915-50-15055-1020-202-en/3cc34832839fd78621de2d1c1a64fd26af3b5fdb2a8e542454cdde467866139a.jpg)

<table><tr><td>Pin #</td><td>Signal Name</td><td>Function</td></tr><tr><td>1</td><td>GBE0_MDI0+</td><td>Media Dependent Interface 0+</td></tr><tr><td>2</td><td>GBE0_MDI0-</td><td>Media Dependent Interface 0-</td></tr><tr><td>3</td><td>GBE0_MDI1+</td><td>Media Dependent Interface 1+</td></tr><tr><td>4</td><td>GBE0_MDI1-</td><td>Media Dependent Interface 1-</td></tr><tr><td>5</td><td>GBE0_MDI2+</td><td>Media Dependent Interface 2+</td></tr><tr><td>6</td><td>GBE0_MDI2-</td><td>Media Dependent Interface 2-</td></tr><tr><td>7</td><td>GBE0_MDI3+</td><td>Media Dependent Interface 3+</td></tr><tr><td>8</td><td>GBE0_MDI3-</td><td>Media Dependent Interface 3-</td></tr></table>

<table><tr><td colspan="2">Status</td><td>Left LED (Green)</td><td>Right LED (Amber or Green)</td></tr><tr><td colspan="2">Network link is not established</td><td>OFF</td><td>OFF</td></tr><tr><td>10 Mbps</td><td>Link</td><td>Green</td><td>OFF</td></tr><tr><td>(10 BaseT)</td><td>Active</td><td>Blink Green</td><td>OFF</td></tr><tr><td>100 Mbps</td><td>Link</td><td>Green</td><td>Green</td></tr><tr><td>(100BaseTX)</td><td>Active</td><td>Blink Green</td><td>Green</td></tr><tr><td>1000 Mbps</td><td>Link</td><td>Green</td><td>Amber</td></tr><tr><td>(1000 BaseT)</td><td>Active</td><td>Blink Green</td><td>Amber</td></tr></table>

# VGA Connector

![15\n11\n5\n1](.cpci-3915-50-15055-1020-202-en/2e7edc08496da0e7a9923b849be05364b3a49f294d4025c5625e2fc0baa0d343.jpg)

<table><tr><td>Signal Name</td><td>Pin #</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>Red</td><td>1</td><td>2</td><td>Green</td></tr><tr><td>Blue</td><td>3</td><td>4</td><td>N.C.</td></tr><tr><td>GND</td><td>5</td><td>6</td><td>GND</td></tr><tr><td>GND</td><td>7</td><td>8</td><td>GND</td></tr><tr><td>+5V.</td><td>9</td><td>10</td><td>GND</td></tr><tr><td>N.C.</td><td>11</td><td>12</td><td>CRTDATA</td></tr><tr><td>HSYNC</td><td>13</td><td>14</td><td>VSYNC</td></tr><tr><td>CRTCLK</td><td>15</td><td></td><td></td></tr></table>

# RS-232 DB-9 Serial Port Connector (COM1, COM2)

![6\n1\n5](.cpci-3915-50-15055-1020-202-en/bf94e367d8c3f470043b76597ef36be05edc798d5b68bec087bef8545cf77683.jpg)

<table><tr><td>Pin #</td><td>RS-232</td></tr><tr><td>1</td><td>DCD, Data carrier detect</td></tr><tr><td>2</td><td>RXD, Receive data</td></tr><tr><td>3</td><td>TXD, Transmit data</td></tr><tr><td>4</td><td>DTR, Data terminal ready</td></tr><tr><td>5</td><td>IsoGND, Isolated ground</td></tr><tr><td>6</td><td>DSR, Data set ready</td></tr><tr><td>7</td><td>RTS, Request to send</td></tr><tr><td>8</td><td>CTS, Clear to send</td></tr><tr><td>9</td><td>RI, Ring indicator</td></tr></table>

# SATA Connector

![6\n5\n3\n2\n7\n4\n1](.cpci-3915-50-15055-1020-202-en/0386dd7a19a545376345fa860572473c91529bcfefd9839428116165e839468f.jpg)

<table><tr><td>Pin #</td><td>Signal</td><td>Pin #</td><td>Signal</td></tr><tr><td>1</td><td>GND</td><td>5</td><td>PXN</td></tr><tr><td>2</td><td>TXP</td><td>6</td><td>RXP</td></tr><tr><td>3</td><td>TXN</td><td>7</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td></td><td></td></tr></table>

# IDE Connector

![1\n2\n43\n44](.cpci-3915-50-15055-1020-202-en/7094190b43a574d66437be8f6ff70cc204a157a9f8d91740b27219d9201167ae.jpg)

<table><tr><td>Signal Name</td><td>Pin #</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>BRSTDRVJ</td><td>1</td><td>2</td><td>GND</td></tr><tr><td>DDP7</td><td>3</td><td>4</td><td>DDP8</td></tr><tr><td>DDP6</td><td>5</td><td>6</td><td>DDP9</td></tr><tr><td>DDP5</td><td>7</td><td>8</td><td>DDP10</td></tr><tr><td>DDP4</td><td>9</td><td>10</td><td>DDP11</td></tr><tr><td>DDP3</td><td>11</td><td>12</td><td>DDP12</td></tr><tr><td>DDP2</td><td>13</td><td>14</td><td>DDP13</td></tr><tr><td>DDP1</td><td>15</td><td>16</td><td>DDP14</td></tr><tr><td>DDP0</td><td>17</td><td>18</td><td>DDP15</td></tr><tr><td>GND</td><td>19</td><td>20</td><td>NC</td></tr><tr><td>PDDREQ</td><td>21</td><td>22</td><td>GND</td></tr><tr><td>PDIOWJ</td><td>23</td><td>24</td><td>GND</td></tr><tr><td>PDIORJ</td><td>25</td><td>26</td><td>GND</td></tr><tr><td>PIORDY</td><td>27</td><td>28</td><td>PCSEL</td></tr><tr><td>PDDACKJ</td><td>29</td><td>30</td><td>GND</td></tr><tr><td>IRQ14</td><td>31</td><td>32</td><td>NC</td></tr><tr><td>DAP1</td><td>33</td><td>34</td><td>DIAG</td></tr><tr><td>DAP0</td><td>35</td><td>36</td><td>DAP2</td></tr><tr><td>CS1P</td><td>37</td><td>38</td><td>CS3PJ</td></tr><tr><td>IDEACTPJ</td><td>39</td><td>40</td><td>GND</td></tr><tr><td>+5V</td><td>41</td><td>42</td><td>+5V</td></tr><tr><td>GND</td><td>43</td><td>44</td><td>NC</td></tr></table>

# DVI Connector

![1\n9\n17\n0.076\n33.048\n-27.048\n0.076](.cpci-3915-50-15055-1020-202-en/c56fb416bf4ce41d1186c7dcd803b6c2f9b93189fb1cbf8b9bfb75a8209cdbad.jpg)

<table><tr><td>Pin #</td><td>Signal</td><td>Pin #</td><td>Signal</td></tr><tr><td>1</td><td>TX2-</td><td>16</td><td>HTPLG</td></tr><tr><td>2</td><td>TX2+</td><td>17</td><td>TX0-</td></tr><tr><td>3</td><td>GND</td><td>18</td><td>TX0+</td></tr><tr><td>4</td><td>NC</td><td>19</td><td>GND</td></tr><tr><td>5</td><td>NC</td><td>20</td><td>NC</td></tr><tr><td>6</td><td>DDCCLK</td><td>21</td><td>NC</td></tr><tr><td>7</td><td>DDCDATA</td><td>22</td><td>GND</td></tr><tr><td>8</td><td>VSYNC</td><td>23</td><td>TXC+</td></tr><tr><td>9</td><td>TX1-</td><td>24</td><td>TXC-</td></tr><tr><td>10</td><td>TX1+</td><td>25</td><td>RED</td></tr><tr><td>11</td><td>GND</td><td>26</td><td>GREEN</td></tr><tr><td>12</td><td>NC</td><td>27</td><td>BLUE</td></tr><tr><td>13</td><td>NC</td><td>28</td><td>HSYNC</td></tr><tr><td>14</td><td>+5V</td><td>29</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>30</td><td>GND</td></tr></table>

PS2 Connector
![6\n5\n4\n3\n2 1](.cpci-3915-50-15055-1020-202-en/40eed319ca629f2921c3320e767ea3884c64a8467ce33a9dc4ce08086e226b24.jpg)

<table><tr><td>Pin #</td><td>Signal</td><td>Function</td></tr><tr><td>1</td><td>KBDATA</td><td>Keyboard Data</td></tr><tr><td>2</td><td>MSDATA</td><td>Mouse Data</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr><tr><td>4</td><td>+5V</td><td>Power</td></tr><tr><td>5</td><td>KBCLK</td><td>Keyboard Clock</td></tr><tr><td>6</td><td>MSCLK</td><td>Mouse Clock</td></tr></table>

CompactFlash Connector
![Technical line drawing of a mechanical component with no visible text or symbols](.cpci-3915-50-15055-1020-202-en/05888d0b5f838d780cfaeb44ef951cc365d65e521ebe3b5feac03f1964157e0f.jpg)

![1\n26\n25\n50](.cpci-3915-50-15055-1020-202-en/c8fede9f648e6d7e941855b3ec489568656f5afc5e08092fff8fbfb92732bb3c.jpg)

<table><tr><td>Signal Name</td><td>Pin #</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>GND</td><td>1</td><td>26</td><td>GND</td></tr><tr><td>DD3</td><td>2</td><td>27</td><td>DD11</td></tr><tr><td>DD4</td><td>3</td><td>28</td><td>DD12</td></tr><tr><td>DD5</td><td>4</td><td>29</td><td>DD13</td></tr><tr><td>DD6</td><td>5</td><td>30</td><td>DD14</td></tr><tr><td>DD7</td><td>6</td><td>31</td><td>DD15</td></tr><tr><td>CS1J</td><td>7</td><td>32</td><td>CS3J</td></tr><tr><td>GND</td><td>8</td><td>33</td><td>GND</td></tr><tr><td>GND</td><td>9</td><td>34</td><td>SDIORJ</td></tr><tr><td>GND</td><td>10</td><td>35</td><td>SDIOWJ</td></tr><tr><td>GND</td><td>11</td><td>36</td><td>5V</td></tr><tr><td>GND</td><td>12</td><td>37</td><td>IRQ15</td></tr><tr><td>5V</td><td>13</td><td>38</td><td>5V</td></tr><tr><td>GND</td><td>14</td><td>39</td><td>PCSEL</td></tr><tr><td>GND</td><td>15</td><td>40</td><td>NC</td></tr><tr><td>GND</td><td>16</td><td>41</td><td>BRSTDRVJ</td></tr><tr><td>GND</td><td>17</td><td>42</td><td>SDIORDY</td></tr><tr><td>DA2</td><td>18</td><td>43</td><td>NC</td></tr><tr><td>DA1</td><td>19</td><td>44</td><td>SDACKJ</td></tr><tr><td>DA0</td><td>20</td><td>45</td><td>IDEACTJ</td></tr><tr><td>DD0</td><td>21</td><td>46</td><td>DIAG</td></tr><tr><td>DD1</td><td>22</td><td>47</td><td>DD8</td></tr><tr><td>DD2</td><td>23</td><td>48</td><td>DD9</td></tr><tr><td>IOIS16J</td><td>24</td><td>49</td><td>DD10</td></tr><tr><td>GND</td><td>25</td><td>50</td><td>GND</td></tr></table>

General Purpose LED definitions

<table><tr><td>LED</td><td>Color</td><td>Status</td><td>Description</td></tr><tr><td rowspan="2">HDD</td><td rowspan="2">Red</td><td>OFF</td><td>IDE or SATA HDD Idle</td></tr><tr><td>ON</td><td>IDE or SATA HDD Access</td></tr><tr><td rowspan="3">PW/ WD</td><td rowspan="3">GREEN</td><td>OFF</td><td>System power off or power failure</td></tr><tr><td>ON</td><td>System Power on</td></tr><tr><td>BLINK</td><td>Watch Dog Timer enabled</td></tr></table>

To DB-3915L2 Connector

<table><tr><td>Pin #</td><td>Pin Name</td><td>Pin #</td><td>Pin Name</td></tr><tr><td>1</td><td>P5V</td><td>2</td><td>P5V</td></tr><tr><td>3</td><td>P5V</td><td>4</td><td>P5V</td></tr><tr><td>5</td><td>P5V</td><td>6</td><td>GND</td></tr><tr><td>7</td><td>P5V</td><td>8</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>10</td><td>USB1_OC-L</td></tr><tr><td>11</td><td>KBCLK</td><td>12</td><td>GND</td></tr><tr><td>13</td><td>KBDATA</td><td>14</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>16</td><td>USB1_N</td></tr><tr><td>17</td><td>MSDATA</td><td>18</td><td>USB1_P</td></tr><tr><td>19</td><td>MSCLK</td><td>20</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>22</td><td>GND</td></tr><tr><td>23</td><td>COM2_DCD_CN-L</td><td>24</td><td>COM1_DCD_CN-L</td></tr><tr><td>25</td><td>COM2_DSR_CN-L</td><td>26</td><td>COM1_DSR_CN-L</td></tr><tr><td>27</td><td>COM2_SIN_CN</td><td>28</td><td>COM1_SIN_CN</td></tr><tr><td>29</td><td>COM2_RTS_CN-L</td><td>30</td><td>COM1_RTS_CN-L</td></tr><tr><td>31</td><td>COM2_SOUT_CN</td><td>32</td><td>COM1_SOUT_CN</td></tr><tr><td>33</td><td>COM2_CTS_CN-L</td><td>34</td><td>COM1_CTS_CN-L</td></tr><tr><td>35</td><td>COM2_DTR_CN-L</td><td>36</td><td>COM1_DTR_CN-L</td></tr><tr><td>37</td><td>COM2_RI_CN-L</td><td>38</td><td>COM1_RI_CN-L</td></tr><tr><td>39</td><td>GND</td><td>40</td><td>GND</td></tr></table>

To DB-3915CF Connector

<table><tr><td>Pin#</td><td>Pin Name</td><td>Pin#</td><td>Pin Name</td></tr><tr><td>1</td><td>BRSTDRV0J</td><td>2</td><td>CONN_IDE_D8</td></tr><tr><td>3</td><td>CONN_IDE_D7</td><td>4</td><td>CONN_IDE_D9</td></tr><tr><td>5</td><td>CONN_IDE_D6</td><td>6</td><td>CONN_IDE_D10</td></tr><tr><td>7</td><td>CONN_IDE_D5</td><td>8</td><td>CONN_IDE_D11</td></tr><tr><td>9</td><td>CONN_IDE_D4</td><td>10</td><td>CONN_IDE_D12</td></tr><tr><td>11</td><td>CONN_IDE_D3</td><td>12</td><td>CONN_IDE_D13</td></tr><tr><td>13</td><td>CONN_IDE_D2</td><td>14</td><td>CONN_IDE_D14</td></tr><tr><td>15</td><td>CONN_IDE_D1</td><td>16</td><td>CONN_IDE_D15</td></tr><tr><td>17</td><td>CONN_IDE_D0</td><td>18</td><td>VBAT_DAUG</td></tr><tr><td>19</td><td>GND</td><td>20</td><td>GND</td></tr><tr><td>21</td><td>PDDRQ</td><td>22</td><td>PCSEL</td></tr><tr><td>23</td><td>RPDIOWJ</td><td>24</td><td>SPKR</td></tr><tr><td>25</td><td>RPDIQRJ</td><td>26</td><td>NC</td></tr><tr><td>27</td><td>CPIORDY</td><td>28</td><td>NC</td></tr><tr><td>29</td><td>PDDAKJ</td><td>30</td><td>PDA2</td></tr><tr><td>31</td><td>CIRQ14</td><td>32</td><td>RCS3PJ</td></tr><tr><td>33</td><td>PDA1</td><td>34</td><td>P5V</td></tr><tr><td>35</td><td>PDA0</td><td>36</td><td>P5V</td></tr><tr><td>37</td><td>RCS1PJ</td><td>38</td><td>SIO_SPKR</td></tr><tr><td>39</td><td>IDEACTPJ</td><td>40</td><td>GND</td></tr></table>

# CompactPCI J1 Pin Assignment

# Notes:

(1) NC = no connect
(2) Onboard pull low to GND
(3) Onboard pull high to +5V
(4) Onboard pull high to +3.3V

<table><tr><td></td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>25</td><td>GND</td><td>+5V</td><td>REQ64#</td><td>ENUM#</td><td>+3.3V</td><td>+5V</td><td>GND</td></tr><tr><td>24</td><td>GND</td><td>AD[1]</td><td>+5V</td><td>V(I/O)</td><td>AD[0]</td><td>ACK64#</td><td>GND</td></tr><tr><td>23</td><td>GND</td><td>+3.3V</td><td>AD[4]</td><td>AD[3]</td><td>+5V</td><td>AD[2]</td><td>GND</td></tr><tr><td>22</td><td>GND</td><td>AD[7]</td><td>GND</td><td>+3.3V</td><td>AD[6]</td><td>AD[5]</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>+3.3V</td><td>AD[9]</td><td>AD[8]</td><td>M66EN(2)</td><td>C/ BE[0]#</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>AD[12]</td><td>GND</td><td>V(I/O)</td><td>AD[11]</td><td>AD[10]</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>+3.3V</td><td>AD[15]</td><td>AD[14]</td><td>GND</td><td>AD[13]</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>SERR#</td><td>GND</td><td>+3.3V</td><td>PAR</td><td>C/ BE[1]#</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>+3.3V</td><td>IPMB_SCL(1)</td><td>IPMB_SDA(1)</td><td>GND</td><td>PERR#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>DEVSEL#</td><td>GND</td><td>V(I/O)</td><td>STOP#</td><td>LOCK#</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>FRAME#</td><td>IRDY#</td><td>GND</td><td>TRDY#</td><td>GND</td></tr><tr><td>12-14</td><td>GND</td><td colspan="5">Key</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>AD[18]</td><td>AD[17]</td><td>AD[16]</td><td>GND</td><td>C/ BE[2]#</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[21]</td><td>GND</td><td>+3.3V</td><td>AD[20]</td><td>AD[19]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>C/BE[3]#</td><td>GND</td><td>AD[23]</td><td>GND</td><td>AD[22]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[26]</td><td>GND</td><td>V(I/O)</td><td>AD[25]</td><td>AD[24]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[30]</td><td>AD[29]</td><td>AD[28]</td><td>GND</td><td>AD[27]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>REQ0#</td><td>GND</td><td>+3.3V</td><td>CLK0</td><td>AD[31]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>Reserved(1)</td><td>Reserved(1)</td><td>PCIRST#</td><td>GND</td><td>GNT0#</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>IPMB_PWR</td><td>HEALTHY#</td><td>V(I/O)</td><td>INTP(1)</td><td>INTS</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>+5V</td><td>INTD#</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>TCK(3)</td><td>+5V</td><td>TMS(2)</td><td>TDO(1)</td><td>TDI(2)</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>+5V</td><td>-12V</td><td>TRST#(3)</td><td>+12V</td><td>+5V</td><td>GND</td></tr><tr><td></td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

CompactPCI J2 Pin Assignment

<table><tr><td></td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>22</td><td>GND</td><td>GA4</td><td>GA3</td><td>GA2</td><td>GA1</td><td>GA0</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>CLK6</td><td>GND</td><td>USB2_N</td><td>USB2_P</td><td>NC</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>CLK5</td><td>GND</td><td>NC</td><td>GND</td><td>USB2_OC-L</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>GND</td><td>GND</td><td>SATA_RXN2</td><td>SATA_RXP2</td><td>NC</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>NC</td><td>SATA_TXN2</td><td>SATA_TXP2</td><td>GND</td><td>NC</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>N12V</td><td>GND</td><td>PRST#</td><td>NC</td><td>GNT6#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>LA_DATAN2</td><td>LA_DATAP2</td><td>DEG#</td><td>GND</td><td>P12V</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>P5V</td><td>GND</td><td>FAL#</td><td>NC</td><td>GNT5#</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>NC</td><td>LA_DATAN1</td><td>LA_DATAP1</td><td>GND</td><td>P5V</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>P3V3</td><td>GND</td><td>V(I/O)</td><td>LA_DATANO</td><td>LA_DATAP0</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>CRT_DDC_DATA</td><td>LA_CLKN</td><td>LA_CLKP</td><td>GND</td><td>CRT_DDC_CLK</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>VGA_VSYNC</td><td>GND</td><td>V(I/O)</td><td>SDVOB_CLKP</td><td>SDVOB_CLKN</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>SDVOB_INTN</td><td>SDVOB_INTP</td><td>RST_CH7307-L</td><td>GND</td><td>VGA_HSYNC</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>VGA_B</td><td>GND</td><td>V(I/O)</td><td>SDVOB_BP</td><td>SDVOB_BN</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>SDVOB_GP</td><td>SDVOB_GN</td><td>VGA_R</td><td>GND</td><td>VGA_G</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>SDVO_CTRLDATA</td><td>GND</td><td>V(I/O)</td><td>SDVOB_RP</td><td>SDVOB_RN</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>DSRJ2</td><td>TXD2</td><td>RXD2</td><td>GND</td><td>SDVO_CTRLCLK</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>DTRJ2</td><td>GND</td><td>V(I/O)</td><td>RTSJ2</td><td>PAR64(4)</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>V(I/O)</td><td>DCDJ2</td><td>RIJ2</td><td>GND</td><td>CTSJ2</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>CLK4</td><td>GND</td><td>GNT3#</td><td>REQ4#</td><td>GNT4#</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>CLK2</td><td>CLK3</td><td>SYSTEM#</td><td>GNT2#</td><td>REQ3#</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>CLK1</td><td>GND</td><td>REQ1#</td><td>GNT1#</td><td>REQ2#</td><td>GND</td></tr><tr><td></td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

# 4.3 Switch and Jumper Settings

# CF Master-Slave Select Jumper

A CF Master-Slave jumper located on the DB-3915CF board allows you to set the CF card as a master or slave device. By default, the CF card is set as a slave device (jumper cap shorts pin 1 and 2).

JP1 Select

<table><tr><td>1-2</td><td>CF Slave</td></tr><tr><td>2-3</td><td>CF Master</td></tr></table>

# RS-232, RS-422, RS-485, RS-485+ Select Jumper for COM2 in RTM

Refer to the jumper settings below before installing RS-232, RS-422, RS-485, or RS-485+ devices.

<table><tr><td></td><td>JP1</td><td>JP2</td><td>JP3</td><td>JP4</td></tr><tr><td>RS-232</td><td>1-2, 4-5</td><td>1-2, 4-5</td><td>1-2</td><td></td></tr><tr><td>RS-422</td><td>2-3, 5-6</td><td>2-3, 5-6</td><td>3-4</td><td>1-2, 4-5</td></tr><tr><td>RS-485</td><td>2-3, 5-6</td><td>2-3</td><td>5-6</td><td>1-2, 4-5</td></tr><tr><td>RS-485+</td><td>2-3, 5-6</td><td>2-3</td><td>5-6</td><td>2-3, 5-6</td></tr></table>

# CPU clock select switch

The SX1 switch allows you to select the CPU Front Side Bus speed.

<table><tr><td>Switch No.</td><td colspan="2">Selection</td></tr><tr><td>1</td><td>ON</td><td>OFF</td></tr><tr><td>2</td><td>ON</td><td>ON</td></tr><tr><td>CPU FSB</td><td>FSB533</td><td>FSB400</td></tr></table>

# 5 Getting Started

This chapter explains installation of the following components to the cPCI-3915:

▶ CPU and heat sink
▶ Memory module
▶ 2.5" hard disk drive
▶ CF card
▶ CPU module
▶ RTM

# 5.1 Installing the CPU and Heatsink

The cPCI-3915 supports single Intel® Pentium® M/ Intel® Celeron® M processor. A proprietary heat sink is included in the package for thermal control. Follow these procedures to install the CPU and heat sink. If the CPU and heat sink comes pre-installed on the cPCI-3915, proceed to the next section.

# CPU Installation

To install the CPU:

1. Turn the CPU lock screw counter-clockwise.
2. Carefully place the CPU into the CPU socket as shown in Figure 5-1: CPU Installation. Make sure the gold triangle on the corner of the CPU matches with the triangular mark in the corner of the socket.
3. Gently press the CPU until it is properly seated on the socket, then turn the CPU lock screw clockwise to lock the CPU positioning place.
4. Prepare the thermal pad included in the heat sink kit, then peel the mylar film from the white side of the thermal pad.
5. Place the thermal pad on top of the CPU and North-bridge as shown (pink side up), then remove the plastic film on top of the thermal pad.

![CPU locking\nscrewS\nGold Triangle](.cpci-3915-50-15055-1020-202-en/7dbaffc6d27eb3a3f38416c19b3ea4aee424bf30c595846c6474ca025232f3b3.jpg)

![Thermal Pad\nThermal Pad on North.Bridge\nRotate counter-clockwise to lock CPU](.cpci-3915-50-15055-1020-202-en/7cb6df64d0d609fef701540b208c750246c0059ba29da6c9b4b959b82964ce6c.jpg)

Figure 5-1: CPU Installation

# Heat Sink Installation

To install the heat sink:

1. Remove the film on top of the thermal pads. Refer to Figure 5-2: Heat Sink Installation.
2. Place the heat sink on top of the CPU and Northbridge, making sure that the thermal pads has proper contact with the components. Secure the heat sink using four spring-loaded screws (provided).

![Close-up of a hand holding a transparent plastic film over a copper-colored U-shaped metal heating element (no text or symbols visible)](.cpci-3915-50-15055-1020-202-en/5e9f2b233942b252e0d26249df973122dc734ae02b2135af90cc44a13a9a71dd.jpg)

![Close-up of a computer motherboard with visible cooling fan and screw holes, no readable text or symbols present.](.cpci-3915-50-15055-1020-202-en/26c7d143bd5546325b7318f1a42eb319d0aad65eef7832b32b7d77caa4efa19d.jpg)

Figure 5-2: Heat Sink Installation

# 5.2 Installing a Memory Module

The cPCI-3915 supports one unbuffered, non-ECC DDR2 SDRAM in 200-pin SODIMM package. If the cPCI-3915 comes with a pre-installed memory module, proceed to the next section.

Note: When installing a memory module, make sure that the module is firmly seated on the slot and does not interfere with any component.

To install the memory modules:

1. Align the notch in the memory module with the key on the SODIMM slot. Refer to Figure 5-3: Memory Installation for details.
2. Press down the module until it is properly seated on the slot.

![Insert module\n1 GB\nDDR2 533\n51-37506-0A2\nI-2 CF Strave\nE-S CF Mpster\nDDR RVS\n1.8V\n62.11AB](.cpci-3915-50-15055-1020-202-en/2127a5414a83bd1f85256f3baa69667de3225813548f59c5d2673466b16418d2.jpg)

![Press down to lock\n1.08\n0DB2 533\nDR RVS\n1.BV\n521180\nJRI Select\n1-2 CF Slave\n2-3 CF Master\n51-37506-0\nS/N](.cpci-3915-50-15055-1020-202-en/72cebb71f13d1f45593e7c6ec337775b7baaeb459e68146e81a06345b5da6b85.jpg)

Figure 5-3: Memory Installation

# 5.3 Installing the Hard Disk Drive

The cPCI-3195 supports a slim-type 2.5" HDD. If the cPCI-3195 comes with a pre-installed HDD, proceed to the next section.

To install the hard disk drive:

1. Install the provided HDD bracket to the board.
2. Connect the provided 44-pin IDE cable to the HDD. Make sure that the cable Pin1 is in the proper position.
3. Place the HDD into the bracket as shown, then connect the other end of the IDE cable to the IDE connector on the cPCI-3195.
4. Tighten all four bracket screws to secure the HDD in place.

Refer to the following illustrations for details.

![Top-down view of an electronic device showing a metallic chassis with two red-circled ports and blue connectors (no visible text or symbols)](.cpci-3915-50-15055-1020-202-en/11f6b7a3d9b1f472114473e2275cd06b54b624fdfb3a058419f5bfaa485ecd8a.jpg)

![IDE cable Pin 1](.cpci-3915-50-15055-1020-202-en/3aa958f58c1b54068b2b993aadf7a4aa21b1c6933ac9d08ea166dbb916c633c3.jpg)

![Connect IDE cable\nto connector](.cpci-3915-50-15055-1020-202-en/f1a15145917679175e3915e1d25e132a6de0cde28316f181e0e0e3a9ea09ca2d.jpg)

![Tighten the screws\nin four corners](.cpci-3915-50-15055-1020-202-en/49db0520bf9f73926e1bb407304d0d55a768982cf98723aedee0c3068700d7b6.jpg)

Figure 5-4: 2.5" Hard Disk Installation

# 5.4 CF Card Installation

The CompactFlash card has been widely accepted in mission critical embedded applications for its anti-shock/-vibration properties, better environmental tolerance, low power consumption, small form factor, and reliability.

To install the CF card, insert it to the CF card slot located under the HDD. Refer to Figure 5-5.

![Insert into CF card slot\nCompactFlash\nApacer®](.cpci-3915-50-15055-1020-202-en/786791f0c409b003f03b94274dd358c8d550f99081386052b88709afe9f02539.jpg)

Figure 5-5: Compact Flash Card Installation

# 5.5 Installing the cPCI-3915 to the Chassis

To install the cPCI-3915 module to a CompactPCI chassis:

1. Refer to the chassis documentation before installing the cPCI-3915.
2. Turn off the power in both chassis front and rear.
3. Assign a system slot for the board. Make sure you assign the correct slot.
4. Remove the panel cover opposite the slot you want to use.
5. Align the top and bottom edges of the board with the card guides on the chassis, then push the board until it is completely flushed on the chassis.

6. Move the locking handle inward until it is fully-latched. A slight resistance may be felt when inserting the board. If the resistance is too strong, check if there are bent pins on the backplane or if the board's connector pins are properly aligned with the connectors on the backplane.
7. Check if the board is seated properly on the slot. Secure the board with two screws (behind the upper and lower ejector)
8. Connect the cables and peripherals to the board, then turn the chassis on.

# 5.6 RTM (cPCI-R3915) Installation

Follow the typical cPCI board installation and removal procedures for the RTM. However, be careful when when inserting or removing RTMs to the chassis as these are shorter than front boards.

Refer to previous sections when connecting or installing peripherals to the RTM. Make sure that the RTMs you are installing are compatible with the cPCI-3915 series.

Note: You must install the correct RTM to enable some functionalities (I/O interfaces) on the rear panel. Installation of non-compatible RTMs may damage the system board and/or other RTMs.

A COM2 port is located in the front board and the RTM. You may connect a serial device to either the front or rear module COM2 port. DO NOT access these ports simultaneously.

# 6 Windows® Driver Installation

The cPCI-3915 drivers are available from the ADLINK All-In-One CD or from the ADLINK website (http://www.adlinktech.com). The following describes the driver installation procedures for Windows® 2000, Windows® XP or Windows® Server 2003:

1. Install the Windows operating system before installing any driver. Most standard I/O device drivers are installed during Windows installation.
2. Install the chipset driver.
3. Install the VGA driver and utilities.
4. Install the LAN drivers.

We recommend using the chipset, VGA, and LAN drivers provided on the ADLINK All-in-One CD or downloaded from the ADLINK website to ensure compatibility. Contact ADLINK to get support for Linux and VxWorks BSP drivers.

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# 7 Utilities

# 7.1 Watch Dog Timer

This section explains the operation of the cPCI-3915's watch dog timer (WDT). The primary function of the WDT is to monitor the cPCI-3915 operation and to reset the system if a software application fails to function as programmed. The following WDT functions may be controlled using a software application:

▶ enabled and disabled
▶ reloading timeout value

![The diagram illustrates a **Watchdog Circuit** block containing three internal components.\n\n**Labeled Blocks:**\n*   **Main Block:** A large rectangle labeled **Watchdog Circuit**.\n*   **Internal Blocks:** Inside the main block are three smaller rectangles:\n    *   **Port 2E Control and Status Register** (top left)\n    *   **Slow Clock** (bottom left)\n    *   **Counter** (bottom right)\n\n**Connections:**\n*   **Address/Data:** A double-headed arrow labeled **Address/Data** connects to the left side of the **Watchdog Circuit** block.\n*   **Reset:** A single-headed arrow points from the right side of the **Watchdog Circuit** block to the text **Reset**.](.cpci-3915-50-15055-1020-202-en/3071df7b98410f561e3ae72bd9614407770ff135fbc1b82c20c2bf64471290e6.jpg)

Figure 7-1: cPCI-3915 Watch Dog Timer Architecture

The cPCI-3915 custom WDT circuit is implemented using the ITE8712F chip. It contains two registers (CR72, CR73 of logical device 7) for controlling the WDT and for retrieving its status. The basic functions of the WDT include:

▶ Setting the watch dog timeout interval
▶ Starting the timer countdown
▶ Enabling or disabling watch dog
▶ Reloading the timeout value to keep the watch dog from timing out
▶ Setting the range of the timeout period from 1 to 255 seconds, or from 1 to 255 minutes. This is set by the control register.

When the watch dog timed out, it will send a RESET signal to the system.

# 7.2 Using the Watchdog in an Application

The following section describes the WDT functions in an application. The WDT reset function is explained in the previous section. This can be controlled through the registers in the cPCI Super I/O chip.

An application using the reset feature enables the watch dog function, sets the count-down period, and reloads the timeout value periodically to keep it from resetting the system. If the timer countdown value is not reloaded, the watch dog resets the system hardware after its counter registers zero.

For a detailed programming sample, refer to the sample code provide in the ADLINK All-In-One CD. You may find this in the following directory: X:\cPCI\cPCI-3915\WDT\WDT.ASM

# 7.3 Intel® Preboot Execution Environment (PXE)

The cPCI-3915 series supports Intel® Preboot Execution Environment (PXE), which is capable of booting or executing an OS installation over an Ethernet connection. A DHCP server in the network must be present and one or more servers must have PXE and MTFTP services. For example, a server running on Windows® NT or Windows® 2000 and has DHCP, PXE, and MTFTP services or a dedicated DHCP server with one or more additional servers with PXE and MTFTP services. This section describes the major items required for building a network environment with PXE support.

1. Set up a DHCP server with PXE tag configuration.
2. Install the PXE and MTFTP services.
3. Create a boot image file on the PXE server (also the boot server).
4. Enable the PXE boot function on the client.

# 8 BIOS

# 8.1 BIOS Setup Introduction

The Phoenix-AwardBIOS provides a setup utility program for specifying the system configurations and settings. The BIOS ROM of the system stores the setup utility. When you turn on the computer, the BIOS is immediately activated. Pressing the &lt;Del&gt; or &lt;Tab&gt; key immediately allows you to enter the setup utility. If you are a little bit late pressing the &lt;Del&gt; or &lt;Tab&gt; key, POST (Power On Self Test) will continue with its test routines, thus preventing you from invoking the setup. If you still wish to enter setup utility, restart the system by pressing the "RESET" button or simultaneously pressing the &lt;Ctrl&gt;, &lt;Alt&gt; and &lt;Delete&gt; keys. You can also restart by turning the system OFF and back ON again. The following message will appear on the screen:

Press DEL, TAB to Enter Setup

In general, you press the arrow keys to highlight items, &lt;Enter&gt; to select, the &lt;PgUp&gt; and &lt;PgDn&gt; keys to change entries, &lt;F1&gt; for help and &lt;Esc&gt; to quit. When you enter the setup utility, the main menu screen will appear on the screen. The main menu allows you to select from various setup functions and exit choices.

Phoenix – AwardBIOS CMOS Setup Utility

<table><tr><td>►Standard CMOS Features</td><td>Load Fail-safe Defaults</td></tr><tr><td>►Advanced BIOS Features</td><td>Load Optimized Defaults</td></tr><tr><td>►Advanced Chipset Features</td><td>Set Supervisor Password</td></tr><tr><td>►Integrated Peripherals</td><td>Set User Password</td></tr><tr><td>►PnP/PCI Configurations</td><td>Save &amp; Exit Setup</td></tr><tr><td>►PC Health Status</td><td>Exit Without Saving</td></tr><tr><td>ESC : Quit F9 : Menu in BIOS</td><td>↑ ↓ → ← : Select Item</td></tr><tr><td>F10 : Save &amp; Exit Setup</td><td></td></tr><tr><td colspan="2">Time, Date, Hard Disk Type</td></tr></table>

The section below the setup items of the main menu displays the control keys for this menu. Another section at the bottom of the main menu just below the control keys section displays information on the currently highlighted item in the list.

The BIOS also supports to store the CMOS settings into non-volatile ROM by using F6/F7 key.

Note: 1. After making and saving system changes with setup, you find that your computer cannot boot, the BIOS supports an override to the CMOS settings that resets your system to its default.
2. We strongly recommend that you avoid making any changes to the chipset defaults. These defaults have been carefully chosen by both BIOS vendor and your system manufacturer to provide the absolute maximum performance and reliability.

# 8.2 Standard CMOS Features

"Standard CMOS Features" item allows you to record some basic hardware configurations in your computer system and set the system clock and error handling. If the motherboard is already installed in a working system, you will not need to select this option. You will need to run the Standard CMOS option, however, if you change your system hardware configurations, the onboard battery fails, or the configuration stored in the CMOS memory was lost or damaged.

Phoenix-AwardBIOS CMOS Setup Utility Standard CMOS Features

<table><tr><td>Date (mm : dd : yy)</td><td>Mon, May 2 2006</td><td rowspan="2">Item Help</td></tr><tr><td>Time (hh : mm : ss)</td><td>16 : 34 : 3</td></tr><tr><td></td><td></td><td>Menu Level ▶</td></tr><tr><td>► Onboard PATA Master</td><td>[None]</td><td></td></tr><tr><td>► Onboard PATA Slave</td><td>[None]</td><td>Change the day, month,</td></tr><tr><td>► Onboard SATA-0</td><td>[None]</td><td>Year and century</td></tr><tr><td>► Onboard SATA-1</td><td>[None]</td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td>Video</td><td>[EGAVGA]</td><td></td></tr><tr><td>Halt On</td><td>[All , But Keyboard]</td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td>Base Memory</td><td>640K</td><td></td></tr><tr><td>Extended Memory</td><td>514048K</td><td></td></tr><tr><td>Total Memory</td><td>515072K</td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

↑↓→←:Move Enter: Select +/-PU/PD: Value F10: Save ESC: Exit F1: General Help F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults

At the bottom of the menu are the control keys for use on this menu. If you need any help in each item field, you can press the &lt;F1&gt; key. It will display the relevant information to help you. You can also see the item help at the right side of setup menu. The memory display at the lower right-hand side of the menu is read-only. It will adjust automatically according to the memory changed. The following describes each item of this menu.

# Date

The date format is:

<table><tr><td>Day</td><td>Sun to Sat (read only)</td></tr><tr><td>Month</td><td>Jan to Dec</td></tr><tr><td>Date</td><td>1 to 31</td></tr><tr><td>Year</td><td>1994 to 2079</td></tr></table>

To set the date, highlight the "Date" field and use the &lt;PgUp&gt;/&lt;PgDn&gt; or +/- keys to set the current time.

# Time

The time format is:

<table><tr><td>Hour</td><td>00 to 23</td></tr><tr><td>Minute</td><td>00 to 59</td></tr><tr><td>Second</td><td>00 to 59</td></tr></table>

To set the time, highlight the "Time" field and use the &lt;PgUp&gt;/&lt;PgDn&gt; or +/- keys to set the current time.

# Onboard PATA Master/Onboard PATA Slave/Onboard SATA-0/Onboard SATA-1

The onboard PCI IDE connectors provide primary and secondary channels for connecting up to four IDE hard disks or other IDE devices. Each channel can support up to two hard disks; the first is the “Master” and the second is the “Slave”.

The BIOS setup utility provides a sub-menu to enter the specifications for a hard disk drive.

Phoenix-AwardBIOS CMOS Setup Utility Onboard PATA Master

<table><tr><td>IDE HDD Auto-Detection</td><td>[Press Enter]</td><td rowspan="2">Item Help</td></tr><tr><td></td><td></td></tr><tr><td>Onboard PATA Master</td><td>[Auto]</td><td>Menu Level ▶▶</td></tr><tr><td>Access Mode</td><td>[Auto]</td><td></td></tr><tr><td></td><td></td><td>To auto-detect the</td></tr><tr><td>Capacity</td><td>6480 MB</td><td rowspan="2">HDD&#x27;s size, head... on this channel</td></tr><tr><td></td><td></td></tr><tr><td>Cylinder</td><td>12556</td><td></td></tr><tr><td>Head</td><td>16</td><td></td></tr><tr><td>Precomp</td><td>65535</td><td></td></tr><tr><td>Landing Zone</td><td>12556</td><td></td></tr><tr><td>Sector</td><td>63</td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

↑ ↓ → ←: Move Enter: Select +/-PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults

The following describes each item of this menu.

# IDE HDD Auto-Detection

This item is used to detect the type of hard drive. It will assign the cylinder, head, precomp, landing zone, and sector to the hard drive.

Phoenix-AwardBIOS CMOS Setup Utility Onboard PATA Master

<table><tr><td colspan="2">IDE HDD Auto-Detection</td><td>[Press Enter]</td><td rowspan="2">Item Help</td></tr><tr><td colspan="2"></td><td></td></tr><tr><td colspan="2">Onboard PATA Master</td><td>[Auto]</td><td>Menu Level ▶▶</td></tr><tr><td colspan="2">Access Mode</td><td>[Auto]</td><td></td></tr><tr><td colspan="2"></td><td rowspan="3">Detecting Hard Drive...</td><td>cts the type of fixed disk.</td></tr><tr><td colspan="2">*Capacity</td><td>type&#x27; will let you select</td></tr><tr><td colspan="2"></td><td>umber of cylinders, heads,</td></tr><tr><td colspan="2">*Cylinder</td><td>12553</td><td>###</td></tr><tr><td colspan="2">*Head</td><td>16</td><td>Note: PRECOMP=65535</td></tr><tr><td colspan="2">*Precomp</td><td>65535</td><td>means NONE!</td></tr><tr><td colspan="2">*Landing Zone</td><td>12556</td><td></td></tr><tr><td colspan="2">*Sector</td><td>63</td><td></td></tr><tr><td colspan="2"></td><td></td><td></td></tr></table>

↑ ↓ → ←: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values    F6: Fail-Safe Defaults    F7: Optimized Defaults

# Onboard PATA Master/Onboard PATA Slave/Onboard SATA-0/Onboard SATA-1

<table><tr><td>Auto</td><td>BIOS will auto detect the hard disk type.</td></tr><tr><td>Manual</td><td>User can assigns the type of hard disk when the access mode is normal.</td></tr><tr><td>None</td><td>Selects this selection when there is no hard disk in the system.</td></tr></table>

# Access Mode

<table><tr><td>Auto</td><td>Auto-detect the HDD mode</td></tr><tr><td>Normal</td><td>HD &lt; 528MB</td></tr><tr><td>Large</td><td>For MS-DOS only</td></tr><tr><td>LBA</td><td>HD &gt; 528MB and supports Logical Block Addressing</td></tr></table>

If your hard disk drive type is not matched or listed, you can use normal access mode to define your own drive type manually. If you select normal access mode, related information are requested for the following items.

<table><tr><td>Cylinder</td><td>Number of cylinders</td></tr><tr><td>Head</td><td>Number of read/write heads</td></tr><tr><td>Precomp</td><td>Write precompensation</td></tr><tr><td>Landing Zone</td><td>Landing zone</td></tr><tr><td>Sector</td><td>Number of sectors</td></tr></table>

Note: The specifications of your drive must match with the drive table. The hard disk will not work properly if you enter incorrect information in these fields.

The Capacity item is adjusted automatically according to the configuration.

# Video

This field selects the type of video display card installed in your system. You can choose the following video display cards.

<table><tr><td>EGA/VGA</td><td>For EGA, VGA, SEGA, SVGA or PGA monitor adapters.</td></tr><tr><td>CGA 40</td><td>Power up in 40 columns mode.</td></tr><tr><td>CGA 80</td><td>Power up in 80 columns mode.</td></tr><tr><td>MONO</td><td>For Hercules or MDA adapters.</td></tr></table>

# Halt On

This field determines whether the system will halt if an error is detected during power up.

<table><tr><td>No Errors</td><td>The system boot will not be halted for any error that may be detected.</td></tr><tr><td>All Errors</td><td>Whenever the BIOS detects a non-fatal error, the system will stop and you will be prompted.</td></tr><tr><td>All, But Keyboard</td><td>The system boot will not be halted for a keyboard error; it will stop for all other errors</td></tr></table>

# 8.3 Advanced BIOS Features

This section allows you to configure and improve your system and allows you to set up some system features according to your preference.

Phoenix-AwardBIOS CMOS Setup Utility

Advanced BIOS Features

<table><tr><td>▶</td><td>Hard Disk Boot Priority</td><td>[Press Enter]</td><td rowspan="2">Item Help</td></tr><tr><td></td><td>CPU L1 &amp; L2 Cache</td><td>[Enabled]</td></tr><tr><td></td><td>CPU L3 Cache</td><td>[Enabled]</td><td>Menu Level ▶</td></tr><tr><td></td><td>Quick Power On Self Test</td><td>[Enabled]</td><td></td></tr><tr><td></td><td>First Boot Device</td><td>[Hard Disk]</td><td>Allows you to choose the VIRUS</td></tr><tr><td></td><td>Second Boot Device</td><td>[CDROM]</td><td>warning feature for IDE Hard</td></tr><tr><td></td><td>Third Boot Device</td><td>[USB-CDROM]</td><td>Disk boot sector protection.</td></tr><tr><td></td><td>Boot Other Device</td><td>[Enabled]</td><td rowspan="2">If this function is enabled and someone attempt to write data</td></tr><tr><td></td><td>Boot Up NumLock Status</td><td>[On]</td></tr><tr><td></td><td>Gate A20 Option</td><td>[Fast]</td><td rowspan="3">into this area, BIOS will show a warning message on screen and alarm beep</td></tr><tr><td></td><td>Typematic Rate Setting</td><td>[Disabled]</td></tr><tr><td></td><td>Typematic Rate (Chars/Sec)</td><td>6</td></tr><tr><td></td><td>Typematic Delay(Msec)</td><td>250</td><td></td></tr><tr><td></td><td>Security Option</td><td>[Setup]</td><td></td></tr><tr><td></td><td>APIC Mode</td><td>[Disabled]</td><td></td></tr><tr><td></td><td>MPS Version Control For OS</td><td>1.4</td><td></td></tr><tr><td></td><td>Console Redirection</td><td>[Enabled]</td><td></td></tr><tr><td></td><td>Baud Rate</td><td>[19200]</td><td></td></tr><tr><td></td><td>Agent Connect via</td><td>[NULL]</td><td></td></tr><tr><td></td><td>Agent after boot</td><td>[Disabled]</td><td></td></tr><tr><td></td><td>Summary Screen Show</td><td>[Disabled]</td><td></td></tr><tr><td></td><td></td><td></td><td></td></tr></table>

↑↓→←: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values
F6: Fail-Safe Defaults
F7: Optimized Defaults

# Hard Disk Boot Priority

These items have a sub-menu when user press enter key. This item can lists all Hard Disk Device. User can select Hard Disk Boot Device Priority.

# CPU L1 & L2/L3 Cache

Cache memory is additional memory that is much faster than conventional DRAM (system memory). CPUs with 486 processors and upwards contain internal cache memory, and most, but not all, modern PCs have additional (external) cache memory. When the CPU requests data, the system transfers the requested data from the main memory into cache memory for even faster access by the CPU. This item allows you to enable (speed up memory access) or disable the cache function.

<table><tr><td>Enabled</td><td>Open CPU L1 &amp; L2 /L3 Cache</td></tr><tr><td>Disabled</td><td>Close CPU L1 &amp; L2 /L3 Cache</td></tr></table>

# Quick Power On Self Test

When enabled, this field speeds up the Power On Self Test (POST) after the system is turned on. If it is set to Enabled, BIOS will skip some items.

# First/Second/Third/Boot Other Device

The BIOS attempts to load the operating system from the devices that listed in the following items. The settings are:

<table><tr><td>LS120</td><td>Hard Disk</td><td>CDROM</td></tr><tr><td>ZIP100</td><td>USB-FDD</td><td>USB-ZIP</td></tr><tr><td>USB-CDROM</td><td>Legacy LAN</td><td>Disabled</td></tr></table>

First boot device default is Hard Disk, Second device is CDROM, and Third device is USB-CDROM.

# Boot Up NumLock Status

<table><tr><td>On</td><td>Keypad is number keys</td></tr><tr><td>Off</td><td>Keypad is arrow keys</td></tr></table>

# Gate A20 Option

This field allows you to select how Gate A20 is accessed. Gate A20 is a device used to address memory above 1 MB.

<table><tr><td>Fast</td><td>The A20 signal controlled by chipset specific method</td></tr><tr><td>Normal</td><td>The A20 signal controlled by keyboard controller or chipset hardware</td></tr></table>

# Typematic Rate Setting

<table><tr><td>Enabled</td><td>Enable typematic rate and typematic delay programming</td></tr><tr><td>Disabled</td><td>Disable typematic rate and typematic delay programming. The system BIOS will use default value of these 2 items and the default controlled by keyboard</td></tr></table>

# Typematic Rate (Chars/Sec)

When the typematic rate is enabled, the system registers repeated keystroke speeds. You can select speed ranging from 6 to 30 characters per second.

# Typematic Delay (Msec)

When the typematic rate is enabled, this item allows you to set the time interval for displaying the first and second characters.

# Security Option

This field allows you to limit access to the System and Setup.

<table><tr><td>Setup</td><td>The system always boots up and prompts for the supervisor password only when the Setup utility is called up</td></tr><tr><td>System</td><td>The system prompts for the user password every time you boot up</td></tr></table>

Note: To disable security, select PASSWORD SETTING at main menu and then you will be asked to enter the password. If you do not type anything and just press &lt;Enter&gt; key, it will disable security. Once the security is disabled, you can boot up the system and access to setup freely.

# APIC Mode

APIC mode provides redirection for upstream interrupt (24 Interrupt) to system, but need OS support (ex: Windows 2K/XP).

# MPS Version Control For OS

A BIOS Setup option allows the integrator to select whether to use Multi-Processor Specification (MPS) 1.1 or 1.4. The MPS is a specification by which PC manufacturers design and build Intel architecture systems with two or more processors.

MPS version 1.4 added extended configuration tables to improve support for multiple PCI bus configurations and improve future expandability. Most newer versions of server operating system support MPS 1.4 and, as such, you should change the BIOS setup from the default of 1.1 to 1.4 if your operating system supports the 1.4 version.

For instance, both Novell IntranetWare\* 4.11 and Microsoft Windows\*NT\* Server 4.0 support the MPS 1.4 specification. Some operating systems may require version 1.1 for compatibility reasons.

# Remote Console Function

cPCI-3915 can be used in a system that do not request video display or keyboard. It allows another computer to get POST messages and commands through serial-port access.

Note: Remote Console is a character-based terminal application. It supports either VT100 or ANSI terminals. It does not support graphics or graphical user interfaces.

# Console Redirection

This field allows you to select if remote console function is Enabled or Disabled. Default value is Enabled.

# Baud Rate

When Console Redirection is Enabled, BIOS will let user to set the serial port's operating baud rate. There are five settings for user to select, 9600,19200,38400, 57600 and 115200.

Note: The Baud Rate setting between cPCI-3915 and monitoring computer must be the same. If they are different, a error message “Award Preboot Agent Installation Failed” will display when BIOS is building the connection between two computers.

# Agent Connect via

This field selects connection mode. CPCI-3915 BIOS only support NULL mode. NULL mode means that user can connect two computer use null modem cable to achieve direct connection.

# Agent Wait Time(min)

This option allows to select the amount of time(min) to wait the connection successful. If it is timeout, the remote console function will not be supported on cPCI-3915.

# Agent after boot

This field allows you to monitor text-based applications (such as DOS) after POST. Select Disabled to terminate remote console after POST. BIOS default is Disabled.

# Summary Screen Show

When system boots, it will display a list table that show the system information such as the frequency of CPU, the size of memory, onboard device, and PCI devices. This option allows user to decide if they want to show the summary screen.

# 8.4 Advanced Chipset Features

This setup menu controls the configuration of the chipset.

Phoenix-AwardBIOS CMOS Setup Utility Advanced Chipset Features

<table><tr><td>Set CPU Speed / Voltage</td><td>[1.20G/1.356V]</td><td rowspan="3">Item Help</td></tr><tr><td>DRAM Timing Selectable</td><td>[By SPD]</td></tr><tr><td>× Cas Latency Time</td><td>4</td></tr><tr><td>× DRAM RAS# to CAS# Delay</td><td>3</td><td>Menu Level ▶</td></tr><tr><td>System BIOS Cacheable</td><td>[Enabled]</td><td></td></tr><tr><td>Video BIOS Cacheable</td><td>[Enabled]</td><td></td></tr><tr><td>▶ PCI Express Root Port Func</td><td>[Press Enter]</td><td></td></tr><tr><td>BIOS Write Protection</td><td>[Disabled]</td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td>** VGA-Setting **</td><td></td><td></td></tr><tr><td>On-Chip Frame Buffer Size</td><td>[8MB]</td><td></td></tr><tr><td>DVMT Mode</td><td>[DVMT]</td><td></td></tr><tr><td>DVMT/FIXED Memory Size</td><td>[128MB]</td><td></td></tr><tr><td>Boot Display</td><td>[CRT]</td><td></td></tr><tr><td>Panel number</td><td>[800x600]</td><td></td></tr></table>

↑↓→←: Move Enter: Select +/-PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults

# Set CPU Speed / Voltage

This item provide you to adjust the CPU Speed / Voltage for the thermal solution.

It is available for the CPU whose speed faster than 1.5GHz, and depending on CPU type, there are various CPU speed options.

# DRAM Timing Selectable

When By SPD is selected, the DRAM timing will set according to DRAM SPD ROM

recorded, otherwise the DRAM timing will set depend on Cas Latency Time and

DRAM RAS# to CAS# Delay item value that you selected.

# System BIOS Cacheable

When this function is enabled, the BIOS ROM's addresses at F0000H-FFFFFFH will be duplicated into the SRAM. It will work with the cache controller that is enabled.

<table><tr><td>Enabled</td><td>BIOS access cached</td></tr><tr><td>Disabled</td><td>BIOS access not cached</td></tr></table>

# Video BIOS Cacheable

As with caching the system BIOS above, enabling the Video BIOS cache will cause access to video BIOS addressed at C0000H to C7FFFH to be cached, it the cache controller is also enabled.

<table><tr><td>Enabled</td><td>Video BIOS access cached</td></tr><tr><td>Disabled</td><td>Video BIOS access not cached</td></tr></table>

# PCI Express Root Port Func

There are two sub-items behind this item that control each PCI Express Port.

▶ PCI Express Port 1/PCI express Port 2

<table><tr><td>Auto</td><td>Auto enabled/disabled the port depend on the device existed or not.</td></tr><tr><td>Enabled</td><td>Always enabled the port</td></tr><tr><td>Disabled</td><td>Always disabled the port</td></tr></table>

# BIOS Write Protection

To protect the BIOS from destroying by some reasons, this item lets user to select the protection type to avoid BIOS errors.

<table><tr><td>Disabled</td><td>User can flash BIOS anywhere.</td></tr><tr><td>Enabled</td><td>User can&#x27;t flash the newer BIOS file.</td></tr></table>

# On-Chip Frames Buffer Size

This item set On-Chip VGA memory cache windows size.

# DVMT Mode

Dynamic Video Memory Technology (DVMT) is an enhancement of the Unified Memory Architecture (UMA) concept, wherein the optimum amount of memory is allocated for balanced graphics and system performance.

<table><tr><td>FIXED</td><td>A static amount of page-locked graphics memory is allocated during driver initialization.</td></tr><tr><td>DVMT</td><td>The graphics driver allocates memory as needed for running graphics applications.</td></tr><tr><td>BOTH</td><td>A static amount of page-locked graphics memory is allocated during driver initialization and an additional amount of DVMT graphics memory is allocated and de-allocated based upon system need.</td></tr></table>

# DVMT/FIXED Memory Size

Memory Size that DVMT or FIXED mode utilizing.

# Boot Display

This item can set boot display. There are three display can set: CRT, CRT +LVDS, CRT+DVI.

# Panel Number

If there installs a LCD panel on Cpci-3915 platform, you can also select the panel type in this item. There are four panels types can be selected.

<table><tr><td>Panel Type No.</td><td>Function Description</td></tr><tr><td>640x480</td><td>640x480 TFT Color Panel.</td></tr><tr><td>800x600</td><td>800x600 TFT Color Panel.</td></tr><tr><td>1024x768</td><td>1024x768 TFT Color Panel.</td></tr><tr><td>1280x1024</td><td>1280x1024 TFT Color Panel.</td></tr></table>

# 8.5 Integrated Peripherals

This option sets your hard disk configuration, mode and port.

Phoenix-AwardBIOS CMOS Setup Utility

Integrated Peripherals

<table><tr><td>►OnChip IDE Device</td><td>[Press Enter]</td><td rowspan="2">Item Help</td></tr><tr><td>►Onboard Device</td><td>[Press Enter]</td></tr><tr><td>►SuperIO Device</td><td>[Press Enter]</td><td>Menu Level ►</td></tr><tr><td>Onboard Lan Boot ROM</td><td>[Disable]</td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

↑↓→←: Move Enter: Select +/-PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults

# OnChip IDE Device

When you press an "Enter" key at "OnChip IDE Device" item, a sub-menu will display as follows.

Phoenix – Award BIOS CMOS Setup Utility

OnChip IDE Device

<table><tr><td rowspan="2">IDE HDD Block Mode [Enabled]IDE DMA transfer access [Enabled]On-Chip Primary PCI IDE [Enabled]IDE Primary Master PIO [Auto]IDE Primary Slave PIO [Auto]IDE Primary Master UDMA [Auto]IDE Primary Slave UDMA [Auto]</td><td>Item Help</td></tr><tr><td>Menu Level ▶</td></tr></table>

↑↓→←: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help

F5: Previous Values

F6: Fail-Safe Defaults

F7: Optimized Defaults

# IDE HDD Block Mode

This field allows your hard disk controller to use the fast block mode to transfer data to and from your hard disk drive.

<table><tr><td>Enabled</td><td>IDE controller uses block mode</td></tr><tr><td>Disabled</td><td>IDE controller uses standard mode</td></tr></table>

# On-Chip Primary/Secondary PCI IDE

The integrated peripheral controller contains an IDE interface with support for two IDE channels. Select Enabled to activate each channel separately.

# IDE Primary/Secondary Master/Slave PIO

These fields allow your system hard disk controller to work faster. Rather than have the BIOS issue a series of commands that transfer to or from the disk drive, PIO (Programmed Input/

Output) allows the BIOS to communicate with the controller and CPU directly.

The system supports five modes, numbered from 0 to 4, which primarily differ in timing. When Auto is selected, the BIOS will select the best available mode.

<table><tr><td>Auto</td><td>Auto select which mode that BIOS communicates with the controller and CPU</td></tr><tr><td>Mode0~Mode4</td><td>User define the PIO mode</td></tr></table>

# IDE Primary/Secondary Master/Slave UDMA

These fields allow your system to improve disk I/O throughput up to 100MB/sec with the Ultra DMA/100 feature. The options are Auto and Disabled.

# Onboard Device

When you press an “Enter” key at “Onboard Device” item, a sub-menu will display as follows.

Phoenix – Award BIOS CMOS Setup Utility Onboard Device

<table><tr><td>USB Controller</td><td>[Enabled]</td><td rowspan="2">Item Help</td></tr><tr><td>USB 2.0 Controller</td><td>[Enabled]</td></tr><tr><td>USB Keyboard Support</td><td>[Disabled]</td><td rowspan="3">Menu Level ▶</td></tr><tr><td>Onboard LAN1 Chip</td><td>[Enabled]</td></tr><tr><td>Onboard LAN2 Chip</td><td>[Enabled]</td></tr></table>

↑↓→←: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults

# USB Controller

Select Enabled if your system contains a Universal Serial Bus (USB) controller and you have USB peripherals.

# USB2.0 Controller

Select Enabled if your system contains a Universal Serial Bus(USB) controller and you have USB peripherals. The default is Enabled.

# USB Keyboard Support

Select Enabled that Support USB Keyboard function under legacy OS, MS-DOS for example. The default is Disabled.

# Onboard LAN1/LAN2 Chip

Enable/disable the onboard LAN1/LAN2 chip .The default are all Enabled.

# SuperIO Function Setup

When you press an "Enter" key at "SuperIO Device" item, a sub-menu will display as follows.

Phoenix-AwardBIOS CMOS Setup Utility SuperIO Device

<table><tr><td>Onboard Serial Port 1</td><td>[3F8/IRQ4]</td><td rowspan="2">Item Help</td></tr><tr><td>Onboard Serial Port 2</td><td>[2F8/IRQ3]</td></tr><tr><td></td><td></td><td>Menu Level ▶</td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

↑↓→←: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults

# Onboard Serial Port 1/2

These fields allow you to select the onboard serial ports and their addresses. The default values for these ports are:

<table><tr><td>Serial Port 1</td><td>3F8 / IRQ4</td></tr><tr><td>Serial Port 2</td><td>2F8 / IRQ3</td></tr></table>

# Onboard Lan Boot ROM

This item allows you to decide to support PXE function or not. The PXE function can lets system boot from a network environment. To support it, it also need a DHCP server to link the system. The default setting is Enabled.

# 8.6 PNP/PCI Configuration

This section describes configuring the PCI bus system.

Phoenix-AwardBIOS CMOS Setup Utility

PnP/PCI Configurations

<table><tr><td>Reset Configuration Data</td><td>[Disabled]</td><td rowspan="2">Item Help</td></tr><tr><td>Resources Controlled By</td><td>[Auto(ESCD)]</td></tr><tr><td> $\times$ IRQ Resources</td><td>Press Enter</td><td>Menu Level ▶</td></tr><tr><td>PCIVA G A Palette Snoop</td><td>[Disabled]</td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

↑ ↓ → ←: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values
F6: Fail-Safe Defaults
F7: Optimized Defaults

# Reset Configuration Data

Normally, you leave this field Disabled. Select Enabled to reset Extended System Configuration Data (ESCD) when you exit Setup if you have installed a new add-on and the system reconfiguration has caused such a serious conflict that the operating system can't boot.

# Resources Controlled by

This PnP BIOS can configure all of the boot and compatible devices automatically. However, this capability needs you to use a PnP operating system such as Windows 98, 2000 or XP. If you set this field to “manual” choose specific resources by going into each of the sub menu that follows this field.

<table><tr><td>Auto(ESCD)</td><td>PnP BIOS configure all compatible devices automatically</td></tr><tr><td>Manual</td><td>User can assign IRQ &amp; DMA to the devices</td></tr></table>

# IRQ Resources

When resources are controlled manually, assign each system interrupt a type, depending on the type of device using the interrupt.

# PCI/VGA Palette Snoop

Some non-standard VGA display cards may not show colors properly. This field allows you to set whether MPEG ISA/VESA VGA cards can work with PCI/VGA or not.

<table><tr><td>Enabled</td><td>PCI/VGA can work with MPEG ISA/VESA VGA card</td></tr><tr><td>Disabled</td><td>PCI/VGA can not work with MPEG ISA/VESA VGA card</td></tr></table>

# 8.7 PC Health Status

Phoenix-AwardBIOS CMOS Setup Utility PC Health Status

<table><tr><td>Vcore</td><td></td><td rowspan="2">Item Help</td></tr><tr><td>VCCP</td><td></td></tr><tr><td>1.5V</td><td></td><td>Menu Level ▶</td></tr><tr><td>1.8V</td><td></td><td></td></tr><tr><td>3.3V</td><td></td><td></td></tr><tr><td>5V</td><td></td><td></td></tr><tr><td>12V</td><td></td><td></td></tr><tr><td>Voltage Battery</td><td></td><td></td></tr><tr><td>Current System Temp.</td><td></td><td></td></tr><tr><td>Current CPU Temperature</td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

↑↓→←: Move Enter: Select +/-PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults

# Vcore/VCCP/1.5V/1.8V/3.3V/5V/12V/Voltage Battery/Current System Temp./Current CPU Temperature

These items will show the temperatures and voltages of system and CPU.

# 8.8 Load Fail-Safe Defaults

This option allows you to load the troubleshooting default values permanently stored in the BIOS ROM. These default settings are non-optimal and disable all high-performance features.

Phoenix-AwardBIOS CMOS Setup Utility

<table><tr><td>► Standard CMOS Features</td><td>► Frequency/Voltage Control</td></tr><tr><td>► Advanced BIOS Features</td><td>Load Fail-Safe Defaults</td></tr><tr><td>► Advanced Chipset Features</td><td>Load Optimized Defaults</td></tr><tr><td>► Integrated Peripherals</td><td>Load</td></tr><tr><td>► Power Management S</td><td></td></tr><tr><td>► PnP/PCI Configuration</td><td></td></tr><tr><td>► PC Health Status</td><td>Exit Without Saving</td></tr><tr><td>Esc : Quit F9 : Menu in BIOS</td><td>↑ ↓ → ← : Select Item</td></tr><tr><td>F10 : Save &amp; Exit Setup</td><td></td></tr><tr><td colspan="2">Load Fail-Safe Defaults</td></tr></table>

To load Fail-Safe defaults value to CMOS SRAM, enter "Y". If not, enter "N".

# 8.9 Set Supervisor / User Password

These two options set the system password. Supervisor Password sets a password that will be used to protect the system and Setup utility. User Password sets a password that will be used exclusively on the system. To specify a password, highlight the type you want and press &lt;Enter&gt;. The Enter Password: message prompts on the screen. Type the password, up to eight characters in length, and press &lt;Enter&gt;. The system confirms your password by asking you to type it again. After setting a password, the screen automatically returns to the main screen.

To disable a password, just press the &lt;Enter&gt; key when you are prompted to enter the password. A message will confirm the password to be disabled. Once the password is disabled, the system will boot and you can enter Setup freely.

Phoenix-AwardBIOS CMOS Setup Utility
![► Standard CMOS Features\n► Advanced BIOS Features\n► Advanced Chipset\n► Integrated Periphe\n► Power Management\n► PnP/PCI Configura\n► PC Health Status\nEsc : Quit F9 : Menu in BIOS\nF10 : Save & Exit Setup\n► Frequency/Voltage Control\nLoad BIOS Defaults\nEnter Password:\n▲ ↓ → ← : Select Item\n▲ ↓ → ← : Select Item](.cpci-3915-50-15055-1020-202-en/569be677f8fd6c01f5b299961df019c0c7587a96ff4ed574b522da7c9e5a4d05.jpg)

# 8.10 Save & Exit Setup

# Save & Exit Setup

This option allows you to determine whether to accept the modifications or not. Typing Y will quit the setup utility and save all changes into the CMOS memory. Typing N will return to Setup utility.

Phoenix-AwardBIOS CMOS Setup Utility

<table><tr><td>► Standard CMOS Features</td><td>► Frequency/Voltage Control</td></tr><tr><td>► Advanced BIOS Features</td><td>Load BIOS Defaults</td></tr><tr><td>► Advanced Chipset Features</td><td>Cat Supervision Password</td></tr><tr><td>► Integrated Peripher</td><td>Card</td></tr><tr><td>► Power Management</td><td></td></tr><tr><td>► PnP/PCI Configura</td><td></td></tr><tr><td>► PC Health Status</td><td></td></tr><tr><td>Esc : Quit F9 : Menu in BIOS</td><td>&lt;img src="images/ed1426ec27b3f109fecd80b2db5c663dd33db82ef56fbe6d157b08352a77a8e1.jpg"/&gt;</td></tr><tr><td>F10 : Save &amp; Exit Setup</td><td></td></tr><tr><td colspan="2">Save &amp; Exit Setup</td></tr></table>

# Exit Without Saving

Select this option to exit the Setup utility without saving the changes you have made in this session. Typing Y will quit the Setup utility without saving the modifications. Typing N will return to Setup utility.

Phoenix-AwardBIOS CMOS Setup Utility

<table><tr><td>► Standard CMOS Features</td><td>► Frequency/Voltage Control</td></tr><tr><td>► Advanced BIOS Features</td><td>Load BIOS Defaults</td></tr><tr><td>► Advanced Chipset Features</td><td>Set Supervisor Password</td></tr><tr><td colspan="2">► Integrated Periphe &lt;img src="images/c9e117a10181da7010eb760cb306edd29bcec7e9678f0cd80904e2c587c0a758.jpg"/&gt;</td></tr><tr><td>► Power Management</td><td></td></tr><tr><td>► PnP/PCI Configura</td><td></td></tr><tr><td>► PC Health Status</td><td></td></tr><tr><td>Esc : Quit F9 : Menu in BIOS</td><td>&lt;img src="images/540fe5b9b6819c615e6acc6293057cf5d798fea1e4b8a83cab63c97c42f77744.jpg"/&gt;</td></tr><tr><td>F10 : Save &amp; Exit Setup</td><td></td></tr><tr><td colspan="2">Exit without Saving</td></tr></table>

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# Important Safety Instructions

Please read and follow all instructions marked on the product and in the documentation before operating the system. Retain all safety and operating instructions for future use.

▶ Please read these safety instructions carefully.
$\triangleright$ Please keep this User's Manual for future reference.
▶ The equipment should be operated within the recommended operating temperature.
The equipment should be operated only from the type of power source indicated on the rating label. Make sure the voltage of the power source is correct when connecting the equipment to the power outlet.
If the user's equipment has a voltage selector switch, make sure that the switch is set to the proper position for the area. The voltage selector switch is set at the factory to the correct voltage.
▶ For pluggable equipment, ensure they are installed near a socket-outlet that is easily accessible.
- Secure the power cord to prevent unnecessary accidents. Do not place anything over the power cord.
▶ If the equipment will not be in use for long periods of time, disconnect the equipment from mains to avoid being damaged by transient overvoltage.
▶ All cautions and warnings on the equipment should be noted.
▶ Please keep this equipment away from humidity.
▶ Do not use this equipment near water or a heat source.
▶ Place this equipment on a reliable surface when installing. A drop or fall could cause injury.
▶ Never pour any liquid into the opening, this could cause fire or electrical shock.

▶ Openings in the case are provided for ventilation. Do not block or cover these openings. Make sure there is adequate space around the system for ventilation when setting up the work area. Never insert objects of any kind into the ventilation openings.
▶ To avoid electrical shock, always unplug all power and modem cables from the wall outlets before removing covers.
▶ Lithium Battery provided (real time clock battery)

"CAUTION - Risk of explosion if battery is replaced by an incorrect type. Dispose used batteries as instructed in the instructions"

▶ The equipment should be checked by service personnel if one of the following situation arises:

▷ The power cord or plug is damaged.
▷ Liquid has penetrated the equipment.
The equipment has been exposed to moisture.
The equipment is not functioning or does not function according to the user's manual.
The equipment has been dropped and damaged.
▷ If the equipment has obvious sign of breakage.

▶ Never open the equipment. For safety reasons, the equipment should only be opened by qualified service personnel.

# Getting Service

Contact us should you require any service or assistance.

# ADLINK Technology, Inc.

Address: 9F, No.166 Jian Yi Road, Zhonghe District
New Taipei City 235, Taiwan
新北市中和區建一路 166 號 9 樓

Tel: +886-2-8226-5877

Fax: +886-2-8226-5717

Email: service@adlinktech.com

# Ampro ADLINK Technology, Inc.

Address: 5215 Hellyer Avenue, #110, San Jose, CA 95138, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-360-0222

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

Address: 上海市浦东新区张江高科技园区芳春路 300 号 (201203)
300 Fang Chun Rd., Zhangjiang Hi-Tech Park,
Pudong New Area, Shanghai, 201203 China

Tel: +86-21-5132-8988

Fax: +86-21-5132-3588

Email: market@adlinktech.com

# ADLINK Technology Beijing

Address: 北京市海淀区上地东路 1 号盈创动力大厦 E 座 801 室(100085)
Rm. 801, Power Creative E, No. 1, B/D
Shang Di East Rd., Beijing, 100085 China

Tel: +86-10-5885-8666

Fax: +86-10-5885-8625

Email: market@adlinktech.com

# ADLINK Technology Shenzhen

Address: 深圳市南山区科技园南区高新南七道 数字技术园

A1 栋 2 楼 C 区 (518057)

2F, C Block, Bldg. A1, Cyber-Tech Zone, Gao Xin Ave. Sec. 7, High-Tech Industrial Park S., Shenzhen, 518054 China

Tel: +86-755-2643-4858

Fax: +86-755-2664-6353

Email: market@adlinktech.com

# ADLINK Technology (Europe) GmbH

Address: Nord Carree 3, 40477 Duesseldorf, Germany

Tel: +49-211-495-5552

Fax: +49-211-495-5557

Email: emea@adlinktech.com

# ADLINK Technology, Inc. (French Liaison Office)

Address: 15 rue Emile Baudot, 91300 Massy CEDEX, France

Tel: +33 (0) 1 60 12 35 66

Fax: +33 (0) 1 60 12 35 66

Email: france@adlinktech.com

# ADLINK Technology Japan Corporation

Address: 〒101-0045 東京都千代田区神田鍛冶町 3-7-4

神田 374 ビル 4F

KANDA374 Bldg. 4F, 3-7-4 Kanda Kajicho,

Chiyoda-ku, Tokyo 101-0045, Japan

Tel: +81-3-4455-3722

Fax: +81-3-5209-6013

Email: japan@adlinktech.com

# ADLINK Technology, Inc. (Korean Liaison Office)

Address: 서울시 서초구 서초동 1675-12 모인터빌딩 8 층

8F Mointer B/D,1675-12, Seocho-Dong, Seocho-Gu,

Seoul 137-070, Korea

Tel: +82-2-2057-0565

Fax: +82-2-2057-0563

Email: korea@adlinktech.com

# ADLINK Technology Singapore Pte. Ltd.

Address: 84 Genting Lane #07-02A, Cityneon Design Centre, Singapore 349584

Tel: +65-6844-2261

Fax: +65-6844-2263

Email: singapore@adlinktech.com

# ADLINK Technology Singapore Pte. Ltd. (Indian Liaison Office)

Address: 1st Floor, #50-56 (Between 16th/17th Cross) Margosa Plaza, Margosa Main Road, Malleswaram, Bangalore-560055, India

Tel: +91-80-65605817, +91-80-42246107

Fax: +91-80-23464606

Email: india@adlinktech.com

# ADLINK Technology, Inc. (Israeli Liaison Office)

Address: 6 Hasadna St., Kfar Saba 44424, Israel

Tel: +972-9-7446541

Fax: +972-9-7446542

Email: israel@adlinktech.com
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