# cPCI-6630 Series

Value 6U CompactPCI®

Intel® Core™ i7/i3/Celeron® Processor Blade

User’s Manual

![Green computer motherboard with visible CPU socket, RAM slots, and ports (no text or symbols)](.cpci-6630-50-15110-2010-11/8e6ceed85b5140702a7ffcc174a746848ba73c48cb60ff3526afb4ce2e7cf967.jpg)

![Back view of a green computer motherboard with ports and connectors (no visible text or labels)](.cpci-6630-50-15110-2010-11/4bcb48f572064802b875721ccae7447469ed6dce02cfbf472f44b5e5d6aaaea7.jpg)

Manual Rev.: 1.1

Revision Date: June 3, 2020

Part No: 50-15110-2010

# Revision History

<table><tr><td>Revision</td><td>Release Date</td><td>Description of Change(s)</td></tr><tr><td>1.0</td><td>2018-02-02</td><td>Initial release</td></tr><tr><td>1.1</td><td>2020-06-03</td><td>Update block diagram, correct J3 pinout</td></tr></table>

# Preface

Copyright © 2017, 2020 ADLINK Technology Inc.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Conventions

Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly.

![The image displays a digital icon resembling a piece of white paper with a folded top-right corner. Faint grey horizontal lines run across the lower portion of the paper, suggesting text. Overlaid on the document is a large, bold, red checkmark (or tick) that stretches diagonally from the bottom left to the top right.](.cpci-6630-50-15110-2010-11/dde1ce4938c600c13ca67b9ef4ea852f31a18ac8f47f1f6abd6ac6e03d085fd6.jpg)
NOTE:

Additional information, aids, and tips that help users perform tasks.

![A yellow triangle with a black border containing a large black exclamation point in the center.](.cpci-6630-50-15110-2010-11/d10b6257e5a8155c2e8e3f5bbe83196d87ef832821e103a2cfdb0fbe4b0ac40f.jpg)
CAUTION:

Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.

![The image displays a red triangular warning sign with a white border. Inside the red triangle is a large white exclamation mark.](.cpci-6630-50-15110-2010-11/bbff3c0647d0cdf5b74b1f1ba00e886985be654a328aee78251798b9a43a7ae7.jpg)
WARNING:

Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task.

# Table of Contents

# Revision History........ ii

# Preface ............. iii

# List of Figures ........ ix

# List of Tables ......... ... xi

# 1 Introduction ......

1.1 Overview ....... 1
1.2 Features... 2
1.3 Package Contents ..... 3

# 2 Specifications ........ 5

2.1 cPCI-6630(D) Processor Blade Specifications ........... 5
2.2 Block Diagrams.... 8
2.3 I/O Connectivity Table . 9
2.4 Power Requirements .... 10

# 3 Functional Description ........ 1 3

3.1 Processors..... 13
3.2 Chipset... 15
3.3 PMC... . 16
3.4 Intel® Turbo Boost Technology . 1 6
3.5 Intel® Hyper-Threading Technology....... 16
3.6 Battery ...... . 17

# 4 Board Interfaces ........ 1 9

4.1 cPCI-6630(D) Component Side Layout ... 19
4.2 cPCI-6630 Solder Side Layout .. 20
4.3 cPCI-6630D Assembly Layoutt.. . 21

4.4 cPCI-6630(D) Front Panel . 22
4.5 User LEDs..... 24
4.6 Connector Pin Assignments.... 2 5
4.7 Switches and Buttons .... 38

# 5 Getting Started ........ ... 45

5.1 CPU and Heatsink .. 45
5.2 CFast Card Installation ... 46
5.3 CompactFlash Card Installation (optional).. 49
5.4 2.5" SATA Drive Installation... 52
5.5 PMC Installation (cPCI-6630D only) ...... 55
5.6 Installing the cPCI-6630(D) to the Chassis.. 60

# 6 Driver Installation...... .... 61

6.1 cPCI-6630 Drivers... .. 61

# 7 Utilities ........ .... 63

7.1 Watchdog Timer..... 63
7.2 User LED Programming... 68

# 8 BIOS Setup Utility ........... .... 71

8.1 Starting the BIOS ... 71
8.2 Main Setup...... 76
8.2.1 System Management.. .. 77

8.3 Advanced BIOS Setup....... 81

8.3.1 AMT Configuration ...... . 82
8.3.2 PCH-FW Configuration .. .. 83
8.3.3 IT8786 Super IO Configuration... . 84
8.3.4 Hardware Monitor .... . 86

8.3.5 Serial Port Console Redirection. . 87

8.3.6 CPU Configuration ...... . 92

8.3.7 SATA Configuration ..... . 94

8.3.8 Network Stack Configuration ...... . 97

8.3.9 CSM Configuration .. .. 98

8.3.10USB Configuration...... .. 100

8.4 Chipset Setup ...... . 102

8.4.1 System Agent (SA) Configuration..... .. 103

8.4.2 PCH-IO Configuration...... .. 107

8.5 Boot Settings ..... .. 110

8.6 Security Setup ........ ... 112

8.7 Save & Exit Menu . . 113

# 9 Checkpoints & Beep Codes ....... ..... 115

9.1 Checkpoint Ranges .... .. 115

9.2 Standard Checkpoints ..... 115

9.3 OEM-Reserved Checkpoint Ranges.... 124

# Important Safety Instructions ....... 125

# Getting Service.......... 127

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# List of Figures

Figure 2-1: cPCI-6630(D) Blade Functional Block Diagram............... 8
Figure 4-1: cPCI-6630(D) Component Side Layout .. . 19
Figure 4-2: cPCI-6630(D) Solder Side Layout . .. 20
Figure 4-3: cPCI-6630D Assembly Layout.. . 21
Figure 4-4: cPCI-6630(D) LED Labels ... .. 24

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# List of Tables

Table 2-1: cPCI-6630 Processor Blade Specifications . . 5

Table 2-2: cPCI-6630(D) I/O Connectivity . 9

Table 4-1: cPCI-6630(D) Front Panel System LED Descriptions ... 23

Table 4-2: DVI-I Connector Pin Definition... . 25

Table 4-3: DVI-D Connector Pin Definition ... .. 26

Table 4-4: USB 2.0 Pin Definition ...... . 27

Table 4-5: Front Panel COM1 Pin Definitions.... . 28

Table 4-6: COM RJ-45 to DB-9 Cable Pin Definitions ...... .. 28

Table 4-7: RJ-45 GbE Pin Definitions... . 29

Table 4-8: LAN LED Status Definitions... . 29

Table 4-9: Serial ATA 7-pin Connector Pin Definition.............. .. 30

Table 4-10: Serial ATA Connector with power Pin Definition............ 30

Table 4-11: CFast Socket Pin Definition.. . 31

Table 4-12: PMC Connector Pin Definitions ... . 32

Table 4-13: CompactPCI J1 Connector Pin Definition.... . 34

Table 4-14: CompactPCI J2 Connector Pin Definition...... . 35

Table 4-15: CompactPCI J3 Connector Pin Definition........... .. 36

Table 4-16: CompactPCI J5 Connector Pin Definition........... .. 37

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# 1 Introduction

# 1.1 Overview

The ADLINK cPCI-6630 Series is a 6U 4/8 HP CompactPCI® processor blade featuring a 6th generation Intel® Core™ i7/i3/Celeron® processor and Mobile Intel® HM170 PCH with DDR4-2133 non ECC memory up to 32GB via 2 SODIMM sockets. The single-slot 4HP cPCI-6630 features front panel I/O including 1x DVI-I, 1x DVI-D, 3x GbE, 3x USB 3.0, 1x USB 2.0, 1x RJ-45 COM port and 1x PS/2 KB/MS. The dual-slot 8HP cPCI-6630D provides one DB-9 COM port and one 32-bit/33MHz PMC space in additional to single slot version's front panel IO. Available storage options for both the cPCI-6630 and cPCI-6630D include a 1x 2.5" SATA drive space and 1x 7-pin SATA connector. In addition, the cPCI-6630 Series offers an onboard CFast slot with CompactFlash slot as option.

Graphics support for the cPCI-6630 Series is integrated on the CPU. The 6th generation Intel® Core™ processor (formerly "Skylake") supports hardware-accelerated HEVC 8-bit decoding and encoding that brings more efficient and smarter compression for video applications. The cPCI-6630 also supports 3 independent displays when mated with cPCI-R6002 or cPCI-R6100 rear transition modules.

Rear I/O signals to RTM include 2x GbE by Intel® Ethernet Controller I210 switched from the front panel, 1x DVI-I switchable to J3, 1x DVI-D to J5, 1x PCIe x4 (configurable to 4x PCIe x1), 2x SATA 3 Gb/s, 6x USB 2.0, 5x GPIO, High Definition Audio, KB/MS, and 2x serial ports.

The cPCI-6630 Series is powered by 5V only, offers balanced performance provided by the 6th generation Intel® Core™ processor family, and is an ideal solution for industrial applications that require best value-per-watt computing power. The cPCI-6630 Series provides additional flexibility by supporting operation in peripheral slots without CompactPCI bus communication (Satellite mode), as well as supporting remote monitoring and manageability using ADLINK's SEMA Utilities 3.5, making it Industry 4.0 ready.

# 1.2 Features

X 6U CompactPCI blade in 4/8HP width form factor
X Powered by single 5V power rail
X 14nm Intel® Core™ i7-6820EQ Processor (4 cores, 8 threads, 8MB Smart Cache, 2.8 GHz) and Mobile Intel® HM170 Chipset
X Graphics and memory controllers integrated in processor
X Supports H.265 hardware-accelerated HEVC 8-bit decoding and encoding
Dual channel DDR4-2133 non-ECC via 2x DDR4-2133 SODIMM socket, up to 32GB
64bit/66MHz CompactPCI Interface based on PCI specifications, universal V(I/O)
X Supports Host mode operation as a master in host slots and supports Satellite mode operation as a standalone computer without connection to the PCI bus
X One 32-bit/33MHz PMC site on cPCI-6630D
X One DVI-I port and one DVI-D on front panel
X Three PCIe Gigabit Ethernet egress ports on front panel supported by an Intel Ethernet controller, one supports Intel® AMT 9.0 by Intel® Ethernet Controller I219LM, two Ethernet ports are switchable to J3 for PICMG 2.16
X Additional two Gigabit Ethernet ports with cPCI-R6100 Series RTM
X Three USB 3.0 ports and one USB 2.0 port on front panel
X High definition audio routed to RTM
X Onboard 2.5" SATA SSD space and one 7-pin SATA connector
X Optional CFast or CompactFlash slot (CFast by default)
X Optional SEMA 3.0/3.5 for system management

# 1.3 Package Contents

The cPCI-6630 is packaged with the following components. If any of the following items are missing or damaged, retain the shipping carton and packing material and contact the dealer for inspection. Please obtain authorization before returning any product to ADLINK. The packing contents of cPCI-6630 Series non-standard configurations will vary depending on customer requests.

# cPCI-6630 Processor Blade

X Processor Blade
Z CPU and memory specifications will differ depending on options selected
Z Thermal module is assembled on the board
X DVI-I to VGA adapter (PN: 30-52002-1000)
X RJ-45 to DB-9 COM adapter cable (PN: 30-01020-0200)
X PS/2 keyboard/mouse combo cable (PN: 30-01016-2000)
X 2.5" SATA drive accessory pack (PN: 58-99097-0010)
X 2.5” SATA adapter board (PN: 59-37571-0000)
X CFast accessory pack (PN: 58-99721-0000, CFast SKU only)

# cPCI-6630D Processor Blade

Same as the cPCI-6630 with the following additional items:

X PMC accessory pack (cPCI-6630D only)
X PMC adapter board (PN: 59-37540-0010)

# Compatible Rear Transition Modules

X cPCI-R6002 (PN: 91-37197-3010)
X cPCI-R6002D (PN: 91-37197-3130)
X cPCI-R6100 (PN: 91-37199-0040)
X cPCI-R6110 (PN: 91-37199-1040)
X cPCI-R6120 (PN: 91-37199-401E)

![The image displays a graphic icon featuring a white sheet of paper with horizontal grey lines running across it. The top left corner of the paper is folded down in a 'dog-ear' style. A large, bold red checkmark is drawn diagonally across the center of the document, slanting upwards from left to right.](.cpci-6630-50-15110-2010-11/8aa1b80c60a7681de989504dc4f8a6bb8e8c6b0d57644b232581d06a963f7e64.jpg)
NOTE:

The contents of non-standard cPCI-6630 configurations may vary depending on the customer’s requirements.

![The image displays a yellow triangular warning sign with a black border and a black exclamation point in the center. Below the triangle is the word 'CAUTION:' in black capital letters.](.cpci-6630-50-15110-2010-11/6e1f45f53841db4596f2e383de700cd8eacf8260bc387589a6970644593f5e4a.jpg)

This product must be protected from static discharge and physical shock. Never remove any of the components except at a static-free workstation. Use the anti-static bag shipped with the product when putting the board on a surface. Wear an anti-static wrist strap properly grounded on one of the system's ESD ground jacks when installing or servicing system components.

# 2 Specifications

2.1 cPCI-6630(D) Processor Blade Specifications

<table><tr><td>CompactPCI®Standards</td><td>PICMG® 2.0 CompactPCI® Rev. 3.0PICMG® 2.1 Hot Swap Specification Rev. 2.0PICMG® 2.16 Packet Switching Backplane Rev. 1.0</td></tr><tr><td>Mechanical</td><td>Standard 6U CompactPCI®Board size: 233mm x 160mmSingle/dual-slot (4/8HP, 20.32/40.64mm)CompactPCI® connectors: J1, J2, J3, J5</td></tr><tr><td>Processor</td><td>Intel® CoreTM i7-6820EQ Processor, quad core, eight thread, 2.8 GHz (3.5 GHz Turbo), 8MB Smart Cache, TDP 45WIntel® CoreTM i3-6100E Processor, dual core, four thread, 2.7 GHz, 3MB Smart Cache, TDP 35WIntel® Celeron® Processor G3900E, dual core, dual thread, 2.4 GHz, 2MB Smart Cache, TDP 35WPassive heatsink</td></tr><tr><td>Chipset</td><td>Mobile Intel® HM170 PCH</td></tr><tr><td>Memory</td><td>Dual channel DDR4-2133 non-ECC memory via 2x SODIMMsSupports up to 32GB</td></tr><tr><td>Graphics</td><td>Integrated on Intel® CoreTM i7-6820EQ and CoreTM i3-6100E processors,: Intel® HD Graphics 530Integrated on Intel® Celeron® processor G3900E,: Intel® HD Graphics 510One DVI-I and one DVI-D port on front panel with shared VGA signal switchable to J3 and DisplayPort signal switchable to J5Up to three independent displays with cPCI-R6002 and cPCI-R6100 RTMs</td></tr><tr><td>GigabitEthernet</td><td>One PCIe x1 Intel® I219LM GbE PHY and two PCIe x1 Intel® I210IT Gigabit Ethernet controllersThree egress 10/100/1000BASE-T ports on front panel, one supporting Intel® AMT 9.0 by I219LM PHY controller, and two others 10/100/1000BASE-T ports switchable to rear for PICMG 2.16</td></tr><tr><td>CompactPCIBus</td><td>PCI 64-bit/66MHz; 3.3V, 5V universal V I/OSupports Host mode operation as a master in host slots and supports Satellite mode operation as a standalone computer without connection to the PCI bus</td></tr></table>

Table 2-1: cPCI-6630 Processor Blade Specifications

<table><tr><td>Serial Ports</td><td>Up to four serial portsUp to two RS-232/422/485 serial ports on front panel (one on cPCI-6630, two on cPCI-6630D)Two RS-232 COM port routed to J3</td></tr><tr><td>USB 2.0</td><td>One USB 2.0 port on front panelUp to six USB 2.0 ports routed to rear transition module</td></tr><tr><td>USB 3.0</td><td>Three USB 3.0 ports on front panel</td></tr><tr><td>PMC</td><td>One 32-bit/33 MHz PMC site</td></tr><tr><td>Audio</td><td>High definition audio routed to rear</td></tr><tr><td>Storage Interfaces1</td><td>One onboard 2.5” SATA connector supporting SATA 6Gb/s drive on cPCI-6630Optional onboard CFast slot or CompactFlash slotOne SATA 3Gb/s 7-pin connector onboardThree SATA 3Gb/s channels routed to RTM (two to J3 and one to J5)</td></tr><tr><td>Faceplate I/O</td><td>cPCI-6630 (4HP)3x 10/100/1000BASE-T Ethernet ports1x DVI-I port &amp; 1x DVI-D port3x USB 3.0 ports1x USB 2.0 port1x RJ-45 serial port supporting RS-232/422/4851x PS/2 keyboard/mouse portcPCI-6630D (8HP)3x 10/100/1000BASE-T Ethernet ports1x DVI-I port &amp; 1x DVI-D port3x USB 3.0 ports1x USB 2.0 port1x RJ-45 serial port &amp; 1x DB-9 serial port supporting RS-232/422/4851x PS/2 keyboard/mouse port1x PMC slot</td></tr><tr><td>BIOS</td><td>AMI UEFI BIOS, 64 Mbit SPI serial flash, supports Configurable TDP (can be set as Nominal and Down)</td></tr><tr><td>OS Compatibility</td><td>Microsoft Windows 7 64-bitMicrosoft Windows 8.1 64-bitMicrosoft Windows 10 64-bitRed Hat Enterprise Linux 6.4, 64-bitFedora 14, 32-bitVxWorks 6.8/6.9/7QNX 6.5/6.6Other OS support upon request</td></tr></table>

Table 2-1: cPCI-6630 Processor Blade Specifications

<table><tr><td>Environmental</td><td>Operating Temperature (with forced air flow) $^{2}$ :Standard: -20°C to +60°CExtended: -20°C to +70°C with forced air flowStorage Temperature: -50°C to 100°CHumidity: 95% @60°C non-condensingShock: 20G peak-to-peak, 11ms duration, non-operatingVibration $^{1}$ : 2Grms, 5-500Hz, each axis, operating (w/o hard drive)</td></tr><tr><td>EMI</td><td>FCC 47 CER Part 15 Class BCE EN55032 Class BIEC 61000 Class A</td></tr></table>

Table 2-1: cPCI-6630 Processor Blade Specifications

1. The storage device limits the operational vibration tolerance. When the application requires higher specification for anti-vibration, it is recommended to use a flash storage device.

2. ADLINK-certified thermal design. The thermal performance is dependent on the chassis cooling design. Sufficient forced air-flow is required. Temperature limits of optional mass storage devices may also affect the thermal specification.

# 2.2 Block Diagrams

# cPCI-6630(D) Blade

![**Labeled Blocks:**\n*   Front Panel (2nd layer)\n*   Front Panel\n*   Intel Skylake H\n*   HM170 PCH\n*   Super IO\n*   SO-DIMM, max. 16GB (2 instances)\n*   DP to VGA\n*   USB 2.0 Controller\n*   BIOS\n*   Intel I219\n*   Intel I210 (2 instances)\n*   PCIe to PCI Bridge (2 instances)\n*   PCIe to SATA\n*   J1/J2\n*   J3 (4 instances)\n*   J5\n*   PMC\n*   7-pin\n*   CF\n*   CFast\n*   2.5' HDD\n\n**Connections:**\n*   **DMI3:** Connects 'Intel Skylake H' to 'HM170 PCH'.\n*   **DDR4-2133:** Connects 'SO-DIMM, max. 16GB' to 'Intel Skylake H'.\n*   **DDPB/C:** Connects 'Intel Skylake H' to 'DP to VGA'.\n*   **EDP:** Connects 'DP to VGA' to 'DVI-D' (Front Panel).\n*   **DDPD:** Connects 'Intel Skylake H' to 'J5'.\n*   **PCIe x1:** Connects 'Intel Skylake H' to 'PCIe to PCI Bridge'.\n*   **PCI 64b/66M:** Connects 'PCIe to PCI Bridge' to 'J1/J2'.\n*   **PCIe x1:** Connects 'HM170 PCH' to 'PCIe to PCI Bridge'.\n*   **PCI 32b/33M:** Connects 'PCIe to PCI Bridge' to 'PMC'.\n*   **USB 3.0:** Connects 'HM170 PCH' to 'USB 3' (Front Panel).\n*   **PCIe x1:** Connects 'HM170 PCH' to 'USB 2.0 Controller'.\n*   **USB 2.0:** Connects 'USB 2.0 Controller' to 'USB 2' (Front Panel).\n*   **SPI:** Connects 'BIOS' to 'HM170 PCH'.\n*   **PCIe x1:** Connects 'HM170 PCH' to 'Intel I219'.\n*   **PCIe x1:** Connects 'HM170 PCH' to 'Intel I210'.\n*   **PCIe x1:** Connects 'HM170 PCH' to 'Intel I210'.\n*   **LPC:** Connects 'HM170 PCH' to 'Super IO'.\n*   **COM1:** Connects 'Super IO' to 'COM1' (Front Panel).\n*   **COM2:** Connects 'Super IO' to 'COM2' (Front Panel).\n*   **COM3/4:** Connects 'Super IO' to 'J3'.\n*   **PCIe:** Connects 'HM170 PCH' to 'PCIe to SATA'.\n*   **SATA3/4:** Connects 'PCIe to SATA' to 'J3'.\n*   **USB x6:** Connects 'HM170 PCH' to 'J3'.\n*   **HDA:** Connects 'HM170 PCH' to 'J3'.\n*   **SATA0:** Connects 'HM170 PCH' to 'J3'.\n*   **SATA2:** Connects 'HM170 PCH' to '7-pin'.\n*   **SATA1:** Connects 'HM170 PCH' to 'CFast'.\n*   **CFast:** Connects to '2.5' HDD'.\n*   **USB:** Connects 'HM170 PCH' to 'CF'.\n*   **SATA5:** Connects 'HM170 PCH' to 'J5'.\n*   **PCIe x4:** Connects 'HM170 PCH' to 'J5'.\n*   **DV-I:** Connects to 'J3'.\n*   **USB 1:** Connects to 'J3'.\n*   **USB 4:** Connects to 'J3'.\n*   **KB/MS:** Connects to 'J3'.](.cpci-6630-50-15110-2010-11/b00553224f84bde1b32b29399cb99f233e2f63cf09334e071f169522ff186f19.jpg)

Figure 2-1: cPCI-6630(D) Blade Functional Block Diagram

# 2.3 I/O Connectivity Table

<table><tr><td rowspan="2">Function</td><td colspan="2">cPCI-6630 (4HP)</td><td colspan="2">cPCI-6630D (8HP)</td></tr><tr><td>Faceplate</td><td>Onboard</td><td>Faceplate</td><td>Onboard</td></tr><tr><td>Gigabit Ethernet</td><td>Y x3</td><td>-</td><td>Y x3</td><td>-</td></tr><tr><td>COM</td><td>Y x1 (RJ-45)</td><td>-</td><td>Y x2 (RJ-45 &amp; DB-9)</td><td>-</td></tr><tr><td>USB 3.0</td><td>Y x3</td><td>-</td><td>Y x3</td><td>-</td></tr><tr><td>USB 2.0</td><td>Y x1</td><td>-</td><td>Y x1</td><td>-</td></tr><tr><td>DVI-I</td><td>Y x1</td><td>-</td><td>Y x1</td><td>-</td></tr><tr><td>DVI-D</td><td>Y x1</td><td>-</td><td>Y x1</td><td>-</td></tr><tr><td>PS/2 KB/MS</td><td>Y x1</td><td>-</td><td>Y x1</td><td>-</td></tr><tr><td>Serial ATA</td><td>-</td><td>Y x2 (one for 2.5&quot; drive, one 7-pin SATA connector)</td><td>-</td><td>Y x2 (one for 2.5&quot; drive, one 7-pin SATA connector)</td></tr><tr><td>CFast/CF</td><td>-</td><td>Default CFast (CF by option)</td><td>-</td><td>Default CFast (CF by option)</td></tr><tr><td>PMC</td><td>-</td><td>-</td><td>-</td><td>Y x1</td></tr><tr><td>LEDs</td><td>Y x4</td><td>-</td><td>Y x4</td><td>-</td></tr></table>

Table 2-2: cPCI-6630(D) I/O Connectivity

# 2.4 Power Requirements

In order to guarantee a stable functionality of the system, it is recommended to provide more power than the system requires. An industrial power supply unit should be able to provide at least twice as much power as the entire system requires of each voltage. An ATX power supply unit should be able to provide at least three times as much power as the entire system requires of each voltage.

The cPCI-6630 is designed with 5V input only to ensure product stability. The tolerance of the voltage lines described in the CompactPCI specification (PICMG 2.0 R3.0) is +5%/-3% for 5V, 3.3 V and ±5% for ±12V. This specification is for power delivered to each slot and it includes both the power supply and the backplane tolerance.

<table><tr><td>Voltage</td><td>Nominal Value</td><td>Tolerance</td><td>Max. Ripple (P - P)</td></tr><tr><td>5V</td><td>+5.0 VDC</td><td>+5% / -3%</td><td>50 mV</td></tr><tr><td>V I/O (PCI I/O Buffer Voltage)</td><td>+5 VDC</td><td>+5% / -3%</td><td>50 mV</td></tr><tr><td>GND</td><td></td><td></td><td></td></tr></table>

# Power Consumption

This section provides information on the power consumption of the cPCI-6630(D) when using Intel® Core™ i7/Celeron® processors with 4GB DDR4-2133 SODIMM memory. Storage device is used with ADLINK ASD26-MLC64G-CT 64GB SATA SSD. The cPCI-6630 is powered by 5V only. Power consumption at 100% CPU usage was measured by running Intel Thermal Analysis Tool 5.0.1026 (TAT).

<table><tr><td colspan="3">Intel® CoreTMi7-6820EQ (BIOS EIST enabled, cTDP nominal)</td></tr><tr><td>OS/Mode</td><td>Current 5V</td><td>Total Power</td></tr><tr><td>Windows 7, Idle mode</td><td>2.35 A</td><td>11.75 W</td></tr><tr><td>Windows 7, CPU 100% stress</td><td>12.78 A</td><td>63.9 W</td></tr><tr><td>Windows 7, BurnIn Test system stress</td><td>14.58 A</td><td>72.9W</td></tr></table>

<table><tr><td colspan="3">Intel® CoreTMi3-6100E (BIOS EIST enabled, cTDP nominal)</td></tr><tr><td>OS/Mode</td><td>Current 5V</td><td>Total Power</td></tr><tr><td>Windows 7, Idle mode</td><td>2.33 A</td><td>11.65 W</td></tr><tr><td>Windows 7, CPU 100% stress</td><td>6.26 A</td><td>31.30 W</td></tr><tr><td>Windows 7, BurnIn Test system stress</td><td>7.81 A</td><td>39.05W</td></tr></table>

<table><tr><td colspan="3">Intel® Celeron® G3900E (BIOS EIST enabled, cTDP nominal)</td></tr><tr><td>OS/Mode</td><td>Current 5V</td><td>Total Power</td></tr><tr><td>Windows 7, Idle mode</td><td>2.32 A</td><td>11.60 W</td></tr><tr><td>Windows 7, CPU 100% stress</td><td>4.22 A</td><td>21.1 W</td></tr><tr><td>Windows 7, BurnIn Test system stress</td><td>5.83 A</td><td>29.15W</td></tr></table>

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# 3 Functional Description

The following sections describe the cPCI-6630 Series features and functions.

# 3.1 Processors

The Mobile 5th Generation Intel® Core™ Processor Family are state of the art, 64-bit, multi-core mobile processor built on 22 nanometer process technology. Based on a new micro-architecture, the processor is designed for a two-chip platform. The two-chip platform consists of a processor and Platform Controller Hub (PCH). The platform enables higher performance, lower cost, easier validation, and improved x-y footprint. The processor includes an Integrated Display Engine, Processor Graphics and Integrated Memory Controller.

The cPCI-6630 Series supports Intel® Core™ i7/i5 processors. The table below lists the general specifications and power ratings of the CPUs supported by the cPCI-6630 Series.

<table><tr><td>Features</td><td>CoreTM i7-6820EQ</td><td>CoreTM i3-6100E</td><td>Celeron® G3900E</td></tr><tr><td>Clock Speed</td><td>2.8GHz</td><td>1.6 GHz</td><td>2.4 GHz</td></tr><tr><td>Max. Single Core Turbo Freq.</td><td>3.5GHz</td><td>NA</td><td>NA</td></tr><tr><td>Last Level Cache</td><td>8MB Smart Cache</td><td>3MB Smart Cache</td><td>2MB Smart Cache</td></tr><tr><td>No. of Core(s)</td><td>4/8</td><td>2/4</td><td>2/2</td></tr><tr><td>Max. Power (TDP $^{1}$ )</td><td>45W</td><td>35W</td><td>35W</td></tr><tr><td>DMI</td><td>8 GT/s DMI3</td><td>8 GT/s DMI3</td><td>8 GT/s DMI3</td></tr><tr><td> $T_{junction, MAX}^{2}$ </td><td>100°C</td><td>100°C</td><td>100°C</td></tr><tr><td>Processor Graphics</td><td>Intel® HD Graphics 530</td><td>Intel® HD Graphics 530</td><td>Intel® HD Graphics 510</td></tr><tr><td>Graphics Base Frequency (Max )</td><td>350 MHz (1 GHz)</td><td>350 MHz (950 MHz)</td><td>350 MHz (950 MHz)</td></tr></table>

1. The highest expected sustainable power while running known power intensive applications. TDP is not the maximum power that the processor can dissipate.

2. The maximum supported operating temperature.

Supported Technologies

<table><tr><td>Feature</td><td>CoreTM i7-6820EQ</td><td>CoreTM i3-6100E</td><td>Celeron® G3900E</td></tr><tr><td>Intel® Turbo Boost Technology</td><td>2.0</td><td>No</td><td>No</td></tr><tr><td>Intel® vPro Technology</td><td>Yes</td><td>No</td><td>No</td></tr><tr><td>Intel® Hyper-Threading Technology</td><td>Yes</td><td>Yes</td><td>No</td></tr><tr><td>Intel® Virtualization Technology (Intel® VT-x)</td><td>Yes</td><td>Yes</td><td>Yes</td></tr><tr><td>Intel® Virtualization Technology for Directed I/O (Intel® VT-d)</td><td>Yes</td><td>Yes</td><td>Yes</td></tr><tr><td>Intel® VT-x with Extended Page Tables (EPT)</td><td>Yes</td><td>Yes</td><td>Yes</td></tr><tr><td>Intel® TSX-NI</td><td>Yes</td><td>Yes</td><td>No</td></tr><tr><td>Intel® 64 Architecture</td><td>Yes</td><td>Yes</td><td>Yes</td></tr><tr><td>Instruction Set Extensions</td><td>SSE4.1/4.2, AVX 2.0</td><td>SSE4.1/4.2, AVX 2.0</td><td>SSE4.1/4.2</td></tr><tr><td>Execute Disable Bit</td><td>Yes</td><td>Yes</td><td>No</td></tr><tr><td>Enhanced Intel SpeedStep® Technology</td><td>Yes</td><td>Yes</td><td>Yes</td></tr></table>

# Interfaces

X Two channels of DDR4-2133 non ECC memory
X Memory DDR4 data transfer rates of 2133 MT/s
X 64-bit wide channels
X DDR4 I/O Voltage of 1.2V
X 4Gb and 8Gb DDR4 DRAM technologies are supported for x8 and x16 devices (using 8Gb device technologies, the largest memory capacity possible is 16GB, assuming dual-channel mode with x8, dual-ranked SDRAM)
X PCI Express ports are fully-compliant with the PCI Express Base Specification, Revision 2.0.
X 5 GT/s point-to-point DMI interface to PCH is supported

# Graphics

The Intel® HD Graphics 530 for Core™ i7 and Core™ i3 and Intel® HD Graphics 510 for Celeron® is integrated in the processor enabling substantial gains in performance and lower power consumption.

X DX12 support
X OpenGL 4.4, OpenCL 1.2 support
X Graphics Base Frequency: 3500 MHz
Graphics Max Dynamic Frequency: 1 GHz for Core™ i7 and 950MHz for Core™ i3 and Celeron®
X Graphics Video Max Memory: 64GB
X Supports Intel® InTru™ 3D Technology

# 3.2 Chipset

The cPCI-6630(D) is equipped with Mobile Intel® HM170 Chipset. Functions and capabilities include:

X PCI Express Base Specification, Revision 3.0 support for up to 16 Gen3 lanes
X CPU interfaces with DMI3, transfers rate up to 8 GT/s
X Supports xHCI only
X ACPI Power Management Logic Support, Revision 4.0a
X Supports Intel® High Definition Audio Technology (Intel® HD Audio)
X Supports Intel® Rapid Storage Technology (Intel® RST)
Supports Intel® Virtualization Technology for Directed I/O (Intel® VT-d)
X Supports Intel® vPro Technology
X Supports Intel® Smart Response Technology
X Supports Intel® Stable Image Platform Program (SIPP)
X Supports Intel® Small Business Advantage
X Integrated Clock Controller
X Low Pin Count (LPC) interface
X Firmware Hub (FWH) interface support
X Serial Peripheral Interface (SPI) support

# 3.3 PMC

The cPCI-6630D supports one 32-bit/33MHz PMC site for front panel I/O expansion. The PMC site provides a maximum 32-bit/33 MHz PCI bus link using a TI XIO2001 PCI-Express-to-PCI bridge via PCI-Express x4 link. The PMC site supports +3.3V signaling only.

# 3.4 Intel® Turbo Boost Technology

Intel® Turbo Boost Technology is a feature that allows the processor to opportunistically and automatically run faster than its rated operating core and/or render clock frequency when there is sufficient power headroom, and the product is within specified temperature and current limits. The Intel Turbo Boost Technology feature is designed to increase performance of both multi-threaded and single-threaded workloads. The processor supports a Turbo mode where the processor can use the thermal capacity associated with package and run at power levels higher than TDP power for short durations. This improves the system responsiveness for short, bursty usage conditions.

Turbo Mode availability is independent of the number of active cores; however, the Turbo Mode frequency is dynamic and dependent on the instantaneous application power load, the number of active cores, user configurable settings, operating environment, and system design. If the power, current, or thermal limit is reached, the processor will automatically reduce the frequency to stay with its TDP limit.

# 3.5 Intel® Hyper-Threading Technology

Intel® Hyper-Threading Technology allows an execution core to function as two logical processors. While some execution resources (such as caches, execution units, and buses) are shared, each logical processor has its own architectural state with its own set of general-purpose registers and control registers. This feature must be enabled using the BIOS and requires operating system support. Intel recommends enabling Hyper-Threading Technology with Microsoft Windows 7, and disabling Hyper-Threading Technology using the BIOS for all previous versions of Windows operating systems.

# 3.6 Battery

The cPCI-6630(D) is equipped with a 3.0V "coin cell" lithium battery for the real time clock (RTC). The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer. A Rayovac BR2032 is equipped on board by default.

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# 4 Board Interfaces

This chapter illustrates the board layout, connector pin assignments, and jumper settings to familiarize users with the cPCI-6630 Series.

# 4.1 cPCI-6630(D) Component Side Layout

![CN13\nCN15\nCN6/CN7\nRJ2\nSW_COMPW2\nCN8\nJ5\nBAT1\nU2\nSATA1\nJN2\nJ3\nCN11\nCN10\nCN9\nCN2\nU4\nCN_VIO\nJN1\nJ2\nGDCN1\nCN1\nCN1\nU1\nU3\nGCCN1\nCN4](.cpci-6630-50-15110-2010-11/a84d6106abfa11a865c821004a2a8d8d150507f3e59e3a208c47e7b5220c1826.jpg)

<table><tr><td>U1</td><td>Intel®processor</td><td>U2</td><td>Intel®PCH</td></tr><tr><td>U3</td><td>Pericom PI7C9X130</td><td>U4</td><td>TI XIO2001I</td></tr><tr><td>CN1/CN2</td><td>Memory socket</td><td>JN1/JN2</td><td>PMC board-to-board conn.</td></tr><tr><td>BAT1</td><td>Battery</td><td>CN4</td><td>Micro-switch socket</td></tr><tr><td>CN6/CN7</td><td>CFast/CF socket co-lay</td><td>CN8</td><td>SATA board-to-board conn.</td></tr><tr><td>CN9/10/11</td><td>USB 3.0 connector</td><td>USB1</td><td>USB 2.0 connector</td></tr><tr><td>CN12/RJ1</td><td>LAN connectors</td><td>RJ2</td><td>COM1 connector</td></tr><tr><td>CN13</td><td>PS/2 connector</td><td>GCCN1</td><td>DVI-D connector</td></tr><tr><td rowspan="2">J1/J2/J3/J5</td><td rowspan="2">CompactPCI connectors</td><td>GDCN1</td><td>DVI-I connector</td></tr><tr><td>SW_COMPW2</td><td>Reserved</td></tr></table>

Figure 4-1: cPCI-6630(D) Component Side Layout

4.2 cPCI-6630 Solder Side Layout
![SW12 SW5\nSW3\nSW1\nSW13\nSWCOMDEG2\nSW7\nSW10\nSW14\nSW8\nSW11](.cpci-6630-50-15110-2010-11/f9df7fe4eb0dba45939ebe51d9e76610066eb4935e4aae45ba596495cf9ade82.jpg)

<table><tr><td>SW_COMDEG2</td><td>Reserved</td><td>SW10</td><td>LAN (CN12) front/rear switch</td></tr><tr><td>SW1</td><td>Reset button</td><td>SW11</td><td>“Force ejector handle closed” switch</td></tr><tr><td>SW3</td><td>COM2 mode switch</td><td>SW12</td><td>PS/2 front/rear switch</td></tr><tr><td>SW5</td><td>Clear CMOS</td><td>SW13</td><td>DVI-D digital signal front/rear switch</td></tr><tr><td>SW7</td><td>COM1 mode switch</td><td>SW14</td><td>Reserved</td></tr><tr><td>SW8</td><td>DVI-I VGA signal front/rear switch</td><td></td><td></td></tr></table>

Figure 4-2: cPCI-6630(D) Solder Side Layout

# 4.3 cPCI-6630D Assembly Layoutt

![DB-6965PMC\nCPU heatsink](.cpci-6630-50-15110-2010-11/ceb224e6b74404b74e4b6ab89a9008fb56775d05fa2812a635430eaafce03eec.jpg)

<table><tr><td>DB-6965PMC</td><td>32Bit/33MHz PMC adapter</td></tr></table>

Figure 4-3: cPCI-6630D Assembly Layout

# 4.4 cPCI-6630(D) Front Panel

cPCI-6630
![PS/2\nKB/MS\nSerial Port\nCOM1\nGbE x3\nUSB 2.0\nUSB 3.0 x3\nDVI-I\nDVI-D\nReset\nButton\nPower LED\nUser LEDs\nHDD LED\nGeneral Purpose LED\nWDT LED](.cpci-6630-50-15110-2010-11/6d22dc4c290f3a41a9b05aabdaf9c256528f4c5b44bba96831e7928aa81969da.jpg)

cPCI-6630D
![Serial Port\nCOM2\nSerial Port\nCOM1\nGbE x3\nPMC\nUSB 2.0\nUSB 3.0 x3\nPS/2\nKB/MS\nReset Button\nPower LED\nUser LEDs\nDVI-I\nDVI-D\nHDD LED\nGeneral Purpose LED\nWDT LED](.cpci-6630-50-15110-2010-11/137590fb0be9b8f2a97f2006864feb965da418eaec2bf227a472880226ab0e26.jpg)

System LEDs

<table><tr><td>LED</td><td>Color</td><td>Condition</td><td>Indication</td></tr><tr><td rowspan="3">Power[1WTS]</td><td rowspan="3">Green/Red</td><td>Off</td><td>System is off</td></tr><tr><td>Red</td><td>System Power ready (PWGD)</td></tr><tr><td>Green</td><td>Post OK</td></tr><tr><td rowspan="2">WDT[0-4TX]</td><td rowspan="2">Orange</td><td>Off</td><td>No Watchdog event</td></tr><tr><td>Blinking</td><td>Watchdog event alert</td></tr><tr><td rowspan="2">HDD&lt;img src="images/83eb5a4ada9a69fdb987d01260e69c1e5d4fe7b26a1dde99d8d7b5e5439aa9eb.jpg"/&gt;</td><td rowspan="2">Yellow</td><td>Off</td><td>No CF/CFast/SATA HDD activity</td></tr><tr><td>Blinking</td><td>Data read/write in process for CF/CFast/SATA HDD</td></tr><tr><td>General Purpose&lt;img src="images/200e8bfc89eee2d2f46ada2f47fd014f2e61489fe36d3be483152f3d8453cd1d.jpg"/&gt;</td><td>Blue</td><td>OffFast BlinkOnSlow Blink</td><td>Off by default (user programmable, connected to PCH and BMC; contact ADLINK for more information)</td></tr></table>

Table 4-1: cPCI-6630(D) Front Panel System LED Descriptions

# 4.5 User LEDs

During bootup, the eight User LEDs on the faceplate display port 80h POST codes in hexadecimal during boot up. Users can use the POST codes to identify issues during the BIOS POST process. In default mode, these eight LEDs display the POST code output to Port 80h during system bootup. The LED number corresponds to the bit number (from "0" to "7"). For example, if the bit7 > bit0 output is "01110101", then the port 80h output is "75h" (see Chapter 9 Checkpoints & Beep Codes on page 115).

Each LED indicates a corresponding bit of the port 80h POST code. Refer to the figure and table below.

![Diagram of an electronic device rear panel with labeled ports and connectors, highlighting a red-highlighted port area.](.cpci-6630-50-15110-2010-11/988e64f6259c465d4a3e40bba2a13322b5dfa575d802f4ed86eaa1ed37b829be.jpg)

Figure 4-4: cPCI-6630(D) LED Labels

<table><tr><td></td><td>LED No.</td><td>Port 80h bit</td></tr><tr><td rowspan="4">Low Nibble</td><td>LED 0</td><td>Port 80h bit0</td></tr><tr><td>LED 1</td><td>Port 80h bit1</td></tr><tr><td>LED 2</td><td>Port 80h bit2</td></tr><tr><td>LED 3</td><td>Port 80h bit3</td></tr><tr><td rowspan="4">High Nibble</td><td>LED 4</td><td>Port 80h bit4</td></tr><tr><td>LED 5</td><td>Port 80h bit5</td></tr><tr><td>LED 6</td><td>Port 80h bit6</td></tr><tr><td>LED 7</td><td>Port 80h bit7</td></tr></table>

After the system is under OS control, the eight User LEDs can be controlled as user defined LEDs. The LEDs are connected to eight GPIO pins of the Super I/O IT8786. See Section 7.2 for information on programming the User LEDs.

For assistance using the User LEDs, please log in to:

http://askanexpert.adlinktech.com.

# 4.6 Connector Pin Assignments

DVI-I Connector (GDCN1)
![Front view of a D-sub connector with pin layout (no text or symbols)](.cpci-6630-50-15110-2010-11/1f7f47222e77dfcfa8db5b108fc1228a5c3a204679c66ec608aff62c94f81734.jpg)

<table><tr><td>Pin #</td><td>Signal</td><td>Pin #</td><td>Signal</td></tr><tr><td>1</td><td>TMDS Data2-</td><td>16</td><td>Hot Plug Detect</td></tr><tr><td>2</td><td>TMDS Data2+</td><td>17</td><td>TMDS Data0-</td></tr><tr><td>3</td><td>GND</td><td>18</td><td>TMDSData0+</td></tr><tr><td>4</td><td>NC</td><td>19</td><td>GND</td></tr><tr><td>5</td><td>NC</td><td>20</td><td>NC</td></tr><tr><td>6</td><td>DDC Clock [SCL]</td><td>21</td><td>NC</td></tr><tr><td>7</td><td>DDC Data [SDA]</td><td>22</td><td>GND</td></tr><tr><td>8</td><td>Analog vertical sync</td><td>23</td><td>TMDS Clock +</td></tr><tr><td>9</td><td>TMDS Data1-</td><td>24</td><td>TMDS Clock -</td></tr><tr><td>10</td><td>TMDS Data1+</td><td>C1</td><td>Analog Red</td></tr><tr><td>11</td><td>GND</td><td>C2</td><td>Analog Green</td></tr><tr><td>12</td><td>NC</td><td>C3</td><td>Analog Blue</td></tr><tr><td>13</td><td>NC</td><td>C4</td><td>Analog Horizontal Sync</td></tr><tr><td>14</td><td>+5 V Power</td><td>C5</td><td>Analog GND Return</td></tr><tr><td>15</td><td>GND</td><td></td><td></td></tr></table>

Table 4-2: DVI-I Connector Pin Definition

DVI-D Connector (GCCN1)
![1 2 3 4 5 6 7 8\n9 10 11 12 13 14 15 16\n7 8 9 10 11 12 13 14 15 16\nC5](.cpci-6630-50-15110-2010-11/c94c30bb32185a705a5b679dd9aa62d3b3e6e5b8762beba636794e2768dce041.jpg)

<table><tr><td>Pin #</td><td>Signal</td><td>Pin #</td><td>Signal</td></tr><tr><td>1</td><td>TMDS Data2-</td><td>16</td><td>Hot Plug Detect</td></tr><tr><td>2</td><td>TMDS Data2+</td><td>17</td><td>TMDS Data0-</td></tr><tr><td>3</td><td>GND</td><td>18</td><td>TMDSData0+</td></tr><tr><td>4</td><td>NC</td><td>19</td><td>GND</td></tr><tr><td>5</td><td>NC</td><td>20</td><td>NC</td></tr><tr><td>6</td><td>DDC Clock [SCL]</td><td>21</td><td>NC</td></tr><tr><td>7</td><td>DDC Data [SDA]</td><td>22</td><td>GND</td></tr><tr><td>8</td><td>Analog vertical sync</td><td>23</td><td>TMDS Clock +</td></tr><tr><td>9</td><td>TMDS Data1-</td><td>24</td><td>TMDS Clock -</td></tr><tr><td>10</td><td>TMDS Data1+</td><td>C1</td><td>NC</td></tr><tr><td>11</td><td>GND</td><td>C2</td><td>NC</td></tr><tr><td>12</td><td>NC</td><td>C3</td><td>NC</td></tr><tr><td>13</td><td>NC</td><td>C4</td><td>NC</td></tr><tr><td>14</td><td>+5 V Power</td><td>C5</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td></td><td></td></tr></table>

Table 4-3: DVI-D Connector Pin Definition

# USB 2.0 Connectors

<table><tr><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>Vcc</td></tr><tr><td>2</td><td>UV0-</td></tr><tr><td>3</td><td>UV0+</td></tr><tr><td>4</td><td>GND</td></tr></table>

![1\n2\n3\n4](.cpci-6630-50-15110-2010-11/14519daf1cc28177103bee8c54298b7058a50eb88601b69eb7ea5c4c4ff9cdad.jpg)

Table 4-4: USB 2.0 Pin Definition

# USB 3.0 Connectors

<table><tr><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>VCC</td></tr><tr><td>2</td><td>Data-</td></tr><tr><td>3</td><td>Data+</td></tr><tr><td>4</td><td>GND</td></tr><tr><td>5</td><td>RX_N</td></tr><tr><td>6</td><td>RX_P</td></tr><tr><td>7</td><td>GND</td></tr><tr><td>8</td><td>TX_N</td></tr><tr><td>9</td><td>TX_P</td></tr></table>

![9\n8\n7\n6\n5\n1\n2\n3\n4](.cpci-6630-50-15110-2010-11/8c7988f5eb7e383a5c2bbf9c2b9a2b932cb81b4bcb1505e6a6d0ee9589df45a9.jpg)

COM1 (RJ-45)

<table><tr><td>Pin #</td><td>RS-232</td><td>RS-422</td><td>RS-485</td></tr><tr><td>1</td><td>DCD#</td><td>TX-</td><td>Data-</td></tr><tr><td>2</td><td>RTS#</td><td>—</td><td>—</td></tr><tr><td>3</td><td>DSR#</td><td>—</td><td>—</td></tr><tr><td>4</td><td>TXD</td><td>RX+</td><td>—</td></tr><tr><td>5</td><td>RXD</td><td>TX+</td><td>Data+</td></tr><tr><td>6</td><td>GND</td><td>—</td><td>—</td></tr><tr><td>7</td><td>CTS#</td><td>—</td><td>—</td></tr><tr><td>8</td><td>DTR#L</td><td>RX-</td><td>—</td></tr></table>

![The image shows a schematic diagram enclosed in a square border. Inside, there is a gray shape resembling an RJ45 connector plug with a rectangular base and a taller, rounded top section. Two black lines extend downward from the bottom corners of the gray shape. Below the left line is the number '8,' and below the right line is the number '1.'](.cpci-6630-50-15110-2010-11/ea9d25f2dcec7571687b98ae5ca5b74d511f15007a1b321e910ad053085a8bb9.jpg)

Table 4-5: Front Panel COM1 Pin Definitions
COM2, COM RJ-45 to DB-9 Cable

<table><tr><td>Pin #</td><td>RS-232</td><td>RS-422</td><td>RS-485</td></tr><tr><td>1</td><td>DCD#</td><td>TX-</td><td>Data-</td></tr><tr><td>2</td><td>RXD</td><td>TX+</td><td>Data+</td></tr><tr><td>3</td><td>TXD</td><td>RX+</td><td>—</td></tr><tr><td>4</td><td>DTR#L</td><td>RX-</td><td>—</td></tr><tr><td>5</td><td>GND</td><td>—</td><td>—</td></tr><tr><td>6</td><td>DSR#</td><td>—</td><td>—</td></tr><tr><td>7</td><td>RTS#</td><td>—</td><td>—</td></tr><tr><td>8</td><td>CTS#</td><td>—</td><td>—</td></tr><tr><td>9</td><td>—</td><td>—</td><td>—</td></tr></table>

![6\n1\n5](.cpci-6630-50-15110-2010-11/12569d0fac50fc10f900dac8c99554af4904423937b40fcf950d9b8232bfba29.jpg)

Table 4-6: COM RJ-45 to DB-9 Cable Pin Definitions

# RJ-45 Gigabit Ethernet Connectors

<table><tr><td>Pin #</td><td>10BASE-T/100BASE-TX</td><td>1000BASE-T</td></tr><tr><td>1</td><td>TX+</td><td>LAN_TX0+</td></tr><tr><td>2</td><td>TX-</td><td>LAN_TX0-</td></tr><tr><td>3</td><td>RX+</td><td>LAN_TX1+</td></tr><tr><td>4</td><td>—</td><td>LAN_TX2+</td></tr><tr><td>5</td><td>—</td><td>LAN_TX2-</td></tr><tr><td>6</td><td>RX-</td><td>LAN_TX1-</td></tr><tr><td>7</td><td>—</td><td>LAN_TX3+</td></tr><tr><td>8</td><td>—</td><td>LAN_TX3-</td></tr></table>

Table 4-7: RJ-45 GbE Pin Definitions

![Speed\nActivity\n8\n1](.cpci-6630-50-15110-2010-11/c2dd47e21499ac8be9da8c6ffa2f51bf59e1132b2c984444ca008dc0d93a8677.jpg)

<table><tr><td colspan="2">Status</td><td>Speed LED (Green/Amber)</td><td>Activity LED (Yellow)</td></tr><tr><td colspan="2">Network link is not established or system powered off</td><td>OFF</td><td>OFF</td></tr><tr><td rowspan="2">10 Mbps</td><td>Link</td><td>OFF</td><td>ON</td></tr><tr><td>Active</td><td>OFF</td><td>Blinking</td></tr><tr><td rowspan="2">100 Mbps</td><td>Link</td><td>Green</td><td>ON</td></tr><tr><td>Active</td><td>Green</td><td>Blinking</td></tr><tr><td rowspan="2">1000 Mbps</td><td>Link</td><td>Amber</td><td>ON</td></tr><tr><td>Active</td><td>Amber</td><td>Blinking</td></tr></table>

Table 4-8: LAN LED Status Definitions

Serial ATA 7-pin Connector (SATA1)

<table><tr><td>Pin #</td><td>Signal</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>TX+</td></tr><tr><td>3</td><td>TX-</td></tr><tr><td>4</td><td>GND</td></tr><tr><td>5</td><td>RX-</td></tr><tr><td>6</td><td>RX+</td></tr><tr><td>7</td><td>GND</td></tr></table>

![1\n7](.cpci-6630-50-15110-2010-11/49a84f348cd80371c8f9125b6a2e4fa4fc9fc204c16a67698c06c9d755e4a14d.jpg)

Table 4-9: Serial ATA 7-pin Connector Pin Definition

Serial ATA Connector with Power

<table><tr><td>Pin #</td><td>Signal</td></tr><tr><td>S1</td><td>GND</td></tr><tr><td>S2</td><td>TX+</td></tr><tr><td>S3</td><td>TX-</td></tr><tr><td>S4</td><td>GND</td></tr><tr><td>S5</td><td>RX-</td></tr><tr><td>S6</td><td>RX+</td></tr><tr><td>S7</td><td>GND</td></tr><tr><td>P1</td><td>NC</td></tr><tr><td>P2</td><td>NC</td></tr><tr><td>P3</td><td>NC</td></tr><tr><td>P4</td><td>GND</td></tr><tr><td>P5</td><td>GND</td></tr><tr><td>P6</td><td>GND</td></tr><tr><td>P7</td><td>5V</td></tr><tr><td>P8</td><td>5V</td></tr><tr><td>P9</td><td>5V</td></tr><tr><td>P10</td><td>GND</td></tr><tr><td>P11</td><td>NC</td></tr><tr><td>P12</td><td>GND</td></tr><tr><td>P13~P15</td><td>NC</td></tr></table>

![S1\nSignal\nS7\nP1\nPower\nP15](.cpci-6630-50-15110-2010-11/ed8bc52b5216bd5c44926f1ddf462c4668fd193bc91752ee782eafd7aa8e3b06.jpg)

Table 4-10: Serial ATA Connector with power Pin Definition

CFast Socket

<table><tr><td>Pin #</td><td>Signal Name</td></tr><tr><td>Ground</td><td>S1</td></tr><tr><td>SATA_TX-P</td><td>S2</td></tr><tr><td>SATA_TX-N</td><td>S3</td></tr><tr><td>Ground</td><td>S4</td></tr><tr><td>SATA_RX-N</td><td>S5</td></tr><tr><td>SATA_RX-P</td><td>S6</td></tr><tr><td>Ground</td><td>S7</td></tr><tr><td>CFast_CDI</td><td>P1</td></tr><tr><td>Ground</td><td>P2</td></tr><tr><td>NC</td><td>P3</td></tr><tr><td>NC</td><td>P4</td></tr><tr><td>NC</td><td>P5</td></tr><tr><td>NC</td><td>P6</td></tr><tr><td>Ground</td><td>P7</td></tr><tr><td>CFast_LED1</td><td>P8</td></tr><tr><td>CFast_LED2</td><td>P9</td></tr><tr><td>NC</td><td>P10</td></tr><tr><td>NC</td><td>P11</td></tr><tr><td>NC</td><td>P12</td></tr><tr><td>+3.3V</td><td>P13</td></tr><tr><td>+3.3V</td><td>P14</td></tr><tr><td>Ground</td><td>P15</td></tr><tr><td>Ground</td><td>P16</td></tr><tr><td>CFast_CDO</td><td>P17</td></tr></table>

![Pure electrical connector diagram without any text, numbers, or symbols](.cpci-6630-50-15110-2010-11/1883d001e49b021d31406c1b690888a96840d7ca1ae63364595685cb3e6663e3.jpg)

![24\nP1\nS1](.cpci-6630-50-15110-2010-11/43aea95c472bf55d3100d0b7ad0588232d350f9cabc4b5e1611f577e3d951b70.jpg)

Table 4-11: CFast Socket Pin Definition

PMC Connectors (JN1, JN2)

<table><tr><td>Pin#</td><td>JN1 Signal</td><td>JN2 Signal</td></tr><tr><td>1</td><td>PMC_TCK</td><td>P12V</td></tr><tr><td>2</td><td>N12V*</td><td>PMC_TRST-L</td></tr><tr><td>3</td><td>GND</td><td>PMC_TMS</td></tr><tr><td>4</td><td>PCIX_INTA-L</td><td>NC (PMC_TDO)</td></tr><tr><td>5</td><td>PCIX_INTB-L</td><td>PMC_TDI</td></tr><tr><td>6</td><td>PCIX_INTC-L</td><td>GND</td></tr><tr><td>7</td><td>PMC_MOD-L1</td><td>GND</td></tr><tr><td>8</td><td>P5V</td><td>NC</td></tr><tr><td>9</td><td>PCIX_INTD-L</td><td>NC</td></tr><tr><td>10</td><td>NC</td><td>NC</td></tr><tr><td>11</td><td>GND</td><td>PMC_MOD-L2</td></tr><tr><td>12</td><td>P3V3_PMCAUX</td><td>P3V3</td></tr><tr><td>13</td><td>PCI_PCLK0</td><td>PMC_RST-L</td></tr><tr><td>14</td><td>GND</td><td>PMC_MOD-L3</td></tr><tr><td>15</td><td>GND</td><td>P3V3</td></tr><tr><td>16</td><td>PCIX_GNT-L0</td><td>PMC_MOD-L4</td></tr><tr><td>17</td><td>PCIX_REQ-L0</td><td>PMC_PME-L</td></tr><tr><td>18</td><td>P5V</td><td>GND</td></tr><tr><td>19</td><td>PMC_VIO</td><td>PCIX_AD30</td></tr><tr><td>20</td><td>PCIX_AD31</td><td>PCIX_AD29</td></tr><tr><td>21</td><td>PCIX_AD28</td><td>GND</td></tr><tr><td>22</td><td>PCIX_AD27</td><td>PCIX_AD26</td></tr><tr><td>23</td><td>PCIX_AD25</td><td>PCIX_AD24</td></tr><tr><td>24</td><td>GND</td><td>P3V3</td></tr><tr><td>25</td><td>GND</td><td>PMC_IDSEL</td></tr><tr><td>26</td><td>PCIX_CBE-L3</td><td>PCIX_AD23</td></tr><tr><td>27</td><td>PCIX_AD22</td><td>P3V3</td></tr><tr><td>28</td><td>PCIX_AD21</td><td>PCIX_AD20</td></tr><tr><td>29</td><td>PCIX_AD19</td><td>PCIX_AD18</td></tr><tr><td>30</td><td>P5V</td><td>GND</td></tr><tr><td>31</td><td>PCI_VIO</td><td>PCIX_AD16</td></tr><tr><td>32</td><td>PCIX_AD17</td><td>PCIX_CBE-L2</td></tr></table>

![64\n63\n2\n1](.cpci-6630-50-15110-2010-11/aa2fbeaef05e65efc5a9c6bd35d8ca9d60e81323e9c0a91fc755618df706d895.jpg)

Table 4-12: PMC Connector Pin Definitions

<table><tr><td>Pin#</td><td>JN1 Signal</td><td>JN2 Signal</td></tr><tr><td>33</td><td>PCIX_FRAME-L</td><td>GND</td></tr><tr><td>34</td><td>GND</td><td>NC</td></tr><tr><td>35</td><td>GND</td><td>PCIX_TRDY-L</td></tr><tr><td>36</td><td>PCIX_IRDY-L</td><td>P3V3</td></tr><tr><td>37</td><td>PCIX_DEVSEL-L</td><td>GND</td></tr><tr><td>38</td><td>P5V</td><td>PCIX_STOP-L</td></tr><tr><td>39</td><td>PMC_PCIXCAP</td><td>PCIX_PERR-L</td></tr><tr><td>40</td><td>PCIX_LOCK-L</td><td>GND</td></tr><tr><td>41</td><td>NC</td><td>P3V3</td></tr><tr><td>42</td><td>NC</td><td>PCIX_SERR-L</td></tr><tr><td>43</td><td>PCIX_PAR</td><td>PCIX_CBE-L1</td></tr><tr><td>44</td><td>GND</td><td>GND</td></tr><tr><td>45</td><td>PMC_VIO</td><td>PCIX_AD14</td></tr><tr><td>46</td><td>PCIX_AD15</td><td>PCIX_AD13</td></tr><tr><td>47</td><td>PCIX_AD12</td><td>PCIX_M66EN</td></tr><tr><td>48</td><td>PCIX_AD11</td><td>PCIX_AD10</td></tr><tr><td>49</td><td>PCIX_AD9</td><td>PCIX_AD8</td></tr><tr><td>50</td><td>P5V</td><td>P3V3</td></tr><tr><td>51</td><td>GND</td><td>PCIX_AD7</td></tr><tr><td>52</td><td>PCIX_CBE-L0</td><td>NC</td></tr><tr><td>53</td><td>PCIX_AD6</td><td>P3V3</td></tr><tr><td>54</td><td>PCIX_AD5</td><td>NC</td></tr><tr><td>55</td><td>PCIX_AD4</td><td>NC</td></tr><tr><td>56</td><td>GND</td><td>GND</td></tr><tr><td>57</td><td>PMC_VIO</td><td>NC</td></tr><tr><td>58</td><td>PCIX_AD3</td><td>NC</td></tr><tr><td>59</td><td>PCIX_AD2</td><td>GND</td></tr><tr><td>60</td><td>PCIX_AD1</td><td>NC</td></tr><tr><td>61</td><td>PCIX_AD0</td><td>PCIX_ACK64-L</td></tr><tr><td>62</td><td>P5V</td><td>P3V3</td></tr><tr><td>63</td><td>GND</td><td>GND</td></tr><tr><td>64</td><td>P1_REQ64-L</td><td>NC</td></tr></table>

Table 4-12: PMC Connector Pin Definitions (cont’d)

CompactPCI J1 Connector

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>25</td><td>GND</td><td>+5V</td><td>CPCI_REQ64-L</td><td>CPCI_ENUM-L</td><td>+3.3V</td><td>+5V</td><td>GND</td></tr><tr><td>24</td><td>GND</td><td>CPCI_AD1</td><td>+5V</td><td>CPCI_VIO</td><td>CPCI_AD0</td><td>CPCI_ACK64-L</td><td>GND</td></tr><tr><td>23</td><td>GND</td><td>+3.3V</td><td>CPCI_AD4</td><td>CPCI_AD3</td><td>+5V</td><td>CPCI_AD2</td><td>GND</td></tr><tr><td>22</td><td>GND</td><td>CPCI_AD7</td><td>GND</td><td>+3.3V</td><td>CPCI_AD6</td><td>CPCI_AD5</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>+3.3V</td><td>CPCI_AD9</td><td>CPCI_AD8</td><td>CPCI_M66EN</td><td>CPCI_CBE-L0</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>CPCI_AD12</td><td>GND</td><td>CPCI_VIO_STB</td><td>CPCI_AD11</td><td>CPCI_AD10</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>+3.3V</td><td>CPCI_AD15</td><td>CPCI_AD14</td><td>GND</td><td>CPCI_AD13</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>CPCI_SERR-L</td><td>GND</td><td>+3.3V</td><td>CPCI_PAR</td><td>CPCI_CBE-L1</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>+3.3V</td><td>IPMCB_CLK</td><td>IPMB_DAT</td><td>GND</td><td>CPCI_PERR-L</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>CPCI_DEVSEL-L</td><td>GND</td><td>CPCI_VIO</td><td>CPCI_STOP-L</td><td>CPCI_LOCK-L</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>CPCI_FRAME-L</td><td>CPCI_IRDY-L</td><td>CPCI_BDSEL-L</td><td>CPCI_TRDY-L</td><td>GND</td></tr><tr><td>12-14</td><td colspan="7">Key</td></tr><tr><td>11</td><td>GND</td><td>CPCI_AD18</td><td>CPCI_AD17</td><td>CPCI_AD16</td><td>GND</td><td>CPCI_CBE-L2</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>CPCI_AD21</td><td>GND</td><td>+3.3V</td><td>CPCI_AD20</td><td>CPCI_AD19</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>CPCI_CBE-L3</td><td>CPCI_IDSEL</td><td>CPCI_AD23</td><td>GND</td><td>CPCI_AD22</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>CPCI_AD26</td><td>GND</td><td>CPCI_VIO</td><td>CPCI_AD25</td><td>CPCI_AD24</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>CPCI_AD30</td><td>CPCI_AD29</td><td>CPCI_AD28</td><td>GND</td><td>CPCI_AD27</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>CPCI_VIO</td><td>CPCI_PRESENT-L</td><td>+3.3V</td><td>CPCI_CLK0</td><td>CPCI_AD31</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>NC</td><td>NC</td><td>CPCI_RST-L</td><td>GND</td><td>CPCI_VIO</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>+5V_IPMB</td><td>IPMC_HEALTHY-L</td><td>CPCI_VIO_STB</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>CPCI_INTA-L</td><td>CPCI_INTB-L</td><td>CPCI_INTC-L</td><td>+5V</td><td>CPCI_INTD-L</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>NC</td><td>+5V</td><td>NC</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>+5V</td><td>-12V</td><td>NC</td><td>+12V</td><td>+5V</td><td>GND</td></tr></table>

Table 4-13: CompactPCI J1 Connector Pin Definition

![The image displays a white document icon with a folded top-right corner and faint gray horizontal lines, featuring a large red checkmark in the center.](.cpci-6630-50-15110-2010-11/d8041db108f18a08950bb42bbe02600642a077aa317d0478572d00ad76b61d11.jpg)
NOTE:

The 3.3V and +/-12V pins are reserved in design but not connected by default. These pins are floating when the backplane does not provide power input. The B1 -12V pin is floating when the backplane does not support N12V input. But if the backplane supports B1 -12V power input, this pin will have -12V. This design does not impact the usage of the cPCI-6630.

The 3.3V and +/-12V pins can utilized by BOM option. Contact ADLINK if 3.3V and +/-12V input are required.

CompactPCI J2 Connector

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>22</td><td>GND</td><td>GA4</td><td>GA3</td><td>GA2</td><td>GA1</td><td>GA0</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>CPCI_CLK6</td><td>GND</td><td>NC</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>CPCI_CLK5</td><td>GND</td><td>NC</td><td>GND</td><td>NC</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>GND</td><td>GND</td><td>IPMB_DAT</td><td>IPMB_CLK</td><td>IPMB_PWR</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>NC</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>NC</td><td>GND</td><td>J2_RST-L</td><td>CPCI_REQ-L6</td><td>CPCI_GNT-L6</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>NC</td><td>NC</td><td>CPCI_DEG-L</td><td>GND</td><td>NC</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>NC</td><td>GND</td><td>CPCI_FAL-L</td><td>CPCI_REQ-L5</td><td>CPCI_GNT-L5</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>CPCI_AD35</td><td>CPCI_AD34</td><td>CPCI_AD33</td><td>GND</td><td>CPCI_AD32</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>CPCI_AD38</td><td>GND</td><td>CPCI_VIO</td><td>CPCI_AD37</td><td>CPCI_AD36</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>CPCI_AD42</td><td>CPCI_AD41</td><td>CPCI_AD40</td><td>GND</td><td>CPCI_AD39</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>CPCI_AD45</td><td>GND</td><td>CPCI_VIO</td><td>CPCI_AD44</td><td>CPCI_AD43</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>CPCI_AD49</td><td>CPCI_AD48</td><td>CPCI_AD47</td><td>GND</td><td>CPCI_AD46</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>CPCI_AD52</td><td>GND</td><td>CPCI_VIO</td><td>CPCI_AD51</td><td>CPCI_AD50</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>CPCI_AD56</td><td>CPCI_AD55</td><td>CPCI_AD54</td><td>GND</td><td>CPCI_AD53</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>CPCI_AD59</td><td>GND</td><td>CPCI_VIO</td><td>CPCI_AD58</td><td>CPCI_AD57</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>CPCI_AD63</td><td>CPCI_AD62</td><td>CPCI_AD61</td><td>GND</td><td>CPCI_AD60</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>CPCI_CBE-L5</td><td>CPCI_DEV64-L</td><td>CPCI_VIO</td><td>CPCI_CBE-L4</td><td>CPCI_PAR64</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>CPCI_VIO</td><td>NC</td><td>CPCI_CBE-L7</td><td>GND</td><td>CPCI_CBE-L6</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>CPCI_CLK4</td><td>GND</td><td>CPCI_GNT-L3</td><td>CPCI_REQ-L4</td><td>CPCI_GNT-L4</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>CPCI_CLK2</td><td>CPCI_CLK3</td><td>SYSEN-L</td><td>CPCI_GNT-L2</td><td>CPCI_REQ-L3</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>CPCI_CLK1</td><td>GND</td><td>CPCI_REQ-L1</td><td>CPCI_GNT-L1</td><td>CPCI_REQ-L2</td><td>GND</td></tr></table>

Table 4-14: CompactPCI J2 Connector Pin Definition

CompactPCI J3 Connector

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>19</td><td>GND</td><td>P5V</td><td>P5V</td><td>P12V</td><td>P5V</td><td>P5V</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>LAN3_MDI0_P</td><td>LAN3_MDI0_N</td><td>GND</td><td>LAN3_MDI2_P</td><td>LAN3_MDI2_N</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>LAN3_MDI1_P</td><td>LAN3_MDI1_N</td><td>GND</td><td>LAN3_MDI3_P</td><td>LAN3_MDI3_N</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>LAN2_MDI0_P</td><td>LAN2_MDI0_N</td><td>GND</td><td>LAN2_MDI2_P</td><td>LAN2_MDI2_N</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>LAN2_MDI1_P</td><td>LAN2_MDI1_N</td><td>GND</td><td>LAN2_MDI3_P</td><td>LAN2_MDI3_N</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>USB_OC3-L</td><td>USB_OC4-L</td><td>USB_OC5-L</td><td>USB_OC6-L</td><td>USB_OC7-L</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>USB8-P</td><td>USB8-N</td><td>GND</td><td>USB9-P</td><td>USB9-N</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>USB6-P</td><td>USB6-N</td><td>GND</td><td>USB7-P</td><td>USB7-N</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>USB4-P</td><td>USB4-N</td><td>GND</td><td>USB5-P</td><td>USB5-N</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>USB_OC2-L</td><td>DVID_SCL_RTM_J3</td><td>DVID_SDA_RTM_J3</td><td>CRT_HSYNC</td><td>CRT_VSYNC</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>COM3_CTS-L</td><td>COM3_RI-L</td><td>CRT_BLUE</td><td>CRT_RED</td><td>CRT_GREEN</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>COM3_RXD</td><td>COM3_TXD</td><td>COM3_DTR-L</td><td>COM3_DSR-L</td><td>COM3_RTS-L</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>COM4_TX</td><td>COM4_RX</td><td>COM3_DCD-L</td><td>IPMB_CLK</td><td>IPMB_DAT</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>SATA0_RXPC</td><td>SATA0_RXNC</td><td>GND</td><td>SATA1_RXPC</td><td>SATA1_RXNC</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>GND</td><td>GND</td><td>NC</td><td>GND</td><td>GND</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>SATA0_TXPC</td><td>SATA0_TXNC</td><td>GND</td><td>SATA1_TXPC</td><td>SATA1_TXNC</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>KBDATA</td><td>KBCLK</td><td>NC</td><td>MSDATA</td><td>MSCLK</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>A_HDA_SDIN1</td><td>AUD_SDIN2</td><td>NC</td><td>AUD_DOCK_EN-L</td><td>AUD_DOCK_RST-L</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>A_HDA_RST-L</td><td>A_HDA_SYNC</td><td>A_HDA_BIT_CLK</td><td>A_HDA_SDOUT</td><td>A_HDA_SDINO</td><td>GND</td></tr></table>

Table 4-15: CompactPCI J3 Connector Pin Definition

<table><tr><td>USB</td><td></td></tr><tr><td>Audio</td><td></td></tr><tr><td>DVI</td><td></td></tr><tr><td>LAN</td><td></td></tr><tr><td>SATA</td><td></td></tr><tr><td>COM</td><td></td></tr></table>

CompactPCI J5 Connector

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>22</td><td>GND</td><td>PWELED-L</td><td>LAN2_LED_ACT-L</td><td>NC</td><td>LAN3_LED_ACT-L</td><td>NC</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>NC</td><td>NC</td><td>DETECT-L</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>NC</td><td>NC</td><td>REAR_GPIO8</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>NC</td><td>NC</td><td>REAR_GPIO7</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>NC</td><td>NC</td><td>REAR_GPIO6</td><td>SATA_RX3_P_C</td><td>SATA_RX3_N_C</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>SATA-TX3_P_C</td><td>SATA-TX3_N_C</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>LAN2_LED_100-L</td><td>LAN3_LED_100-L</td><td>NC</td><td>LAN3_LED_1000-L</td><td>LAN2_LED_1000-L</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>DVI_SDA_RTM</td><td>DVI_SCL_RTM</td><td>DVI_HPD_RTM</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>DVID_TX2_P_C</td><td>DVID_TX2_N_C</td><td>GND</td><td>DVID_CLK_P_C</td><td>DVID_CLK_N_C</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>DVID_TX0_P_C</td><td>DVID_TX0_N_C</td><td>GND</td><td>DVID_TX1_P_C</td><td>DVID_TX1_N_C</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>REAR_GPIO1</td><td>REAR_GPIO2</td><td>REAR_GPIO3</td><td>REAR_GPIO4</td><td>REAR_GPIO5</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>GPIOLED-L</td><td>WDTLED-L</td><td>NC</td><td>HDDLED_R</td><td>NC</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>GND</td><td>GND</td><td>BAT_RTM</td><td>GND</td><td>GND</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>CLK_REAR-P</td><td>CLK_REAR-N</td><td>GND</td><td>PLTRST_REAR-L</td><td>NC</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>GND</td><td>GND</td><td>GND</td><td>GND</td><td>GND</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>PCIE_TX8-P</td><td>PCIE_TX8-N</td><td>GND</td><td>PCIE_RX8-P</td><td>PCIE_RX8-N</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>PCIE_TX7-P</td><td>PCIE_TX7-N</td><td>GND</td><td>PCIE_RX7-P</td><td>PCIE_RX7-N</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>PCIE_TX6-P</td><td>PCIE_TX6-N</td><td>GND</td><td>PCIE_RX6-P</td><td>PCIE_RX6-N</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>PCIE_TX5-P</td><td>PCIE_TX5-N</td><td>GND</td><td>PCIE_RX5-P</td><td>PCIE_RX5-N</td><td>GND</td></tr></table>

Table 4-16: CompactPCI J5 Connector Pin Definition

<table><tr><td>PCIe</td><td></td><td>LAN</td><td></td></tr><tr><td>GPIO</td><td></td><td>SATA</td><td></td></tr><tr><td>DVI</td><td></td><td colspan="2"></td></tr></table>

![The image displays a white document icon with a folded top-left corner. Faint gray horizontal lines run across the lower portion of the page to simulate text. A large, bold red checkmark is superimposed diagonally over the center of the document.](.cpci-6630-50-15110-2010-11/026617c25314583453776bc37dfb68c635584e80bbc16c5f2017e8c5949065bd.jpg)
NOTE:

GPIO signals to J5 are from the PCH. Contact ADLINK for information on how to control these GPIO.

# 4.7 Switches and Buttons

Refer to Section 4.1 cPCI-6630(D) Component Side Layout on page 19 and Section 4.2 cPCI-6630 Solder Side Layout on page 20 for switch and button locations.

# System Reset Button (SW1)

The cPCI-6630(D) has a system reset button on the front panel. Press the switch SW1 to reset the system.

![Simple diagram showing a red arrow pointing to a black rectangle (no text or symbols)](.cpci-6630-50-15110-2010-11/fb8a9bd86cbbe65eb8ba7325f4cc625cfaa5289aaad97769f337267a8478af9d.jpg)

# Clear CMOS, RTC Reset Button (SW5)

Press switch SW5 to clear CMOS and reset the RTC.

![Simple diagram showing a red arrow pointing to a black rectangular block (no text or symbols)](.cpci-6630-50-15110-2010-11/9c4c4ff2b37879e096ac6a5272082fbc934c907cb259cdbba43264e0b294d1de.jpg)

# COM1/2 Mode Switches (SW7/3)

Switch SW7 sets the mode of the COM1 port on the front panel. Switch SW3 sets the mode of the COM2 port on layer 2 of the front panel (cPCI-6630D only).

<table><tr><td>Mode</td><td>1</td><td>2</td></tr><tr><td>RS-232 (default)</td><td>ON</td><td>OFF</td></tr><tr><td>RS-422</td><td>ON</td><td>ON</td></tr><tr><td>RS-485</td><td>OFF</td><td>ON</td></tr></table>

![ON\n1 2](.cpci-6630-50-15110-2010-11/03091bdaa72cf05533e14a18891132cf80ba8660b683c3d28f3105cc5ee96666.jpg)

# DVI-I VGA Signal Front/Rear Switch (SW8)

Switch SW8 routes the VGA signals of the DVI-I port to either the front panel or rear I/O.

<table><tr><td>Pin</td><td>ON</td><td>OFF</td></tr><tr><td>1</td><td>Rear I/O</td><td>Front Panel (default)</td></tr><tr><td>2</td><td>Reserved</td><td>Reserved (default)</td></tr></table>

![1\n2\nON](.cpci-6630-50-15110-2010-11/eeed4094d2f0c8db1926ccb3e3c1e065d04ba6e19e20a0d44b53543a38845770.jpg)

# GbE (CN12) Front/Rear Switch (SW10)

Switch SW10 routes the GbE (CN12) signals to either the front panel or rear I/O.

<table><tr><td>Pin</td><td>ON</td><td>OFF</td></tr><tr><td>1</td><td>LAN2 to Rear I/O</td><td>LAN2 to Front Panel (default)</td></tr><tr><td>2</td><td>LAN3 to Rear I/O</td><td>LAN3 to Front Panel (default)</td></tr></table>

![1\n2\nON](.cpci-6630-50-15110-2010-11/c4b719badb77a97b6bec5bbf84bf05db64d57e79297f324009494521c4f595ea.jpg)

LAN2 LAN3
![Technical diagram of an electrical connector with labeled components and pin layouts](.cpci-6630-50-15110-2010-11/b0212eadc96595e08a546f115e96e36297c4cf663930aeb22d80594c1c2d420c.jpg)

# Force Ejector Handle Closed Switch (SW11)

Switch SW11 allows the ejector handle state to be forced "closed" so that blades without ejector handles (e.g. conduction cooled) will power on when inserted into the chassis.

<table><tr><td>Pin</td><td>ON</td><td>OFF</td></tr><tr><td>1</td><td>Force the ejector handle state to &quot;closed&quot; (default)</td><td>On/Off state is controlled by the ejector handle</td></tr><tr><td>2</td><td>NC</td><td>NC (default)</td></tr></table>

![1\n2\nNO](.cpci-6630-50-15110-2010-11/1196eaf7b3fede5af15b7b78df29e5299b510f8dce0f3614b62567fe8738db11.jpg)

![The image displays a digital icon representing a document. It features a white sheet of paper with horizontal black lines suggesting text content and a folded upper-right corner. Superimposed over the paper is a large, bold red checkmark. The entire graphic is enclosed within a thin black square border.](.cpci-6630-50-15110-2010-11/e2a302b2f313b48d8721b62b166ed8533a52c6aa4a62c49f9c0ac04c54442472.jpg)
NOTE:

When the On/Off state is controlled by the ejector handle (Pin 1 OFF), make sure to properly shut down the OS before opening the handle. If the ejector handle is opened while the OS is operating, power will be cut immediately, resulting in possible system corruption and data loss.

# PS/2 Front/Rear Switch (SW12)

Switch SW12 routes the PS/2 keyboard/mouse to either the front panel or rear I/O.

<table><tr><td>Pin</td><td>ON</td><td>OFF</td></tr><tr><td>1</td><td>PS/2 to rear</td><td>PS/2 to front (default)</td></tr><tr><td>2</td><td>Reserved</td><td>Reserved</td></tr></table>

![1\n2\nNO](.cpci-6630-50-15110-2010-11/e62789f209174031b755abe97ddf1abfa1f2d1a0591c01c2eeff5df46b54f81e.jpg)

# DVI-D Digital Signal Front/Rear Switch (SW13)

Switch SW13 routes the DVI-D signal to either the front panel or rear I/O.

<table><tr><td>Pin</td><td>ON</td><td>OFF</td></tr><tr><td>1</td><td>DVI-D to rear</td><td>DVI-D to front (default)</td></tr><tr><td>2</td><td>Reserved</td><td>Reserved</td></tr></table>

![1\n2\nON](.cpci-6630-50-15110-2010-11/df505d40f4cd68ec0f259a8a80e37ed8f42d5b6498048ec9e38cd176add79b5b.jpg)

# Debug Switch (SW14, Reserved)

The default setting for SW14 is 1 OFF, 2 OFF. Do not change the settings unless instructed by ADLINK.

# COM Debug Switches (SW\_COMDEG2, SW\_COMPW2)

Switch SW\_COMDEG2 is set 1, 2 ON and 3, 4 OFF by default to set the front panel RJ-45 COM1 (RJ2) serial port as a standard RS-232 serial port. The setting can be changed to use RJ2 as an BMC debug port. Leave the switch on default settings unless instructed by ADLINK.

<table><tr><td>SW_COMDEG1</td><td>Function</td></tr><tr><td>1, 2 ON, 3, 4 OFF</td><td>Normal COM (Default)</td></tr><tr><td>1, 2 OFF, 3, 4 ON</td><td>BMC Debug</td></tr></table>

![ON\n1\n2\n3\n4](.cpci-6630-50-15110-2010-11/072d05617dabe8a942f43e950644c4c88b7a6ffae99cc2376e08aada2dcee9da.jpg)

Switch SW\_COMPW2 is located on the component side of the board. Switch SW\_COMPW2 is set ON by default. Leave the switch on default settings unless instructed by ADLINK.

![ON\nOFF](.cpci-6630-50-15110-2010-11/0e98c8cdb7567b6ab781d56ab9120d3d24d39f1af10708100f56b8c0cbac6392.jpg)

# PMC VIO Function Jumper (CN\_VIO)

Jumper CN\_VIO is located on the component side of the board. CN\_VIO sets the PMC VIO to either 3.3V or 5V.

<table><tr><td>Pin</td><td>Function</td></tr><tr><td>Short 1-2</td><td>3V3 (default)</td></tr><tr><td>Short 2-3</td><td>5V</td></tr></table>

![The image displays the number '1' in the top left corner. Below it is a large rectangular outline. Inside this larger rectangle, there is a smaller rectangular outline positioned on the left side. Inside this smaller rectangle are two solid black circles. To the right of the smaller rectangle, but still within the larger rectangle, is a third solid black circle.](.cpci-6630-50-15110-2010-11/119a701294f8438092f1decab3ba432fb096ac9256a6544c63a07b40467b91fc.jpg)

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# 5 Getting Started

This chapter describes the following installation procedures for the cPCI-6630(D):

X CFast card
X CompactFlash card
X 2.5” SATA drive
X PMC module installation

# 5.1 CPU and Heatsink

The cPCI-6630 Series come with CPU and heatsink pre-installed. Removal of heatsink/CPU by users is not recommended. Please contact your ADLINK service representative for assistance.

# 5.2 CFast Card Installation

The cPCI-6630(D) provides space to install a CFast card or a CompactFlash card (optional). Follow the instructions below to install a CFast to the cPCI-6630(D).

1. A CFast card can be installed in the location marked below. A retention bracket is pre-installed to secure the CFast card in place.

![Interior view of an electronic circuit board with visible components and a red annotation box highlighting a specific area (no text or symbols present)](.cpci-6630-50-15110-2010-11/bd304ea7fb67c68a3eca5b18c0329145c25aa2a67cb5457bf920ec73df6459b9.jpg)

2. Turn the cPCI-6630(D) over and remove the two screws indicated below. Remove the retention bracket.

![Close-up of a green printed circuit board with visible traces and mounting holes, mounted on a stand with black clamps (no text or symbols)](.cpci-6630-50-15110-2010-11/021b0a3f10b91e21a45cadd96ca13ef7b9d4696e8d34b394535ccbf27a71266e.jpg)

3. Insert the CFast card into the socket. Locate the strip of black foam in the CFast accessory pack and remove the backing from the adhesive side.

![Close-up of a green printed circuit board with various electronic components and connectors, including capacitors and connectors (no visible text or symbols)](.cpci-6630-50-15110-2010-11/5025bbccfef1f3bf34c1a859e9a4facf0b8199835a531645260f12c846ca70f5.jpg)

![Hand holding a black cable clip next to a green printed circuit board (no visible text or symbols)](.cpci-6630-50-15110-2010-11/f50632944d007baf43561d7701b82786c26b2c46f4e79533200339c8acd381e8.jpg)

4. Attach the foam to the bracket as shown below.

![Close-up of a green printed circuit board with integrated circuits and connectors, next to a black plastic component (no visible text or symbols)](.cpci-6630-50-15110-2010-11/f49f023956c878fa62f362651ca4530c24c98148f3948b07c130d3edf0c99fee.jpg)

5. Place the bracket on the board as shown below. Secure the bracket to the board by fastening the 2 screws removed in Step 2 on the solder side of the cPCI-6630(D).

![Top-down view of a green computer motherboard with visible CPU socket, RAM slots, and drive bays (no text or symbols)](.cpci-6630-50-15110-2010-11/1c2a0221e7e3d57f6f674d9c093b1fdf52518e2377742f5de9d3085ca364c0fa.jpg)

# 5.3 CompactFlash Card Installation (optional)

Follow the instructions below to install a CompactFlash card to the cPCI-6630(D) with optional CF card slot.

1. A CompactFlash card can be installed in the location marked below. A retention bracket is pre-installed to secure the CompactFlash card in place.

![Close-up of a green printed circuit board with visible components and a red annotation highlighting a component (no readable text or symbols)](.cpci-6630-50-15110-2010-11/823c7acc0126cced3cb39f8de6eed90b7d541807169f974ddc53732f36e060ed.jpg)

2. Turn the cPCI-6630(D) over and remove the two screws indicated below. Remove the retention bracket.

![Top-down view of a green printed circuit board with multiple electronic components and mounting brackets (no visible text or symbols)](.cpci-6630-50-15110-2010-11/527a0610f2f1697bea5090b7542ac1e86636b50a938e58ab4e0bb2804cfb45fb.jpg)

![Close-up of a green printed circuit board with connectors and components, next to a metallic hard drive bracket (no visible text or symbols)](.cpci-6630-50-15110-2010-11/24c756abccc1e636ef26c9eefc1ad9f1b3a4ccdc657553ab0107b1b63e44aaa9.jpg)

3. Insert the CompactFlash card into the CompactFlash slot. Secure the bracket on to the board by fastening the 2 screws removed in Step 2 on the solder side of cPCI-6630(D).

![Industrial Connect Flash\n64GB\nFCC 2. Reels](.cpci-6630-50-15110-2010-11/c5e87549d1d542931a31d5759ff403e0f8fb7dcbba637722d7b571c7210b46e7.jpg)

![DEV30019243\nSCANCE 1037 11\nIndustrial Command Flash\n64GB\n500 hexagonal\nMade in Texas](.cpci-6630-50-15110-2010-11/eb9e70f454e307b5946cb273cf02bd0d02acb0bb90ee136cab9d4fe633f8426a.jpg)

# 5.4 2.5" SATA Drive Installation

The cPCI-6630(D) provides space to install a 2.5” SATA drive.

1. A 2.5” SATA drive can be installed on the cPCI-6630(D) in the location shown below. The items in the 2.5” SATA drive accessory pack are shown on the right.

![Disassembled computer motherboard with visible components and a 2.5' SATA SSD 3MG2-P card (no readable text or symbols on main subject)](.cpci-6630-50-15110-2010-11/bd042e582a2557795b79d1029927d18b2d257d9cd7ed9228ef159ef73848d68b.jpg)

2. Attach the SATA adapter board to the SSD. Place the 2.5” SATA drive and SATA adapter assembly onto the SATA drive bracket as shown below.

![inmodisk\n2.5' SATA SSD\n3MG2-P\nSeries](.cpci-6630-50-15110-2010-11/aa0af3c0a8afe7d7500255c8fc45725f77e312540f0b2e0ffcd2dd209d63755d.jpg)

3. Secure the 2.5” SATA drive to the drive bracket by fastening 4 screws (M3 L4, flat head) on both sides of the bracket as indicated below.

![JWDC-2.0\nJWDC-2.0\n376 506 550\n128](.cpci-6630-50-15110-2010-11/86d5ff17705aacfcb14ecd4b8ce7f06bd67bdb42b0be1faeddab1af30f8cf979.jpg)

4. Place the SATA drive and drive bracket assembly onto cPCI-6630(D) by fastening two screws(M2.5 L6, round head) circled as below.

![Interior view of an electronic computer motherboard with visible CPU socket, heatsink, and drive bays (no readable text or symbols)](.cpci-6630-50-15110-2010-11/db7f213cb8c680b474678ac2f74b43128b70cfed2891a7e43f0f04a32d48921a.jpg)

5. Turn the board over and finish securing the SATA drive and drive bracket assembly by fastening two screws (M2.5 L6, round head) )as shown below.

![Green printed circuit board with visible traces and components, mounted on a stand with clips attached (no text or symbols)](.cpci-6630-50-15110-2010-11/8862d5ec95d90cf1ac66b1d7eafcd254bde8e654fc34811c69dc753c24d1dc6a.jpg)

# 5.5 PMC Installation (cPCI-6630D only)

The cPCI-6630D provides space to install one PMC module. Follow following steps to install a PMC module.

1. A PMC module can be installed on the cPCI-6630D in the location indicated below. Locate the two male/female standoffs (M2.5, H15) and two screws (M2.5 L6, round head) in the PMC accessory pack. Secure the standoffs onto the PCB (indicated by arrows) by fastening the two screws on the back side of the cPCI-6630D.

![innodisk\n2.5' SATA SSD\n3MG2-P\nSeries](.cpci-6630-50-15110-2010-11/ce7112d6924a8e797e81388d7baecfd76a600cc558b02d606e1361d57613da21.jpg)

![Green printed circuit board with visible traces and components, mounted on a stand with black clamps (no text or symbols)](.cpci-6630-50-15110-2010-11/20dff02f256f0f033ab8b8c0795d1200a112ff0d9e238b4c2e29ca8a053eee78.jpg)

2. Remove the PMC filler plate and the screws securing two brackets to the front panel as shown below.

![Internal view of an electronic device showing internal components and a labeled card (no readable text or symbols beyond branding)](.cpci-6630-50-15110-2010-11/00f0814733528dec7335b3c48eda6c18f66e48b4131e819e0c9ef25f3b933bf9.jpg)

3. Locate the DB-6965PMC daughter board in the PMC accessory pack and attach it to the JN1/JN2 PMC board-to-board connectors on the cPCI-6630D in the location shown below.

![Interior view of an electronic device showing a motherboard with CPU socket, RAM slots, and hardware components (no readable text or symbols)](.cpci-6630-50-15110-2010-11/12872ed1a41de850c93088aec6d320864ff8d4bd1b5f1c01f16b854e7276d957.jpg)

4. Secure the two brackets removed in Step 2 above to the PMC card as shown below.

![Close-up of a computer hardware unit showing internal components and two metallic bracket attachments (no text or symbols visible)](.cpci-6630-50-15110-2010-11/450a745be770c840f75654e3aaea77ad2b8ea2dcd0e32654a4496e865a0acd3f.jpg)

![Green printed circuit board with connectors and a small plastic connector, showing disassembled components (no readable text or symbols)](.cpci-6630-50-15110-2010-11/98593f86f999511067efce8ceb83d6131da70952b5323b6b8ddbf03de9979782.jpg)

5. Locate the two female/female standoffs provided in the PMC accessory pack and fasten them to secure the DB-6965PMC daughter board as shown.

![Interior view of an electronic device showing a circuit board with internal components and a green circuit board (no readable text or symbols)](.cpci-6630-50-15110-2010-11/607cdc509b047ac1d8ea20ea5bafe6ea6493386a7c285143a90589cc249c695f.jpg)

6. Align the connectors of the PMC card with those on the DB-6965PMC daughter board and fasten with two screws as indicated below.

![Interior view of an electronic device showing a green circuit board with two red-circled annotations, no readable text or symbols present.](.cpci-6630-50-15110-2010-11/3fb41eacb8ca4a68a18947ef0c60ab2577c4fd4e92909094e2585116babdb337.jpg)

7. Fasten the two screws removed in Step 2 above to the front panel to complete securing the PMC card to the cPCI-6630D. Set aside the PMC filler plate so it can be replaced if the PMC card is uninstalled.

![2.5' SATA SSD\n3MG2-P\nSeries\nMDC-803\nPMT: 12\nPCT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nSPT:12\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nVCC-803\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nSPT: 12\nVCC-803](.cpci-6630-50-15110-2010-11/b6a1132cccaa8b7135cf944c6ea898acf9ef10169502ac75fcbfc46e79918e43.jpg)

# 5.6 Installing the cPCI-6630(D) to the Chassis

The cPCI-6630(D) may be installed in a system or peripheral slot of a 6U CompactPCI chassis. These instructions are for reference only. Refer to the user guide that comes with the chassis for more information.

1. Be sure to select the correct slot depending on the operational purpose of the module. The system power may now be powered on or off.
2. Remove the blank face cover from the selected slot, if necessary.
3. Press down on the release catches of the cPCI-6630 ejector handles.
4. Remove the black plastic caps securing the mounting screws to the front panel.
5. Align the module’s top and bottom edges to the chassis card guides, and then carefully slide the module into the chassis. A slight resistance may be felt when inserting the module. If the resistance it too strong, check if there are bent pins on the backplane or if the board’s connector pins are not properly aligned with connectors on the backplane. Then push the board until it is completely flush with the chassis.
6. Push the ejector handles outwards to secure the module in place, and then fasten the screws on the module front panel.
7. Connect the cables and peripherals to the board, and then turn the chassis on if necessary.

# 6 Driver Installation

The cPCI-6630 drivers can be downloaded from the ADLINK website (http://www.adlinktech.com). ADLINK provides validated drivers for Windows 7 and Windows 10. We recommend using these drivers to ensure compatibility. VxWorks BSP and QNX BSP can also be downloaded from the cPCI-6630 product page on the ADLINK website.

# 6.1 cPCI-6630 Drivers

The driver installation procedure for Windows 10 is described below. Note that since Intel does not support EHCI on the 6th generation Intel® Core™ platform (formerly "Skylake"), it is recommended to use a PS/2 KB/MS to install the Windows OS.

1. Install the Windows operating system before installing any driver. Most standard I/O device drivers are installed during Windows installation.
2. Install the chipset driver by extracting and running the program in ...\Intel\_Chipset\_Win10x64\_v10.1.1.38\_public.zip.
3. Install the graphics driver and utilities by extracting and running the program in ...\Intel\_Graphics\_Win10x64\_ v15.40.31.64.4549.zip.
4. Install the LAN drivers by extracting and running the program in …\Intel\_Chipset\_Win10x64\_v10.1.1.38\_public.zip.
5. Install the Intel Rapid Storage Technology Utility by extracting and running the program in …\Intel\_RST\_Win10x64\_ v15.2.0.1020.zip.
6. Install the Intel® Management Engine Interface driver for Intel® AMT support by extracting and running the program in …\Intel\_ME\_Win10x64\_v11.0.4.1186.zip.
7. Install the audio driver and utilities by extracting and running the program in …\Realtek\_Audio\_Win10x64\_v.R279.zip.

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# 7 Utilities

# 7.1 Watchdog Timer

This section describes the operation of the cPCI-6630’s watch dog timer (WDT). The primary function of the WDT is to monitor the cPCI-6630 operation and to reset the system if a software application fails to function as programmed. The following WDT functions may be controlled using a software application:

X enabling and disabling
X reloading timeout value

The cPCI-6630 custom WDT circuit is implemented using the internal IO of the ITE Super I/O IT8786 which is at 2Eh of LPC. The basic functions of the WDT include:

X Starting the timer countdown.
X Enabling or disabling WDT.
X Enable or disable WDT countdown LED ON.
X Reloading the timeout value to keep the watch dog from timing out.
X Setting the range of the timeout period from 1 to 15300 seconds.
X Sending a RESET signal to system when the watch dog times out

# Using the Watchdog in an Application

The following section describes the WDT functions in an application. These can be controlled through the registers in the cPCI-6630 Super I/O.

An application using the reset feature enables the watchdog function, sets the count-down period, and reloads the timeout value periodically to keep it from resetting the system. If the timer countdown value is not reloaded, the watchdog resets the system hardware after its counter reaches zero.

Sample Code
```c
#include &lt;stdio.h&gt;
#include &lt;stdlib.h&gt;

typedefunsigned charBYTE;

void EnterConfig()
{
    outportb(SIO_CONFIG_INDEX, 0x87);
    outportb(SIO_CONFIG_INDEX, 0x01);
    outportb(SIO_CONFIG_INDEX, 0x55);
    outportb(SIO_CONFIG_INDEX, 0x55);
}

void ExitConfig()
{
    outportb(SIO_CONFIG_INDEX, 0x02);
    outportb(SIO_CONFIG_DATA, 0x02);
}

void LDNSelection(BYTE LDN)
{
    outportb(SIO_CONFIG_INDEX, 0x07);
    outportb(SIO_CONFIG_DATA, LDN);
}

void SIOBasicIORead(
    BYTE LDN,
    BYTE Register,
    BYTE *Data)
{
    LDNSelection(LDN);
    outportb(SIO_CONFIG_INDEX, Register);
    *Data = inportb(SIO_CONFIG_DATA);
}

void SIOBasicIOWrite(
    BYTE LDN,
    BYTE Register,
    BYTE Data)
{
```

```c
LDNSelection(LDN);
outportb(SIO_CONFIG_INDEX, Register);
outportb(SIO_CONFIG_DATA, Data);
}

BOOL StringToByte(char *string, BYTE *value)
{
    BYTE i, temp;
    *value = 0;
    for(i=0; string[i]!=NULL; ++i) {
    if(i>1) { printf("Digital count error!\n");
    return 0; }
    *value &lt;&lt;= 4;
    temp = toupper(string[i]);
    if(temp &gt;= '0' && temp &lt;= '9')
    *value += temp - '0';
    else if(temp &gt;= 'A' && temp &lt;= 'F')
    *value += temp - 'A' + 0x0a;
    else {
    printf("Input char[%c] is illegal!\n", string[i]);
    return 0;
    }
    }
    return1;
}

BOOL StringToWORD_Dec(char *string, WORD *value)
{
    BYTE i;
    WORD temp;

    *value = 0;
    for(i=0; string[i]!=NULL; ++i) {
    if(i&gt;4) { printf("Digital count error!\n");
    return 0; }
    *value *= 10;
    temp = toupper(string[i]);
    if(temp >= '0' && temp &lt;= '9')
    *value += temp - '0';
    else {
```

```c
printf("Input char[%c] is illegal!\n", string[i]);
return 0;
}
if(temp &gt; 65535) {
    printf("Input number is large than 65535!\n");
}
return1;
int IT8786_WatchDog(int argc, char *argv[])
{
BYTE bTemp, bUnit;
WORD wWdtimer;

printf("ADLINK WatchDog DOS Utility [Version 1.00]\n\n");
if((argc != 3) && strcmp(argv[1], "/?")) {
    printf("Invalid command, please type /? to get the details.\n");
    return 0;
}
if(!strcmp(argv[1], "/?")) {
    printf("WatchDog [argument1][argument2]\n\n");
    printf("argument1 :\n");
    printf(" 1 - Second\n");
    printf(" 0 - Minute\n");
    printf("argument2 :\n");
    printf(" Time-out value\n\n");
    printf("Example below for 10 seconds.\n");
    printf(" WatchDog 1 10\n");
    printf("Example below for 3 minutes.\n");
    printf(" WatchDog 0 3\n");
    return 0;
}

StringToByte(argv[1], &bUnit);
if((bUnit != 0) && (bUnit != 1)) {
```

```c
printf("Argument1 is a invalid number[%d].\n", bUnit);
return 1;
}

StringToWORD_Dec(argv[2], &wWdtimer);

EnterConfig();

// Implement Watch Dog
SIOBasicIORead(0x07, 0x29, &bTemp);
bTemp &= ~BIT6; // default function = KRST
SIOBasicIOWrite(0x07, 0x29, bTemp);

// Config settings
if(bUnit) {
    bTemp = 0xd0; // second
} else {
    bTemp = 0x50; // minute
}
SIOBasicIOWrite(0x07, 0x72, bTemp);

// Set timer value
SIOBasicIOWrite(0x07, 0x74,
(BYTE)(wWdtimer>>8));
SIOBasicIOWrite(0x07, 0x73, (BYTE)wWdtimer);

// Program led blinking
SIOBasicIORead(0x07, 0x25, &bTemp);
bTemp |= BIT2;
SIOBasicIOWrite(0x07, 0x25, bTemp);

SIOBasicIOWrite(0x07, 0xF8, 0x0A);

ExitConfig();

return 0;
}
```

# 7.2 User LED Programming

The eight User LEDs on the front panel display port 80h POST codes in hexadecimal during boot up. Users can use the POST codes to identify issues during the BIOS POST process. In default mode, these eight LEDs display the POST code output to Port 80h during system bootup (see “User LEDs” on page 24). After the system is under OS control, the eight User LEDs can be controlled as user defined LEDs. The LEDs are connected to eight GPIO pins of the Super I/O IT8786. Users can follow the sample code below to control the LEDs.

![Diagram of an Ethernet cable connector with labeled ports and connectors, highlighting a red button on port 7.](.cpci-6630-50-15110-2010-11/dc2c6c2a7ccbc073bb0bf59c598e23360d6fbea110656e4643d0b3362f322d98.jpg)

# Sample Code

```c
#define IT8786_GPIO_BASE_ADDRESS 0xa00
typedef unsigned char BYTE;
//====================
//
// Procedure: LedCheckpoint
//
//====================
VOID LedCheckpoint(IN BYTE Checkpoint)
{
    BYTE bData = 0xFF, i;
    for(i=0; i&lt;8; i++)
    {
    if(Checkpoint&(1&lt;&lt;i))
    bData &= ~(UINT8)(1&lt;&lt;i);
    }

    for (i=0; i&lt;8; i++)
    {
    if(bData &(1&lt;&lt;i))
    {
    bData2 |= 0x01;
```

```c
}
if(i&lt;7)
{
    bData2 = bData2 &lt;&lt; 1;
}
}
outportb(IT8786_GPIO_BASE_ADDRESS+0x06, bData);
}
```

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# 8 BIOS Setup Utility

The following chapter describes basic navigation for the AMI EFI BIOS setup utility.

# 8.1 Starting the BIOS

To enter the setup screen, follow these steps:

1. Power on the motherboard
2. Press the &lt; Delete &gt; key on your keyboard when you see the following text prompt: &lt; Press DEL to run Setup &gt;
3. After you press the &lt; Delete &gt; key, the main BIOS setup menu displays. You can access the other setup screens from the main BIOS setup menu.

![Red geometric shape resembling a triangle with horizontal stripes and a central diamond (no text or symbols)](.cpci-6630-50-15110-2010-11/e70f99e4d8b349262b7ab7d7cbf2c5dfc84463356992d298c505041601ee5a6d.jpg)

# American Megatrends

Version 2.18.1263. Copyright (C) 2016 American Megatrends， Inc. cPCI-6630 REV:0.09.10 Press &lt;CTRL + P&gt; to Enter MEBX setup menu Press &lt;DEL&gt; or &lt;ESC&gt; to enter setup.

99

Note: In most cases, the &lt; Delete &gt; key is used to invoke the setup screen. There are several cases that use other keys, such as &lt; F1 &gt;, &lt; F2 &gt;, and so on.

# Setup Menu

The main BIOS setup menu is the first screen that you can navigate. Each main BIOS setup menu option is described in this user’s guide.

The Main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. "Grayed" options cannot be configured, "Blue" options can be.

The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it.

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td colspan="3">Main Advanced Chipset Security Boot Save &amp; Exit</td></tr><tr><td colspan="2">BIOS Information</td><td>^|Choose the system</td></tr><tr><td>BIOS Vendor</td><td>American Megatrends</td><td>*|default language</td></tr><tr><td>Core Version</td><td>5.11</td><td>*|</td></tr><tr><td>Compliancy</td><td>UEFI 2.4; PI 1.3</td><td>*|</td></tr><tr><td>Project Version</td><td>cPCI-6630 0.09.10</td><td>*|</td></tr><tr><td>Build Date and Time</td><td>12/29/2016 17:06:36</td><td>*|</td></tr><tr><td>Access Level</td><td>Administrator</td><td>*|</td></tr><tr><td></td><td></td><td>+|</td></tr><tr><td colspan="2">Processor Information</td><td>+|</td></tr><tr><td>Name</td><td>SkyLake DT</td><td>+|----</td></tr><tr><td>Brand String</td><td>Intel(R) Core(TM)i7-6820EQ CPU @ 2.80GHz</td><td>+|&gt;&lt;: Select Screen+|^v: Select Item</td></tr><tr><td>Frequency</td><td>2700 MHz</td><td>+|Enter: Select</td></tr><tr><td>Processor ID</td><td>506E3</td><td>+|+/-: Change Opt.</td></tr><tr><td>Stepping</td><td>R0/S0/NO</td><td>+|F1: General Help</td></tr><tr><td>Number of Processors</td><td>4Core(s) / 8Thread(s)</td><td>+|F2: Previous Values</td></tr><tr><td>Microcode Revision</td><td>A6</td><td>+|F3: Optimized Defaults</td></tr><tr><td>GT Info</td><td>GT2 (1000 MHz)</td><td>v|F4: Save &amp; Exit|ESC: Exit</td></tr></table>

# Navigation

![The flowchart describes the navigation of a 'BIOS Setup Utility'.\n\n**Top Section:**\n*   A box labeled **'BIOS Setup Utility'** has an arrow pointing down to the text **'Screens'**.\n*   To the left, a box labeled **'Left and Right Keys to Select a Setup Screen'** has a dashed arrow pointing to a horizontal row of boxes.\n*   This row consists of five boxes connected by double-headed horizontal arrows: **'Screen 1'**, **'Screen 2'**, **'Screen 3'**, **'Screen 4'**, and **'Screen 5'**.\n\n**Bottom Section:**\n*   An arrow points down from 'Screens' to the text **'Items'**.\n*   Below 'Items' is a row of three squares containing the plus/minus symbol (±), connected by double-headed horizontal arrows.\n    *   A box labeled **'Tab Key to Select Fields'** has a dashed arrow pointing to the first square in this row.\n    *   A box labeled **'± To Change Field Values'** has a dashed arrow pointing to the third square in this row.\n*   Below this row is another identical row of three squares (±) connected by double-headed horizontal arrows.\n*   Between these two rows of squares is a double-headed vertical arrow (up and down).\n    *   A box labeled **'Up and Down Keys to Select a Setup Item'** has a dashed arrow pointing to this vertical arrow.\n*   To the left of these rows is the text **'Fields'**. A bracket line connects 'Fields' to both the top and bottom rows of squares with arrows pointing toward them.](.cpci-6630-50-15110-2010-11/adfc5101dfb45920f42efd25c1e329fb6f343eef180468efaff441ac63320881.jpg)

Note: There is a hot key legend located in the right frame on most setup screens.

# Keyboard Commands

&lt; &gt; The Left and Right "Arrow" keys allow you to select a setup screen.

^ v The Up and Down "Arrow" keys allow you to select a setup screen.

The Plus and Minus keys allow you to change the field value of a particular setup item.

Tab Moves the cursor to the next configurable item or to the next field.

# Hotkey Descriptions

Enter The &lt; Enter &gt; key allows you to display or change the setup option listed for a particular setup item. The &lt; Enter &gt; key can also allow you to display the setup sub-screens.

F1 The &lt; F1 &gt; key allows you to display the General Help screen. Press the &lt; F1 &gt; key to open the General Help screen.

![General Help\n↑↓+ : Move\nEnter : Select\n+/- : Value\nESC : Exit\nF1 : General Help\nF2 : Previous Values\nF3 : Optimized Defaults\nF4 : Save & Exit Setup\n(K) : Scroll help area upwards\n(M) : Scroll help area downwards\nOk](.cpci-6630-50-15110-2010-11/2613cb1c94375883a92650731d61516717c6c2ef0b28c4f06c99dc9e733aed32.jpg)

F2 The &lt; F2 &gt; key on your keyboard is the previous values key. It is not displayed on the key legend by default. To set the previous values settings of the BIOS, press the &lt; F2 &gt; key on your keyboard. It is located on the upper row of a standard 101 keyboard. The previous values settings allow the motherboard to boot up with the least amount of options set. This can lessen the probability of conflicting settings.

![Load Previous Values\nLoad Previous Values?\nYes No](.cpci-6630-50-15110-2010-11/9902a2aa94ab7b49544e2f8a13795597a5c5a78f1aee6c941acab49e52168da8.jpg)

F3 The &lt; F3 &gt; key on your keyboard is the optimized defaults key. To set the optimized defaults settings of the BIOS, press the &lt; F3 &gt; key on your keyboard. It is located on the upper row of a standard 101 keyboard. The optimized defaults settings allow the motherboard to boot up with the optimized defaults of options set. This can lessen the probability of

conflicting settings.

![Load Optimized Defaults\nLoad Optimized Defaults?\nYes No](.cpci-6630-50-15110-2010-11/6b9fc02844d44fadde38fe5e9e79a42250396f20bf849f8c54b171d2b79b0e04.jpg)

F4 The &lt; F4 &gt; key allows you to save any changes you have made and exit Setup. Press the &lt; F10 &gt; key to save your changes. The following screen will appear:

![Save & Exit Setup\nSave configuration and exit?\nYes	No](.cpci-6630-50-15110-2010-11/c2c95b84cfef71f0b237295638712c90403cda44deadac0c3a6840c1b72bdcf2.jpg)

Press the &lt; Enter &gt; key to save the configuration and exit. You can also use the &lt; Arrow &gt; key to select Cancel and then press the &lt; Enter &gt; key to abort this function and return to the previous screen.

ESC The &lt; Esc &gt; key allows you to discard any changes you have made and exit the Setup. Press the &lt; Esc &gt; key to exit the setup without saving your changes. The following screen will appear:

![Exit Without Saving\nQuit without saving?\nYes No](.cpci-6630-50-15110-2010-11/042f45d503e7002de2c1c7971897163587e9f25d38d9547e7a0254e7060c4dce.jpg)

Press the &lt; Enter &gt; key to discard changes and exit. You can also use the &lt; Arrow &gt; key to select Cancel and then press the &lt; Enter &gt; key to abort this function and return to the previous screen.

# 8.2 Main Setup

When you first enter the Setup Utility, you will enter the Main setup screen which reports BIOS, processor, and PCH information.

<table><tr><td colspan="4">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td colspan="4">Main Advanced Chipset Security Boot Save &amp; Exit</td></tr><tr><td colspan="3">BIOS Information</td><td>^| Choose the system</td></tr><tr><td>BIOS Vendor</td><td colspan="2">American Megatrends</td><td>*| default language</td></tr><tr><td>Core Version</td><td colspan="2">5.11</td><td>*|</td></tr><tr><td>Compliancy</td><td colspan="2">UEPI 2.4; PI 1.3</td><td>*|</td></tr><tr><td>Project Version</td><td colspan="2">cPCI-6630 0.09.10</td><td>*|</td></tr><tr><td>Build Date and Time</td><td colspan="2">12/29/2016 17:06:36</td><td>*|</td></tr><tr><td>Access Level</td><td colspan="2">Administrator</td><td>*|</td></tr><tr><td></td><td colspan="2"></td><td>+|</td></tr><tr><td colspan="3">Processor Information</td><td>+|</td></tr><tr><td>Name</td><td colspan="2">SkyLake DT</td><td>+|----</td></tr><tr><td>Brand String</td><td colspan="2">Intel(R) Core(TM)</td><td>+|&lt;: Select Screen</td></tr><tr><td></td><td colspan="2">i7-6820EQ CPU @ 2.80GHz</td><td>+|^v: Select Item</td></tr><tr><td>Frequency</td><td colspan="2">2700 MHz</td><td>+|Enter: Select</td></tr><tr><td>Processor ID</td><td colspan="2">506E3</td><td>+|+/-: Change Opt.</td></tr><tr><td>Stepping</td><td colspan="2">R0/S0/N0</td><td>+F1: General Help</td></tr><tr><td>Number of Processors</td><td colspan="2">4Core(s) / 8Thread(s)</td><td>+F2: Previous Values</td></tr><tr><td>Microcode Revision</td><td colspan="2">A6</td><td>+F3: Optimized Defaults</td></tr><tr><td>GT Info</td><td colspan="2">GT2 (1000 MHz)</td><td>v|F4: Save &amp; Exit</td></tr><tr><td>IGFX VBIOS Version</td><td colspan="2">1049</td><td>+|</td></tr><tr><td>Memory RC Version</td><td colspan="2">2.1.0.0</td><td>+|</td></tr><tr><td>Total Memory</td><td colspan="2">4096 MB</td><td>+|</td></tr><tr><td>Memory Frequency</td><td colspan="2">2133 MHz</td><td>+|</td></tr><tr><td></td><td colspan="2"></td><td>+|</td></tr><tr><td colspan="3">PCH Information</td><td>+|</td></tr><tr><td>Name</td><td colspan="2">SKL PCH-H</td><td>*|</td></tr><tr><td>PCH SKU</td><td colspan="2">PCH-H Mobile HM170</td><td>*|</td></tr><tr><td>Stepping</td><td colspan="2">31/D1</td><td>*|----</td></tr><tr><td>LAN PHY Revision</td><td colspan="2">B2</td><td>*|&lt;: Select Screen</td></tr><tr><td></td><td colspan="2"></td><td>*|^v: Select Item</td></tr><tr><td>ME FW Version</td><td colspan="2">11.0.18.1002</td><td>*|Enter: Select</td></tr><tr><td>ME Firmware SKU</td><td colspan="2">Corporate SKU</td><td>+|+/-: Change Opt.</td></tr><tr><td colspan="3">SPI Clock Frequency</td><td>+|to switch between Time</td></tr><tr><td>DOFR Support</td><td colspan="2">Unsupported</td><td>+|elements.</td></tr><tr><td>Read Status Clock</td><td colspan="2">48 MHz</td><td>+|</td></tr><tr><td>Frequency</td><td colspan="2"></td><td>+|</td></tr><tr><td>Write Status Clock</td><td colspan="2">48 MHz</td><td>+|</td></tr><tr><td>Frequency</td><td colspan="2"></td><td>+|</td></tr><tr><td>Fast Read Status</td><td colspan="2">48 MHz</td><td>+|</td></tr><tr><td>Clock Frequency</td><td colspan="2"></td><td>+|</td></tr><tr><td></td><td colspan="2"></td><td>+|----</td></tr><tr><td>Hardware Version</td><td colspan="2">A2</td><td>+|&lt;: Select Screen</td></tr><tr><td></td><td colspan="2"></td><td>*|^v: Select Item</td></tr><tr><td>System Language</td><td colspan="2">[English]</td><td>*|Enter: Select</td></tr><tr><td></td><td colspan="2"></td><td>*|+/-: Change Opt.</td></tr><tr><td colspan="3">&gt; System Management</td><td>*|F1: General Help</td></tr><tr><td></td><td colspan="2"></td><td>*|F2: Previous Values</td></tr><tr><td>System Date</td><td colspan="2">[Sun 11/20/2016]</td><td>*|F3: Optimized Defaults</td></tr><tr><td>System Time</td><td colspan="2">[00:41:46]</td><td>v|F4: Save &amp; Exit</td></tr><tr><td></td><td colspan="2"></td><td>|ESC: Exit</td></tr></table>

# 8.2.1 System Management

Select the Main tab from the setup screen to enter the System Management Setup screen. You can select any of the items in the left frame of the screen to go to the sub menu for that item. The System Management BIOS Setup screen is shown below.

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td>Main</td><td></td></tr><tr><td>System Management</td><td>Board Information</td></tr><tr><td>Version: 1.00</td><td></td></tr><tr><td>Overview</td><td></td></tr><tr><td>&gt; Board Information</td><td></td></tr><tr><td>System Health</td><td></td></tr><tr><td>&gt; Temperatures and Fan Speed</td><td></td></tr><tr><td>&gt; Power Consumption</td><td></td></tr><tr><td>&gt; Runtime Statistics</td><td>&gt;&lt;: Select Screen</td></tr><tr><td>&gt; Flags</td><td>^v: Select Item</td></tr><tr><td></td><td>Enter: Select</td></tr><tr><td></td><td>+/-: Change Opt.</td></tr><tr><td></td><td>F1: General Help</td></tr><tr><td></td><td>F2: Previous Values</td></tr><tr><td></td><td>F3: Optimized Defaults</td></tr><tr><td></td><td>F4: Save &amp; Exit</td></tr><tr><td></td><td>ESC: Exit</td></tr><tr><td colspan="2">Version 2.18.1259. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# Board Information

You can use this screen to view Board related information. An example of the Board screen is shown below.

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td>Main</td><td></td><td></td></tr><tr><td>Board Information</td><td></td><td>^ |</td></tr><tr><td></td><td></td><td>* |</td></tr><tr><td>SEMA Firmware</td><td>BMC cPCI-6630 0v8</td><td>* |</td></tr><tr><td>Build Date</td><td>Dec 20 2016</td><td>* |</td></tr><tr><td>SEMA Bootloader</td><td>bl_cPCI-6630 4v1</td><td>* |</td></tr><tr><td>Build Date</td><td>Jul 25 2016</td><td>* |</td></tr><tr><td></td><td></td><td>* |</td></tr><tr><td>Hardware Version</td><td>N/A</td><td>* |</td></tr><tr><td>Serial Number</td><td>N/A</td><td>* |</td></tr><tr><td>Manufacturing Date</td><td>N/A</td><td>* |----</td></tr><tr><td>Last Repair Date</td><td>N/A</td><td>* |&gt;&lt;: Select Screen</td></tr><tr><td>MAC ID</td><td>N/A</td><td>* |^v: Select Item</td></tr><tr><td></td><td></td><td>* |Enter: Select</td></tr><tr><td>SEMA Features:</td><td></td><td>* |+/-: Change Opt.</td></tr><tr><td colspan="2">Uptime &amp; Power Cycles Counter</td><td>+F1: General Help</td></tr><tr><td colspan="2">System Restart Event</td><td>+F2: Previous Values</td></tr><tr><td colspan="2">1024 Bytes User-Flash</td><td>+F3: Optimized Defaults</td></tr><tr><td colspan="2">Temperatures</td><td>v|F4: Save &amp; Exit</td></tr><tr><td colspan="2">Voltage Monitor</td><td>* |+/-: Change Opt.</td></tr><tr><td colspan="2">Boot Counter</td><td>* |F1: General Help</td></tr><tr><td colspan="2">12V Input-Voltage</td><td>* |F2: Previous Values</td></tr><tr><td colspan="2">4mR Rsense for Input-Voltage</td><td>* |F3: Optimized Defaults</td></tr><tr><td>TIVA BMC</td><td></td><td>v|F4: Save &amp; Exit</td></tr><tr><td></td><td></td><td>|ESC: Exit</td></tr></table>

# Temperatures and Fan Speed

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td>Main</td><td></td></tr><tr><td>Temperatures and Fan</td><td></td></tr><tr><td>Speed</td><td></td></tr><tr><td>CPU Temperature</td><td></td></tr><tr><td>Current 29.8C</td><td></td></tr><tr><td>Startup 21C</td><td></td></tr><tr><td>Min 21C</td><td></td></tr><tr><td>Max 47C</td><td></td></tr></table>

# Power Consumption Information

![Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.\nMain\nPower Consumption\nVCORE 1.045V\nVGFX 0.009V\nVMEM 1.187V\nVIN 4.989V\n5V 5.018V\n3.3V 3.331V\n3.3VSB 3.314V\nRTC 2.929V](.cpci-6630-50-15110-2010-11/b468a0809b2d8ae87dac8e7052259d993d1cf8bb9dc748d8e46e28eb1e2e5468.jpg)

# Runtime Statistics Information

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td>Main</td><td></td></tr><tr><td>Runtime Statistics</td><td></td></tr><tr><td>Total Runtime 11h 51m</td><td></td></tr><tr><td>Current Runtime 0h 19m 34s</td><td></td></tr><tr><td>Power Cycles 63</td><td></td></tr><tr><td>Boot Cycles 126</td><td></td></tr><tr><td>Boot Reason Software-reset</td><td></td></tr></table>

# Flags

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td>Main</td><td></td></tr><tr><td>Flags</td><td></td></tr><tr><td>BMC Flags</td><td>0x00</td></tr><tr><td>BIOS Select</td><td>Standard BIOS</td></tr><tr><td>ATX/AT-Mode</td><td>AT-Mode</td></tr><tr><td>Exception Code</td><td>0x00</td></tr></table>

# System Date/System Time

Use this option to change the system date and time. Highlight System Time or System Date using the &lt; Arrow &gt; keys. Enter new values using the keyboard. Press the &lt; Tab &gt; key or the &lt; Arrow &gt; keys to move between fields. The date must be entered in MM/DD/YY format. The time is entered in HH:MM:SS format.

Note: The time is in 24-hour format. For example, 5:30 A.M. appears as 05:30:00, and 5:30 P.M. as 17:30:00.

# 8.3 Advanced BIOS Setup

Select the Advanced tab from the setup screen to enter the Advanced BIOS Setup screen. You can select any of the items in the left frame of the screen to go to the sub menu for that item. You can display an Advanced BIOS Setup option by highlighting it using the &lt; Arrow &gt; keys. The Advanced BIOS Setup screen is shown below.

The sub menus are described on the following pages.

<table><tr><td colspan="6">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td>Main</td><td>Advanced</td><td>Chipset</td><td>Security</td><td>Boot</td><td>Save &amp; Exit</td></tr><tr><td>-</td><td></td><td></td><td></td><td></td><td></td></tr><tr><td colspan="5">&gt; AMT Configuration</td><td>Configure Management</td></tr><tr><td colspan="5">&gt; PCH-FW Configuration</td><td>Engine Technology</td></tr><tr><td colspan="5">&gt; IT8786 Super IO Configuration</td><td>Parameters</td></tr><tr><td colspan="5">&gt; Hardware Monitor</td><td></td></tr><tr><td colspan="5">&gt; Serial Port Console Redirection</td><td></td></tr><tr><td colspan="5">&gt; CFU Configuration</td><td></td></tr><tr><td colspan="5">&gt; SATA Configuration</td><td></td></tr><tr><td colspan="5">&gt; Network Stack Configuration</td><td></td></tr><tr><td colspan="5">&gt; CSM Configuration</td><td></td></tr><tr><td colspan="5">&gt; USB Configuration</td><td></td></tr><tr><td></td><td></td><td></td><td></td><td></td><td>&gt;&lt;: Select Screen</td></tr><tr><td></td><td></td><td></td><td></td><td></td><td>^v: Select Item</td></tr><tr><td></td><td></td><td></td><td></td><td></td><td>Enter: Select</td></tr><tr><td></td><td></td><td></td><td></td><td></td><td>+/-: Change Opt.</td></tr><tr><td></td><td></td><td></td><td></td><td></td><td>F1: General Help</td></tr><tr><td></td><td></td><td></td><td></td><td></td><td>F2: Previous Values</td></tr><tr><td></td><td></td><td></td><td></td><td></td><td>F3: Optimized Defaults</td></tr><tr><td></td><td></td><td></td><td></td><td></td><td>F4: Save &amp; Exit</td></tr><tr><td></td><td></td><td></td><td></td><td></td><td>ESC: Exit</td></tr><tr><td>-</td><td></td><td></td><td></td><td></td><td></td></tr><tr><td colspan="6">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# 8.3.1 AMT Configuration

You can use this screen to select options for the AMT settings. Use the up and down &lt; Arrow &gt; keys to select an item. Use the &lt; + &gt; and &lt; - &gt; keys to change the value of the selected option.

![Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.\nAdvanced\nIntel AMT (Enabled) Enable/Disable Intel\n(R) Active Management\nTechnology BIOS\nExtension.\nNote : iAMT H/W is\nalways enabled.\nThis option just\ncontrols the BIOS\n/--- Intel AMT ----\\nDisabled\nEnabled\n(: Select Screen\n^v: Select Item\nEnter: Select\n+/-: Change Opt.\nF1: General Help\nF2: Previous Values\nF3: Optimized Defaults\nF4: Save & Exit\nESC: Exit\nVersion 2.18.1259. Copyright (C) 2016 American Megatrends, Inc.](.cpci-6630-50-15110-2010-11/0411cc749c5815fa73de3fee1566de4c76c67e86c8d143f4d5f396d7178eaca6.jpg)

# Intel AMT

Intel AMT feature. Set this value to Enabled/Disabled.

# 8.3.2 PCH-FW Configuration

You can use this screen to view ME related information. For example, ME FW Version, ME Firmware Mode, ME Firmware Type, ME Firmware SKU..etc. An example of the ME screen is shown below.

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td>ME FW Version</td><td>11.0.18.1002</td><td></td></tr><tr><td>ME Firmware Mode</td><td>Normal Mode</td><td></td></tr><tr><td>ME Firmware Type</td><td>Full Sku Firmware</td><td></td></tr><tr><td>ME Firmware SKU</td><td>Corporate SKU</td><td></td></tr><tr><td>PTT Capability / State</td><td>1 / 0</td><td></td></tr><tr><td>NFC Support</td><td>Disabled</td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td>&gt;&lt;: Select Screen
^v: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save &amp; Exit
ESC: Exit</td></tr><tr><td colspan="3">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# 8.3.3 IT8786 Super IO Configuration

You can use this screen to select options for the IT8786 Super IO settings. Use the up and down &lt; Arrow &gt; keys to select an item. Use the &lt; + &gt; and &lt; - &gt; keys to change the value of the selected option.

<table><tr><td>Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td><td></td></tr><tr><td>IT8786 Super IO Configuration</td><td>PS2 Control Switch to front or rear IO</td></tr><tr><td>Super IO Chip IT8786</td><td></td></tr><tr><td>PS2 Control Switch [Front]</td><td></td></tr><tr><td>&gt; Serial Port 1 Configuration</td><td></td></tr><tr><td>&gt; Serial Port 2 Configuration</td><td></td></tr><tr><td>&gt; Serial Port 3 Configuration</td><td></td></tr><tr><td>&gt; Serial Port 4 Configuration</td><td></td></tr><tr><td></td><td>&lt;: Select Screen
^v: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save &amp; Exit
ESC: Exit</td></tr><tr><td colspan="2">Version 2.18.1259. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# PS2 Control Switch

PS/2 port control switch. Set this value to Front/Rear.

![Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.\nAdvanced\nIT8786 Super IO Configuration	PS2 Control Switch to\n		front or rear IO\nSuper IO Chip	IT8786\nPS2 Control Switch	(Front)\n) Serial Port 1 Configuration\n) Serial Port 2 Configuration\n) Serial Port 3 Configuration\n) Serial Port 4 Configur/---- PS2 Control Switch ---\\n			Rear\n			Front\n				: Select Screen\n				: Select Item](.cpci-6630-50-15110-2010-11/bb08a13e0cf592e0444fd046b4354b64ba84e6626e7f6ba229d4528e892f7ee7.jpg)

# Serial Port 1,2,3,4 Configuration

Set Parameters of Serial Port 1/ 2/ 3/ 4 (COM 1/ 2/ 3/ 4).

![Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.\nAdvanced\nSerial Port 1 Configuration\nEnable or Disable\nSerial Port (COM)\nSerial Port (Enabled)\nDevice Settings IO=3F8h; IRQ=4;\nChange Settings (Auto)\n/--- Serial Port ---\\n| Disabled |\n| Enabled |\n\----/\n(: Select Screen\n^v: Select Item](.cpci-6630-50-15110-2010-11/146296672cb3693fd698006eef6357acad951d97304c576273495de6843e09f0.jpg)

# Serial Port

Set this Serial Port to Enabled/Disabled.

# Change Settings

Select an optimal setting for Super IO Device. The options are “Auto, 3F8h, 2F8h…”etc.

![Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.\nAdvanced\nSerial Port 1 Configuration\nSelect an optimal\nsettings for Super IO\nSerial Port (Enabled)\nDevice Settings IO=3F8h; IRQ=4;\nChange Settings ---- Change Settings ----\nAuto\nIO=3F8h; IRQ=4;\nIO=3F8h; IRQ=3,4,5,6,7,9,10,11,12;\nIO=2F8h; IRQ=3,4,5,6,7,9,10,11,12;\nIO=3E8h; IRQ=3,4,5,6,7,9,10,11,12;\nIO=2E8h; IRQ=3,4,5,6,7,9,10,11,12;\nSelect Screen\nSelect Item\nSelect\nRange Opt.](.cpci-6630-50-15110-2010-11/b2362dadb5b38839e3f3a1602538ba4d60c76306d0fe8aa40db4c565c8bd0d63.jpg)

# 8.3.4 Hardware Monitor

This option displays the current status of all of the monitored hardware devices/components such as voltages and temperatures.

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td>Pc Health Status</td><td></td></tr><tr><td>CPU temperature 30.4C</td><td></td></tr><tr><td>VCORE : +1.044 V</td><td></td></tr><tr><td>VMEM : +1.200 V</td><td></td></tr><tr><td>VPCH : +0.996 V</td><td></td></tr><tr><td>VIN : +5.010 V</td><td></td></tr><tr><td>RTC : +2.880 V</td><td></td></tr><tr><td></td><td>&lt;&lt;: Select Screen
^v: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save &amp; Exit
ESC: Exit</td></tr><tr><td colspan="2">Version 2.18.1259. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# 8.3.5 Serial Port Console Redirection

You can use this screen to select options for the serial port console redirection settings. An example of the Serial Port Console Redirection screen is shown below.

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td></td><td>^ | Console Redirection</td></tr><tr><td>COM1</td><td>* | Enable or Disable.</td></tr><tr><td>Console Redirection [Enabled]</td><td>* |</td></tr><tr><td>&gt; Console Redirection Settings</td><td>* |</td></tr><tr><td></td><td>* |</td></tr><tr><td>COM2</td><td>* |</td></tr><tr><td>Console Redirection [Disabled]</td><td>* |</td></tr><tr><td>&gt; Console Redirection Settings</td><td>* |</td></tr><tr><td></td><td>* |</td></tr><tr><td>COM3</td><td>* |</td></tr><tr><td>Console Redirection [Disabled]</td><td>* | &gt;&lt;: Select Screen</td></tr><tr><td>&gt; Console Redirection Settings</td><td>* | ^v: Select Item * | Enter: Select</td></tr><tr><td></td><td></td></tr><tr><td>COM4</td><td>+ | +/- : Change Opt.</td></tr><tr><td>Console Redirection [Disabled]</td><td>+ | F1: General Help</td></tr><tr><td>&gt; Console Redirection Settings</td><td>+ | F2: Previous Values + | F3: Optimized Defaults</td></tr><tr><td></td><td></td></tr><tr><td>Legacy Console Redirection</td><td>v | F4: Save &amp; Exit | ESC: Exit</td></tr><tr><td></td><td></td></tr><tr><td colspan="2">Version 2.18.1259. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# Console Redirection

Set this value to Enabled/Disabled.

# Console Redirection Settings

The settings specify how the host computer and the remote computer will exchange data. Both computers should have the same or compatible settings. The screen is shown below.

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td>COM1</td><td></td><td>^ | Emulation: ANSI:</td></tr><tr><td colspan="2">Console Redirection Settings</td><td>* | Extended ASCII char</td></tr><tr><td></td><td></td><td>* | set. VT100: ASCII char</td></tr><tr><td>Terminal Type</td><td>[VT100+]</td><td>* | set. VT100+: Extends</td></tr><tr><td>Bits per second</td><td>[115200]</td><td>* | VT100 to support color,</td></tr><tr><td>Data Bits</td><td>[8]</td><td>* | function keys, etc.</td></tr><tr><td>Parity</td><td>[None]</td><td>* | VT-UTF8: Uses UTF8</td></tr><tr><td>Stop Bits</td><td>[1]</td><td>* | encoding to map Unicode</td></tr><tr><td>Flow Control</td><td>[None]</td><td>* |</td></tr><tr><td>VT-UTF8 Combo Key</td><td>[Enabled]</td><td>* |</td></tr><tr><td>Support</td><td></td><td>* | &gt;&lt; : Select Screen</td></tr><tr><td>Recorder Mode</td><td>[Disabled]</td><td>* | ^v: Select Item</td></tr><tr><td>Resolution 100x31</td><td>[Disabled]</td><td>* | Enter: Select</td></tr><tr><td>Legacy OS</td><td>[80x24]</td><td>* | +/- : Change Opt.</td></tr><tr><td>Redirection</td><td></td><td>* | F1: General Help</td></tr><tr><td>Resolution</td><td></td><td>* | F2: Previous Values</td></tr><tr><td>Putty KeyPad</td><td>[VT100]</td><td>+ | F3: Optimized Defaults v | F4: Save &amp; Exit ESC: Exit</td></tr></table>

# Terminal Type

VT100+ is the preferred terminal type for out-of-band management. Configuration options: VT100, VT100+, VT-UTF8, ANSI.

# Bits per second

Select the bits per second you want the serial port to use for console redirection. The options are 115200, 57600, 38400, 19200, 9600.

# Data Bits

Select the data bits you want the serial port to use for console redirection. Set this value to 7, 8.

# Parity

Set this option to select Parity for console redirection. The settings for this value are None, Even, Odd, Mark, Space.

# Stop Bits

Stop bits indicate the end of a serial data packet. (A start bit indicates the beginning). The standard setting is 1 stop bit. Communication with slow devices may require more than 1 stop bit. Set this value to 1 and 2.

# Flow Control

Set this option to select Flow Control for console redirection. The settings for this value are None, Hardware RTS/CTS, Software Xon/Xoff.

# VT-UTF8 Combo Key Support

Enables VT-UTF8 combination key support for ANSI/VT100 terminals.Set this value to Enabled/Disabled.

# Recorder Mode

When this mode is enabled, only text will be sent. This is to capture terminal data. Set this value to Enabled/Disabled.

# Resolution 100x31

Set this option to extended terminal resolution. Set this value to Enabled/Disabled.

# Legacy OS Redirection

On legacy OS, the number of rows and columns supported for redirection. Set this value to 80x24, 80x25.

# Putty Key Pad

Select FunctionKey and KeyPad on Putty. Set this value to VT100, LINUX, XTERMR6, SCO, ESCN, VT400.

# Legacy Console Redirection

Legacy Console Redirection Settings. Select a COM port to display redirection of Legacy OS and Legacy OPROM Messages.

![Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.\nAdvanced\nLegacy Serial (COM1) Select a COM port to\nRedirection Port display redirection of\nLegacy OS and Legacy\nOPROM Messages\n/---- Legacy Serial Redirection Port ---\\nCOM1\nCOM2\nCOM3\nCOM4\nct Screen\nct Item\nelect](.cpci-6630-50-15110-2010-11/3795fcd1ae16c51609007493250850c477ec67d495d17b795654fbce14bce41f.jpg)

# Serial Port for Out-of-Band Management / Windows Emergency Management Services (EMS)

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td>Out-of-Band Mgmt Port</td><td>[COM1]</td><td>Microsoft Windows</td></tr><tr><td>Terminal Type</td><td>[VT-UTF8]</td><td>Emergency Management</td></tr><tr><td>Bits per second</td><td>[115200]</td><td>Services (EMS) allows</td></tr><tr><td>Flow Control</td><td>[None]</td><td>for remote management</td></tr><tr><td>Data Bits</td><td>8</td><td>of a Windows Server OS</td></tr><tr><td>Parity</td><td>None</td><td>through a serial port.</td></tr><tr><td>Stop Bits</td><td>1</td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

# Out-of-Band Mgmt Port

Microsoft Windows Emergency Management Services (EMS) allows for remote management of a Windows Server OS through a serial port.

# Terminal Type

VT-UTF8 is the preferred terminal type for out-of-band management. The next best choice is VT100+ and then VT100. See above, in Console Redirection Settings page, for more Help with Terminal Type/Emulation.

# Bits per Second

Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds.

# Flow Control

Set this option to select Flow Control for console redirection. The settings for this value are None, Hardware RTS/CTS, Software Xon/Xoff.

# 8.3.6 CPU Configuration

You can use this screen to select options for the CPU Configuration Settings. The settings are described on the following pages. An example of the CPU Configuration screen is shown below.

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td colspan="2">CPU Configuration</td><td>^|Enabled for Windows XP*|and Linux (OS optimized</td></tr><tr><td colspan="2">Intel(R) Core(TM) i7-6820EQ CPU @ 2.80GHz</td><td>*|for Hyper-Threading</td></tr><tr><td>CPU Signature</td><td>506E3</td><td>*|Technology) and</td></tr><tr><td>Microcode Patch</td><td>A6</td><td>*|Disabled for other OS</td></tr><tr><td>Max CPU Speed</td><td>2800 MHz</td><td>*|(OS not optimized for</td></tr><tr><td>Min CPU Speed</td><td>800 MHz</td><td>*|Hyper-Threading</td></tr><tr><td>CPU Speed</td><td>2700 MHz</td><td>*|Technology). When</td></tr><tr><td>Processor Cores</td><td>4</td><td>+|</td></tr><tr><td>Hyper Threading</td><td>Supported</td><td>+|----</td></tr><tr><td>Technology</td><td></td><td>+|&gt;&lt;: Select Screen</td></tr><tr><td>Intel VT-x Technology</td><td>Supported</td><td>+|^v: Select Item</td></tr><tr><td>Intel SMX Technology</td><td>Supported</td><td>+|Enter: Select</td></tr><tr><td>64-bit</td><td>Supported</td><td>+|+/-: Change Opt.</td></tr><tr><td>EIST Technology</td><td>Supported</td><td>+|F1: General Help</td></tr><tr><td>CPU C3 state</td><td>Supported</td><td>+|F2: Previous Values</td></tr><tr><td>CPU C6 state</td><td>Supported</td><td>+|F3: Optimized Defaults</td></tr><tr><td>CPU C7 state</td><td>Supported</td><td>v|F4: Save &amp; Exit</td></tr><tr><td>CPU C8 state</td><td>Supported</td><td>^|Turbo Mode.</td></tr><tr><td>CPU C9 state</td><td>Supported</td><td>+|</td></tr><tr><td>CPU C10 state</td><td>Supported</td><td>+|</td></tr><tr><td>L1 Data Cache</td><td>32 kB x 4</td><td>^|Configurable TDP Mode</td></tr><tr><td>L1 Code Cache</td><td>32 kB x 4</td><td>+|Lock sets the Lock bits</td></tr><tr><td>L2 Cache</td><td>256 kB x 4</td><td>+|on</td></tr><tr><td>L3 Cache</td><td>8 MB</td><td>+|TURBO_ACTIVATION_RATIO</td></tr><tr><td>L4 Cache</td><td>Not Present</td><td>+|and CONFIG_TDP_CONTROL.</td></tr><tr><td>Hyper-threading</td><td>[Enabled]</td><td>+|Note:</td></tr><tr><td>Active Processor</td><td>[All]</td><td>+|When CTDP Lock is</td></tr><tr><td>Cores</td><td></td><td>+|enabled Custom</td></tr><tr><td>Intel Virtualization</td><td>[Enabled]</td><td>+|----</td></tr><tr><td>Technology</td><td></td><td>*|&gt;&lt;: Select Screen</td></tr><tr><td>Intel(R)</td><td>[Enabled]</td><td>*|^v: Select Item</td></tr><tr><td>SpeedStep(tm)</td><td></td><td>*|Enter: Select</td></tr><tr><td>Turbo Mode</td><td>[Disabled]</td><td>*|+/-: Change Opt.</td></tr><tr><td>Configurable TDP</td><td>[Nominal]</td><td>*|F1: General Help</td></tr><tr><td>Boot Mode</td><td></td><td>*|F2: Previous Values</td></tr><tr><td>Configurable TDP Lock</td><td>[Disabled]</td><td>*|F3: Optimized Defaults</td></tr><tr><td></td><td></td><td>v|F4: Save &amp; Exit</td></tr><tr><td></td><td></td><td>|ESC: Exit</td></tr></table>

# Hyper-Threading

Enabled: for Windows and Linux (OS optimized for Hyper-Threading Technology).

Disabled: for other OS (OS not optimized for Hyper-Threading Technology).

# Active Processor Cores

Number of cores to enable in each processor package.

# Intel Virtualization Technology

When Enabled, a VMM can utilize the additional hardware capability provided by Vanderpool Technology. Set this value to Enabled/Disabled.

# Intel(R) SpeedStep(tm)

Allows more than two frequency ranges to be supported.

# Turbo Mode

Set this value to Enabled/Disabled.

# Configurable TDP Boot Mode

Configurable TDP Mode as Nominal/Up/Down/Deactivate TDP selection. Deactivate option will set MSR to Nominal and MMIO to Zero.

# Configurable TDP Lock

Configurable TDP Mode Lock sets the Lock bits on TURBO\_ACTIVATION\_RATIO and CONFIG\_TDP\_CONTROL

Note: When CTDP Lock is enabled Custom ConfigTDP Count will be forced to 1 and Custom ConfigTDP Boot Index will be forced to 0.

# 8.3.7 SATA Configuration

You can use this screen to select options for the SATA Configuration Settings. An example of the SATA Configuration screen is shown below.

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td>SATA Controller(s)</td><td>[Enabled]</td><td>^ | Enable or disable SATA</td></tr><tr><td>SATA Mode Selection</td><td>[AHCI]</td><td>* | Device.</td></tr><tr><td colspan="2">&gt; Software Feature Mask Configuration</td><td>* |</td></tr><tr><td>SATA Controller Speed</td><td>[Default]</td><td>* |</td></tr><tr><td></td><td></td><td>* |</td></tr><tr><td>Serial ATA Port 0</td><td>Empty</td><td>* |</td></tr><tr><td>Software Preserve</td><td>Unknown</td><td>* |</td></tr><tr><td>Port 0</td><td>[Enabled]</td><td>* |</td></tr><tr><td>Hot Plug</td><td>[Disabled]</td><td>* |</td></tr><tr><td>Serial ATA Port 1</td><td>Empty</td><td>* |</td></tr><tr><td>Software Preserve</td><td>Unknown</td><td>* | &gt;&lt;: Select Screen</td></tr><tr><td>Port 1</td><td>[Enabled]</td><td>* | ^v: Select Item</td></tr><tr><td>Hot Plug</td><td>[Disabled]</td><td>* | Enter: Select</td></tr><tr><td>Serial ATA Port 2</td><td>Empty</td><td>* | +/-: Change Opt.</td></tr><tr><td>Software Preserve</td><td>Unknown</td><td>* | F1: General Help</td></tr><tr><td>Port 2</td><td>[Enabled]</td><td>+ | F2: Previous Values</td></tr><tr><td>Hot Plug</td><td>[Disabled]</td><td>+ | F3: Optimized Defaults</td></tr><tr><td>Serial ATA Port 3</td><td>Empty</td><td>v | F4: Save &amp; Exit</td></tr><tr><td></td><td></td><td>| ESC: Exit</td></tr></table>

# SATA Controller(s)

Enable or disable SATA device.

# SATA Mode Selection

The SATA can be configured as a legacy IDE, RAID and AHCI mode.

# SATA Port 0-4

Display SATA device name string. Set this value to Enabled/Disabled.

# Hot Plug

Appears when SATA mode is AHCI. SATA port Hot Plug support. Set this value to Enabled/Disabled.

# Software Feature Mask Configuration

RAID OROM/RST driver will refer to the SWFM configuration to enable or disable the storage features.

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td>RAID0</td><td>[Enabled]</td><td>Enable or disable RAID0</td></tr><tr><td>RAID1</td><td>[Enabled]</td><td>feature.</td></tr><tr><td>RAID10</td><td>[Enabled]</td><td></td></tr><tr><td>RAID5</td><td>[Enabled]</td><td></td></tr><tr><td>Intel Rapid Recovery</td><td>[Enabled]</td><td></td></tr><tr><td>Technology</td><td></td><td></td></tr><tr><td>OROM UI and BANNER</td><td>[Enabled]</td><td></td></tr><tr><td>HDD Unlock</td><td>[Enabled]</td><td></td></tr><tr><td>LED Locate</td><td>[Enabled]</td><td></td></tr><tr><td>IRRT Only on eSATA</td><td>[Enabled]</td><td></td></tr><tr><td>Smart Response</td><td>[Enabled]</td><td>&lt;&lt;: Select Screen</td></tr><tr><td>Technology</td><td></td><td>^v: Select Item</td></tr><tr><td>OROM UI Normal Delay</td><td>[2 Seconds]</td><td>Enter: Select</td></tr><tr><td>RST Force Form</td><td>[Disabled]</td><td>+/-: Change Opt.</td></tr><tr><td></td><td></td><td>F1: General Help</td></tr><tr><td></td><td></td><td>F2: Previous Values</td></tr><tr><td></td><td></td><td>F3: Optimized Defaults</td></tr><tr><td></td><td></td><td>F4: Save &amp; Exit</td></tr><tr><td></td><td></td><td>ESC: Exit</td></tr></table>

# RAID0/1/10/5

Enable or disable RAID0/1/10/5 feature.

# Intel Rapid Recovery Technology

Enable or disable Intel Rapid Recovery Technology.

# OROM UI and Banner

If enabled, the OROM UI is shown. Otherwise, no OROM banner or information will be displayed if all disks and RAID volumes are Normal.

# HDD Unlock

If enabled, the HDD password unlock in the OS is enabled.

# LED Locate

If enabled, the LED/SGPIO hardware is attached and ping to locate feature is enabled on the OS.

# IRRT Only on eSATA

If enabled, then only IRRT volumes can span internal and eSATA drives. If disabled, then any RAID volume can span internal and eSATA drives.

# Smart Response Technology

Enable or disable Smart Response Technology.

# OROM UI Delay

If enabled, indicates the delay of the OROM UI Splash Screen under normal status.

# RST Force Form

Enable/Disable Form for Intel Rapid Storage Technology.

# 8.3.8 Network Stack Configuration

![Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.\nAdvanced\nNetwork Stack	(Enabled)	Enable/Disable UEFI\nIpv4 PXE Support	(Enabled)	Network Stack\nIpv6 PXE Support	(Enabled)\nPXE boot wait time	0\nMedia detect count	1\n((: Select Screen\n^v: Select Item\nEnter: Select\n+/-: Change Opt.\nF1: General Help\nF2: Previous Values\nF3: Optimized Defaults\nF4: Save & Exit\nESC: Exit\nVersion 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.](.cpci-6630-50-15110-2010-11/2d62f691ffeb7ff81ab52c7cece88379d9b732a86f82b43dcd386b0aa6fd4c45.jpg)

# Network Stack

Enable/Disable UEFI Network Stack.

# IPv4 PXE Support

Enable IPv4 PXE Boot Support. If disabled, the IPv4 PXE boot option will not be created.

# IPv6 PXE Support

Enable IPv6 PXE Boot Support. If disabled, the IPv6 PXE boot option will not be created.

# PXE Boot Wait Time

Wait time to press ESC key to abort PXE boot.

# Media detect count

Number of times the presence of media will be checked.

# 8.3.9 CSM Configuration

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td colspan="2">Compatibility Support Module Configuration</td><td rowspan="6">Enable/Disable CSM Support.</td></tr><tr><td>CSM Support</td><td>[Enabled]</td></tr><tr><td>CSM16 Module Version</td><td>07.79</td></tr><tr><td>GateA20 Active</td><td>[Upon Request]</td></tr><tr><td>Option ROM Messages</td><td>[Keep Current]</td></tr><tr><td>INT19 Trap Response</td><td>[Immediate]</td></tr><tr><td>Boot option filter</td><td>[UEFI and Legacy]</td><td rowspan="2">&gt;&lt;: Select Screen ^v: Select Item Enter: Select +/-: Change Opt.</td></tr><tr><td>Option ROM execution</td><td></td></tr><tr><td>Network</td><td>[Do not launch]</td><td>F1: General Help</td></tr><tr><td>Storage</td><td>[Legacy]</td><td>F2: Previous Values</td></tr><tr><td>Video</td><td>[Legacy]</td><td>F3: Optimized Defaults</td></tr><tr><td>Other PCI devices</td><td>[UEFI]</td><td>F4: Save &amp; Exit ESC: Exit</td></tr><tr><td colspan="3">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# CSM Support

Enable/Disable CSM Support.

# GateA20 Active

Upon Request: GA20 can be disabled using BIOS services. Always: do not allow disabling of GA20; this option is useful when any RT code is executed above 1MB.

# Option ROM Messages

Set the display mode for Option ROM.

# INT19 Trap Response

BIOS reaction on INT19 trapping by Option ROM: IMMEDIATE - execute the trap right away; POSTPONED - execute the trap during legacy boot.

# Boot Option Filter

This option controls Legacy/UEFI ROM priority. Set this value to UEFI and Legacy, Legacy only, UEFI only.

# Network

Controls the execution of UEFI and Legacy PXE OpROM. Set this value to Do not launch, Legacy, UEFI.

# Storage

Controls the execution of UEFI and Legacy PXE OpROM. Set this value to Do not launch, Legacy, UEFI.

# Video

Controls the execution of UEFI and Legacy PXE OpROM. Set this value to Do not launch, Legacy, UEFI.

# Other PCI Devices

Determines OpROM execution policy for devices other than Network, Storage, or Video. Set this value to Disable, Legacy, UEFI.

# 8.3.10 USB Configuration

You can use this screen to select options for the USB Configuration. Use the up and down &lt; Arrow &gt; keys to select an item. The screen is shown below.

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Advanced</td></tr><tr><td>USB Configuration</td><td>^ |Enables Legacy USB * |support. AUTO option</td></tr><tr><td>USB Module Version 17</td><td>* |disables legacy support * |if no USB devices are</td></tr><tr><td>USB Controllers:</td><td>* |connected. DISABLE</td></tr><tr><td>4 OHCIs, 4 EHCIs, 1 XHCI</td><td>* |option will keep USB</td></tr><tr><td>USB Devices:</td><td>* |devices available only</td></tr><tr><td>2 Drives, 1 Keyboard, 1 Hub</td><td>* |for EFI applications. * |</td></tr><tr><td>Legacy USB Support [Enabled]</td><td>* |----</td></tr><tr><td>XHCI Hand-off [Enabled]</td><td>* |&lt;: Select Screen</td></tr><tr><td>EHCI Hand-off [Disabled]</td><td>* |^v: Select Item</td></tr><tr><td>USB Mass Storage [Enabled]</td><td>* |Enter: Select</td></tr><tr><td>Driver Support</td><td>* |+/-: Change Opt. * |F1: General Help</td></tr><tr><td>Mass Storage Devices:</td><td>* |F2: Previous Values</td></tr><tr><td>USB Flash MemoryPMAP [Auto]</td><td>+F3: Optimized Defaults</td></tr><tr><td>Generic Flash HS-CF [Auto]</td><td>v |F4: Save &amp; Exit ESC: Exit</td></tr><tr><td colspan="2">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# Legacy USB Support

Enables legacy USB support. Auto option disables legacy support if no USB devices are connected. Disable option will keep USB devices available only for EFI applications. Set this value to Enabled/Disabled/Auto.

# XHCI Hand-off

This is a workaround for OSes without XHCI hand-off support. The XHCI ownership change should be claimed by XHCI driver.

# EHCI Hand-off

This is a workaround for OSes without EHCI hand-off support. The EHCI ownership change should be claimed by EHCI driver.

# USB Mass Storage Driver Support

Enable/Disable USB Mass Storage Driver Support.

# Mass Storage Devices:

Mass storage device emulation type. 'AUTO' enumerates devices according to their media format. Optical drives are emulated as 'CDROM', drives with no media will be emulated according to a drive type.

# 8.4 Chipset Setup

Select the Chipset tab from the setup screen to enter the Chipset BIOS Setup screen. You can select any of Chipset BIOS Setup options by highlighting it using the &lt; Arrow &gt; keys. The Chipset BIOS Setup screen is shown below.

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td colspan="2">Main Advanced Chipset Security Boot Save &amp; Exit</td></tr><tr><td>System Agent (SA) Configuration
PCH-IO Configuration</td><td>PCH Parameters</td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td>&lt;&lt;: Select Screen
^v: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save &amp; Exit
ESC: Exit</td></tr><tr><td colspan="2">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# 8.4.1 System Agent (SA) Configuration

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Chipset</td></tr><tr><td>System Agent Bridge Name</td><td>Skylake</td><td>VT-d capability</td></tr><tr><td>SA PCIe Code Version</td><td>2.1.0.0</td><td></td></tr><tr><td>VT-d</td><td>Supported</td><td></td></tr><tr><td>VT-d</td><td>[Enabled]</td><td></td></tr><tr><td>&gt; Graphics Configuration</td><td></td><td></td></tr><tr><td>&gt; PEG Port Configuration</td><td></td><td></td></tr><tr><td>&gt; Memory Configuration</td><td></td><td></td></tr><tr><td></td><td></td><td>&gt;&lt;: Select Screen
^v: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save &amp; Exit
ESC: Exit</td></tr><tr><td colspan="3">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# VT-d

The Intel Virtualization Technology for Directed I/O. Set this value to Enabled/Disabled.

# Graphics Configuration

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Chipset</td></tr><tr><td>Graphics Configuration</td><td>VGA Switch(PTN3355D) to front or rear channel</td></tr><tr><td>IGFX VBIOS Version 1049</td><td></td></tr><tr><td>VGA Channel Switch [Front]</td><td></td></tr><tr><td>Primary Display [Auto]</td><td></td></tr><tr><td>Internal Graphics [Auto]</td><td></td></tr><tr><td>Primary IGFX Boot [VBIOS Default]</td><td></td></tr><tr><td>Display</td><td></td></tr><tr><td></td><td>&gt;&lt;: Select Screen
^v: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save &amp; Exit
ESC: Exit</td></tr><tr><td colspan="2">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# VGA Channel Switch

Sets the VGA signal output to Front or Rear IO.

# Primary Display

Select which graphics device should be the primary display. Set this value to Auto, IGFX, PCI.

# Internal Graphics

Keep IGD enabled based on the setup options. Set this value to Auto, Enabled, Disabled.

# Primary IGFX Boot Display

Select Boot Video Device during POST

Z VBIOS Default: auto-detect video device by vBIOS.
Z Front DVI-D, Rear DVI-D, Front DVI-I, VGA: force to boot with selected video device.

![/--- Primary IGFX Boot Display ---\\nVBIOS Default\nFront DVI-D\nRear DVI-D\nFront DVI-I\nVGA](.cpci-6630-50-15110-2010-11/7390f946befc6fd3f6f7ff554d3424bf6e160730a13f0d55d9e7400f692a20c0.jpg)

# Memory Configuration

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Chipset</td></tr><tr><td colspan="2">Memory Configuration</td><td></td></tr><tr><td>Memory RC Version</td><td>2.1.0.0</td><td></td></tr><tr><td>Memory Frequency</td><td>2133 MHz</td><td></td></tr><tr><td>Total Memory</td><td>4096 MB</td><td></td></tr><tr><td>VDD</td><td>1200 mVolts</td><td></td></tr><tr><td>DIMM#A</td><td>4096 MB</td><td></td></tr><tr><td>DIMM#B</td><td>Not Present</td><td></td></tr><tr><td>Memory Timings</td><td>15-15-15-36</td><td></td></tr><tr><td colspan="2">(tCL-tRCD-tRP-tRAS)</td><td></td></tr><tr><td>XMP Profile 1</td><td>Not Supported</td><td>&lt;&lt;: Select Screen</td></tr><tr><td>XMP Profile 2</td><td>Not Supported</td><td>^v: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save &amp; Exit ESC: Exit</td></tr><tr><td colspan="3">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# PEG Port Configuration

Configure the PCI Express port from the CPU.

![Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.\nChipset\nPEG Port Configuration\nPEG 0:1:1\nEnable Root Port\nMax Link Speed\nx4 Gen1\n(Auto)\n(Auto)\n/---- Max Link Speed ---\\n| Auto |\n| | Gen1\n----\n(: Select Screen\nv: Select Item\nEnter: Select\n+/-: Change Opt.\nF1: General Help\nF2: Previous Values\nF3: Optimized Defaults\nF4: Save & Exit\nESC: Exit\nVersion 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.](.cpci-6630-50-15110-2010-11/5dbfd9a40133dd4e20fe89318446fbeccc0abd89d84ab0e27a146f0f48b82d11.jpg)

# Enable Root Port

Enable or disable the PEG port.

# Max Link Speed

Configure PEG Bus:0 Dev:1 Fun:1. Max. Speed options: Auto or Gen1.

# 8.4.2 PCH-IO Configuration

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Chipset</td></tr><tr><td>Intel PCH RC Version</td><td>2.1.0.0</td><td>PCI Express</td></tr><tr><td>Intel PCH SKU Name</td><td>PCH-H Mobile HM170</td><td>Configuration settings</td></tr><tr><td>Intel PCH Rev ID</td><td>31/D1</td><td></td></tr><tr><td colspan="2">&gt; PCI Express Configuration</td><td></td></tr><tr><td colspan="2">&gt; HD Audio Configuration</td><td></td></tr><tr><td>PCH LAN Controller</td><td>[Enabled]</td><td></td></tr><tr><td>LAN #2 (Intel I210IT)</td><td>[Front]</td><td></td></tr><tr><td>LAN #3 (Intel I210IT)</td><td>[Front]</td><td></td></tr><tr><td>High Precision Timer</td><td>[Enabled]</td><td></td></tr><tr><td></td><td></td><td>&gt;&lt;: Select Screen
^v: Select Item
Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save &amp; Exit
ESC: Exit</td></tr><tr><td colspan="3">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# PCI Express Configuration

Configure the PCI Express ports from the PCH.

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Chipset</td></tr><tr><td>PCI Express Configuration</td><td>PCI Express Root Port 5 Settings.</td></tr><tr><td>PCIE Port 4 is assigned to LAN</td><td></td></tr><tr><td>&gt; PCI Express Root Port 5</td><td></td></tr><tr><td>&gt; PCI Express Root Port 12</td><td></td></tr><tr><td>&gt; PCI Express Root Port 13</td><td></td></tr><tr><td>&gt; PCI Express Root Port 14</td><td></td></tr><tr><td></td><td>&gt;&lt;: Select Screen ^v: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save &amp; Exit ESC: Exit</td></tr><tr><td colspan="2">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# PCI Express Root Port 5, 12-14

Configure the PCI Express Root Ports 5, 12-14.

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc. Chipset</td></tr><tr><td>PCI Express Root</td><td>[Enabled]</td><td>Control the PCI Express</td></tr><tr><td>Port 5</td><td></td><td>Root Port.</td></tr><tr><td>PCIe Speed</td><td>[Auto]</td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr><tr><td></td><td></td><td></td></tr></table>

# PCI Express Root Port 5, 12-14

Enable/disable the PCI Express port.

# PCI Speed

Select PCI Express port speed: Gen1, Gen2, Gen3

# HD Audio Configuration

![Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.\nChipset\nHD Audio Configuration\nHD Audio (Auto)\n/---- HD Audio ---\\n| Disabled |\n| Enabled |\n| Auto\n----/\n| Control Detection of\nthe HD-Audio device.\nDisabled = HDA will be\nunconditionally disabled\nEnabled = HDA will be\nunconditionally enabled\nAuto = HDA will be\nenabled if present,\n|\n)(: Select Screen\n^v: Select Item\nEnter: Select\n+/-: Change Opt.\nF1: General Help\nF2: Previous Values\nF3: Optimized Defaults\nF4: Save & Exit\nESC: Exit\nVersion 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.](.cpci-6630-50-15110-2010-11/4d8d005daeb3bb31fa3b914196a0b67ebcde310148339861a686fd4637601fd6.jpg)

# HD Audio

Enable/Disable the HD Audio device.

Z Disabled: HDA will be unconditionally disabled
Z Enabled: HDA will be unconditionally Enabled
Z Auto: HDA will be enabled if present, disabled otherwise.

# PCH LAN Controller

Enable/Disable the PCH LAN Controller.

# LAN #2 / #3 (Intel I210IT)

Direct LAN 2/3 to either Front or Rear IO.

# High Precision Timer

Enable/Disable the High Precision Event Timer.

# 8.5 Boot Settings

Select the Boot tab from the setup screen to enter the Boot BIOS Setup screen. You can select any of the items in the left frame of the screen, such as Boot Device Priority, to go to the sub menu for that item. You can display a Boot BIOS Setup option by highlighting it using the &lt; Arrow &gt; keys. The Boot Settings screen is shown below:

<table><tr><td colspan="3">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td colspan="3">Main Advanced Chipset Security Boot Save &amp; Exit</td></tr><tr><td>Boot Configuration</td><td></td><td rowspan="4">Number of seconds to wait for setup activation key. 65535(0xFFFF) means indefinite waiting.</td></tr><tr><td>Setup Prompt Timeout 1</td><td></td></tr><tr><td>Bootup NumLock State [On]</td><td></td></tr><tr><td>Quiet Boot [Enabled]</td><td></td></tr><tr><td>Boot Option Priorities</td><td></td><td></td></tr><tr><td>Boot Option #1 [ USB Flash MemoryPMAP]</td><td></td><td></td></tr><tr><td>Boot Option #2 [UEFI: USB Flash MemoryPMAP, Partition 1]</td><td></td><td></td></tr><tr><td>Boot Option #3 [UEFI: Built-in EFI Shell]</td><td></td><td rowspan="5">&lt;&lt;: Select Screen ^v: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F3: Optimized Defaults F4: Save &amp; Exit ESC: Exit</td></tr><tr><td>Fast Boot [Disabled]</td><td></td></tr><tr><td>New Boot Option [Default]</td><td></td></tr><tr><td>Policy</td><td></td></tr><tr><td>Hard Drive BBS Priorities</td><td></td></tr><tr><td colspan="3">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# Quiet Boot

X Disabled - Set this value to allow the computer system to display the POST messages.
Enabled - Set this value to allow the computer system to display the OEM logo.

# Fast Boot

Enables or disables boot with initialization of a minimal set of devices required to launch active boot option. Has no effect for BBS boot options. Set this value to Enabled/Disabled.

# Set Boot Priority

Set Boot Option #1 \~2 boot priority.

# Hard Disk Drive BBS Priorities

Specifies the Boot Device Priority sequence from available Hard Disk Drives.

# 8.6 Security Setup

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.Main Advanced Chipset Security Boot Save &amp; Exit</td></tr><tr><td>Password Description</td><td>Set AdministratorPassword</td></tr><tr><td>If ONLY the Administrator&#x27;s password is set,then this only limits access to Setup and isonly asked for when entering Setup.</td><td></td></tr><tr><td>If ONLY the User&#x27;s password is set, then thisis a power on password and must be entered toboot or enter Setup. In Setup the User willhave Administrator rights.</td><td></td></tr><tr><td>The password length must bein the following range:</td><td>&lt;&lt;: Select Screen</td></tr><tr><td>Minimum length 3</td><td>^v: Select Item</td></tr><tr><td>Maximum length 20</td><td>Enter: Select+/-: Change Opt.</td></tr><tr><td>Administrator Password</td><td>F1: General Help</td></tr><tr><td>User Password</td><td>F2: Previous ValuesF3: Optimized DefaultsF4: Save &amp; ExitESC: Exit</td></tr><tr><td colspan="2">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# Administrator, User Password

If only the administrator's password is set, then this only limits access to setup and is only asked for when entering setup.

If only the user's password is set, then this is a power on password and must be entered to boot or enter setup. In setup the user will have administrator rights.

# 8.7 Save & Exit Menu

Select the Save & Exit tab from the setup screen to enter the Save & Exit BIOS Setup screen. You can display an Exit BIOS Setup option by highlighting it using the &lt; Arrow &gt; keys. The Save & Exit BIOS Setup screen is shown below.

<table><tr><td colspan="2">Aptio Setup Utility - Copyright (C) 2016 American Megatrends, Inc.</td></tr><tr><td colspan="2">Main Advanced Chipset Security Boot Save &amp; Exit</td></tr><tr><td>Save Options</td><td>^ |Exit system setup after</td></tr><tr><td>Save Changes and Exit</td><td>* |saving the changes.</td></tr><tr><td>Discard Changes and Exit</td><td>* |</td></tr><tr><td></td><td>* |</td></tr><tr><td>Save Changes and Reset</td><td>* |</td></tr><tr><td>Discard Changes and Reset</td><td>* |</td></tr><tr><td></td><td>* |</td></tr><tr><td>Save Changes</td><td>* |</td></tr><tr><td>Discard Changes</td><td>* |</td></tr><tr><td></td><td>* |</td></tr><tr><td>Default Options</td><td>* |&gt;&lt;: Select Screen</td></tr><tr><td>Restore Defaults</td><td>* |^v: Select Item</td></tr><tr><td>Save as User Defaults</td><td>* |Enter: Select</td></tr><tr><td>Restore User Defaults</td><td>* |+/-: Change Opt.</td></tr><tr><td></td><td>* |F1: General Help</td></tr><tr><td>Boot Override</td><td>+ |F2: Previous Values</td></tr><tr><td>USB Flash MemoryPMAP</td><td>+ |F3: Optimized Defaults</td></tr><tr><td>Generic Flash HS-CF</td><td>v |F4: Save &amp; Exit</td></tr><tr><td></td><td>|ESC: Exit</td></tr><tr><td colspan="2">Version 2.18.1263. Copyright (C) 2016 American Megatrends, Inc.</td></tr></table>

# Save Changes and Exit

Exit the system after saving the changes.

# Discard Changes and Exit

Exit system setup without saving any changes.

# Save Changes and Reset

Reset the system after saving the changes.

# Discard Changes and Reset

Reset system setup without saving any changes.

# Save Changes

Save changes done so far to any of the setup options.

# Discard Changes

Discard changes done so far to any of the setup options.

# Restore Defaults

Restore/Load Defaults values for all the setup options.

# Save as User Defaults

Save the changes done so far as user defaults..

# Restore User Defaults

Save changes done so far to any of the setup options.

# 9 Checkpoints & Beep Codes

The eight User LEDs on the front panel display port 80h POST codes in hexadecimal during boot up. Users can use the POST codes to identify issues during the BIOS POST process (see See “User LEDs” on page 24.).

# 9.1 Checkpoint Ranges

<table><tr><td>Status Code Range</td><td>Description</td></tr><tr><td>0x01 – 0x0B</td><td>SEC execution</td></tr><tr><td>0x0C – 0x0F</td><td>SEC errors</td></tr><tr><td>0x10 – 0x2F</td><td>PEI execution up to and including memory detection</td></tr><tr><td>0x30 – 0x4F</td><td>PEI execution after memory detection</td></tr><tr><td>0x50 – 0x5F</td><td>PEI errors</td></tr><tr><td>0x60 – 0x8F</td><td>DXE execution up to BDS</td></tr><tr><td>0x90 – 0xCF</td><td>BDS execution</td></tr><tr><td>0xD0 – 0xDF</td><td>DXE errors</td></tr><tr><td>0xE0 – 0xE8</td><td>S3 Resume (PEI)</td></tr><tr><td>0xE9 – 0xEF</td><td>S3 Resume errors (PEI)</td></tr><tr><td>0xF0 – 0xF8</td><td>Recovery (PEI)</td></tr><tr><td>0xF9 – 0xFF</td><td>Recovery errors (PEI)</td></tr></table>

# 9.2 Standard Checkpoints

SEC Phase

<table><tr><td>Status Code</td><td>Description</td></tr><tr><td>0x00</td><td>Not used</td></tr><tr><td colspan="2">Progress Codes</td></tr><tr><td>0x01</td><td>Power on. Reset type detection (soft/hard).</td></tr><tr><td>0x02</td><td>AP initialization before microcode loading</td></tr><tr><td>0x03</td><td>North Bridge initialization before microcode loading</td></tr><tr><td>0x04</td><td>South Bridge initialization before microcode loading</td></tr><tr><td>0x05</td><td>OEM initialization before microcode loading</td></tr><tr><td>0x06</td><td>Microcode loading</td></tr><tr><td>0x07</td><td>AP initialization after microcode loading</td></tr><tr><td>0x08</td><td>North Bridge initialization after microcode loading</td></tr><tr><td>0x09</td><td>South Bridge initialization after microcode loading</td></tr><tr><td>0x0A</td><td>OEM initialization after microcode loading</td></tr><tr><td>0x0B</td><td>Cache initialization</td></tr><tr><td colspan="2">SEC Error Codes</td></tr><tr><td>0x0C – 0x0D</td><td>Reserved for future AMI SEC error codes</td></tr><tr><td>0x0E</td><td>Microcode not found</td></tr><tr><td>0x0F</td><td>Microcode not loaded</td></tr></table>

# SEC Beep Codes

None

PEI Phase

<table><tr><td>Status Code</td><td>Description</td></tr><tr><td colspan="2">Progress Codes</td></tr><tr><td>0x10</td><td>PEI Core is started</td></tr><tr><td>0x11</td><td>Pre-memory CPU initialization is started</td></tr><tr><td>0x12</td><td>Pre-memory CPU initialization (CPU module specific)</td></tr><tr><td>0x13</td><td>Pre-memory CPU initialization (CPU module specific)</td></tr><tr><td>0x14</td><td>Pre-memory CPU initialization (CPU module specific)</td></tr><tr><td>0x15</td><td>Pre-memory North Bridge initialization is started</td></tr><tr><td>0x16</td><td>Pre-Memory North Bridge initialization (North Bridge module specific)</td></tr><tr><td>0x17</td><td>Pre-Memory North Bridge initialization (North Bridge module specific)</td></tr><tr><td>0x18</td><td>Pre-Memory North Bridge initialization (North Bridge module specific)</td></tr><tr><td>0x19</td><td>Pre-memory South Bridge initialization is started</td></tr><tr><td>0x1A</td><td>Pre-memory South Bridge initialization (South Bridge module specific)</td></tr><tr><td>0x1B</td><td>Pre-memory South Bridge initialization (South Bridge module specific)</td></tr><tr><td>0x1C</td><td>Pre-memory South Bridge initialization (South Bridge module specific)</td></tr><tr><td>0x1D – 0x2A</td><td>OEM pre-memory initialization codes</td></tr><tr><td>0x2B</td><td>Memory initialization. Serial Presence Detect (SPD) data reading</td></tr><tr><td>0x2C</td><td>Memory initialization. Memory presence detection</td></tr><tr><td>0x2D</td><td>Memory initialization. Programming memory timing information</td></tr><tr><td>0x2E</td><td>Memory initialization. Configuring memory</td></tr><tr><td>0x2F</td><td>Memory initialization (other).</td></tr><tr><td>0x30</td><td>Reserved for ASL (see ASL Status Codes section below)</td></tr><tr><td>0x31</td><td>Memory Installed</td></tr><tr><td>0x32</td><td>CPU post-memory initialization is started</td></tr><tr><td>0x33</td><td>CPU post-memory initialization. Cache initialization</td></tr><tr><td>0x34</td><td>CPU post-memory initialization. Application Processor(s) (AP) initialization</td></tr><tr><td>0x35</td><td>CPU post-memory initialization. Boot Strap Processor (BSP) selection</td></tr><tr><td>0x36</td><td>CPU post-memory initialization. System Management Mode (SMM) initialization</td></tr><tr><td>0x37</td><td>Post-Memory North Bridge initialization is started</td></tr><tr><td>0x38</td><td>Post-Memory North Bridge initialization (North Bridge module specific)</td></tr><tr><td>0x39</td><td>Post-Memory North Bridge initialization (North Bridge module specific)</td></tr><tr><td>0x3A</td><td>Post-Memory North Bridge initialization (North Bridge module specific)</td></tr><tr><td>0x3B</td><td>Post-Memory South Bridge initialization is started</td></tr><tr><td>0x3C</td><td>Post-Memory South Bridge initialization (South Bridge module specific)</td></tr><tr><td>0x3D</td><td>Post-Memory South Bridge initialization (South Bridge module specific)</td></tr><tr><td>0x3E</td><td>Post-Memory South Bridge initialization (South Bridge module specific)</td></tr><tr><td>0x3F-0x4E</td><td>OEM post memory initialization codes</td></tr><tr><td>0x4F</td><td>DXE IPL is started</td></tr><tr><td colspan="2">PEI Error Codes</td></tr><tr><td>0x50</td><td>Memory initialization error. Invalid memory type or incompatible memory speed</td></tr><tr><td>0x51</td><td>Memory initialization error. SPD reading has failed</td></tr><tr><td>0x52</td><td>Memory initialization error. Invalid memory size or memory modules do not match.</td></tr><tr><td>0x53</td><td>Memory initialization error. No usable memory detected</td></tr><tr><td>0x54</td><td>Unspecified memory initialization error.</td></tr><tr><td>0x55</td><td>Memory not installed</td></tr><tr><td>0x56</td><td>Invalid CPU type or Speed</td></tr><tr><td>0x57</td><td>CPU mismatch</td></tr><tr><td>0x58</td><td>CPU self test failed or possible CPU cache error</td></tr><tr><td>0x59</td><td>CPU micro-code is not found or micro-code update is failed</td></tr><tr><td>0x5A</td><td>Internal CPU error</td></tr><tr><td>0x5B</td><td>reset PPI is not available</td></tr><tr><td>0x5C-0x5F</td><td>Reserved for future AMI error codes</td></tr><tr><td colspan="2">S3 Resume Progress Codes</td></tr><tr><td>0xE0</td><td>S3 Resume is stared (S3 Resume PPI is called by the DXE IPL)</td></tr><tr><td>0xE1</td><td>S3 Boot Script execution</td></tr><tr><td>0xE2</td><td>Video repost</td></tr><tr><td>0xE3</td><td>OS S3 wake vector call</td></tr><tr><td>0xE4-0xE7</td><td>Reserved for future AMI progress codes</td></tr><tr><td colspan="2">S3 Resume Error Codes</td></tr><tr><td>0xE8</td><td>S3 Resume Failed</td></tr><tr><td>0xE9</td><td>S3 Resume PPI not Found</td></tr><tr><td>0xEA</td><td>S3 Resume Boot Script Error</td></tr><tr><td>0xEB</td><td>S3 OS Wake Error</td></tr><tr><td>0xEC-0xEF</td><td>Reserved for future AMI error codes</td></tr><tr><td colspan="2">Recovery Progress Codes</td></tr><tr><td>0xF0</td><td>Recovery condition triggered by firmware (Auto recovery)</td></tr><tr><td>0xF1</td><td>Recovery condition triggered by user (Forced recovery)</td></tr><tr><td>0xF2</td><td>Recovery process started</td></tr><tr><td>0xF3</td><td>Recovery firmware image is found</td></tr><tr><td>0xF4</td><td>Recovery firmware image is loaded</td></tr><tr><td>0xF5-0xF7</td><td>Reserved for future AMI progress codes</td></tr><tr><td colspan="2">Recovery Error Codes</td></tr><tr><td>0xF8</td><td>Recovery PPI is not available</td></tr><tr><td>0xF9</td><td>Recovery capsule is not found</td></tr><tr><td>0xFA</td><td>Invalid recovery capsule</td></tr><tr><td>0xFB – 0xFF</td><td>Reserved for future AMI error codes</td></tr></table>

PEI Beep Codes

<table><tr><td># of Beeps</td><td>Description</td></tr><tr><td>1</td><td>Memory not Installed</td></tr><tr><td>1</td><td>Memory was installed twice (InstallPeiMemory routine in PEI Core called twice)</td></tr><tr><td>2</td><td>Recovery started</td></tr><tr><td>3</td><td>DXEIPL was not found</td></tr><tr><td>3</td><td>DXE Core Firmware Volume was not found</td></tr><tr><td>4</td><td>Recovery failed</td></tr><tr><td>4</td><td>S3 Resume failed</td></tr><tr><td>7</td><td>Reset PPI is not available</td></tr></table>

DXE Phase

<table><tr><td>Status Code</td><td>Description</td></tr><tr><td>0x60</td><td>DXE Core is started</td></tr><tr><td>0x61</td><td>NVRAM initialization</td></tr><tr><td>0x62</td><td>Installation of the South Bridge Runtime Services</td></tr><tr><td>0x63</td><td>CPU DXE initialization is started</td></tr><tr><td>0x64</td><td>CPU DXE initialization (CPU module specific)</td></tr><tr><td>0x65</td><td>CPU DXE initialization (CPU module specific)</td></tr><tr><td>0x66</td><td>CPU DXE initialization (CPU module specific)</td></tr><tr><td>0x67</td><td>CPU DXE initialization (CPU module specific)</td></tr><tr><td>0x68</td><td>PCI host bridge initialization</td></tr><tr><td>0x69</td><td>North Bridge DXE initialization is started</td></tr><tr><td>0x6A</td><td>North Bridge DXE SMM initialization is started</td></tr><tr><td>0x6B</td><td>North Bridge DXE initialization (North Bridge module specific)</td></tr><tr><td>0x6C</td><td>North Bridge DXE initialization (North Bridge module specific)</td></tr><tr><td>0x6D</td><td>North Bridge DXE initialization (North Bridge module specific)</td></tr><tr><td>0x6E</td><td>North Bridge DXE initialization (North Bridge module specific)</td></tr><tr><td>0x6F</td><td>North Bridge DXE initialization (North Bridge module specific)</td></tr><tr><td>0x70</td><td>South Bridge DXE initialization is started</td></tr><tr><td>0x71</td><td>South Bridge DXE SMM initialization is started</td></tr><tr><td>0x72</td><td>South Bridge devices initialization</td></tr><tr><td>0x73</td><td>South Bridge DXE Initialization (South Bridge module specific)</td></tr><tr><td>0x74</td><td>South Bridge DXE Initialization (South Bridge module specific)</td></tr><tr><td>0x75</td><td>South Bridge DXE Initialization (South Bridge module specific)</td></tr><tr><td>0x76</td><td>South Bridge DXE Initialization (South Bridge module specific)</td></tr><tr><td>0x77</td><td>South Bridge DXE Initialization (South Bridge module specific)</td></tr><tr><td>0x78</td><td>ACPI module initialization</td></tr><tr><td>0x79</td><td>CSM initialization</td></tr><tr><td>0x7A – 0x7F</td><td>Reserved for future AMI DXE codes</td></tr><tr><td>0x80 – 0x8F</td><td>OEM DXE initialization codes</td></tr><tr><td>0x90</td><td>Boot Device Selection (BDS) phase is started</td></tr><tr><td>0x91</td><td>Driver connecting is started</td></tr><tr><td>0x92</td><td>PCI Bus initialization is started</td></tr><tr><td>0x93</td><td>PCI Bus Hot Plug Controller Initialization</td></tr><tr><td>0x94</td><td>PCI Bus Enumeration</td></tr><tr><td>0x95</td><td>PCI Bus Request Resources</td></tr><tr><td>0x96</td><td>PCI Bus Assign Resources</td></tr><tr><td>0x97</td><td>Console Output devices connect</td></tr><tr><td>0x98</td><td>Console input devices connect</td></tr><tr><td>0x99</td><td>Super IO Initialization</td></tr><tr><td>0x9A</td><td>USB initialization is started</td></tr><tr><td>0x9B</td><td>USB Reset</td></tr><tr><td>0x9C</td><td>USB Detect</td></tr><tr><td>0x9D</td><td>USB Enable</td></tr><tr><td>0x9E – 0x9F</td><td>Reserved for future AMI codes</td></tr><tr><td>0xA0</td><td>IDE initialization is started</td></tr><tr><td>0xA1</td><td>IDE Reset</td></tr><tr><td>0xA2</td><td>IDE Detect</td></tr><tr><td>0xA3</td><td>IDE Enable</td></tr><tr><td>0xA4</td><td>SCSI initialization is started</td></tr><tr><td>0xA5</td><td>SCSI Reset</td></tr><tr><td>0xA6</td><td>SCSI Detect</td></tr><tr><td>0xA7</td><td>SCSI Enable</td></tr><tr><td>0xA8</td><td>Setup Verifying Password</td></tr><tr><td>0xA9</td><td>Start of Setup</td></tr><tr><td>0xAA</td><td>Reserved for ASL (see ASL Status Codes section below)</td></tr><tr><td>0xAB</td><td>Setup Input Wait</td></tr><tr><td>0xAC</td><td>Reserved for ASL (see ASL Status Codes section below)</td></tr><tr><td>0xAD</td><td>Ready To Boot event</td></tr><tr><td>0xAE</td><td>Legacy Boot event</td></tr><tr><td>0xAF</td><td>Exit Boot Services event</td></tr><tr><td>0xB0</td><td>Runtime Set Virtual Address MAP Begin</td></tr><tr><td>0xB1</td><td>Runtime Set Virtual Address MAP End</td></tr><tr><td>0xB2</td><td>Legacy Option ROM Initialization</td></tr><tr><td>0xB3</td><td>System Reset</td></tr><tr><td>0xB4</td><td>USB hot plug</td></tr><tr><td>0xB5</td><td>PCI bus hot plug</td></tr><tr><td>0xB6</td><td>Clean-up of NVRAM</td></tr><tr><td>0xB7</td><td>Configuration Reset (reset of NVRAM settings)</td></tr><tr><td>0xB8 – 0xBF</td><td>Reserved for future AMI codes</td></tr><tr><td>0xC0 – 0xCF</td><td>OEM BDS initialization codes</td></tr><tr><td>DXE Error Codes</td><td></td></tr><tr><td>0xD0</td><td>CPU initialization error</td></tr><tr><td>0xD1</td><td>North Bridge initialization error</td></tr><tr><td>0xD2</td><td>South Bridge initialization error</td></tr><tr><td>0xD3</td><td>Some of the Architectural Protocols are not available</td></tr><tr><td>0xD4</td><td>PCI resource allocation error. Out of Resources</td></tr><tr><td>0xD5</td><td>No Space for Legacy Option ROM</td></tr><tr><td>0xD6</td><td>No Console Output Devices are found</td></tr><tr><td>0xD7</td><td>No Console Input Devices are found</td></tr><tr><td>0xD8</td><td>Invalid password</td></tr><tr><td>0xD9</td><td>Error loading Boot Option (LoadImage returned error)</td></tr><tr><td>0xDA</td><td>Boot Option is failed (StartImage returned error)</td></tr><tr><td>0xDB</td><td>Flash update is failed</td></tr><tr><td>0xDC</td><td>Reset protocol is not available</td></tr></table>

DXE Beep Codes

<table><tr><td># of Beeps</td><td>Description</td></tr><tr><td>1</td><td>Invalid password</td></tr><tr><td>4</td><td>Some of the Architectural Protocols are not available</td></tr><tr><td>5</td><td>No Console Output Devices are found</td></tr><tr><td>5</td><td>No Console Input Devices are found</td></tr><tr><td>6</td><td>Flash update is failed</td></tr><tr><td>7</td><td>Reset protocol is not available</td></tr><tr><td>8</td><td>Platform PCI resource requirements cannot be met</td></tr></table>

ACPI/ASL Checkpoints

<table><tr><td>Status Code</td><td>Description</td></tr><tr><td>0x01</td><td>System is entering S1 sleep state</td></tr><tr><td>0x02</td><td>System is entering S2 sleep state</td></tr><tr><td>0x03</td><td>System is entering S3 sleep state</td></tr><tr><td>0x04</td><td>System is entering S4 sleep state</td></tr><tr><td>0x05</td><td>System is entering S5 sleep state</td></tr><tr><td>0x10</td><td>System is waking up from the S1 sleep state</td></tr><tr><td>0x20</td><td>System is waking up from the S2 sleep state</td></tr><tr><td>0x30</td><td>System is waking up from the S3 sleep state</td></tr><tr><td>0x40</td><td>System is waking up from the S4 sleep state</td></tr><tr><td>0xAC</td><td>System has transitioned into ACPI mode. Interrupt controller is in PIC mode.</td></tr><tr><td>0x72</td><td>System is entering S5 sleep statue.</td></tr><tr><td>0x84 (xhci mode enabled)</td><td>System has transitioned into ACPI mode. Interrupt controller is in PIC mode.</td></tr><tr><td>0x84 (xhci mode enabled)</td><td>System has transitioned into ACPI mode. Interrupt controller is in APIC mode.</td></tr><tr><td>0x83 (xhci mode disabled)</td><td>System has transitioned into ACPI mode. Interrupt controller is in PIC mode.</td></tr><tr><td>0x83 (xhci mode disabled)</td><td>System has transitioned into ACPI mode. Interrupt controller is in APIC mode.</td></tr><tr><td>0xAA</td><td>System has transitioned into ACPI mode. Interrupt controller is in APIC mode.</td></tr></table>

9.3 OEM-Reserved Checkpoint Ranges

<table><tr><td>Status Code</td><td>Description</td></tr><tr><td>0x05</td><td>OEM SEC initialization before microcode loading</td></tr><tr><td>0x0A</td><td>OEM SEC initialization after microcode loading</td></tr><tr><td>0x1D – 0x2A</td><td>OEM pre-memory initialization codes</td></tr><tr><td>0x3F – 0x4E</td><td>OEM PEI post memory initialization codes</td></tr><tr><td>0x80 – 0x8F</td><td>OEM DXE initialization codes</td></tr><tr><td>0xC0 – 0xCF</td><td>OEM BDS initialization codes</td></tr></table>

# Important Safety Instructions

For user safety, please read and follow all instructions, WARNINGS, CAUTIONS, and NOTES marked in this manual and on the associated equipment before handling/operating the equipment.

X Read these safety instructions carefully.
X Keep this user’s manual for future reference.
? Read the specifications section of this manual for detailed information on the operating environment of this equipment.
X When installing/mounting or uninstalling/removing equipment:

Z Turn off power and unplug any power cords/cables.

X To avoid electrical shock and/or damage to equipment:

Z Keep equipment away from water or liquid sources;
Z Keep equipment away from high heat or high humidity;
Z Keep equipment properly ventilated (do not block or cover ventilation openings);

Z Make sure to use recommended voltage and power source settings;

Z Always install and operate equipment near an easily accessible electrical socket-outlet;

Z Secure the power cord (do not place any object on/over the power cord);

Z Only install/attach and operate equipment on stable surfaces and/or recommended mountings; and,

Z If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source.

X Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.

A Lithium-type battery may be provided for uninterrupted, backup or emergency power.

![The image shows a standard safety warning sign. It features a red triangle containing a black exclamation point at the top, positioned directly above the word 'WARNING' printed in black capital letters.](.cpci-6630-50-15110-2010-11/b3adfb8884f5348a37b03bdfee21dde084c84ff9bfc659ba264f497405aaef96.jpg)

Risk of explosion if battery is replaced with one of an incorrect type. Dispose of used batteries appropriately.

X Equipment must be serviced by authorized technicians when:

Z The power cord or plug is damaged;
Z Liquid has penetrated the equipment;
Z It has been exposed to high humidity/moisture;
Z It is not functioning or does not function according to the user’s manual;
Z It has been dropped and/or damaged; and/or,
Z It has an obvious sign of breakage.

# Getting Service

Ask an Expert: http://askanexpert.adlinktech.com

# ADLINK Technology, Inc.

9F, No.166 Jian Yi Road, Zhonghe District

New Taipei City 235, Taiwan

Tel: +886-2-8226-5877

Fax: +886-2-8226-5717

Email: service@adlinktech.com

# Ampro ADLINK Technology, Inc.

5215 Hellyer Avenue, #110

San Jose, CA 95138, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-360-0222

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

300 Fang Chun Rd., Zhangjiang Hi-Tech Park

Pudong New Area, Shanghai, 201203 China

Tel: +86-21-5132-8988

Fax: +86-21-5132-3588

Email: market@adlinktech.com

# ADLINK Technology GmbH

Hans-Thoma-Strasse 11

D-68163 Mannheim, Germany

Tel: +49-621-43214-0

Fax: +49-621 43214-30

Email: emea@adlinktech.com

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you.
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