NuDAQ®

cPCI-7248/7249R

PCI-7224/7248/7296

24/48/96-CH Digital I/O Card

Users’ Guide

©Copyright 1997\~2002 ADLINK Technology Inc.

All Rights Reserved.

Manual Rev. 2.60: April 25, 2003

Part No. 50-11104-201

The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Trademarks

NuDAQ, NuIPC, DAQBench are registered trademarks of ADLINK Technology Inc.

Other product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Getting service from ADLINK

‹Customer Satisfaction is always the most important thing for ADLINK Tech Inc. If you need any help or service, please contact us and get it.

<table><tr><td colspan="4">ADLINK Technology Inc.</td></tr><tr><td>Web Site</td><td colspan="3">http://www.adlinktech.com</td></tr><tr><td>Sales &amp; Service</td><td colspan="3">service@adlinktech.com</td></tr><tr><td rowspan="4">Technical Support</td><td>NuDAQ</td><td colspan="2">nudaq@adlinktech.com</td></tr><tr><td>NuDAM</td><td colspan="2">automation@adlinktech.com</td></tr><tr><td>NuIPC</td><td colspan="2">nuipc@adlinktech.com</td></tr><tr><td>NuPRO</td><td colspan="2">nupro@adlinktech.com</td></tr><tr><td>TEL</td><td>+886-2-82265877</td><td>FAX</td><td>+886-2-82265717</td></tr><tr><td>Address</td><td colspan="3">9F, No. 166, Jian Yi Road, Chungho City, Taipei, 235 Taiwan, R.O.C.</td></tr></table>

‹Please inform or FAX us of your detailed information for a prompt, satisfactory and constant service.

<table><tr><td colspan="4">Detailed Company Information</td></tr><tr><td>Company/Organization</td><td colspan="3"></td></tr><tr><td>Contact Person</td><td colspan="3"></td></tr><tr><td>E-mail Address</td><td colspan="3"></td></tr><tr><td>Address</td><td colspan="3"></td></tr><tr><td>Country</td><td colspan="3"></td></tr><tr><td>TEL</td><td></td><td>FAX</td><td></td></tr><tr><td>Web Site</td><td colspan="3"></td></tr><tr><td colspan="4">Questions</td></tr><tr><td>Product Model</td><td colspan="3"></td></tr><tr><td>Environment to Use</td><td colspan="3">☐ OS____☐ Computer Brand ____☐ M/B: ☐ CPU:☐ Chipset: ☐ BIOS:☐ Video Card:☐ Network Interface Card:☐ Other:</td></tr><tr><td>Challenge Description</td><td colspan="3"></td></tr><tr><td>Suggestions for ADLINK</td><td colspan="3"></td></tr></table>

# Table of Contents

# Introduction .......

1.1 Features ... .. 2

1.1.1 Digital I/O Ports . 2

1.1.2 Timer/Counter and Interrupt System.. 2

1.1.3 Miscellaneous..

1.2 Applications ..... .2

1.3 Specifications .... .3

1.4 Software Supporting ........ .4

1.4.1 Programming Library ..... 4

1.4.2 PCIS-LVIEW: LabVIEW® Driver .. .5

1.4.3 PCIS-VEE: HP-VEE Driver .. 5

1.4.4 DAQBenchTM: ActiveX Controls... 5

1.4.5 DASYLabTM PRO... 5

1.4.6 PCIS-DDE: DDE Server and InTouchTM 5

1.4.7 PCIS-ISG: ISaGRAFTM driver ... .6

1.4.8 PCIS-ICL: InControlTM Driver ... .6

1.4.9 PCIS-OPC: OPC Server.. 6

# Installation .....

2.1 What You Have ..... 7

2.2 Unpacking.... .8

2.3 PCB Layout . .9

2.3.1 PCI-7248/7224 PCB Layout . 9

2.3.2 PCI-7296 PCB Layout . 9

2.3.3 cPCI-7248 PCB Layout.. ..10

2.3.4 cPCI-7249R PCB Layout . ..10

2.4 Hardware Installation... ..11

2.5 Device Installation for Windows Systems ... ..12

2.6 Connector Pin Assignment.. .13

2.6.1 Pin Assignment of PCI-7224/7248/7296. ..13

2.6.2 Pin Assignment of cPCI-7248.. ..14

2.6.3 Pin Assignment of cPCI-7249R . ..15

2.6.4 R7249 OPTO-22 Connectors . ..16

2.7 Jumpers Description.. ..17

2.7.1 Power on Status of Ports. .17

2.7.2 12V Power Supply Configuration. ..18

2.8 Termination Boards Connection... ..18

# Registers Format ...... ..20

3.1 PCI PnP Registers ... ... 20
3.2 I/O Address Map ........ ... 21

# Operation Theorem......... ... 22

4.1 Digital I/O Ports ... .. 22

4.1.1 Introduction.. .22
4.1.2 8255 Mode 0... .22
4.1.3 Special Function of the DIO Signals . .22
4.1.4 Digital I/O Port Programming .. .23
4.1.5 Control Word .. .23
4.1.6 Power on Configuration . .24
4.1.7 Note for Output Data. .24
4.1.8 Note for cPCI-7249R . .24

4.2 Timer/Counter Operation.. ... 25

4.2.1 Introduction.. .25
4.2.2 General Purpose Timer/Counter.. ..25
4.2.2 Cascaded 32 Bits Timer .. ..26
4.2.3 Event Counter and Edge Control.. ..26

4.3 Interrupt Multiplexing . .. 26

4.3.1 Architecture . ..26
4.3.2 IRQ Level Setting.. .27
4.3.3 Note for Dual Interrupts .27
4.3.4 Interrupt Source Control . .28

4.4 12V and 5V Power Supply . .. 29

# C/C++ Libraries ....... .. 30

5.1 Libraries Installation .. ... 30
5.2 Programming Guide ... ..31

5.2.1 Naming Convention .. .31
5.2.2 Data Types .. .31

5.3 \_7248/96\_Initial . .. 32
5.4 Digital Input... .. 33
5.5 Digital Output.. .. 35
5.6 Configuration Port . ..36
5.7 Configuration Channel.. .. 37
5.8 Set Interrupt Control .. .. 39
5.9 Timer Start... .. 40
5.10 Timer Read.. ..41
5.11 Timer Stop ....... ... 42
5.12 Cascaded Timer .. ..43
5.13 Get IRQ Status .. ... 44

5.14 Clear IRQ... ... 45
5.15 Software Reset.. .. 45
5.16 Interrupt Start under Windows .... .. 46
5.17 Interrupt Stop under Windows... ..47

# Warranty Policy......... ....... 48

# How to Use This Guide

This manual is designed to help you use the 7248/96 series products. It describes how to modify and control various functions on the cards to meet your requirements. It is divided into five chapters:

Chapter 1, Introduction, gives an overview of the product features. applications, and specifications.
Chapter 2, Installation, describes how to install the 7248/96 series products. The layout of are shown, the jumper settings, the connectors specifications, and the notes for installation are described.
Chapter 3, Registers Format, describes the low-level register structure and format of the PCI-7224/7248/7296.
Chapter 4, Operation Theorem, describes more details about the versatile functions, including DIO, timer / counter, and interrupt systems.
Chapter 5, C/C++ Library specifies the software library of C language under DOS environment that makes you can operate the functions on this card easily.

![1](.cpci-7248-7249r-manual-6/236616f6661354cf1c33d7bd229db2a300458ce2357503090f6ace2e90ea9628.jpg)

# Introduction

The 7248/7296 series products are general purpose digital I/O cards. This series includes four cards:

z PCI-7224: 24-CH DIO card
z PCI-7248: 48-CH DIO card
z PCI-7296: 96-CH DIO card
z cPCI-7248: 3U CompactPCI 48-CH DIO card
z cPCI-7249R: 3U CompactPCI 48-CH DIO card with Rear I/O

The 7248 series products are multi-function digital I/O boards used for industrial PC with PCI bus or CompactPCI bus. The cards are plug-and-play therefore it is not necessary to set any jumper for configuration of I/O address or interrupt resources.

PCI-7248 and PCI-7296 are 48-channel and 96-channel DIO cards respectively. PCI-7224 is a reduced version of PCI-7248, all the functions are exactly the same as PCI-7248 except there are 24 channels only. The cPCI-7248 is the 3U CompactPCI version of the PCI-7248. The software is fully compatible with the PCI-7248. In this manual, the PCI-7224 and cPCI-7248’s specifications are the same as the PCI-7248 if not specified.

The PCI-7248 emulates two industry standard 8255 Programmable Peripheral Interface (PPI) chips operated under mode zero configuration. The PCI-7296 emulates four PPI chips. These two cards are compatible not only on hardware connectors but also on software programming.

The cPCI-7248 is the CompactPCI version of PCI-7248. All the functions are exactly the same as PCI-7248. The cPCI-7249 is cPCI-7248’s extended version, which include one more latch register and with rear I/O capability.

Every PPI connector offers has 3 ports: PA, PB, and PC. The PC can also be subdivided into 2 nibble-wide ( 4-bit) ports - PC Upper and PC Low. Each connector is corresponding to one PPI chip with 24 DIO points. PCI-7224/7248/7296 are equipped with 1,2, and 4 50-pin male ribbon connectors respectively. The cPCI-7248 is equipped with one 100-pin SCSI-type connector.

#

The 7248/96 series products provide the following advanced features:

# 1.1.1 Digital I/O Ports

z 24/ 48/96 TTL/DTL compatible digital I/O lines
z Emulates industry standard mode 0 of 8255 PPI
z Buffered circuits for higher driving
z Direct interface with OPTO-22 compatible I/O module
z Output status read-back

# 1.1.2 Timer/Counter and Interrupt System

z A 32 bits timer to generate watchdog timer interrupt
z A 16 bits event counter to generate event interrupt
z Programmable interrupt source
z Dual interrupt system

# 1.1.3 Miscellaneous

z Provide 12V and 5V power supply on OPTO-22 connectors
z On board resettable fuses to protect power supply for external devices

# 1.2 Applications

z Programmable mixed digital input & output
z Industrial monitoring and control
z Digital I/O control
z Contact closure, switch/keyboard monitoring
z Connects with OPTO-22 compatible modules
Useful with A/D and D/A to implement a data acquisition & control system

# 1.3 Specifications

<table><tr><td>I/O channels</td><td>24-bit for PCI-722448-bit for PCI-724896-bit for PCI-729648-bit for cPCI-7248 and cPCI-7249R</td></tr><tr><td>Digital Input Signal</td><td>Logic High Voltage: 2.0 V to 5.25VLogic Low Voltage: 0.0 V to 0.80VLogic High Current: 20.0 uALogic Low Current: -0.2 mA</td></tr><tr><td>Digital Output Signal</td><td>Logic High Voltage: Minimum 2.4 VLogic Low Voltage: Maximum 0.5VLogic High Current: -15.0 mALogic Low Current: 24.0 mA</td></tr><tr><td>Operating Temperature</td><td>0 °C ~ 60°C</td></tr><tr><td>Storage Temperature</td><td>-20°C ~ 80°C</td></tr><tr><td>Humidity</td><td>5% ~ 95% non-condensing</td></tr><tr><td>I/O Connectors</td><td>50-pin male ribbon cable connectors for PCI-7224/7248/7296 or100-pin SCSI-type connectors for cPCI-7248</td></tr><tr><td>Bus</td><td>PCI bus for PCI-7224/7248/72963U 32-bit CompactPCI Bus for cPCI-7248</td></tr><tr><td>Power Consumption (without external devices)</td><td>PCI-7224:330mA @ $5V_{DC}$  (Typical)350mA @ $5V_{DC}$  (Maximum)PCI-7248:500mA @ $5V_{DC}$  (Typical)540mA @ $5V_{DC}$  (Maximum)PCI-7296:860mA @ $5V_{DC}$  (Typical)940mA @ $5V_{DC}$  (Maximum)cPCI-7248:470mA @ $5V_{DC}$  (Typical)560mA @ $5V_{DC}$  (Maximum)cPCI-7249R:700mA @5VDC (Typical)</td></tr><tr><td>Transfer Rate</td><td>500 K bytes/sec (Maximum)</td></tr><tr><td>PCB Dimension</td><td>PCI-7224: 148mm x 102mmPCI-7248: 148mm x 102mmPCI-7296: 166mm x 102mmcPCI-7248: 3U CompactPCI form factorcPCI-7249R: 3U CompactPCI form factor, J2 with Rear I/O option</td></tr></table>

# 1.4 Software Supporting

ADLINK provides versatile software drivers and packages for users’ different approach to built-up a system. We not only provide programming library such as DLL for many Windows systems, but also provide drivers for many software package such as LabVIEW® , HP VEETM, DASYLabTM, InTouchTM, InControlTM, ISaGRAFTM, and so on.

All the software options are included in the ADLINK CD. The non-free software drivers are protected with serial licensed code. Without the software serial number, you can still install them and run the demo version for two hours for demonstration purpose. Please contact with your dealer to purchase the formal license serial code.

# 1.4.1 Programming Library

For customers who are writing their own programs, we provide function libraries for many different operating systems, including:

DOS Library: Borland C/C++ and Microsoft C++, the functions descriptions are included in this user’s guide.
Windows 95 DLL: For VB, VC++, Delphi, BC5, the functions descriptions are included in this user’s guide.
PCIS-DASK: Include device drivers and DLL for Windows 98, Windows NT and Windows 2000. DLL is binary compatible across Windows 98, Windows NT and Windows 2000. That means all applications developed with PCIS-DASK are compatible across Windows 98, Windows NT and Windows 2000. The developing environment can be VB, VC++, Delphi, BC5, or any Windows programming language that allows calls to a DLL. The user’s guide and function reference manual of PCIS-DASK are in the CD. Please refer the PDF manual files under the following directory: \\Manual\_PDF\Software\PCIS-DASK
PCIS-DASK/X: Include device drivers and shared library for Linux. The developing environment can be Gnu C/C++ or any programming language that allows linking to a shared library. The user's guide and function reference manual of PCIS-DASK/X are in the CD. (\Manual\_PDF\Software\PCIS-DASK-X.)
The above software drivers are shipped with the board. Please refer to the “Software Installation Guide” to install these drivers.

# 1.4.2 PCIS-LVIEW: LabVIEW® Driver

PCIS-LVIEW contains the VIs, which are used to interface with NI’s LabVIEW® software package. The PCIS-LVIEW supports Windows 95/98/NT/2000. The LabVIEW® drivers are free shipped with the board. You can install and use them without license. For detail information about PCIS-LVIEW, please refer to the user’s guide in the CD.

(\\Manual\_PDF\Software\PCIS-LVIEW)

# 1.4.3 PCIS-VEE: HP-VEE Driver

The PCIS-VEE includes the user objects, which are used to interface with HP VEE software package. PCIS-VEE supports Windows 95/98/NT. The HP-VEE drivers are free shipped with the board. You can install and use them without license. For detail information about PCIS-VEE, please refer to the user’s guide in the CD.

(\\Manual\_PDF\Software\PCIS-VEE)

# 1.4.4 DAQBenchTM: ActiveX Controls

We suggest the customers who are familiar with ActiveX controls and VB/VC++ programming use the DAQBenchTM ActiveX Control components library for developing applications. The DAQBenchTM is designed under Windows NT/98. For more detailed information about DAQBench, please refer to the user’s guide in the CD.

(\\Manual\_PDF\Software\DAQBench\DAQBench Manual.PDF)

# 1.4.5 DASYLabTM PRO

DASYLab is an easy-to-use software package, which provides easy-setup instrument functions such as FFT analysis. Please contact us to get DASYLab PRO, which include DASYLab and ADLink hardware drivers.

# 1.4.6 PCIS-DDE: DDE Server and InTouchTM

DDE stands for Dynamic Data Exchange specifications. The PCIS-DDE includes the PCI cards’ DDE server. The PCIS-DDE server is included in the ADLINK CD. It needs license. The DDE server can be used conjunction with any DDE client under Windows NT.

# 1.4.7 PCIS-ISG: ISaGRAFTM driver

The ISaGRAF WorkBench is an IEC1131-3 SoftPLC control program development environment. The PCIS-ISG includes ADLink products’ target drivers for ISaGRAF under Windows NT environment. The PCIS-ISG is included in the ADLINK CD. It needs license.

# 1.4.8 PCIS-ICL: InControlTM Driver

PCIS-ICL is the InControl driver which support the Windows NT. The PCIS-ICL is included in the ADLINK CD. It needs license.

# 1.4.9 PCIS-OPC: OPC Server

PCIS-OPC is an OPC Server, which can link with the OPC clients. There are many software packages on the market can provide the OPC clients now. The PCIS-OPC supports the Windows NT. It needs license.

# 2

# Installation

This chapter describes how to install the 7248/96 series products. At first, the contents in the package and unpacking information that you should be careful of are described.

z Check what you have (section 2.1)
z Unpacking (section 2.2)
z Check the PCB (section 2.3)
z Hardware installation (section 2.4)
z Device Installation for Windows System (section 2.5)
z Connector pin assignment (section 2.6)
z Jumpers setup (section 2.7)
z Termination boards connection (section 2.8)

# 2.1 What You Have

In addition to this User's Manual, the package includes the following items:

z The PCI or CompactPCI board
z ADLINK CD
z Software Installation Guide
z In cPCI-7249R box, a rear I/O transition board DB-100RU is included

If any of these items is missing or damaged, contact the dealer from whom you purchased the product. Save the shipping materials and carton in case you want to ship or store the product in the future.

# 2.2 Unpacking

Your card contains sensitive electronic components that can be easily damaged by static electricity.

The card should be put on a grounded anti-static mat. The operator should wear an anti-static wristband, grounded at the same point as the anti-static mat.

Inspect the card module carton for obvious damage. Shipping and handling may cause damage to your module. Be sure there is no shipping and handling damage on the module before processing.

After opening the card module carton, extract the system module and place it only on a grounded anti-static surface with components side up.

Again inspect the module for damages. Press down on all the socketed IC's to make sure that they are properly seated. Do this only with the module place on a firm flat surface.

Note: DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN DAMAGED.

You are now ready to install your 7248/96 series product.

# 2.3 PCB Layout

# 2.3.1 PCI-7248/7224 PCB Layout

![PCI\nController\nCN1\nCN2](.cpci-7248-7249r-manual-6/c00161c30ca84222b567753510f0ce47a963617f2df7caea5c27da01f18fa137.jpg)

Figure 2.3.1 PCI-7248/7224 PCB Layout

# 2.3.2 PCI-7296 PCB Layout

![CN1 CN2\nPCI\nController\nCN3 CN4](.cpci-7248-7249r-manual-6/31d18ffcc12002a4af600ea2107f9f3c01df3bc26ce4d12f53944e00aece36dd.jpg)

Figure 2.3.2 PCI-7296 PCB Layout

# 2.3.3 cPCI-7248 PCB Layout

![CPCI-7248\nJC2 JB2 JA2\nPCI Controller Chip\nCN1 JA1 JB1 JC1](.cpci-7248-7249r-manual-6/3468333a99cf6bdc83d23b18b8e88d3da29e51d301a0f96115d8058bfce0d911.jpg)

Figure 2.3.3 cPCI-7248 PCB Layout

# 2.3.4 cPCI-7249R PCB Layout

![CN1\nA2\nF1\nF2\nCB43\nXU6\nCB15\nXU5\nCB42\nXU7\n74LS139\n74LS04\n74LS139\nCB17\nU5\n74LS175\n74LS74\nCB18\nU3\n74LS139\n8254\n74LS175\nU24\n74LS175\nU28\n74LS175\nU2\n74LS175\n193CS46\nCB7\n+ -\nRB1\nRP2\nRP1\nCB8\nRP+\nRB3\nRB5\nCB4\nCB6\nCB8\nCB11\ncPCI-7249 REV A2\nf e d c b](.cpci-7248-7249r-manual-6/c90b35ae23eb253866716534533403853f89510e0a2013994c787a654ff24249.jpg)

Figure 2.3.4 cPCI-7249R Layout

# 2.4 Hardware Installation

# PCI configuration

The PCI cards (or CompactPCI cards) are equipped with plug and play PCI controller, it can request base addresses and interrupt according to PCI standard. The system BIOS will install the system resource based on the PCI cards’ configuration registers and system parameters (which are set by system BIOS). Interrupt assignment and memory usage (I/O port locations) of the PCI cards can be assigned by system BIOS only. These system resource assignments are done on a board-by-board basis. It is not suggested to assign the system resource by any other methods.

# PCI slot selection

The PCI card can be inserted to any PCI slot without any configuration for system resource. Please note that the PCI system board and slot must provide bus-mastering capability to operate this board well.

# PCI Installation Procedures

1. Turn off your computer
2. Turn off all accessories (printer, modem, monitor, etc.) connected to your computer.
3. Remove the cover from your computer.
4. Setup jumpers on the PCI or CompactPCI card.
5. Select a 32-bit PCI slot. PCI slot are short than ISA or EISA slots, and are usually white or ivory.
6. Before handling the PCI cards, discharge any static buildup on your body by touching the metal case of the computer. Hold the edge and do not touch the components.
7. Position the board into the PCI slot you selected.
8. Secure the card in place at the rear panel of the system.

# CompactPCI Installation Procedures

1. Read through this manual, and setup the jumper according to your application.
2. Turn off your computer and turn off all accessories connected to computer.
3. Remove the slot cover from the CompactPCI.
4. Select a 32-bit CompactPCI slot on the back plane for cPCI-7248 board. Select a 32-bit CompactPCI slot with rear I/O extension for cPCI-7249R.
5. Before handling the boards, discharge any static buildup on your body by touching the metal case of the computer. Hold the edge and do not touch the components.
6. Position the board into the slot you selected.
7. Secure the card on the back plane by using screw removed from the slot.
8. Install the rear I/O transition board for cPCI-7249R.

# 2.5 Device Installation for Windows Systems

Once Windows 95/98/2000 has started, the Plug and Play function of Windows system will find the new NuDAQ/NuIPC cards. If this is the first time to install NuDAQ/NuIPC cards in your Windows system, you will be informed to input the device information source. Please refer to the “Software Installation Guide” for the steps of installing the device.

# 2.6 Connector Pin Assignment

# 2.6.1 Pin Assignment of PCI-7224/7248/7296

The I/O ports of PCI-7224/7248/7296 emulate the mode 0 configuration of the 8255 general purpose programmable peripheral interface. The cards come equipped with 50-pin male IDC connectors that interface with OPTO-22. Figure 2.4 shows the circuits and pinout of PCI-7224/7248/7296's connectors (CN1\~CN4) .

![Flowchart](.cpci-7248-7249r-manual-6/b22af4dbed4fbe4c915813e3bd5e81853c0c0bd4285a8689ece7bb7303cd460a.jpg)

Figure 2.6.1 pin assignments and power signals of PCI-7224/7248/7296

The DIO pin names are specified as PnXb, where

n : means the connector reference number n=1\~4.

X : means the port name, X= ‘A’ , ‘B’ or ‘C’

b : means the bit number of a port, b=0\~7

For example, P1C4 means bit 4 of port C on connector CN1.

# Note:

1. The pinout of the CN1 \~ CN4 connectors are identical.

2. The power supply pins are protected by resetable fuses. Refer to section 4.4 for details of the power supply.

# 2.6.2 Pin Assignment of cPCI-7248

The cPCI-7248 is equipped a SCSI-type 100-pin connector. The pin assignment is described in Figure 2.6.2

![| Category | Value |\n|---|---|\n| (1) | 51 |\n| (2) | 52 |\n| (3) | 53 |\n| (48) | 98 |\n| (49) | 99 |\n| (50) | 100 |\nThe chart contains two sets of bars, likely representing a comparison between two groups. The top row contains the first bar (51), and the bottom row contains the second bar (98). No explicit numerical values are provided for the bars.](.cpci-7248-7249r-manual-6/5e9c6f2c1f3580c364b9754e20741a1af1acfe74e48105d20f7778c4fc501a3b.jpg)

<table><tr><td>(1) P1A0</td><td>(26) P2A0</td><td>(51) EVENT</td><td>(76) GND</td></tr><tr><td>(2) P1A1</td><td>(27) P2A1</td><td>(52) GND</td><td>(77) GND</td></tr><tr><td>(3) P1A2</td><td>(28) P2A2</td><td>(53) GND</td><td>(78) GND</td></tr><tr><td>(4) P1A3</td><td>(29) P2A3</td><td>(54) GND</td><td>(79) GND</td></tr><tr><td>(5) P1A4</td><td>(30) P2A4</td><td>(55) GND</td><td>(80) GND</td></tr><tr><td>(6) P1A5</td><td>(31) P2A5</td><td>(56) GND</td><td>(81) GND</td></tr><tr><td>(7) P1A6</td><td>(32) P2A6</td><td>(57) GND</td><td>(82) GND</td></tr><tr><td>(8) P1A7</td><td>(33) P2A7</td><td>(58) GND</td><td>(83) GND</td></tr><tr><td>(9) P1B0</td><td>(34) P2B0</td><td>(59) GND</td><td>(84) GND</td></tr><tr><td>(10)P1B1</td><td>(35) P2B1</td><td>(60) GND</td><td>(85) GND</td></tr><tr><td>(11)P1B2</td><td>(36) P2B2</td><td>(61) GND</td><td>(86) GND</td></tr><tr><td>(12) P1B3</td><td>(37) P2B3</td><td>(62) GND</td><td>(87) GND</td></tr><tr><td>(13) P1B4</td><td>(38) P2B4</td><td>(63) GND</td><td>(88) GND</td></tr><tr><td>(14) P1B5</td><td>(39) P2B5</td><td>(64) GND</td><td>(89) GND</td></tr><tr><td>(15) P1B6</td><td>(40) P2B6</td><td>(65) GND</td><td>(90) GND</td></tr><tr><td>(16) P1B7</td><td>(41) P2B7</td><td>(66) GND</td><td>(91) GND</td></tr><tr><td>(17) P1C0</td><td>(42) P2C0</td><td>(67) GND</td><td>(92) GND</td></tr><tr><td>(18) P1C1</td><td>(43) P2C1</td><td>(68) GND</td><td>(93) GND</td></tr><tr><td>(19) P1C2</td><td>(44) P2C2</td><td>(69) GND</td><td>(94) GND</td></tr><tr><td>(20) P1C3</td><td>(45) P2C3</td><td>(70) GND</td><td>(95) GND</td></tr><tr><td>(21) P1C4</td><td>(46) P2C4</td><td>(71) GND</td><td>(96) GND</td></tr><tr><td>(22) P1C5</td><td>(47) P2C5</td><td>(72) GND</td><td>(97) GND</td></tr><tr><td>(23) P1C6</td><td>(48) P2C6</td><td>(73) GND</td><td>(98) GND</td></tr><tr><td>(24) P1C7</td><td>(49) P2C7</td><td>(74) GND</td><td>(99) GND</td></tr><tr><td>(25) V5V</td><td>(50) +12V</td><td>(75) V5V</td><td>(100) +12V</td></tr></table>

Figure 2.6.2 pinout and power signals of cPCI-7248

The DIO pin names are specified as PnXb, where

n : means the connector reference number n=1\~2.

X : means the port name, X= ‘A’ , ‘B’ or ‘C’

b : means the bit number of a port, b=0\~7

For example, P1C4 means bit 4 of port C on connector CN1.

# Note:

1. The pinout of the CN1 \~ CN4 connectors are identical.
2. The power supply pins are protected by resetable fuses. Refer to section 4.4 for details of the power supply.

# 2.6.3 Pin Assignment of cPCI-7249R

The I/O ports of cPCI-7249R emulate the mode 0 configuration of the 8255 general purpose programmable peripheral interface. This card comes equipped with SCSI -100 Pin connector. And the cPCI-7249R supports R7249 daughter board for rear I/O, it includes two OPTO-22 connectors and one SCSI -100 connector.

![| Pin | Label | Value |\n|---|---|---|\n| (1) | P1A0 | 26 |\n| (1) | P2A0 | 51 |\n| (1) | EVENT | 76 |\n| (2) | P1A1 | 27 |\n| (2) | P2A1 | 52 |\n| (2) | GND | 77 |\n| (3) | P1A2 | 28 |\n| (3) | P2A2 | 53 |\n| (3) | GND | 78 |\n| (4) | P1A3 | 29 |\n| (4) | P2A3 | 54 |\n| (4) | GND | 79 |\n| (5) | P1A4 | 30 |\n| (5) | P2A4 | 55 |\n| (5) | GND | 80 |\n| (6) | P1A5 | 31 |\n| (6) | P2A5 | 56 |\n| (6) | GND | 81 |\n| (7) | P1A6 | 32 |\n| (7) | P2A6 | 57 |\n| (7) | GND | 82 |\n| (8) | P1A7 | 33 |\n| (8) | P2A7 | 58 |\n| (8) | GND | 83 |\n| (9) | P1B0 | 34 |\n| (9) | P2B0 | 59 |\n| (9) | GND | 84 |\n| (10) | P1B1 | 35 |\n| (10) | P2B1 | 60 |\n| (10) | GND | 85 |\n| (11) | P1B2 | 36 |\n| (11) | P2B2 | 61 |\n| (11) | GND | 86 |\n| (12) | P1B3 | 37 |\n| (12) | P2B3 | 62 |\n| (12) | GND | 87 |\n| (13) | P1B4 | 38 |\n| (13) | P2B4 | 63 |\n| (13) | GND | 88 |\n| (14) | P1B5 | 39 |\n| (14) | P2B5 | 64 |\n| (14) | GND | 89 |\n| (15) | P1B6 | 40 |\n| (15) | P2B6 | 65 |\n| (15) | GND | 90 |\n| (16) | P1B7 | 41 |\n| (16) | P2B7 | 66 |\n| (16) | GND | 91 |\n| (17) | P1C0 | 42 |\n| (17) | P2C0 | 67 |\n| (17) | GND | 92 |\n| (18) | P1C1 | 43 |\n| (18) | P2C1 | 68 |\n| (18) | GND | 93 |\n| (19) | P1C2 | 44 |\n| (19) | P2C2 | 69 |\n| (19) | GND | 94 |\n| (20) | P1C3 | 45 |\n| (20) | P2C3 | 70 |\n| (20) | GND | 95 |\n| (21) | P1C4 | 46 |\n| (21) | P2C4 | 71 |\n| (21) | GND | 96 |\n| (22) | P1C5 | 47 |\n| (22) | P2C5 | 72 |\n| (22) | GND | 97 |\n| (23) | P1C6 | 48 |\n| (23) | P2C6 | 73 |\n| (23) | GND | 98 |\n| (24) | P1C7 | 49 |\n| (24) | P2C7 | 74 |\n| (24) | GND | 99 |\n| (25) V5V +12V +12V +100V(lcel)(lcel)(nl)](.cpci-7248-7249r-manual-6/2d68700e24ad998f01649b240630299a993f569f3c109bb98d7f932f93654831.jpg)

The DIO pin names are specified as PnXb, where

n : means the connector reference number n=1\~2.

X : means the port name, X= ‘A’ , ‘B’ or ‘C’

b : means the bit number of a port, b=0\~7

For example, P1C4 means bit 4 of port C on connector CN1.

EXTCLK : External edge trigger signal for latch digital input data

EVENT : External clock source for counter 0

V5V : Onboard un-regulated 5V power supply output

+12V : Onboard un-regulated +12V power supply output

# 2.6.4 R7249 OPTO-22 Connectors

The cPCI-7249R’s rear I/O transition board R7249 is equipped with two 50 pin male IDC connectors XCN2, XCN3, that interface with OPTO-22.

![**Labeled Blocks:**\n*   **XCN2** (labeled **HEADER 25X2**): A 50-pin header.\n    *   Left pins (1, 3-49) labeled: **P1C7**, **P1C6**, **P1C5**, **P1C4**, **P1C3**, **P1C2**, **P1C1**, **P1C0**, **P1B7**, **P1B6**, **P1B5**, **P1B4**, **P1B3**, **P1B2**, **P1B1**, **P1B0**, **P1A7**, **P1A6**, **P1A5**, **P1A4**, **P1A3**, **P1A2**, **P1A1**, **P1A0**.\n    *   Right pins (2, 4, 6, 8-50): Pin 4 labeled **EVENT**, Pin 6 labeled **EXTCLK**.\n*   **XCN3** (labeled **HEADER 25X2**): A 50-pin header.\n    *   Left pins (1, 3-49) labeled: **P2C7**, **P2C6**, **P2C5**, **P2C4**, **P2C3**, **P2C2**, **P2C1**, **P2C0**, **P2B7**, **P2B6**, **P2B5**, **P2B4**, **P2B3**, **P2B2**, **P2B1**, **P2B0**, **P2A7**, **P2A6**, **P2A5**, **P2A4**, **P2A3**, **P2A2**, **P2A1**, **P2A0**.\n    *   Right pins (2, 4, 6, 8-50): Pin 4 labeled **EVENT**, Pin 6 labeled **EXTCLK**.\n*   **X12**: A 3-pin connector (pins 1, 2, 3).\n*   **X13**: A 3-pin connector (pins 1, 2, 3).\n\n**Connections:**\n*   **+12V** connects to **X12** pin 1 and **X13** pin 1.\n*   **X12** pin 2 connects to **XCN2** pin 2.\n*   **X13** pin 2 connects to **XCN3** pin 2.\n*   **X12** pin 3 connects to **GND**.\n*   **X13** pin 3 connects to **GND**.\n*   **XCN2** pins 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 50 connect to **GND**.\n*   **XCN2** pin 48 connects to **+5V0**.\n*   **XCN3** pins 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 50 connect to **GND**.\n*   **XCN3** pin 48 connects to **+5V0**.](.cpci-7248-7249r-manual-6/5546257e6ae46467b6468a0b91526b9c20e7b5aa398a2ba4749bd8f22b77ee65.jpg)

Figure 2.3 R7249 OPTO-22 Connectors Pin Assignment
Note : The power supply pins are protected by resetable fuses.
Refer to section 3.7 for details of the power supply.

# 2.7 Jumpers Description

The 7248/96 DIO cards are ‘plug-and-play’, thus it is not necessary to setup the card configurations to fit the computer system. However, to fit users’ versatile operation environment, there are still a few jumpers to set the power-on status of ports and the usage of the +12V output pins.

# 2.7.1 Power on Status of Ports

For every port on the 7248/96 cards, the power-on status is set as input, therefore, the voltage could be pulled high, pulled low, or floating. It is dependent on the jumper setting. Table 2.1 lists the reference number of the jumpers and the corresponding port names.

<table><tr><td>Jumper</td><td>Port Name</td><td>Remarks</td></tr><tr><td>JA1</td><td>P1A (Port A of CN1)</td><td>for PCI-7224/7248/7296, cPCI-7248</td></tr><tr><td>JB1</td><td>P1B (Port B of CN1)</td><td>for PCI-7224/7248/7296, cPCI-7248</td></tr><tr><td>JC1</td><td>P1C (Port C of CN1)</td><td>for PCI-7224/7248/7296, cPCI-7248</td></tr><tr><td>JA2</td><td>P2A (Port A of CN2)</td><td>for PCI-7248/96, cPCI-7248</td></tr><tr><td>JB2</td><td>P2B (Port B of CN2)</td><td>for PCI-7248/96, cPCI-7248</td></tr><tr><td>JC2</td><td>P2C (Port C of CN2)</td><td>for PCI-7248/96, cPCI-7248</td></tr><tr><td>JA3</td><td>P3A (Port A of CN3)</td><td>for PCI-7296</td></tr><tr><td>JB3</td><td>P3B (Port B of CN3)</td><td>for PCI-7296</td></tr><tr><td>JC3</td><td>P3C (Port C of CN3)</td><td>for PCI-7296</td></tr><tr><td>JA4</td><td>P4A (Port A of CN4)</td><td>for PCI-7296</td></tr><tr><td>JB4</td><td>P4B (Port B of CN4)</td><td>for PCI-7296</td></tr><tr><td>JC4</td><td>P4C (Port C of CN4)</td><td>for PCI-7296</td></tr></table>

Table 2.1 Jumpers and Port names list

The physical meaning of all the jumpers are identical. The power on status of each port can be set independently. The default is to pull all signals high. The following diagram use JA1 as an example to show the possible configurations.

1. Port A of CN1 are power-on pulled high. ‘H’

![The image displays the number '1' on the left and the number '2' on the right, separated by a central rectangular graphic. This graphic features a thick black border surrounding a grey inner rectangle, which contains two white circles with black outlines arranged side-by-side.](.cpci-7248-7249r-manual-6/9f925c55fe93775c553649f4f57e4c79c0da390f7a889e6c1c45e4a569c0b6d2.jpg)

JA1

2. Port A of CN1 are power-on pulled low. ‘L’

![The image features the number 1 on the left and the number 2 on the right, flanking a central rectangular graphic. Inside this rectangle are three circles arranged in a horizontal row. The left and right circles are white with black outlines, while the middle circle is solid white.](.cpci-7248-7249r-manual-6/d36024ee9a8801169a19a64df620cd6aef933a5cc2749c05cca123598733c8bf.jpg)

JA1

3. Port A of CN1 are power-on floating. (The jumper is removed)

![The image shows a white background with the number '1' on the left and the number '2' on the right. Centered between these numbers is a rectangular box outlined in black, containing three black-outlined circles arranged in a horizontal row.](.cpci-7248-7249r-manual-6/781bd92fe19647ec7866978e44ad280c281ffc21505586e61518f18e69ddc1b2.jpg)

JA1

# 2.7.2 12V Power Supply Configuration

The pin 2 and pin 4 of the CN1 \~ CN4 50-pin OPTO-22 connectors can be configured as 12V power supply or ground. Please refer to Figure 2.4 for the 12 volts power supply position. JP1\~JP4 of the 12V power are for CN1\~CN4 respectively. Connections with ground are set as default. The following diagram shows the setting of JP2, connecting the pin 2 and pin 4 of CN2 to ground.

$( 1 2 \mathsf { V } ) 1 \big [ \mathsf { O } \big [ \mathsf { O } \mathsf { O } \big ] \big ] 2 ( \mathsf { G r o u n d } ) \mathsf { \Omega } \mathsf { J } \mathsf { P } 2$

# 2.8 Termination Boards Connection

There are many termination boards can connect with PCI-7248/7296 for isolated I/O expansion.

# 1. TB-24R, DIN-24R

The TB-24R and DIN-24R provide 24 Form C relays for digital output control.

![PCI-7296\nPCI-7248\nTB-24R\nor DIN-24R](.cpci-7248-7249r-manual-6/1a9520f394e381dffeb86df85962baabee14da073e710430cb9f8a46121c235b.jpg)

# 2. TB-24 P, DIN-24P

The TB-24P and DIN-24P provide 24 opto-isolated digital input channels.

![PCI-7296\nPCI-7248\nTB-24P\nor DIN-24P](.cpci-7248-7249r-manual-6/472072131dcfd24870573a5f73cc24a21ca98911a3f0ed2a21b4537a29e123ec.jpg)

# 3. TB-16P8R

The TB-16P8R provides 16 opto-isolated digital input channels and 8 relay outputs.

![PCI-7296\nPCI-7248\nTB-16P8R](.cpci-7248-7249r-manual-6/2e2bbdc93ac8607fed71d867863e154e1e9b8d5076ffa0d33874d04c2b58a562.jpg)

# 4. TB-24, DIN-50S

TB-24 and DIN-50S are termination boards with 50 pin ribbon connector. They are used for general-purpose applications.

# 5. DIN-100S

DIN-100S is equipped with 100-pin SCSI-type connector. It can connected with cPCI-7248 and cPCI-7249R.

![3](.cpci-7248-7249r-manual-6/584257f45ca44bdc9f0fff75632187e57eed642c119105e88cdaa79def49f3d6.jpg)

# Registers Format

The detailed descriptions of the registers format are specified in this chapter. This information is quite useful for the programmers who wish to handle the card by low-level programming. However, we suggest user have to understand more about the PCI interface then start any low-level programming. In addition, the contents of this chapter can help users understand how to use software driver to manipulate this card.

# 3.1 PCI PnP Registers

This PCI card functions as a 32-bit PCI target device to any master on the PCI bus. There are three types of registers: PCI Configuration Registers (PCR), Local Configuration Registers (LCR) and PCI-6308 registers.

The PCR, which is compliant to the PCI-bus specifications, is initialized and controlled by the plug & play (PnP) PCI BIOS. User‘s can study the PCI BIOS specification to understand the operation of the PCR. Please contact with PCISIG to acquire the specifications of the PCI interface.

The PCI bus controller PCI-9050 is provided by PLX technology Inc. (www.plxtech.com). For more detailed information of LCR, please visit PLX technology’s web site to download relative information. It is not necessary for users to understand the details of the LCR if you use the software library. The PCI PnP BIOS assigns the base address of the LCR. The assigned address is located at offset 14h of PCR.

The PCI-6308 registers are shown in the next section. The base address, which is also assigned by the PCI PnP BIOS, is located at offset 18h of PCR. Therefore, users can read the 18h of PCR to know the base address by using the BIOS function call.

Please do not try to modify the base address and interrupt which assigned by the PCI PnP BIOS, it may cause resource confliction in your system.

# 3.2 I/O Address Map

All the 724X registers are 8 bits. The users can access these registers only by 8 bits I/O instructions. The following table shows the registers map, including descriptions and their offset addresses relative to the base address. Please refer to the chapter 4 for more detailed operation of every registers.

<table><tr><td>Offset</td><td>Write</td><td colspan="2">Read</td><td>Boards</td></tr><tr><td>0x00</td><td>P1A</td><td colspan="2">P1A</td><td rowspan="4">PCI-7224PCI-7248PCI-7296cPCI-7248/49R</td></tr><tr><td>0x01</td><td>P1B</td><td colspan="2">P1B</td></tr><tr><td>0x02</td><td>P1C</td><td colspan="2">P1C</td></tr><tr><td>0x03</td><td>P1Ctrl</td><td colspan="2">Not used</td></tr><tr><td>0x04</td><td>P2A</td><td colspan="2">P2A</td><td rowspan="4">PCI-7248PCI-7296cPCI-7248/49R</td></tr><tr><td>0x05</td><td>P2B</td><td colspan="2">P2B</td></tr><tr><td>0x06</td><td>P2C</td><td colspan="2">P2C</td></tr><tr><td>0x07</td><td>P2Ctrl</td><td colspan="2">Not used</td></tr><tr><td>0x08</td><td>P3A</td><td>P3A</td><td> $P1AE^{(1)}$ </td><td rowspan="8">PCI-7296 $^{(1)}$ forcPCI-7249ROnly</td></tr><tr><td>0x09</td><td>P3B</td><td>P3B</td><td> $P1BE^{(1)}$ </td></tr><tr><td>0x0A</td><td>P3C</td><td>P3C</td><td> $P1CE^{(1)}$ </td></tr><tr><td>0x0B</td><td>P3Ctrl</td><td>Not used</td><td>Not used</td></tr><tr><td>0x0C</td><td>P4A</td><td>P4A</td><td> $P2AE^{(1)}$ </td></tr><tr><td>0x0D</td><td>P4B</td><td>P4B</td><td> $P2BE^{(1)}$ </td></tr><tr><td>0x0E</td><td>P4C</td><td>P4C</td><td> $P2CE^{(1)}$ </td></tr><tr><td>0x0F</td><td>P4Ctrl</td><td>Not used</td><td>Not used</td></tr><tr><td>0x10</td><td>Timer/Counter #0</td><td colspan="2">Timer/Counter #0</td><td rowspan="6">PCI-7224PCI-7248PCI-7296cPCI-7248/49R</td></tr><tr><td>0x11</td><td>Timer/Counter #1</td><td colspan="2">Timer/Counter #1</td></tr><tr><td>0x12</td><td>Timer/Counter #2</td><td colspan="2">Timer/Counter #2</td></tr><tr><td>0x13</td><td>Timer/Counter Mode Control</td><td colspan="2">Timer/Counter Mode Status</td></tr><tr><td>0x20</td><td>ISC: Interrupt Source Control</td><td colspan="2">Not used</td></tr><tr><td>0x30</td><td>Clear Interrupt</td><td colspan="2">Not used</td></tr></table>

![4](.cpci-7248-7249r-manual-6/832440a7f49be9fb469d87ad9f6a58f0d8c3722b742799c32b1291f3f000277c.jpg)

# Operation Theorem

# 4.1 Digital I/O Ports

# 4.1.1 Introduction

The 7248/96 products can emulate one/two/four mode 0 configuration of 8255 programmable peripheral interface (PPI) chips. There are 24 DIO signals for every PPI.

# 4.1.2 8255 Mode 0

The basic functions of 8255 mode 0 are:

z Two 8-bit I/O ports−−port A (PA) and port B (PB)
z Two nibble-wide (4-bit) ports C−−PC upper and PC lower
z Each port can be used as either input or output
z Outputs are latched whereas inputs are buffered
z 16 different input/output configurations are available

# 4.1.3 Special Function of the DIO Signals

Two I/O signals (PC0 and PC3) of CN1 and CN2 can be used to generate hardware interrupt. Refer to section 4.3 for details about the interrupt control. In addition, the P1C4 signals can be used as input signal of event counter.

# 4.1.4 Digital I/O Port Programming

Users can write the digital output value to or read back the digital signal level from the PPI ports by using the software library. Here we define the port name in Table 4.1. These port names are used both in software library and all through this manual. The programming for PCI-7224/7248/7296 and cPCI-7248 are fully compatible.

<table><tr><td>Connector Numbers</td><td>CN1</td><td>CN2</td><td>CN3</td><td>CN4</td></tr><tr><td rowspan="4">Port Names</td><td>P1A</td><td>P2A</td><td>P3A</td><td>P4A</td></tr><tr><td>P1B</td><td>P2B</td><td>P3B</td><td>P4B</td></tr><tr><td>P1C</td><td>P2C</td><td>P3C</td><td>P4C</td></tr><tr><td>P1CTRL</td><td>P2CTRL</td><td>P3CTRL</td><td>P4CTRL</td></tr></table>

Table 4.1 I/O Port Names

There are four ports on every 8255 PPI, including port A,B,C and the control port. PA, PB and PC could be written or read but the control port is write only. Refer to chapter 5 for details about programming of DIO ports.

# 4.1.5 Control Word

The control word written in the control port is used to setup PA, PB and PC as input or output port. Figure 4.1 shows the format of the control word. Table 4.2 shows the 16 possible control words and the respective I/O configurations .

D7 D6 D5 D4 D3 D2 D1 D0

![The diagram consists of a rectangular block at the top divided into 8 cells containing the sequence 'X X X ? ? X ? ?'. Lines connect specific cells to text labels on the right side:\n\n*   From the fourth cell ('?'): A line connects to '1/0 : Input/Output of Port A'.\n*   From the fifth cell ('?'): A line connects to '1/0 : Input/Output of Port C high nibble'.\n*   From the sixth cell ('X'): A line connects to '1/0 : Input/Output of Port B'.\n*   From the seventh cell ('?'): A line connects to '1/0 : Input/Output of Port C low nibble'.\n\nAt the bottom, the text 'X : don't care' is displayed.](.cpci-7248-7249r-manual-6/712c99a4d15dbf3b08a515ab081e4c021633f35297746df00956bf375340bc91.jpg)

Figure 4.1 Control Word Format

<table><tr><td>Control Word</td><td>D 4</td><td>D 3</td><td>D 1</td><td>D 0</td><td>PORT A</td><td>PORT C UPPER</td><td>PORT B</td><td>PORT C LOWER</td></tr><tr><td>00H</td><td>0</td><td>0</td><td>0</td><td>0</td><td>O/P</td><td>O/P</td><td>O/P</td><td>O/P</td></tr><tr><td>01H</td><td>0</td><td>0</td><td>0</td><td>1</td><td>O/P</td><td>O/P</td><td>O/P</td><td>I/P</td></tr><tr><td>02H</td><td>0</td><td>0</td><td>1</td><td>0</td><td>O/P</td><td>O/P</td><td>I/P</td><td>O/P</td></tr><tr><td>03H</td><td>0</td><td>0</td><td>1</td><td>1</td><td>O/P</td><td>O/P</td><td>I/P</td><td>I/P</td></tr><tr><td>08H</td><td>0</td><td>1</td><td>0</td><td>0</td><td>O/P</td><td>I/P</td><td>O/P</td><td>O/P</td></tr><tr><td>09H</td><td>0</td><td>1</td><td>0</td><td>1</td><td>O/P</td><td>I/P</td><td>O/P</td><td>I/P</td></tr><tr><td>0AH</td><td>0</td><td>1</td><td>1</td><td>0</td><td>O/P</td><td>I/P</td><td>I/P</td><td>O/P</td></tr><tr><td>0BH</td><td>0</td><td>1</td><td>1</td><td>1</td><td>O/P</td><td>I/P</td><td>I/P</td><td>I/P</td></tr><tr><td>10H</td><td>1</td><td>0</td><td>0</td><td>0</td><td>I/P</td><td>O/P</td><td>O/P</td><td>O/P</td></tr><tr><td>11H</td><td>1</td><td>0</td><td>0</td><td>1</td><td>I/P</td><td>O/P</td><td>O/P</td><td>I/P</td></tr><tr><td>12H</td><td>1</td><td>0</td><td>1</td><td>0</td><td>I/P</td><td>O/P</td><td>I/P</td><td>O/P</td></tr><tr><td>13H</td><td>1</td><td>0</td><td>1</td><td>1</td><td>I/P</td><td>O/P</td><td>I/P</td><td>I/P</td></tr><tr><td>18H</td><td>1</td><td>1</td><td>0</td><td>0</td><td>I/P</td><td>I/P</td><td>O/P</td><td>O/P</td></tr><tr><td>19H</td><td>1</td><td>1</td><td>0</td><td>1</td><td>I/P</td><td>I/P</td><td>O/P</td><td>I/P</td></tr><tr><td>1AH</td><td>1</td><td>1</td><td>1</td><td>0</td><td>I/P</td><td>I/P</td><td>I/P</td><td>O/P</td></tr><tr><td>1BH*</td><td>1</td><td>1</td><td>1</td><td>1</td><td>I/P</td><td>I/P</td><td>I/P</td><td>I/P</td></tr></table>

Table 4.2 Summary of control word (D0 - D4)

(\* power on default configuration)

# 4.1.6 Power on Configuration

The default configuration after power on, hardware reset or software reset sets all ports as input ports, therefore the users don’t have to worry about damaging the external devices when system is power on. In addition, the default signal level can be pulled high or pulled low by setting the jumpers. Refer to section 2.7 for setting the power on status of the DIO ports.

# 4.1.7 Note for Output Data

Be careful of the initial condition of digital output signals. If users set the control word as output port after power on, the previous uncertain output value will be put on the output pins immediately. Therefore, BE SURE TO WRITE A SAFE VALUE TO THE PORTS BEFORE CONFIGURING THEM AS OUTPUT PORTS.

# 4.1.8 Note for cPCI-7249R

The PIAE, P1BE, P1CE and P2AE, P2BE, P2CE registers are latched data from P1A, P1B, P1C and P2A, P2B, P2C respectively. The latch signal is from the Pin #99 of the 100-pin connector.

# 4.2 Timer/Counter Operation

# 4.2.1 Introduction

One 8254 programmable timer/counter chip is installed in 7248/96 series. There are three counters in one 8254 chip and 6 possible operation modes for each counter. The block diagram of the timer /counter system is shown in Figure 4.2.

![Flowchart](.cpci-7248-7249r-manual-6/0560770a37589ccec7a447ee00e2e7c091dde4137de79990691a59a1cddb2bf6.jpg)

Figure 4.2 Timer/counter system of 7248/96 series.

The timer #1 and timer #2 of the 8254 chip are cascaded as a 32-bit programmable timer. In software library, the timer #1 and #2 are always set as mode 2 (rate generator).

In software library, the counter #0 is used as an event counter, that is, interrupt on terminal count of 8254 mode 0 . Please refer to chapter 5 for programming the timer/counter functions.

# 4.2.2 General Purpose Timer/Counter

The counter 0 is a general purpose timer/counter for users applications. It can be used as an event counter, or used for measuring frequency, or other functions. The following Mode are provided by the 82C54 chip.

z Mode 0: Interrupt on Terminal Count
z Mode 1: Programmable One-Shot.
z Mode 2: Rate Generator.
z Mode 3: Square Wave Rate Generator.
z Mode 4: Software Triggered Strobe.
z Mode 5: Hardware Triggered Strobe.

The 8254 timer/ counter IC occupies 4 I/O address. Users can refer to Tundra's or Intel's data sheet for a full description of the 8254 features. You can download the 8254 data sheet from the following web site:

http://support.intel.com/support/controllers/peripheral/231164.htm

or

http://www.tundra.com (for Tundra’s 82C54 datasheet.)

# 4.2.2 Cascaded 32 Bits Timer

The input clock frequency of the cascaded timers is 2MHz. The output of the timer is send to the interrupt circuit (refer to section 4.3). Therefore, the maximum and minimum watchdog timer interrupt frequency is (2MHz)/(2\*2)=500KHz and (2MHz)/(65535\*65535)= 0.000466Hz respectively.

# 4.2.3 Event Counter and Edge Control

The counter #0 of the 8254 chip can be used as an event counter. The input of counter #0 is PC4 of CN1 (P1C4). The counter clock trigger direction (H to L or L to H) is programmable. The gate control is always enabled. The output is send to interrupt system which named as event IRQ. If counter #0 is set as 8254 mode 0, the event counter IRQ will generate when the counter value is counting down to zero.

# 4.3 Interrupt Multiplexing

# 4.3.1 Architecture

The 7248/96 series products have a powerful and flexible interrupt multiplexing circuit which is suitable for many applications. The board could accept Dual Interrupts. The dual interrupt means that the hardware can generate two interrupt request signals at the same time and the software can service these two request signals by ISR. Note that the dual interrupts do not mean that the card occupies two IRQ levels.

The two interrupt request signals (INT1 and INT2) comes from digital input signals or the timer/counter output. An interrupt source multiplexer (MUX) is used to select the IRQ sources. Fig 4.3 shows the interrupt system.

# 4.3.2 IRQ Level Setting

There is only one IRQ level requested by this card, although it is a dual interrupt system. The mother board circuits will transfer INTA# to one of the PC IRQ levels. The IRQ level is set by the PCI plug and play BIOS and saved in the PCI controller. Users can get the IRQ level setting by software library.

![This block diagram illustrates the connections between four main blocks: **PCI Controller**, **IRQ Flip-Flops**, **INT1 MUX**, and **INT2 MUX**.\n\n**Inputs to the Multiplexers:**\n*   **INT1 MUX** receives inputs labeled **P1C0**, **~P1C0 & P1C3**, and **Event Counter**.\n*   **INT2 MUX** receives inputs labeled **P2C0 (*)**, **~P2C0 & P2C3 (*)**, and **Timer IRQ**.\n\n**Connections between Blocks:**\n*   The outputs from both the **INT1 MUX** and **INT2 MUX** connect to the **IRQ Flip-Flops** block.\n*   The **IRQ Flip-Flops** block receives an input labeled **Clear IRQ** at its bottom.\n*   The **IRQ Flip-Flops** block sends two signals to the **PCI Controller**: **INT1** (top connection) and **INT2** (bottom connection).\n*   The **PCI Controller** has an output labeled **INTA#** pointing to the left.](.cpci-7248-7249r-manual-6/ed5bb45f9a63f153275bbae881d6bde3ae9e0df8750107cacf03b00c6474535d.jpg)

Fig 4.3 Dual Interrupt System of PCI-7224/7248/96
(\*) Note: This interrupt is not available in PCI-7224

# 4.3.3 Note for Dual Interrupts

The PCI controller of PCI-7224/7248/96 can receive two hardware IRQ sources. However, a PCI controller can generate only one IRQ to PCI bus, the two IRQ sources must be distinguished by ISR of the application software if the two IRQ are all used.

The application software can use the “\_72xx\_Get\_Irq\_Status” function to distinguish which interrupt is inserted. After an ISR completed, users must check if another IRQ is also asserted, then clear current IRQ to allow the next IRQ coming in.

The two IRQs are named as INT1 and INT2. In PCI-7224/7248/7296, INT1 comes from P1C0, P1C3 or the event counter interrupt. INT2 comes from P2C0, P2C3 or the timer interrupt. However in PCI-7224, INT2 only comes from timer interrupt. The sources of INT1 and INT2 is selectable by the Interrupt Source Control (ISC) Register.

# 4.3.4 Interrupt Source Control

In ISC register (offset 0x20), there are four bits to control the IRQ sources of INT1 and INT2.

If the application need only one IRQ, you can disable one of the IRQ sources by software. If your application do not need any IRQ source, you can disable both interrupts. However, the PCI BIOS still assign a IRQ level to the PCI card and occupy the PC resource, if you only disable the IRQ sources without change the initial condition of the PCI controller.

It is not recommended to change the initial condition of the PCI card by users‘ own application software. If users want to disable the IRQ level, user can use the ADLINK’s utility ‘INIT7248.EXE’ or ‘INIT7296.EXE’ to change power on interrupt setting.

The table 4.3 shows the register format of the ISC (address offset 0x20). This register is write only. The 4 LSBs are used to control the source of INT1 and INT2.

<table><tr><td>INT1</td><td>D3</td><td>D2</td><td>D1</td><td>D0</td><td>IRQ Sources</td><td>IRQ Trigger Condition</td></tr><tr><td>Disable</td><td>X</td><td>X</td><td>0</td><td>0</td><td>INT1 disable</td><td>--</td></tr><tr><td>Mode 1</td><td>X</td><td>X</td><td>0</td><td>1</td><td>~P1C0</td><td>falling edge of P1C0</td></tr><tr><td>Mode 2</td><td>X</td><td>X</td><td>1</td><td>0</td><td>P1C0 OR ~P1C3</td><td>(see following)</td></tr><tr><td>Mode 3</td><td>X</td><td>X</td><td>1</td><td>1</td><td>Event Counter</td><td>Counter count down to 0</td></tr><tr><td>INT2</td><td>D3</td><td>D2</td><td>D1</td><td>D0</td><td>IRQ Sources</td><td>IRQ Trigger Condition</td></tr><tr><td>Disable</td><td>0</td><td>0</td><td>X</td><td>X</td><td>INT2 disable</td><td>--</td></tr><tr><td>Mode 1</td><td>0</td><td>1</td><td>X</td><td>X</td><td>~P2C0</td><td>falling edge of P2C0(*)</td></tr><tr><td>Mode 2</td><td>1</td><td>0</td><td>X</td><td>X</td><td>P2C0 OR ~P2C3</td><td>(see following) (*)</td></tr><tr><td>Mode 3</td><td>1</td><td>1</td><td>X</td><td>X</td><td>Timer Output</td><td>Timer count down to 0</td></tr></table>

Table 4.3 ISC register format

(\*) Note: Not available on PCI-7224.

Then the IRQ sources is set as “P1C0 OR \~P1C3”, the IRQ trigger conditions are summarized in table 4.4.

<table><tr><td>P1/2C0</td><td>P1/2C3</td><td>IRQ Trigger Condition</td></tr><tr><td>High</td><td>X</td><td>PC0=&#x27;H&#x27; disable all IRQ</td></tr><tr><td>X</td><td>Low</td><td>PC3=&#x27;L&#x27; disable all IRQ</td></tr><tr><td>Low</td><td>1-&gt;0</td><td>PC3 falling edge trigger when PC0=L</td></tr><tr><td>0-&gt;1</td><td>High</td><td>PC0 rising edge trigger when PC3=H</td></tr></table>

Table 4.4 IRQ Trigger conditions

Because the P1/P2C0 and P1/P2C3 are external signals, the users can utilize the combination of the four signals to generate a proper IRQ.

# 4.4 12V and 5V Power Supply

The OPTO-22 compatible connectors provide external devices the +12 volts and +5 volts power supply. To avoid short or overload of the power supply, the resetable fuses are added on all the output power. Refer to Figure 2.6.1

The maximum current for 5 volts on every connector is 0.5 A. If the load current is larger than 0.5 A, the resistance of resetable fuse will increase because of the rising temperature. The rising resistance will cause the power supply drop and reduce current. If the overload or short condition is removed, the fuse will get to normal condition. It is not necessary to repair or re-install the fuse.

The maximum current of 12 volts for all the four connectors is also 0.5 A. The action of the fuse is the same as which used for +5V power. The limitation is more restrictive than 5V power supply because the PCI bus can not provide large current.

![5](.cpci-7248-7249r-manual-6/a47a8ede9acc6afa8a11b3ec5f81e86bc8db229fe5fdba581c9a283365c485b8.jpg)

# C/C++ Libraries

This chapter describes the software library for operating these card. Only the functions in DOS library and Windows 95 DLL are described. Please refer to the PCIS-DASK function reference manual, which included in ADLINK CD, for the descriptions of the Windows 98/NT/2000 DLL functions. The functions of PCI-7248 can also be applied to PCI-7224 and cPCI-7248. Therefore, in the following section, there is no special functions for PCI-7224 and cPCI-7248. The software driver of PCI-7224 is fully compatible with that of PCI-7248. In the following sections, each function call which has a name associated with “7248” could be applied to PCI-7224 directly

The function prototypes and some useful constants are defined in the header files LIB directory (DOS) and INCLUDE directory (Windows 95). For Windows 95 DLL, the developing environment can be Visual Basic 4.0 or above, Visual C/C++ 4.0 or above, Borland C++ 5.0 or above, Borland Delphi 2.x (32-bit) or above, or any Windows programming language that allows calls to a DLL. It provides the C/C++, VB, and Delphi include files.

# 5.1 Libraries Installation

Please refer to the “Software Installation Guide” for the detail information about how to install the software libraries for DOS, or Windows 95 DLL, or PCIS-DASK for Windows 98/NT/2000.

The device drivers and DLL functions of Windows 98/NT/2000 are included in the PCIS-DASK. Please refer the PCIS-DASK user’s guide and function reference, which included in the ADLINK CD, for detailed programming information.

# 5.2 Programming Guide

# 5.2.1 Naming Convention

The functions of the NuDAQ PCI cards or NuIPC CompactPCI cards’ software driver are using full-names to represent the functions' real meaning. The naming convention rules are:

In DOS Environment:

\_{hardware\_model}\_{action\_name}. e.g. \_7248\_Initial().

All functions in PCI-7248 driver are with 7248 as {hardware\_model}. But they can be used by PCI-7248, PCI-7224 and cPCI-7248.

In order to recognize the difference between DOS library and Windows 95 library, a capital "W" is put on the head of each function name of the Windows 95 DLL driver. e.g. W\_7248\_Initial().

# 5.2.2 Data Types

We defined some data type in Pci\_7248.h (DOS) and Acl\_pci.h (Windows 95). These data types are used by NuDAQ Cards’ library. We suggest you to use these data types in your application programs. The following table shows the data type names and their range.

<table><tr><td>Type Name</td><td>Description</td><td>Range</td></tr><tr><td>U8</td><td>8-bit ASCII character</td><td>0 to 255</td></tr><tr><td>I16</td><td>16-bit signed integer</td><td>-32768 to 32767</td></tr><tr><td>U16</td><td>16-bit unsigned integer</td><td>0 to 65535</td></tr><tr><td>I32</td><td>32-bit signed integer</td><td>-2147483648 to 2147483647</td></tr><tr><td>U32</td><td>32-bit single-precision floating-point</td><td>0 to 4294967295</td></tr><tr><td>F32</td><td>32-bit single-precision floating-point</td><td>-3.402823E38 to 3.402823E38</td></tr><tr><td>F64</td><td>64-bit double-precision floating-point</td><td>-1.797683134862315E308 to 1.797683134862315E309</td></tr><tr><td>Boolean</td><td>Boolean logic value</td><td>TRUE, FALSE</td></tr></table>

# 5.3 \_7248/96\_Initial

# @ Description

The cards are initialized by this function. The software library could be used to control multiple cards.

# @ Syntax

```c
C/C++ (DOS)
U16 _7248_Initial (U16 *existCards, PCI_INFO *pciInfo)
U16 _7249_Initial (U16 *existCards, PCI_INFO *pciInfo)
U16 _7296_Initial (U16 *existCards, PCI_INFO *pciInfo)
```

C/C++ (Windows 95)
```txt
U16 W_7248_Initial (U16 *existCards, PCI_INFO *pciInfo)
U16 W_7249_Initial (U16 *existCards, PCI_INFO *pciInfo)
U16 W_7296_Initial (U16 *existCards, PCI_INFO *pciInfo)
```

Visual Basic (Windows 95)
```csv
W_7248_Initial (existCards As Integer, pciInfo As PCI_INFO) As Integer
W_7249_Initial (existCards As Integer, pciInfo As PCI_INFO) As Integer
W_7296_Initial (existCards As Integer, pciInfo As PCI_INFO) As Integer
```

# @ Argument

existCards: The numbers of installed PCI-7224/7248/7296 cards. The returned value shows how many PCI-7224/7248/7296 cards are installed in your system.

pciinfo: It is a structure to record the PCI bus plug and play initiallization information which is decided by p&p BIOS. The PCI\_INFO structure is defined in ACL\_PCI.H The base I/O address and the interrupt channel number are stored in pciinfo.

# @ Return Code

```txt
ERR_NoError
ERR_PCIBiosNotExist
```

# 5.4 Digital Input

# @ Description

This function is used to read 8-bit digital input data from digital input ports. You can get the 8-bit data from \_7248\_DI by using this function. The written data and read in data is 8-bit data. Each data is mapped to a signal as the table below.

<table><tr><td>D7</td><td>D6</td><td>D5</td><td>D4</td><td>D3</td><td>D2</td><td>D1</td><td>D0</td></tr><tr><td>PA7</td><td>PA6</td><td>PA5</td><td>PA4</td><td>PA3</td><td>PA2</td><td>PA1</td><td>PA0</td></tr><tr><td>PB7</td><td>PB6</td><td>PB5</td><td>PB4</td><td>PB3</td><td>PB2</td><td>PB1</td><td>PB0</td></tr><tr><td>PC7</td><td>PC6</td><td>PC5</td><td>PC4</td><td>PC3</td><td>PC2</td><td>PC1</td><td>PC0</td></tr></table>

# @ Syntax

PCI-7224/7248, cPCI-7248, cPCI-7249R:

C/C++ (DOS)

```txt
U16 _7248_DI (U16 cardNo, U16 channelPort, U8 *diData)
U16 _7249_DI (U16 cardNo, U16 channelPort, U8 *diData)
U16 _7296_DI (U16 cardNo, U16 channelPort, U8 *diData)
```

C/C++ (Windows 95)

```csv
U16 W_7248_DI (U16 cardNo, U16 channelPort, U16 *diData)
U16 W_7249_DI (U16 cardNo, U16 channelPort, U16 *diData)
U16 W_7296_DI (U16 cardNo, U16 channelPort, U16 *diData)
```

Visual Basic (Windows 95)

```txt
W_7248_DI (ByVal cardNo As Integer, ByVal channelPort As Integer, diData As Integer) As Integer
W_7249_DI (ByVal cardNo As Integer, ByVal channelPort As Integer, diData As Integer) As Integer
W_7296_DI (ByVal cardNo As Integer, ByVal channelPort As Integer, diData As Integer) As Integer
```

# @ Argument

```yaml
cardNo: card number to select board
diData: return 8-bit value from digital port.
channelPort: port of each channel
PCI_CH0_PA: CH1's Port A
PCI_CH0_PB: CH1's Port B
PCI_CH0_PC: CH1's Port C
PCI_CH0_PCU: CH1's Port C Upper Nibble
PCI_CH0_PCL: CH1's Port C Low Nibble
PCI_CH1_PA: CH2's Port A
PCI_CH1_PB: CH2's Port B
PCI_CH1_PC: CH2's Port C
PCI_CH1_PCU: CH2's Port C Upper Nibble
PCI_CH1_PCL: CH2's Port C Low Nibble
PCI_CH2_PA: CH2's Port A
PCI_CH2_PB: CH2's Port B
PCI_CH2_PC: CH2's Port C
```

```txt
PCI_CH2_PCU: CH2's Port C Upper Nibble
PCI_CH2_PCL: CH2's Port C Low Nibble
PCI_CH3_PA: CH3's Port A
PCI_CH3_PB: CH3's Port B
PCI_CH3_PC: CH3's Port C
PCI_CH3_PCU: CH3's Port C Upper Nibble
PCI_CH3_PCL: CH3's Port C Low Nibble
PCI_CH0_PAE: CH1's Port A uses External Latch
PCI_CH0_PBE: CH1's Port B uses External Latch
PCI_CH0_PCE: CH1's Port C uses External Latch
PCI_CH1_PAE: CH2's Port A uses External Latch
PCI_CH1_PBE: CH2's Port B uses External Latch
PCI_CH1_PCE: CH2's Port C uses External Latch
```

Note: 1.CH2 and CH3 are only available for PCI-7296.

2.Only CH0 is available for PCI-7224.

# @ Return Code

ERR\_NoError

# 5.5 Digital Output

# @ Description

This function is used to write data to digital output ports.

# @ Syntax

```csv
C/C++ (DOS)
U16 _7248_DO (U16 cardNo, U16 channelPort, U8 doData)
U16 _7249_DO (U16 cardNo, U16 channelPort, U8 doData)
U16 _7296_DO (U16 cardNo, U16 channelPort, U8 doData)
```

# C/C++ (Windows 95)

```txt
U16 W_7248_DO (U16 cardNo, U16 channelPort, U16 doData)
U16 W_7249_DO (U16 cardNo, U16 channelPort, U16 doData)
U16 W_7296_DO (U16 cardNo, U16 channelPort, U16 doData)
```

# Visual Basic (Windows 95)

```csv
W_7248_DO (ByVal cardNo As Integer, ByVal channelPort As Integer, ByVal doData As Integer) As Integer
W_7249_DO (ByVal cardNo As Integer, ByVal channelPort As Integer, ByVal doData As Integer) As Integer
W_7296_DO (ByVal cardNo As Integer, ByVal channelPort As Integer, ByVal doData As Integer) As Integer
```

# @ Argument

```txt
cardNo: card number to select board
channelPort: The same as channelPort in section 5.5.
doData: value will be written to digital output port
```

# @ Return Code

```txt
ERR_NoError
```

# 5.6 Configuration Port

# @ Description

This function is used to configure the Input or Output of each Port. Each I/O Port of PCI-7224/7248/7296 is either input or output, so it has to configure as input or output before I/O operations are applied.

# @ Syntax

C/C++ (DOS)
```txt
U16 _7248_Config_Port (U16 cardNo, U16 channelPort, U16 direction);
U16 _7249_Config_Port (U16 cardNo, U16 channelPort, U16 direction);
U16 _7296_Config_Port (U16 cardNo, U16 channelPort, U16 direction)
```

C/C++ (Windows 95)
```txt
U16 W_7248_Config_Port (U16 cardNo, U16 channelPort, U16 direction);
U16 W_7249_Config_Port (U16 cardNo, U16 channelPort, U16 direction);
U16 W_7296_Config_Port (U16 cardNo, U16 channelPort, U16 direction)
```

Visual Basic (Windows 95)
```txt
W_7248_Config_Port (ByVal cardNo As Integer, ByVal channelPort As Integer, ByVal direction As Integer) As Integer
W_7249_Config_Port (ByVal cardNo As Integer, ByVal channelPort As Integer, ByVal direction As Integer) As Integer
W_7296_Config_Port (ByVal cardNo As Integer, ByVal channelPort As Integer, ByVal direction As Integer) As Integer
```

# @ Argument

```txt
cardNo: card number to select board
channelPort: The same as channelPort in section 5.5.
direction: port I/O direction
INPUT_PORT: the port is configure as INPUT
OUTPUT_PORT: the port is configure as OUTPUT
```

# @ Return Code

```txt
ERR_NoError
```

# 5.7 Configuration Channel

# @ Description

This function is used to configure the Input or Output of each Channel. Each I/O Port of PCI-7224/7248/7296 is either input or output, so it has to configure as input or output before I/O operations are applied.

# @ Syntax

C/C++ (DOS)
```txt
U16 _7248_Config_Channel (U16 cardNo, U16 channelNo, U16 ctrlValue)
U16 _7249_Config_Channel (U16 cardNo, U16 channelNo, U16 ctrlValue)
U16 _7296_Config_Channel (U16 cardNo, U16 channelNo, U16 ctrlValue)
```

C/C++ (Windows 95)
```csv
U16 W_7248_Config_Channel (U16 cardNo, U16 channelNo, U16 ctrlValue)
U16 W_7249_Config_Channel (U16 cardNo, U16 channelNo, U16 ctrlValue)
U16 W_7296_Config_Channel (U16 cardNo, U16 channelNo, U16 ctrlValue)
```

Visual Basic (Windows 95)
```txt
W_7248_Config_Channel (ByVal cardNo As Integer, ByVal channelNo As Integer, ByVal ctrlValue As Integer) As Integer
W_7249_Config_Channel (ByVal cardNo As Integer, ByVal channelNo As Integer, ByVal ctrlValue As Integer) As Integer
W_7296_Config_Channel (ByVal cardNo As Integer, ByVal channelNo As Integer, ByVal ctrlValue As Integer) As Integer
```

# @ Argument

```txt
cardNo: card number to select board
channelNo: PCI_CH0, PCI_CH1, PCI_CH2, or PCI_CH3
ctrlValue: the control value to set up PA, PB, and PC as input or output port.
```

<table><tr><td>ctrlValue</td><td>Port A</td><td>Port CU</td><td>Port B</td><td>Port CL</td></tr><tr><td>PORT OOOO</td><td>OUT</td><td>OUT</td><td>OUT</td><td>OUT</td></tr><tr><td>PORT OOOI</td><td>OUT</td><td>OUT</td><td>OUT</td><td>IN</td></tr><tr><td>PORT OOIO</td><td>OUT</td><td>OUT</td><td>IN</td><td>OUT</td></tr><tr><td>PORT OOII</td><td>OUT</td><td>OUT</td><td>IN</td><td>IN</td></tr><tr><td>PORT OIOO</td><td>OUT</td><td>IN</td><td>OUT</td><td>OUT</td></tr><tr><td>PORT OIOI</td><td>OUT</td><td>IN</td><td>OUT</td><td>IN</td></tr><tr><td>PORT OIIO</td><td>OUT</td><td>IN</td><td>IN</td><td>OUT</td></tr><tr><td>PORT OIII</td><td>OUT</td><td>IN</td><td>IN</td><td>IN</td></tr><tr><td>PORT IOOO</td><td>IN</td><td>OUT</td><td>OUT</td><td>OUT</td></tr><tr><td>PORT IOOI</td><td>IN</td><td>OUT</td><td>OUT</td><td>IN</td></tr><tr><td>PORT IOIO</td><td>IN</td><td>OUT</td><td>IN</td><td>OUT</td></tr><tr><td>PORT IOII</td><td>IN</td><td>OUT</td><td>IN</td><td>IN</td></tr><tr><td>PORT IIOO</td><td>IN</td><td>IN</td><td>OUT</td><td>OUT</td></tr><tr><td>PORT IIOI</td><td>IN</td><td>IN</td><td>OUT</td><td>IN</td></tr><tr><td>PORT IIIIO</td><td>IN</td><td>IN</td><td>IN</td><td>OUT</td></tr><tr><td>PORT IIII</td><td>IN</td><td>IN</td><td>IN</td><td>IN</td></tr></table>

The ctrlValue constants are defined in acl\_pci.h and acl\_pci.bas.

@ Return Code

ERR\_NoError

# 5.8 Set Interrupt Control

# @ Description

This function is used to set the interrupt configuration. The interrupt should be configured before the function starts.

# @ Syntax

```c
C/C++ (DOS)
void _7248_Set_INT_Control(U16 cardNo, U16 ctrlValue);
void _7249_Set_INT_Control(U16 cardNo, U16 ctrlValue);
void _7296_Set_INT_Control(U16 cardNo, U16 ctrlValue);
```

# C/C++ (Windows 95)

```c
void W_7248_Set_INT_Control(U16 cardNo, U16 ctrlValue);
void W_7249_Set_INT_Control(U16 cardNo, U16 ctrlValue);
void W_7296_Set_INT_Control(U16 cardNo, U16 ctrlValue);
```

# Visual Basic (Windows 95)

```txt
W_7248_Set_INT_Control (ByVal cardNo As Integer, ByVal ctrlValue As Integer)
W_7249_Set_INT_Control (ByVal cardNo As Integer, ByVal ctrlValue As Integer)
W_7296_Set_INT_Control (ByVal cardNo As Integer, ByVal ctrlValue As Integer)
```

# @ Argument

```txt
cardNo: card number to select board
ctrlValue: the valid values of configuring the interrupt are
```

# INT1:

```csv
0x00 → disable
0x01 → mode1
0x02 → mode2
0x03 → mode3
```

# INT2:

```txt
0x00 → disable
0x04 → mode1
0x08 → mode2
0x0c → mode3
```

Please refer to the section 4.3.4 for detailed description.

# 5.9 Timer Start

# @ Description

This function is used to set and start the timer0 of the on-board timer 8254 .

# @ Syntax

C/C++ (DOS)
```c
void _7248_Timer_Start(U16 cardNo, U16 timer0Mode, U16 c0)
void _7249_Timer_Start(U16 cardNo, U16 timer0Mode, U16 c0)
void _7296_Timer_Start(U16 cardNo, U16 timer0Mode, U16 c0)
```

C/C++ (Windows 95)
```txt
void W_7248_Timer_Start(U16 cardNo, U16 timer0Mode, U16 c0)
void W_7249_Timer_Start(U16 cardNo, U16 timer0Mode, U16 c0)
void W_7296_Timer_Start(U16 cardNo, U16 timer0Mode, U16 c0)
```

Visual Basic (Windows 95)
```c
W_7248_Timer_Start(ByVal cardNo As Integer, ByVal
timer0Mode As Integer, ByVal c0 As Integer)
W_7249_Timer_Start(ByVal cardNo As Integer, ByVal
timer0Mode As Integer, ByVal c0 As Integer)
W_7296_Timer_Start(ByVal cardNo As Integer, ByVal
timer0Mode As Integer, ByVal c0 As Integer);
```

# @ Argument

```txt
cardNo: card number to select board
timer0Mode: the six modes of 8254, please refer to section 4.2.2 for detailed description
c0: the counter/timer value of time0.
```

# 5.10 Timer Read

# @ Description

This function is used to read the current count of the timer0 of the onboard timer 8254 .

# @ Syntax

PCI-7224/7248, CPCI-7248:

```c
C/C++ (DOS)
void _7248_Timer_Read(U16 cardNo, U16 *counterValue);
void _7249_Timer_Read(U16 cardNo, U16 *counterValue);
void _7296_Timer_Read(U16 cardNo, U16 *counterValue);
```

# C/C++ (Windows 95)

```c
void W_7248_Timer_Read(U16 cardNo, U16 *counterValue);
void W_7249_Timer_Read(U16 cardNo, U16 *counterValue);
void W_7296_Timer_Read(U16 cardNo, U16 *counterValue);
```

# Visual Basic (Windows 95)

```c
W_7248_Timer_Read(ByVal cardNo As Integer, counterValue As Integer);
W_7249_Timer_Read(ByVal cardNo As Integer, counterValue As Integer);
W_7296_Timer_Read(ByVal cardNo As Integer, counterValue As Integer);
```

# @ Argument

```txt
cardNo: card number to select board
counterValue: the value of the current count
```

# 5.11 Timer Stop

# @ Description

This function is used to stop the timer0 of the on-board timer 8254 .

# @ Syntax

```c
C/C++ (DOS)
void _7248_Timer_Stop(U16 cardNo, U16 *counterValue);
void _7249_Timer_Stop(U16 cardNo, U16 *counterValue);
void _7296_Timer_Stop(U16 cardNo, U16 *counterValue);
```

C/C++ (Windows 95)
```c
void W_7248_Timer_Stop(U16 cardNo, U16 *counterValue);
void W_7249_Timer_Stop(U16 cardNo, U16 *counterValue);
void W_7296_Timer_Stop(U16 cardNo, U16 *counterValue);
```

Visual Basic (Windows 95)
```c
W_7248_Timer_Stop (ByVal cardNo As Integer, counterValue As Integer);
W_7249_Timer_Stop (ByVal cardNo As Integer, counterValue As Integer);
W_7296_Timer_Stop (ByVal cardNo As Integer, counterValue As Integer);
```

# @ Argument

```txt
cardNo: card number to select board
counterValue: the value of current count when the counter is stopped
```

# 5.12 Cascaded Timer

# @ Description

This function is used to set and start the cascaded timer1 and timer 2 of the on- board timer 8254 .

# @ Syntax

```c
C/C++ (DOS)
void _7248_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
void _7249_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
void _7296_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
```

# C/C++ (Windows 95)

```c
void W_7248_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
void W_7249_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
void W_7296_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
```

# Visual Basic (Windows 95)

```txt
W_7248_Cascaded_Timer (ByVal cardNo As Integer, ByVal c1 As Integer, ByVal c2 As Integer)
W_7249_Cascaded_Timer (ByVal cardNo As Integer, ByVal c1 As Integer, ByVal c2 As Integer)
W_7296_Cascaded_Timer (ByVal cardNo As Integer, ByVal c1 As Integer, ByVal c2 As Integer)
```

# @ Argument

```txt
cardNo: card number to select board
c1: the value of divisor used in timer 1
c2: the value of divisor used in timer 2
```

# 5.13 Get IRQ Status

# @ Description

This function is used to read back the status of interrupt when interrupt is inserted.

# @ Syntax

C/C++ (DOS)
```c
void _7248_Get_IRQ_Status(U16 cardNo, U16 *int1Status, U16 *int2Status);
void _7249_Get_IRQ_Status(U16 cardNo, U16 *int1Status, U16 *int2Status);
void _7296_Get_IRQ_Status(U16 cardNo, U16 *int1Status, U16 *int2Status);
```

C/C++ (Windows 95)
```c
void W_7248_Get_IRQ_Status(U16 cardNo, U16 *int1Status, U16 *int2Status);
void W_7249_Get_IRQ_Status(U16 cardNo, U16 *int1Status, U16 *int2Status);
void W_7296_Get_IRQ_Status(U16 cardNo, U16 *int1Status, U16 *int2Status);
```

Visual Basic (Windows 95)
```c
W_7248_Get_IRQ_Status (ByVal cardNo As Integer, int1Status As Integer, int2Status As Integer);
W_7249_Get_IRQ_Status (ByVal cardNo As Integer, int1Status As Integer, int2Status As Integer);
W_7296_Get_IRQ_Status (ByVal cardNo As Integer, int1Status As Integer, int2Status As Integer);
```

# @ Argument

```txt
cardNo: card number to select board
int1Status: the status of INT1,
    int1Status = 0 → no interrupt
    int1Status = 1 → interrupt 1 inserted
int2Status: the status of INT2
    int2Status = 0 → no interrupt
    int2Status = 1 → interrupt 2 inserted
Please refer to section 4.3 for detailed description.
```

# 5.14 Clear IRQ

# @ Description

This function is used to clear the interrupt generated from the 7248/96 series.

# @ Syntax

```c
C/C++ (DOS)
    void _7248_CLR_IRQ(U16 cardNo);
    void _7249_CLR_IRQ(U16 cardNo);
    void _7296_CLR_IRQ(U16 cardNo);

C/C++ (Windows 95)
    void W_7248_CLR_IRQ(U16 cardNo);
    void W_7249_CLR_IRQ(U16 cardNo);
    void W_7296_CLR_IRQ(U16 cardNo);

Visual Basic (Windows 95)
    W_7248_CLR_IRQ (ByVal cardNo As Integer);
    W_7249_CLR_IRQ (ByVal cardNo As Integer);
    W_7296_CLR_IRQ (ByVal cardNo As Integer);
```

# @ Argument

cardNo: card number to select board

# 5.15 Software Reset

# @ Description

This function is used to reset the I/O port configuration. After reset PCI-7224/7248/7296, all the ports will be set as input ports. Note that this function can not re-start the PCI bus and all the hardware setting won‘t be change either.

# @ Syntax

PCI-7224/7248, CPCI-7248:

```csv
C/C++ (DOS)
U16 _7248_Software_Reset (U16 cardNo)
U16 _7249_Software_Reset (U16 cardNo)
U16 _7296_Software_Reset (U16 cardNo)
```

C/C++ (Windows 95)

```cmake
U16 W_7248_Software_Reset (U16 cardNo)
U16 W_7249_Software_Reset (U16 cardNo)
U16 W_7296_Software_Reset (U16 cardNo)
```

Visual Basic (Windows 95)
```txt
W_7248_Software_Reset (ByVal cardNo As Integer) As Integer
W_7249_Software_Reset (ByVal cardNo As Integer) As Integer
W_7296_Software_Reset (ByVal cardNo As Integer) As Integer
```

@ Argument
```txt
cardNo: card number which the DIO will be reset.
```

@ Return Code
```txt
ERR_NoError
```

# 5.16 Interrupt Start under Windows

@ Description

This function is only available in Windows 95/98 driver. This function is used to initialize and start up the interrupt control. Please refer to section 4.3 for detailed description of interrupt system. After calling this function, every time an interrupt request signal generated, a software event is signaled. So that in your program, you can use wait operation to wait for the event. When the event is signaled, it means an interrupt is generated. Please refer to the sample program 7248int.c or 7296int.c.

@ Syntax
C/C++ (Windows 95)
```c
void W_7248_INT_Start (U16 cardNo, U16 c1, U16 c2, U16 ctrlValue, HANDLE *hIntEvent)
void W_7249_INT_Start (U16 cardNo, U16 c1, U16 c2, U16 ctrlValue, HANDLE *hIntEvent)
void W_7248_INT_Start (U16 cardNo, U16 c1, U16 c2, U16 ctrlValue, HANDLE *hIntEvent)
```

Visual Basic (Windows 95)
```txt
W_7248_INT_Start (ByVal cardNo As Integer, ByVal c1 As Integer, ByVal c2 As Integer, ByVal ctrlValue As Integer, hIntEvent As Long)
W_7249_INT_Start (ByVal cardNo As Integer, ByVal c1 As Integer, ByVal c2 As Integer, ByVal ctrlValue As Integer, hIntEvent As Long)
W_7296_INT_Start (ByVal cardNo As Integer, ByVal c1 As Integer, ByVal c2 As Integer, ByVal ctrlValue As Integer, hIntEvent As Long)
```

# @ Argument

```txt
cardNo: card number which the DIO will be reset.
c1: If the interrupt source is set as internal timer source, this value is the frequency divider of Timer#1.
c2: If the interrupt source is set as internal timer source, this value is the frequency divider of Timer#2.
ctrlValue: the value for INT mode setting. The value can be set for INT1 is INT1_OFF, INT1_P1C0, INT1_P1C3C0, or INT1_EVENT_IRQ. The value can be set for INT2 is INT2_OFF, INT2_P2C0, INT2_P2C3C0, or INT2_TIMER_IRQ. Please refer to section 3.3.4 for detailed description.
hIntEvent: the handle of the event for interrupt signals.
```

# @ Return Code

```txt
ERR_NoError
```

# 5.17 Interrupt Stop under Windows

# @ Description

This function is only available in Windows 95/98 driver. This function is used to disable the interrupt signal generation.

# @ Syntax

C/C++ (Windows 95)
```c
void W_7248_INT_Stop (U16 cardNo)
void W_7249_INT_Stop (U16 cardNo)
void W_7296_INT_Stop (U16 cardNo)
```
Visual Basic (Windows 95)

```txt
W_7248_INT_Stop (ByVal cardNo As Integer)
W_7249_INT_Stop (ByVal cardNo As Integer)
W_7296_INT_Stop (ByVal cardNo As Integer)
```

# @ Argument

```txt
cardNo: card number which the DIO will be reset.
```

# @ Return Code

```txt
ERR_NoError
```

# Warranty Policy

Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully.

1. Before using ADLINK’s products please read the user manual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA application form which can be downloaded from: http://rma.adlinktech.com/policy/.

2. All ADLINK products come with a limited two-year warranty, one year for products bought in China.

The warranty period starts on the day the product is shipped from ADLINK’s factory.

Peripherals and third-party products not manufactured by ADLINK will be covered by the original manufacturers' warranty.

For products containing storage devices (hard drives, flash cards, etc.), please back up your data before sending them for repair. ADLINK is not responsible for any loss of data.

Please ensure the use of properly licensed software with our systems. ADLINK does not condone the use of pirated software and will not service systems using such software. ADLINK will not be held legally responsible for products shipped with unlicensed software installed by the user.

For general repairs, please do not include peripheral accessories. If peripherals need to be included, be certain to specify which items you sent on the RMA Request & Confirmation Form. ADLINK is not responsible for items not listed on the RMA Request & Confirmation Form.

3. Our repair service is not covered by ADLINK's guarantee in the following situations:

• Damage caused by not following instructions in the User's Manual.

Damage caused by carelessness on the user's part during product transportation.

Damage caused by fire, earthquakes, floods, lightening, pollution, other acts of God, and/or incorrect usage of voltage transformers.

Damage caused by inappropriate storage environments such as with high temperatures, high humidity, or volatile chemicals.
Damage caused by leakage of battery fluid during or after change of batteries by customer/user.
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Products with altered and/or damaged serial numbers are not entitled to our service.
This warranty is not transferable or extendible.
Other categories not protected under our warranty.

4. Customers are responsible for all fees necessary to transport damaged products to ADLINK.

For further questions, please e-mail our FAE staff: service@adlinktech.com
[🔗 Link to the original document](.cpci-7248-7249r-manual-6/cpci-7248-7249r-manual-6.pdf)