# cPCI-A3535 Series

Performance 3U CompactPCI® Serial 11th Gen Intel® Core™ / Intel® Xeon® Processor Blade

User’s Manual

![Electronic device back panel with green circuit board and external connectors (no readable text or symbols)](.cpci-a3535-50m-31130-1000-10/05ab3f9554287c0d45e79746d8ab1d1c9738f80bff07b83c8dd4a34b1e22768d.jpg)

Manual Rev.: 1.0

Revision Date: May 13, 2025

Part No: 50M-31130-1000

# Revision History

<table><tr><td>Revision</td><td>Release Date</td><td>Description of Change(s)</td></tr><tr><td>1.0</td><td>2025-05-13</td><td>Initial release</td></tr></table>

# Preface

# Copyright © 2025 ADLINK Technology Inc.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

![Symbol of a trash bin crossed with a diagonal line, no text or labels present](.cpci-a3535-50m-31130-1000-10/d86eb874cd0348b00f32ba80536580308c2cf28d7c802dde0ab902efedc48db6.jpg)

Battery Labels
![Symbol of a trash bin crossed out by two diagonal lines (no text or labels)](.cpci-a3535-50m-31130-1000-10/4c9a3c05d6af25fe79592ca6ec0497750a7ce78c1ce4f89594d93a69cd485a42.jpg)

![Recycling symbol icon with three chasing arrows inside a square frame (no text or labels)](.cpci-a3535-50m-31130-1000-10/4ca73eed6bf9b2b4e5e78108c1dbddbf786d60904b8014e1be9e06d652362fa3.jpg)

Li-ion

![RECYCLE\nRBRC\nLi-ion\n7.800.822.8837](.cpci-a3535-50m-31130-1000-10/0412f1f858d5af333617108f26ae5c1480ad0318d007880133817c8b635d4f3b.jpg)

![Abstract geometric pattern with interlocking black and white shapes (no text or symbols)](.cpci-a3535-50m-31130-1000-10/254fcfa6b95d654c85bfda18c84473f9ad113e83fd84b4c33a5389d71aa14973.jpg)

ᑜ㔚ᳰ⺧࿁ᡴ

# California Proposition 65 Warning

![The image displays a standard warning sign. It features a yellow triangle with a thick black border. Centered inside the yellow triangle is a large black exclamation point. The background surrounding the triangle is white.](.cpci-a3535-50m-31130-1000-10/abdf26d02f8b7b5fd7806e7675cdf257181f30f314c2d240dfe73161c9f41733.jpg)

WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl) phosphate (TDCPP),

1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Conventions

Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly.

![The image displays a white document icon featuring a folded top-right corner and faint horizontal grey lines representing text. A large, thick red checkmark is superimposed over the document, starting from the upper right and sweeping down towards the lower left, indicating approval or completion.](.cpci-a3535-50m-31130-1000-10/b641f45e769e505e0df704fecbc3eac5b3d63c18fe9b9f04b6d46471d1530acc.jpg)
NOTE:

Additional information, aids, and tips that help users perform tasks.

![The image displays a standard warning sign featuring a yellow equilateral triangle with a thick black border. Inside the triangle is a large, black exclamation point centered vertically. The sign is set against a white background, with a horizontal black line visible just above the top edge of the triangle.](.cpci-a3535-50m-31130-1000-10/6e96428eaa8efc51d444ba078dc9078345055211184989d666d9f39abefe2df1.jpg)
CAUTION:

Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.

![The image displays a red triangular warning sign with a white border. Inside the triangle is a large white exclamation mark centered in the middle. There is no text present in the image.](.cpci-a3535-50m-31130-1000-10/2120319fb5d58a00b34fab36e1310f0c011473c903a7f7e66a27737313c76577.jpg)
WARNING:

Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task.

# Table of Contents

# Revision History.......... ii

# Preface ............ iii

# List of Figures ........ ... vii

# List of Tables ........ ix

# 1 Introduction .........

1.1 Overview... 1
1.2 Features... 2
1.3 Model Number Decoder.... 3
1.4 Package Contents . 4

# 2 Specifications ........ 5

2.1 cPCI-A3535 Processor Blade Specifications.. 5
2.2 Block Diagrams.. 8
2.3 I/O Connectivity Table .. 9
2.4 Power Requirements .... 10

# 3 Board Interfaces ........ 11

3.1 cPCI-A3535 Series Board Layout.. 11
3.2 cPCI-A3535 4HP Blade Assembly Layout.. 12
3.3 cPCI-A3535 8HP Blade Assembly Layout.. 13
3.4 cPCI-A3535 Faceplate... 14
3.5 Connector Pin Assignments ..... 16

# 4 Getting Started ........ 2 5

4.1 CPU and Heatsink .. 25
4.2 Installing the Blade to the Chassis. 26

# 5 Driver Installation ........ 27

5.1 cPCI-A3535 Drivers ... 27

# 6 Utilities ...... . 29

6.1 SEMA.. . 29
6.2 Watchdog Timer... 29
6.3 Controlling User LEDs .... 30

# 7 BIOS Setup ......... ... 31

7.1 Starting the BIOS ... 31
7.2 Setup Menus...... . 33

# Important Safety Instructions....... . 35

# Getting Service ........ .. 37

# List of Figures

Figure 2-1: cPCI-A3535 Processor Blade Functional Block Diagram 8

Figure 3-1: cPCI-A3535 Series Board Layout (component side)..... 11

Figure 3-2: cPCI-A3535 4HP Blade Assembly Layout.. . 12

Figure 3-3: cPCI-A3535 8HP Blade Assembly Layout.. . 13

Figure 3-4: cPCI-A3535 Faceplate Layout.. . 14

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# List of Tables

Table 2-1: cPCI-A3535 Processor Blade Specifications.. . 5
Table 2-2: cPCI-A3535 I/O Connectivity..... 9
Table 3-1: cPCI-A3535 Switch and Button Descriptions...... . 15
Table 3-2: cPCI-A3535 Faceplate System LED Descriptions......... 15
Table 3-3: USB 3.0 Pin Definition . . 16
Table 3-4: USB-C DisplayPort Pin Definition.. . 16
Table 3-5: RJ-45 GbE Pin Definitions.. . 17
Table 3-6: GbE LED Status Definitions... . 17
Table 3-7: GbE M12 X-code Pin Definition... .. 18
Table 6-1: User LED GPIO Mapping .... .. 30

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# 1 Introduction

# 1.1 Overview

CompactPCI® Serial (PICMG CPCI-S.0) is a modular computer standard officially adopted by PICMG in 2011. The CompactPCI Serial standard defines a connector to support high-speed serial interfaces including PCI Express, SATA, USB and Ethernet. A CompactPCI Serial backplane has six high-speed connectors P1 to P6 on the system slot. On peripheral slots, only P1 is mandatory and P2 to P6 are optional. A CompactPCI Serial system can comprise a total of nine blades (one system blade and eight peripheral I/O blades) through an Ethernet full mesh or single star architecture. The CompactPCI® Serial standard provides more flexibility and higher speed and bandwidth in modular system solutions.

The ADLINK cPCI-A3535 is a 3U CompactPCI Serial processor blade featuring an 11th Gen Intel® processor, Intel® RM590E Chipset and supports 2 SO-DIMM DDR4-3200 ECC memory up to 64GB.

The cPCI-A3535 is available in both single-slot (4HP) form factor and dual-slot (8HP) form factor. The common interfaces for both form factors are 1x USB 3.0 Type A, 1x USB Type C and 1x 2.5G Ethernet port in RJ-45 on the front panel and PCIe, SATA, USB, and Ethernet connectivity to the rear. Daughter boards provide extra onboard SSD storage for both form factors. The 4HP version supports 2x 2.5 GbE and the 8HP version supports 2x 10 GbE, both via M12 connectors on the front panel,

Serial interfaces on the backplane connectors P1 to P5 include 2x PCI Express x8, 3x PCI Express x4, 2x USB 3.0, 8x USB 2.0, 5x SATA 6Gb/s 4x LANs. Additionally, the P6 connector supports 2x Ethernet ports for the 4HP version and 4x Ethernet ports for the 8HP version.

The cPCI-A3535 is a high-performance solution for transportation, factory automation, defense and other industrial applications that require superior data transfer capability and advanced computing power.

# 1.2 Features

 3U CompactPCI Serial (PICMG CPCI-S.0) processor blade in 4/8 HP width form factor
 11th Gen Intel® Core™ Processor
 Graphics engine integrated in processor supporting Intel® UHD Graphics
 Dual channel DDR4-3200 SO-DIMM memory with ECC, up to 64GB
Backplane communication by PCI Express, USB 2.0/3.0, SATA, and Gigabit Ethernet
 Storage: onboard SATA SSD

# 1.3 Model Number Decoder

<table><tr><td>cPCI-</td><td>XX</td><td>A3535</td><td>XXX</td><td>/11555MLE</td><td>/M32</td><td>/SXX</td></tr><tr><td></td><td>(A)</td><td></td><td>(B)</td><td>(C)</td><td>(D)</td><td>(E)</td></tr></table>

# (A) Operating Temperature Code

 Blank = 0°C to $6 0 ^ { \circ } \mathsf { C }$
 $\mathsf { E T } = - 2 0 ^ { \circ } \mathrm { C }$ to $7 0 ^ { \circ } \mathsf { C }$ with air flow by screening

# (B) Configuration Code

 Blank = Single slot width, 1x USB Type C, 2x M12 Ethernet, 1x RJ-45 Ethernet, 1x USB 3.0
 Other = ODM/OEM project code

# (C) CPU Code

 11555MLE = 6-core Intel® Xeon® 11555MLE processor
 11555MRE = 6-core Intel® Xeon® 11555MRE processor

# (D) Memory Size Code

 M32 = 2x 16GB DDR4-3200 SO-DIMM
 M64 = 2x 32GB DDR4-3200 SO-DIMM

# (E) Storage Configuration Code

 Blank = Without P6 daughter board storage
 S80 = Onboard soldered 80GB SSD with dual GbE ports to P6 on daughter board

# 1.4 Package Contents

The cPCI-A3535 is packaged with the following components. If any of the following items are missing or damaged, retain the shipping carton and packing material and contact the dealer for inspection. Please obtain authorization before returning any product to ADLINK. The packing contents of cPCI-A3535 non-standard configurations will vary depending on customer requests.

# Processor Blade

 The cPCI-A3535 Processor Blade

 CPU and memory specifications will differ depending on options selected
 Thermal module is assembled on the board

![The image displays a white document icon featuring horizontal lines and a folded top-right corner. A large, bold red checkmark is superimposed over the document, symbolizing completion or verification.](.cpci-a3535-50m-31130-1000-10/64fa8a28d84911f366528078e1182dd701c66b011e403985835f0da9fcdd6589.jpg)
NOTE:

The contents of non-standard cPCI-A3535 configurations may vary depending on the customer’s requirements.

# Optional Accessories

 M12 cables
 USB Type C cable

![The image displays a yellow triangular warning sign with a black border. Inside the triangle is a large black exclamation point. The text is: !](.cpci-a3535-50m-31130-1000-10/ffcf25b25cbdaf71a792d832c036a8c0567c64abe72d2c5cbb3da8e339e78435.jpg)
CAUTION:

This product must be protected from static discharge and physical shock. Never remove any of the components except at a static-free workstation. Use the anti-static bag shipped with the product when putting the board on a surface. Wear an anti-static wrist strap properly grounded on one of the system's ESD ground jacks when installing or servicing system components.

# 2 Specifications

2.1 cPCI-A3535 Processor Blade Specifications

<table><tr><td>CompactPCIS.0Standards</td><td>• CompactPCI® Serial CPCI-S.0 R2.0</td></tr><tr><td>Mechanical</td><td>• Standard 3U cPCI-S.0• Board size: 100mm x 160mm• Single slot (4HP, 20.32mm), dual slot (8HP, 40.64mm)• CompactPCI Serial P1 to P5 connectors; P6 connector on daughter board</td></tr><tr><td>Processor</td><td>4HP SKU• Intel® Xeon® W-11555MLE (6c, 12t), 1.9 GHz, 12MB cache, 25W.8HP SKU• Intel® Xeon® W-11555MRE (6c, 12t), 2.6GHz(2.1GHz), 12MB cache, 45W (cTDP 35W)</td></tr><tr><td>Chipset</td><td>• Intel® RM590E Chipset</td></tr><tr><td>Memory</td><td>• Dual channel DDR4-3200 ECC SO-DIMM memory up to 64GB</td></tr><tr><td>BIOS</td><td>• Dual AMI UEFI BIOS, 256Mb SPI flash memory</td></tr><tr><td>GigabitEthernet</td><td>Front Panel I/O4HP/8HP SKU:• 1x 2.5G Intel® I225-IT Ethernet Controller with IAMT (RJ45)4HP SKU:• 2x 2.5G Intel® I225-IT Ethernet Controller (M12)8HP SKU:• 2x 10G Intel® X710TM4/AT2 Ethernet Controller (M12)Rear I/O4HP SKU:• 2x 2.5G Intel® I225-IT Ethernet Controller to P6 connector8HP SKU:• 4x 1G Intel® I350AM4 Ethernet Controller to P6 connector</td></tr><tr><td>Graphics</td><td>• Integrated in Intel® processor• 1x USB-C DisplayPort output on faceplate with resolution up to 7680×4320 @60Hz</td></tr></table>

Table 2-1: cPCI-A3535 Processor Blade Specifications

<table><tr><td>USB</td><td>Front Panel I/O1x USB 3.2 Gen1 Type-ARear I/O4HP SKU:2x USB 3.2 Gen1 to P1/P3 connector8x USB 2.0 to P1/P2/P3 connector</td></tr><tr><td>PCI Express</td><td>Rear I/O2x PCIe 3.0 x8 to P1/P2 connector3x PCIe 3.0 x4 to P4 connector2x PCIe 3.0 x1 to P4/P5 connector</td></tr><tr><td>TPM</td><td>TPM 2.0 SLB 9670XQ2.0</td></tr><tr><td>Storage Interfaces</td><td>1x soldered 80GB 3D NAND flash on daughter board5x SATA ports with RAID 0/1/5/10 support to P3 connector (max. 6Gb/s limited by backplane)</td></tr><tr><td>Faceplate I/O</td><td>4HP SKU:1x USB 3.2 Gen11x Intel® I225-IT Ethernet Controller with iAMT (RJ45)2x Intel® I225-IT Ethernet Controller (M12)1x USB-C for DisplayPort8HP SKU:1x USB 3.2 Gen11x Intel® I225-IT Ethernet Controller with iAMT (RJ45)2x Intel® X710TM4/AT2 Ethernet Controller (M12)1x USB-C for DisplayPort</td></tr><tr><td>OS Compatibility</td><td>Microsoft Windows 10 64-bitLinux Debian</td></tr><tr><td>Environmental*</td><td>Operating Temperature: -40°C to 70°C (EN50155 OT4 Class, +85°C for 10 minutes, with air flow)Storage Temperature: -40°C to 85°COperating Humidity: 10% to 95% relative humidity, non-condensing (EN60068-2-30, EN50155)Storage Humidity: 5% to 95% relative humidity, non-condensingEN50155:2021RoHS2.0 &amp; REACH compliant</td></tr><tr><td>EMI/EMC</td><td>EN50155:2021, EN 50121-3-2 (radiated and conducted emission)EN55024, EN50121-3-2 (immunity)CEUKCAFCC Class A</td></tr></table>

Table 2-1: cPCI-A3535 Processor Blade Specifications

<table><tr><td>Safety</td><td>EN50155:2021EN45545-2:2013+A1:2015 (HL 1-3) EL9 for PCB (R24/R25)</td></tr></table>

Table 2-1: cPCI-A3535 Processor Blade Specifications

![The image features an icon of a white document with faint gray horizontal lines. A large, thick red checkmark is superimposed diagonally over the document.](.cpci-a3535-50m-31130-1000-10/ac5c9869c4d80be79e272b29a2dbe941ecebfb6d63599d487b044331f3926074.jpg)
NOTE:

\*ADLINK-certified thermal design. The thermal performance is dependent on the chassis cooling design. Sufficient forced air-flow is required. Temperature limits of optional mass storage devices may also affect the thermal specification.

Due to Intel PCH specification limitations, the maximum number of PCIe Root Ports (or devices) that can be enabled at the same time is 16. The PCIe from PCH, peripheral slot 3 of the backplane, is effected when CPU slot is named as slot 0, while the PCIe from CPU, peripheral slots 1 and 2 are not effected.

# 2.2 Block Diagrams

cPCI-A3535 Processor Blade
![Here is an accurate and concise description of the flowchart, listing the labeled blocks and their connections:\n\n**Central Components:**\n*   **11th Gen Intel® Processor** connects bidirectionally to **Intel® RM590E Chipset** via **DMI**.\n*   **11th Gen Intel® Processor** connects to **SODIMM 1** (DDR4-3200 MHz max. ECC) via **CHA** and to **SODIMM 2** (DDR4-3200 MHz max. ECC) via **CHB**.\n*   **11th Gen Intel® Processor** connects to **Type-C (USB1)** via **TCP3 : DP1.4/USB3.2 (G1)**.\n*   **11th Gen Intel® Processor** connects to **BTB CONN** via **PCIe x4**.\n*   **11th Gen Intel® Processor** connects to **P1** (top right) via **PCIe x8** and to **P2** (top right) via **PCIe x8**.\n*   **11th Gen Intel® Processor** connects to **P6** via **4 x 1G Base-T (8HP)** and **2 x 1G Base-T (4HP)**.\n\n**BTB CONN Area:**\n*   **BTB CONN** connects to two **M12 X-coded (10G)** blocks (labeled '8HP only').\n*   **BTB CONN** connects to **Intel® RM590E Chipset** via **PCIe x1** and **SATA**.\n\n**Intel® RM590E Chipset Connections:**\n*   **Chipset** connects to three **I225-IT** blocks via **PCIe x1**.\n    *   The top **I225-IT** connects to **M12 X-coded (2.5G)** (labeled '4HP only') via **MDI**.\n    *   The middle **I225-IT** connects to **M12 X-coded (2.5G)** (labeled '4HP only') via **MDI**.\n    *   The bottom **I225-IT** connects to **RJ45 (iAMT) (RJ45_1)** via **MDI**.\n*   **Chipset** connects to **USB 3.2 (Gen1) (USB2)** via **USB 3.2_Gen1**.\n*   **Chipset** connects to **P4** via **3 x PCIe x4** and **PCIe x1**.\n*   **Chipset** connects to **P5** via **PCIe x1**, **PCIe x1**, **PCIe x1**, and **PCIe clock x7**.\n*   **Chipset** connects to **P1** (bottom right) via **USB 3.2_Gen1**, **USB 2.0**, and **SGPIO**.\n*   **Chipset** connects to **P2** (bottom right) via **3 x USB 2.0**.\n*   **Chipset** connects to **P3** via **USB 3.2_Gen1**, **4 x USB 2.0**, and **5 x SATA**.\n\n**Controller and BIOS Area:**\n*   **EC Board Controller IT5121** connects to **Intel® RM590E Chipset** via **eSPI**.\n*   **EC Board Controller IT5121** connects to **BIOS 0** / **BIOS 1** via **control**.\n*   **TPM 9670AQ2.0** connects to **Intel® RM590E Chipset** via **SPI**.\n*   **TPM 9670AQ2.0** connects to **BIOS 0** / **BIOS 1**.](.cpci-a3535-50m-31130-1000-10/2311f3688b9aa9ba023d7b8b728bbb9d10f906612bddf9a1701328feb31b5302.jpg)

Figure 2-1: cPCI-A3535 Processor Blade Functional Block Diagram

# 2.3 I/O Connectivity Table

<table><tr><td rowspan="2">Function</td><td colspan="2">cPCI-A3535 (4HP/8HP)</td></tr><tr><td>Faceplate</td><td>Onboard</td></tr><tr><td>GbE</td><td>1 (RJ-45)2 (M12)</td><td>—</td></tr><tr><td>USB</td><td>1 USB 3.2</td><td>—</td></tr><tr><td>Display</td><td>1 DP (USB-C)</td><td>—</td></tr><tr><td>Onboard NAND Flash</td><td>—</td><td>1</td></tr></table>

Table 2-2: cPCI-A3535 I/O Connectivity

# 2.4 Power Requirements

In order to guarantee a stable functionality of the system, it is recommended to provide more power than the system requires. An industrial power supply unit should be able to provide at least twice as much power as the entire system requires of each voltage. An ATX power supply unit should be able to provide at least three times as much power as the entire system requires of each voltage.

# Power Consumption

This section provides information on the power consumption of cPCI-A3535 Series when using Intel® Xeon® processors with 16GB DDR4 3200 W/T ECC SODIMM memory and onboard TLC SM619GXE 80GB. The cPCI-A3535 is powered by +12V only.

<table><tr><td colspan="3">Intel® Xeon® W-11555MLE (4HP)</td></tr><tr><td rowspan="2">OS/Mode</td><td>Current @12V</td><td>Total Power</td></tr><tr><td colspan="2">EIST Disabled / Enabled</td></tr><tr><td>Windows 10 x64 Idle Mode $^{1}$ </td><td>1.6A / 1.56A</td><td>19.2W / 18.72W</td></tr><tr><td>Windows 10 x64 Typical Mode $^{2}$ </td><td>2.53A / 2.43A</td><td>30.36W / 29.16W</td></tr><tr><td>Windows 10 x64 Maximum Mode $^{3}$ </td><td>2.83A / 3.68A</td><td>33.96W / 44.16W</td></tr></table>

<table><tr><td colspan="3">Intel® Xeon® W-11555MRE (8HP)</td></tr><tr><td rowspan="2">OS/Mode</td><td>Current @12V</td><td>Total Power</td></tr><tr><td colspan="2">EIST Disabled / Enabled</td></tr><tr><td>Windows 10 x64 Idle Mode $^{1}$ </td><td>1.66A / 1.68A</td><td>19.92W / 20.16W</td></tr><tr><td>Windows 10 x64 Typical Mode $^{2}$ </td><td>2.81A / 2.97A</td><td>33.72W / 35.64W</td></tr><tr><td>Windows 10 x64 Maximum Mode $^{3}$ </td><td>3.36A / 4.15A</td><td>40.32W / 49.8W</td></tr></table>

1. The system set to idle mode and stays idle for 10 minutes.
2. Run BurnInTest™ that includes CPU, memory, video and 2D/3D graphics. Set all test items to 100% loading and run for 10 minutes.
3. Run Intel® Thermal Analysis Tool that includes CPU, graphics and memory. Set all test items to 100% loading and run for 10 minutes.

# 3 Board Interfaces

This chapter illustrates the board layout, connector pin assignments, and jumper settings to familiarize users with the cPCI-A3535 Series.

# 3.1 cPCI-A3535 Series Board Layout

![DIMM2\nDIMM1\nBTB\nM12\nCPU\nPCH\nPJ-45\nUDE\nUSB-C\nUSB-A\nAmphenol\nP5\nP4\nP3\nP2\nP1](.cpci-a3535-50m-31130-1000-10/45be86344166f38bc79cbfa1382546dc64b7c37f6211e60a5640acb75e8d6394.jpg)

<table><tr><td>CPU</td><td>Intel® Xeon® Processor</td><td>P1-P5</td><td>CompactPCI Serial P1 to P5 connectors</td></tr><tr><td>PCH</td><td>Intel® RM590E Chipset</td><td>BTB</td><td>B2B connector for DB-P630x (CN5)</td></tr><tr><td>DIMM1/2</td><td>DDR4 SO-DIMM Sockets</td><td>RJ45</td><td>GbE connector for iAMT</td></tr><tr><td>USB-A</td><td>USB Type-A connector</td><td>USB-C</td><td>DisplayPort connector</td></tr><tr><td>M12</td><td>2.5GbE connectors (4HP) 10GbE connectors (8HP)</td><td colspan="2"></td></tr></table>

Figure 3-1: cPCI-A3535 Series Board Layout (component side)

# 3.2 cPCI-A3535 4HP Blade Assembly Layout

This section describes the final assembly layout of the single slot cPCI-A3535 Processor Blade.

![DB-P6301\nP6\nAmphend](.cpci-a3535-50m-31130-1000-10/71b796714f757a9c719d215e1d34a65ce56e34048dbe4c184e280c276296fb9b.jpg)

Figure 3-2: cPCI-A3535 4HP Blade Assembly Layout

<table><tr><td>DB-P6301</td><td>Daughter board:- SM619GEE for storage- 2x I225IT for 2.5GbE</td><td>P6</td><td>CompactPCI Serial P6 connector</td></tr></table>

# 3.3 cPCI-A3535 8HP Blade Assembly Layout

This section describes the final assembly layout of the double slot cPCI-A3535 Processor Blade.

![DB-P6302\nAspheral](.cpci-a3535-50m-31130-1000-10/0e216ffb24d6b55c047469087b7ab38723f68c9f56e108310e86de06b8732655.jpg)

Figure 3-3: cPCI-A3535 8HP Blade Assembly Layout

<table><tr><td>DB-P6302</td><td>Daughter board:- SM619GEE for storage- 2x X710 for 10GbE- 4x I350AM4 for 1GbE</td><td>P6</td><td>CompactPCI Serial P6 connector</td></tr></table>

# 3.4 cPCI-A3535 Faceplate

![4HP\nM12 for\n2.5GbE\nRJ45 for\niAMT\nUSB Type-A\nX1\nX2\nAMT\nUSB\nReset\nButton\nUser\nLEDs\nPower\nLED\nUSB-C\nBIOS load\ndefault button](.cpci-a3535-50m-31130-1000-10/d0afffbbbb0e9f158647ffc5baa16545f3abaf04b13f2f18ea4b3b456427589c.jpg)

![8HP\nM12 for\n10GbE\nRJ45\niAMT\nUSB Type-A\nX1\nX2\nANT\nUSB\nReset\nButton\nUser\nLEDs\nPower\nLED\nUSB-C\nBIOS load\ndefault button](.cpci-a3535-50m-31130-1000-10/5ba854337465cb7f1dad457afc95087dd5bb5d710b00c1b448fcebfaa4e3566b.jpg)

Figure 3-4: cPCI-A3535 Faceplate Layout

# Switches and Buttons

<table><tr><td>LED</td><td>Function</td></tr><tr><td>Reset (SW1)</td><td>Reboot system</td></tr><tr><td>BIOS Load Default (SW2)</td><td>Load default BIOS settings</td></tr></table>

Table 3-1: cPCI-A3535 Switch and Button Descriptions

# System LEDs

<table><tr><td>LED</td><td>Color</td><td>Condition</td><td>Indication</td></tr><tr><td rowspan="2">Power LED5[TO80]</td><td rowspan="2">Green</td><td>Off</td><td>System off</td></tr><tr><td>Green</td><td>POST OK</td></tr><tr><td rowspan="2">User LEDs (Left/Right)</td><td rowspan="2">Amber</td><td>Off</td><td>No activity</td></tr><tr><td>On/Blinking</td><td>Defined by user</td></tr></table>

Table 3-2: cPCI-A3535 Faceplate System LED Descriptions

![A white document icon featuring faint horizontal lines and a folded top-right corner, overlaid with a large red checkmark.](.cpci-a3535-50m-31130-1000-10/a350684210eecd3f8651c58f8079358fa0245b0c81db80939c068b0926e56c13.jpg)
NOTE:

The User LEDs can be programmed by the user. See “Controlling User $_ { \mathsf { L E D s } } ,$ on page 30 for detailed information.

# 3.5 Connector Pin Assignments

USB 3.2 Gen1 Connector

<table><tr><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>P_+5V0_USB3_CN</td></tr><tr><td>2</td><td>PCH_USB2_CMC_N8</td></tr><tr><td>3</td><td>PCH_USB2_CMC_P8</td></tr><tr><td>4</td><td>GND</td></tr><tr><td>5</td><td>PCH_USB3_RX_C_CMC_N2</td></tr><tr><td>6</td><td>PCH_USB3_RX_C_CMC_P2</td></tr><tr><td>7</td><td>GND</td></tr><tr><td>8</td><td>PCH_USB3_TX_C_CMC_N2</td></tr><tr><td>9</td><td>PCH_USB3_TX_C_CMC_P2</td></tr></table>

![1\n2\n3\n4\n5\n6\n7\n8\n9](.cpci-a3535-50m-31130-1000-10/04a6ff09f3fdacf762a1e5610898d83886ca39a78a157ee6e559bd48154e8f32.jpg)

Table 3-3: USB 3.0 Pin Definition

USB-C DisplayPort Connectors

<table><tr><td>Pin #</td><td>Signal</td><td>Pin #</td><td>Signal</td></tr><tr><td>A1</td><td>GND</td><td>B1</td><td>GND</td></tr><tr><td>A2</td><td>G_TCP_TX_CMC_C_P0</td><td>B2</td><td>G_TCP_TX_CMC_C_P1</td></tr><tr><td>A3</td><td>G_TCP_TX_CMC_C_N0</td><td>B3</td><td>G_TCP_TX_CMC_C_N1</td></tr><tr><td>A4</td><td>TYPE_C_VBUS</td><td>B4</td><td>TYPE_C_VBUS</td></tr><tr><td>A5</td><td>TC_CC1_CN</td><td>B5</td><td>TC_CC2_CN</td></tr><tr><td>A6</td><td>PCH_USB2_CMC_P9</td><td>B6</td><td>PCH_USB2_CMC_P9</td></tr><tr><td>A7</td><td>PCH_USB2_CMC_N9</td><td>B7</td><td>PCH_USB2_CMC_N9</td></tr><tr><td>A8</td><td>TC_SBU1_CN</td><td>B8</td><td>TC_SBU2_CN</td></tr><tr><td>A9</td><td>TYPE_C_VBUS</td><td>B9</td><td>TYPE_C_VBUS</td></tr><tr><td>A10</td><td>G_TCP_TXRX_CMC_C_N1</td><td>B10</td><td>G_TCP_TXRX_CMC_C_N0</td></tr><tr><td>A11</td><td>G_TCP_TXRX_CMC_C_P1</td><td>B11</td><td>G_TCP_TXRX_CMC_C_P0</td></tr><tr><td>A12</td><td>GND</td><td>B12</td><td>GND</td></tr></table>

Table 3-4: USB-C DisplayPort Pin Definition

![A1\nA12\nB12\nB1](.cpci-a3535-50m-31130-1000-10/daf4fb29cec7464085f359ce4a8a677135772c735f2bb677cb511e60a232ab94.jpg)

# RJ-45 Gigabit Ethernet Connectors

<table><tr><td>Pin #</td><td>Signal</td></tr><tr><td>1</td><td>LAN5_MDI_P0</td></tr><tr><td>2</td><td>LAN5_MDI_N0</td></tr><tr><td>3</td><td>LAN5_MDI_P1</td></tr><tr><td>4</td><td>LAN5_MDI_N1</td></tr><tr><td>5</td><td>LAN5_MDI_P2</td></tr><tr><td>6</td><td>LAN5_MDI_N2</td></tr><tr><td>7</td><td>LAN5_MDI_P3</td></tr><tr><td>8</td><td>LAN5_MDI_N3</td></tr></table>

Table 3-5: RJ-45 GbE Pin Definitions

Speed Activity
![8\n1](.cpci-a3535-50m-31130-1000-10/aea0f20008c04a930d99cd15c6fa1cd55224b855dec357a8f6b67eafcc62f676.jpg)

<table><tr><td colspan="2">Status</td><td>Speed LED (Green/Orange)</td><td>Activity LED (Yellow)</td></tr><tr><td colspan="2">Network link is not established or system powered off</td><td>Off</td><td>Off</td></tr><tr><td rowspan="2">10/100 Mbps</td><td>Link</td><td>Off</td><td>On</td></tr><tr><td>Active</td><td>Off</td><td>Blinking</td></tr><tr><td rowspan="2">1000 Mbps</td><td>Link</td><td>Green</td><td>On</td></tr><tr><td>Active</td><td>Green</td><td>Blinking</td></tr><tr><td rowspan="2">2500 Mbps</td><td>Link</td><td>Orange</td><td>On</td></tr><tr><td>Active</td><td>Orange</td><td>Blinking</td></tr></table>

Table 3-6: GbE LED Status Definitions

# GbE M12 X-code Connectors

<table><tr><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>MDI_T_P0</td></tr><tr><td>2</td><td>MDI_T_N0</td></tr><tr><td>3</td><td>MDI_T_P1</td></tr><tr><td>4</td><td>MDI_T_N1</td></tr><tr><td>5</td><td>MDI_T_P3</td></tr><tr><td>6</td><td>MDI_T_N3</td></tr><tr><td>7</td><td>MDI_T_N2</td></tr><tr><td>8</td><td>MDI_T_P2</td></tr></table>

![4\n3\n2\n1\n5\n6\n7\n8](.cpci-a3535-50m-31130-1000-10/5f629ef82acc1d93377be76d6d5a4ea49d155dad4aa602cb2ae52062cd4ec653.jpg)

Table 3-7: GbE M12 X-code Pin Definition

CompactPCI Serial Connector P1

<table><tr><td></td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>6</td><td>GND</td><td>CPU_PCIE_SLOT1_TX_C_P2</td><td>CPU_PCIE_SLOT1_TX_C_N2</td><td>GND</td><td>CPU_PCIE_SLOT1_RX_C_P2</td><td>CPU_PCIE_SLOT1_RX_C_N2</td><td>GND</td><td>CPU_PCIE_SLOT1_TX_C_P3</td><td>CPU_PCIE_SLOT1_TX_C_N3</td><td>GND</td><td>CPU_PCIE_SLOT1_RX_C_P3</td><td>CPU_PCIE_SLOT1_RX_C_N3</td></tr><tr><td>5</td><td>CPU_PCIE_SLOT1_TX_C_P0</td><td>CPU_PCIE_SLOT1_TX_C_N0</td><td>GND</td><td>CPU_PCIE_SLOT1_RX_C_P0</td><td>CPU_PCIE_SLOT1_RX_C_N0</td><td>GND</td><td>CPU_PCIE_SLOT1_TX_C_P1</td><td>CPU_PCIE_SLOT1_TX_C_N1</td><td>GND</td><td>CPU_PCIE_SLOT1_RX_C_P1</td><td>CPU_PCIE_SLOT1_RX_C_N1</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>PCH_USB2_P0</td><td>PCH_USB2_N0</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>PCH_USB3_TX_C_P0</td><td>PCH_USB3_TX_C_N0</td><td>BP_PWRBTN-L</td><td>PCH_USB3_RX_C_P0</td><td>PCH_USB3_RX_C_N0</td><td>BP_PWR_FAIL</td><td>NC</td><td>SGPIO_SATA_DATAOUT0</td><td>NC</td><td>SGPIO_SATA_CLOCK</td><td>SGPIO_SATA_LOAD</td><td>NC</td></tr><tr><td>2</td><td>GND</td><td>CN_I2_C_CLK</td><td>CN_I2_C_DAT</td><td>GND</td><td>PS_ON#</td><td>RST_EXPORT#</td><td>GND</td><td>PRST_RST#</td><td>WAKE_IN-L</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>1</td><td>P_+12V_CN</td><td>P_+5VSB_CN</td><td>GND</td><td>P_+12V_CN</td><td>P_+12V_CN</td><td>GND</td><td>P_+12V_CN</td><td>P_+12V_CN</td><td>GND</td><td>P_+12V_CN</td><td>P_+12V_CN</td><td>GND</td></tr></table>

CompactPCI Serial Connector P2

<table><tr><td></td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>8</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>PCH_USB2_P1</td><td>PCH_USB2_N1</td><td>GND</td><td>PCH_USB2_P2</td><td>PCH_USB2_N2</td><td>NC</td><td>PCH_USB2_P3</td><td>PCH_USB2_N3</td></tr><tr><td>7</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>CPU_PCIE_SLOT2_TX_C_P6</td><td>CPU_PCIE_SLOT2_TX_C_N6</td><td>GND</td><td>CPU_PCIE_SLOT2_RX_C_P6</td><td>CPU_PCIE_SLOT2_RX_C_N6</td><td>GND</td><td>CPU_PCIE_SLOT2_TX_C_P7</td><td>CPU_PCIE_SLOT2_TX_C_N7</td><td>GND</td><td>CPU_PCIE_SLOT2_RX_C_P7</td><td>CPU_PCIE_SLOT2_RX_C_N7</td></tr><tr><td>5</td><td>CPU_PCIE_SLOT2_TX_C_P4</td><td>CPU_PCIE_SLOT2_TX_C_N4</td><td>GND</td><td>CPU_PCIE_SLOT2_RX_C_P4</td><td>CPU_PCIE_SLOT2_RX_C_N4</td><td>GND</td><td>CPU_PCIE_SLOT2_TX_C_P5</td><td>CPU_PCIE_SLOT2_TX_C_N5</td><td>GND</td><td>CPU_PCIE_SLOT2_RX_C_P5</td><td>CPU_PCIE_SLOT2_RX_C_N5</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>CPU_PCIE_SLOT2_TX_C_P2</td><td>CPU_PCIE_SLOT2_TX_C_N2</td><td>GND</td><td>CPU_PCIE_SLOT2_RX_C_P2</td><td>CPU_PCIE_SLOT2_RX_C_N2</td><td>GND</td><td>CPU_PCIE_SLOT2_TX_C_P3</td><td>CPU_PCIE_SLOT2_TX_C_N3</td><td>GND</td><td>CPU_PCIE_SLOT2_RX_C_P3</td><td>CPU_PCIE_SLOT2_RX_C_N3</td></tr><tr><td>3</td><td>CPU_PCIE_SLOT2_TX_C_P0</td><td>CPU_PCIE_SLOT2_TX_C_N0</td><td>GND</td><td>CPU_PCIE_SLOT2_RX_C_P0</td><td>CPU_PCIE_SLOT2_RX_C_N0</td><td>GND</td><td>CPU_PCIE_SLOT2_TX_C_P1</td><td>CPU_PCIE_SLOT2_TX_C_N1</td><td>GND</td><td>CPU_PCIE_SLOT2_RX_C_P1</td><td>CPU_PCIE_SLOT2_RX_C_N1</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>CPU_PCIE_SLOT1_TX_C_P6</td><td>CPU_PCIE_SLOT1_TX_C_N6</td><td>GND</td><td>CPU_PCIE_SLOT1_RX_C_P6</td><td>CPU_PCIE_SLOT1_RX_C_N6</td><td>GND</td><td>CPU_PCIE_SLOT1_TX_C_P7</td><td>CPU_PCIE_SLOT1_TX_C_N7</td><td>GND</td><td>CPU_PCIE_SLOT1_RX_C_P7</td><td>CPU_PCIE_SLOT1_RX_C_N7</td></tr><tr><td>1</td><td>CPU_PCIE_SLOT1_TX_C_P4</td><td>CPU_PCIE_SLOT1_TX_C_N4</td><td>GND</td><td>CPU_PCIE_SLOT1_RX_C_P4</td><td>CPU_PCIE_SLOT1_RX_C_N4</td><td>GND</td><td>CPU_PCIE_SLOT1_TX_C_P5</td><td>CPU_PCIE_SLOT1_TX_C_N5</td><td>GND</td><td>CPU_PCIE_SLOT1_RX_C_P5</td><td>CPU_PCIE_SLOT1_RX_C_N5</td><td>GND</td></tr></table>

CompactPCI Serial Connector P3

<table><tr><td></td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>8</td><td>GND</td><td>PCH_SATA_TX_C_P7</td><td>PCH_SATA_TX_C_N7</td><td>GND</td><td>CN_SATA_RX_P7</td><td>CN_SATA_RX_N7</td><td>GND</td><td>PCH_SATA_TX_C_P8</td><td>PCH_SATA_TX_C_N8</td><td>GND</td><td>CN_SATA_RX_P8</td><td>CN_SATA_RX_N8</td></tr><tr><td>7</td><td>PCH_SATA_TX_C_P5</td><td>PCH_SATA_TX_C_N5</td><td>GND</td><td>CN_SATA_RX_P5</td><td>CN_SATA_RX_N5</td><td>GND</td><td>PCH_SATA_TX_C_P6</td><td>PCH_SATA_TX_C_N6</td><td>GND</td><td>CN_SATA_RX_P6</td><td>CN_SATA_RX_N6</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>PCH_SATA_TX_C_P4</td><td>PCH_SATA_TX_C_N4</td><td>GND</td><td>CN_SATA_RX_P4</td><td>CN_SATA_RX_N4</td></tr><tr><td>5</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>PCH_USB3_TX_C_P1</td><td>PCH_USB3_TX_C_N1</td><td>GND</td><td>PCH_USB3_RX_C_P1</td><td>PCH_USB3_RX_C_N1</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>1</td><td>PCH_USB2_P4</td><td>PCH_USB2_N4</td><td>GND</td><td>PCH_USB2_P5</td><td>PCH_USB2_N5</td><td>GND</td><td>PCH_USB2_P6</td><td>PCH_USB2_N6</td><td>GND</td><td>PCH_USB2_P7</td><td>PCH_USB2_N7</td><td>GND</td></tr></table>

CompactPCI Serial Connector P4

<table><tr><td></td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>8</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>7</td><td>PCH_PCIE_SLOT6_TX_C_P</td><td>PCH_PCIE_SLOT6_TX_C_N</td><td>GND</td><td>PCH_PCIE_SLOT6_RX_C_P</td><td>PCH_PCIE_SLOT6_RX_C_N</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>PCH_PCIE_SLOT5_TX_C_P2</td><td>PCH_PCIE_SLOT5_TX_C_N2</td><td>GND</td><td>PCH_PCIE_SLOT5_RX_C_P2</td><td>PCH_PCIE_SLOT5_RX_C_N2</td><td>GND</td><td>PCH_PCIE_SLOT5_TX_C_P3</td><td>PCH_PCIE_SLOT5_TX_C_N3</td><td>GND</td><td>PCH_PCIE_SLOT5_RX_C_P3</td><td>PCH_PCIE_SLOT5_RX_C_N3</td></tr><tr><td>5</td><td>PCH_PCIE_SLOT5_TX_C_P0</td><td>PCH_PCIE_SLOT5_TX_C_N0</td><td>GND</td><td>PCH_PCIE_SLOT5_RX_C_P0</td><td>PCH_PCIE_SLOT5_RX_C_N0</td><td>GND</td><td>PCH_PCIE_SLOT5_TX_C_P1</td><td>PCH_PCIE_SLOT5_TX_C_N1</td><td>GND</td><td>PCH_PCIE_SLOT5_RX_C_P1</td><td>PCH_PCIE_SLOT5_RX_C_N1</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>PCH_PCIE_SLOT4_TX_C_P2</td><td>PCH_PCIE_SLOT4_TX_C_N2</td><td>GND</td><td>PCH_PCIE_SLOT4_RX_C_P2</td><td>PCH_PCIE_SLOT4_RX_C_N2</td><td>GND</td><td>PCH_PCIE_SLOT4_TX_C_P3</td><td>PCH_PCIE_SLOT4_TX_C_N3</td><td>GND</td><td>PCH_PCIE_SLOT4_RX_C_P3</td><td>PCH_PCIE_SLOT4_RX_C_N3</td></tr><tr><td>3</td><td>PCH_PCIE_SLOT4_TX_C_P0</td><td>PCH_PCIE_SLOT4_TX_C_N0</td><td>GND</td><td>PCH_PCIE_SLOT4_RX_C_P0</td><td>PCH_PCIE_SLOT4_RX_C_N0</td><td>GND</td><td>PCH_PCIE_SLOT4_TX_C_P1</td><td>PCH_PCIE_SLOT4_TX_C_N1</td><td>GND</td><td>PCH_PCIE_SLOT4_RX_C_P1</td><td>PCH_PCIE_SLOT4_RX_C_N1</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>PCH_PCIE_SLOT3_TX_C_P2</td><td>PCH_PCIE_SLOT3_TX_C_N2</td><td>GND</td><td>PCH_PCIE_SLOT3_RX_C_P2</td><td>PCH_PCIE_SLOT3_RX_C_N2</td><td>GND</td><td>PCH_PCIE_SLOT3_TX_C_P3</td><td>PCH_PCIE_SLOT3_TX_C_N3</td><td>GND</td><td>PCH_PCIE_SLOT3_RX_C_P3</td><td>PCH_PCIE_SLOT3_RX_C_N3</td></tr><tr><td>1</td><td>PCH_PCIE_SLOT3_TX_C_P0</td><td>PCH_PCIE_SLOT3_TX_C_N0</td><td>GND</td><td>PCH_PCIE_SLOT3_RX_C_P0</td><td>PCH_PCIE_SLOT3_RX_C_N0</td><td>GND</td><td>PCH_PCIE_SLOT3_TX_C_P1</td><td>PCH_PCIE_SLOT3_TX_C_N1</td><td>GND</td><td>PCH_PCIE_SLOT3_RX_C_P1</td><td>PCH_PCIE_SLOT3_RX_C_N1</td><td>GND</td></tr></table>

CompactPCI Serial Connector P5

<table><tr><td></td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>6</td><td>C_SLOT5_CLK_REQ-L</td><td>C_SLOT5_100M_P</td><td>C_SLOT5_100M_N</td><td>C_SLOT6_CLK_REQ-L</td><td>C_SLOT6_100M_P</td><td>C_SLOT6_100M_N</td><td>C_SLOT7_CLK_REQ-L</td><td>C_SLOT7_100M_P</td><td>C_SLOT7_100M_N</td><td>NC</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>C_SLOT1_100M_P</td><td>C_SLOT1_100M_N</td><td>C_SLOT1_CLK_REQ-L</td><td>C_SLOT2_100M_P</td><td>C_SLOT2_100M_N</td><td>C_SLOT2_CLK_REQ-L</td><td>C_SLOT3_100M_P</td><td>C_SLOT3_100M_N</td><td>C_SLOT3_CLK_REQ-L</td><td>C_SLOT4_100M_P</td><td>C_SLOT4_100M_N</td><td>C_SLOT4_CLK_REQ-L</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>1</td><td>PCH_PCIE_SLOT7_TX_C_P</td><td>PCH_PCIE_SLOT7_TX_C_N</td><td>GND</td><td>PCH_PCIE_SLOT7_RX_C_P</td><td>PCH_PCIE_SLOT7_RX_C_N</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr></table>

# CompactPCI Serial Connector P6

DB-P6301 (4HP)

<table><tr><td></td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>8</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>7</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>LAN2_MDI_T_P0</td><td>LAN2_MDI_T_N0</td><td>GND</td><td>LAN2_MDI_T_P1</td><td>LAN2_MDI_T_N1</td><td>GND</td><td>LAN2_MDI_T_P2</td><td>LAN2_MDI_T_N2</td><td>GND</td><td>LAN2_MDI_T_P3</td><td>LAN2_MDI_T_N3</td></tr><tr><td>1</td><td>LAN1_MDI_T_P0</td><td>LAN1_MDI_T_N0</td><td>GND</td><td>LAN1_MDI_T_P1</td><td>LAN1_MDI_T_N1</td><td>GND</td><td>LAN1_MDI_T_P2</td><td>LAN1_MDI_T_N2</td><td>GND</td><td>LAN1_MDI_T_P3</td><td>LAN1_MDI_T_N3</td><td>GND</td></tr></table>

DB-P6302 (8HP)

<table><tr><td></td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>8</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>7</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>LAN2_MDI3_T_P0</td><td>LAN2_MDI3_T_N0</td><td>GND</td><td>LAN2_MDI3_T_P1</td><td>LAN2_MDI3_T_N1</td><td>GND</td><td>LAN2_MDI3_T_P2</td><td>LAN2_MDI3_T_N2</td><td>GND</td><td>LAN2_MDI3_T_P3</td><td>LAN2_MDI3_T_N3</td></tr><tr><td>3</td><td>LAN2_MDI2_T_P0</td><td>LAN2_MDI2_T_N0</td><td>GND</td><td>LAN2_MDI2_T_P1</td><td>LAN2_MDI2_T_N1</td><td>GND</td><td>LAN2_MDI2_T_P2</td><td>LAN2_MDI2_T_N2</td><td>GND</td><td>LAN2_MDI2_T_P3</td><td>LAN2_MDI2_T_N3</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>LAN2_MDI1_T_P0</td><td>LAN2_MDI1_T_N0</td><td>GND</td><td>LAN2_MDI1_T_P1</td><td>LAN2_MDI1_T_N1</td><td>GND</td><td>LAN2_MDI1_T_P2</td><td>LAN2_MDI1_T_N2</td><td>GND</td><td>LAN2_MDI1_T_P3</td><td>LAN2_MDI1_T_N3</td></tr><tr><td>1</td><td>LAN2_MDI0_T_P0</td><td>LAN2_MDI0_T_N0</td><td>GND</td><td>LAN2_MDI0_T_P1</td><td>LAN2_MDI0_T_N1</td><td>GND</td><td>LAN2_MDI0_T_P2</td><td>LAN2_MDI0_T_N2</td><td>GND</td><td>LAN2_MDI0_T_P3</td><td>LAN2_MDI0_T_N3</td><td>GND</td></tr></table>

# 4 Getting Started

This chapter describes the following installation procedures for the cPCI-A3535 and rear transition module:

 CPU and Heatsink
 Processor blade installation to chassis

# 4.1 CPU and Heatsink

The cPCI-A3535 comes with CPU and heatsink pre-installed. Removal of heatsink/CPU by users is not recommended. Please contact your ADLINK service representative for assistance.

# 4.2 Installing the Blade to the Chassis

The cPCI-A3535 must be installed in a system slot of a 3U CompactPCI Serial chassis. These instructions are for reference only. Refer to the user guide that comes with the chassis for more information.

1. Be sure to select the correct slot depending on the operational purpose of the module. The system power may now be powered on or off.
2. Remove the blank face cover from the selected slot, if necessary.
3. Press down on the release catches of the cPCI-A3535 ejector handles.
4. Remove the black plastic caps securing the mounting screws to the faceplate.
5. Align the module’s top and bottom edges to the chassis card guides, and then carefully slide the module into the chassis. A slight resistance may be felt when inserting the module. If the resistance it too strong, check if there are bent pins on the backplane or if the board’s connector pins are not properly aligned with connectors on the backplane. Then push the board until it is completely flush with the chassis.
6. Push the ejector handles outwards to secure the module in place, and then fasten the screws on the module faceplate.
7. Connect the cables and peripherals to the board, and then turn the chassis on if necessary.

# 5 Driver Installation

The cPCI-A3535 drivers are available from the ADLINK website (https://www.adlinktech.com/Products/CompactPCI/ 3UCompactPCISerialBlades/cPCI-A3535\_Series). ADLINK provides validated drivers for Windows 10 64-bit. We recommend using these drivers to ensure compatibility.

# 5.1 cPCI-A3535 Drivers

The following describes the cPCI-A3535 driver installation procedures for Windows 10 64-bit. Install the Windows operating system before installing any driver. Most standard I/O device drivers are installed during Windows installation.

1. Install the chipset driver by extracting and running the program in ...\Chipset-10.1.18698.8258-Public-MUP.zip.
2. Install the graphics driver and utilities by extracting and running the program in ...\Intel® Graphics Driver Production Version 100.9415.zip.
3. Install the Management Engine (ME) driver and utilities by extracting and running the program in ...\Intel\_CSME\_15.0.30.1776\_B0\_Consumer.zip.
4. Install the Serial IO driver by extracting and running the program in …\SerialIO\_30.100.2104.1\_PV\_TGL\_PCH\_20H2 v2.zip.
5. Install the RST driver by extracting and running the program in …\RST\_PV\_18.6.1.1016.2\_20H2\_21H2.zip.
6. Install the LAN driver by extracting and running the program in …\Intel\_Ethernet\_driver\_26\_3.zip.
7. Install the Trace Hub driver by extracting and running the program in …\Intel(R)\_Trace\_Hub\_10.0.19018.266.zip.

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# 6 Utilities

# 6.1 SEMA

Hardware monitoring and Watchdog Timer functionality are provided by ADLINK’s Smart Embedded Management Agent (SEMA), which operates via a Board Management Controller and communicates with the CPU through the SMBus. A graphical user interface program and command line interface are available to allow you to communicate with SEMA. Please refer to the SEMA user’s manual, available the SEMA GitHub page:

https://adlinktech.github.io/sema/index.html

![The image displays a standard document icon. It shows a white sheet of paper with a folded top-left corner and faint grey horizontal lines representing text. A large, bold red checkmark is superimposed over the center of the paper.](.cpci-a3535-50m-31130-1000-10/24617f8a6d1e37773abf9cbe033b8754a7977930a974a9026d13273250992446.jpg)
NOTE:

SEMA features are dependent on hardware design. There may be additonal costs for special service support.

# 6.2 Watchdog Timer

The cPCI-A3535’s watchdog timer (WDT) is implemented by SEMA. For detailed information on how to program the WDT, refer to the SEMA user’s manual WDT section on the SEMA GitHub page:

https://adlinktech.github.io/sema/WatchDog.html#sysfs-In

# 6.3 Controlling User LEDs

The User LEDs (uLED) on the cPCI-A3535 can be controlled using the GPIO pins of the Intel® RM590E Chipset: GPP\_D18 (Left User LED), GPP\_D19 (Right User LED). The following commands are sample code for Linux OS.

<table><tr><td>User LED</td><td>GPIO Pin</td><td>PINCTRL GPIO Number</td></tr><tr><td>Left</td><td>GPP_D18</td><td>gpio707</td></tr><tr><td>Right</td><td>GPP_D18</td><td>gpio708</td></tr></table>

Table 6-1: User LED GPIO Mapping

# Sample Code

```shell
# LED on: Pull high
# LED off: Pull low (default)

# uLED control by Chipset GPIO, add corresponding GPIO number to the system node
$ sudo sh -c "echo 707 > /sys/class/gpio/export"
$ sudo sh -c "echo 708 > /sys/class/gpio/export"

# uLED GPIO direction is output, set value "out" to the system node
$ sudo sh -c "echo out > /sys/class/gpio/gpio707/direction"
$ sudo sh -c "echo out > /sys/class/gpio/gpio708/direction"

# Set GPIO value "1" to turn uLED LED on
$ sudo sh -c "echo 1 > /sys/class/gpio/gpio707/value"
$ sudo sh -c "echo 1 > /sys/class/gpio/gpio708/value"

# Set GPIO value "0" to turn uLED off
$ sudo sh -c "echo 0 > /sys/class/gpio/gpio707/value"
$ sudo sh -c "echo 0 > /sys/class/gpio/gpio708/value"

# Remove uLED GPIO used, unregister corresponding GPIO number from the system node
$ sudo sh -c "echo 707 > /sys/class/gpio/unexport"
$ sudo sh -c "echo 708 > /sys/class/gpio/unexport"
```

# 7 BIOS Setup

The following chapter describes basic navigation for the AMI UEFI BIOS setup utility.

# 7.1 Starting the BIOS

To enter the setup screen, follow these steps:

1. Power on the motherboard
2. Press the &lt; Delete &gt; key on your keyboard when you see the following text prompt: &lt; Press DEL to run Setup &gt;
3. After you press the &lt; Delete &gt; key, the main BIOS setup menu displays. You can access the other setup screens from the main BIOS setup menu.

![An icon of a white document with a folded top-right corner and horizontal lines, featuring a large red checkmark superimposed over it.](.cpci-a3535-50m-31130-1000-10/2aa01eb61f5423d2f39cc6ce1106cd61a110164a8a05263a8b7a8a09369edef2.jpg)
NOTE:

In most cases, the &lt; Delete &gt; key is used to invoke the setup screen. There are several cases that use other keys, such as &lt; F1 &gt;, &lt; F2 &gt;, and so on.

# Setup Menu

The main BIOS setup menu is the first screen that you can navigate. Each main BIOS setup menu option is described in this user’s guide.

The Main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. “Grayed” options cannot be configured, “Blue” options can be.

The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it.

# Navigation

The BIOS setup/utility uses a key-based navigation system called hot keys. Most of the BIOS setup utility hot keys can be used at any time during the setup navigation process.

![The flowchart begins at the top with a block labeled 'BIOS Setup Utility,' which has a downward arrow pointing to the text 'Screens.'\n\nFrom 'Screens,' there is a downward arrow pointing to the text 'Items.'\n\n**Screens Section:**\n*   A block labeled 'Left and Right Keys to Select a Setup Screen' connects via a dashed arrow to a horizontal row of five blocks.\n*   The row consists of: 'Screen 1' (-) 'Screen 2' (-) 'Screen 3' (-) 'Screen 4' (-) 'Screen 5' (connected by double-headed arrows).\n\n**Items Section:**\n*   A block labeled 'Tab Key to Select Fields' connects via a dashed arrow to a top row of three blocks containing the symbol '±'.\n*   A block labeled '± To Change Field Values' connects via a dashed arrow to the third block in the top row.\n*   The top row consists of three '±' blocks connected by double-headed arrows.\n*   Below the top row is a bottom row of three '±' blocks connected by double-headed arrows.\n*   Between the two rows of '±' blocks, there is a downward arrow and an upward arrow.\n*   A text label 'Fields' connects via a bracket-style arrow to the bottom row of blocks.\n*   A block labeled 'Up and Down Keys to Select a Setup Item' connects via a dotted arrow to the vertical arrows between the rows.](.cpci-a3535-50m-31130-1000-10/c203091f6e8e9b2d13cc49f01979e0364395a3476bdb2c4b16e7a78b792855a8.jpg)

![The image features a white document icon with a folded top-right corner and faint gray horizontal lines across the bottom. A large red checkmark is superimposed over the center, indicating approval or completion.](.cpci-a3535-50m-31130-1000-10/edb3d38f19087783ddc6397f1c9f6c38ddd308af70f2b5991c5836c1681633e2.jpg)
NOTE:

There is a hot key legend located in the right frame on most setup screens.

→← Left/Right. The Left and Right &lt; Arrow &gt; keys allow you to select a setup screen. For example: Main screen, Advanced screen, Chipset screen, and so on.
↑↓ Up/Down The Up and Down &lt; Arrow &gt; keys allow you to select a setup item or sub-screen.
+- Plus/Minus The Plus and Minus &lt; Arrow &gt; keys allow you to change the field value of a particular setup item. For example: Date and Time.
Tab The &lt; Tab &gt; key allows you to select setup fields.
ESC The &lt; Esc &gt; key allows you to discard any changes you have made and exit the Setup. Press the &lt; Esc &gt; key to exit the setup without saving your changes. Press the &lt; Enter &gt; key to discard changes and exit. You can also use the &lt; Arrow &gt; key to select Cancel and then press the &lt; Enter &gt; key to abort this function and return to the previous screen.

# 7.2 Setup Menus

Refer to the document cPCI-A3535 BIOS User's Manual for detailed BIOS setup menu information, available for download from the ADLINK website at https://www.adlinktech.com/Products/ CompactPCI/3UCompactPCISerialBlades/cPCI-A3535\_Series.

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# Important Safety Instructions

For user safety, please read and follow all instructions, WARNINGS, CAUTIONS, and NOTES marked in this manual and on the associated equipment before handling/operating the equipment.

 Read these safety instructions carefully.
 Keep this user’s manual for future reference.
 Read the specifications section of this manual for detailed information on the operating environment of this equipment.
? When installing/mounting or uninstalling/removing equipment:
 Turn off power and unplug any power cords/cables.
 To avoid electrical shock and/or damage to equipment:
 Keep equipment away from water or liquid sources;
 Keep equipment away from high heat or high humidity;
 Keep equipment properly ventilated (do not block or cover ventilation openings);
 Make sure to use recommended voltage and power source settings;
 Always install and operate equipment near an easily accessible electrical socket-outlet;
 Secure the power cord (do not place any object on/over the power cord);
 Only install/attach and operate equipment on stable surfaces and/or recommended mountings; and,
 If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source.

 Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.

A Lithium-type battery may be provided for uninterrupted, backup or emergency power.

![The image displays a vertical rectangular safety sign featuring a red triangle with a white exclamation point in its center. Below the triangle, the word 'WARNING' is printed in black capital letters.](.cpci-a3535-50m-31130-1000-10/e39e1e75578fffebe562ba7efa20b7403496899f805230d3f83566b8026d2c40.jpg)

Risk of explosion if battery is replaced with one of an incorrect type. Dispose of used batteries appropriately.

 Equipment must be serviced by authorized technicians when:

 The power cord or plug is damaged;
 Liquid has penetrated the equipment;
 It has been exposed to high humidity/moisture;
 It is not functioning or does not function according to the user’s manual;
 It has been dropped and/or damaged; and/or,
 It has an obvious sign of breakage.

# Getting Service

Ask an Expert: https://www.adlinktech.com/en/Askanexpert

# ADLINK Technology, Inc.

No. 66, Huaya 1st Rd., Guishan Dist.,

Taoyuan City 333411, Taiwan

Tel: +886-3-216-5088

Fax: +886-3-328-5706

Email: service@adlinktech.com

# Ampro ADLINK Technology, Inc.

6450 Via Del Oro

San Jose, CA 95119-1208, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-600-1189

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

300 Fang Chun Rd., Zhangjiang Hi-Tech Park

Pudong New Area, Shanghai, 201203 China

Tel: +86-21-5132-8988

Fax: +86-21-5132-3588

Email: market@adlinktech.com

# ADLINK Technology GmbH

Hans-Thoma-Strasse 8-10

D-68163 Mannheim, Germany

Tel: +49-621-43214-0

Fax: +49-621 43214-30

Email: emea@adlinktech.com

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you:
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