# cPCI-A3MXM

# User’s Manual

3U CompactPCI® Serial GPU Carrier Card

![CompactPCI®\nSerial\nDP1\nDP2\nDP3\nDP4\n010-0022F-15\nDB-4CPW\nN/S\nADLINK\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n3000\n300](.cpci-a3mxm-50m-32014-1000-02/88a4c19a8c64e4d97d67bc892420a6381523617453e0670f64f2bc018bbe6a20.jpg)

Manual Rev.: 0.2 Preliminary

Revision Date: November 19, 2024

Part Number: 50M-32014-1000

# Revision History

<table><tr><td>Revision</td><td>Description</td><td>Date</td><td>By</td></tr><tr><td>0.1</td><td>Preliminary release</td><td>2024-10-28</td><td>AL</td></tr><tr><td>0.2</td><td>Specifications, mechanical layout, connector pinouts added</td><td>2024-11-19</td><td>AL</td></tr></table>

# Preface

# Copyright

Copyright 2024 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

![Symbol of a trash bin crossed with a diagonal line and a horizontal bar below (no text or labels)](.cpci-a3mxm-50m-32014-1000-02/21805830598257a7618382618055f9b1a813389230b0a2f72404065dc7a1e1ee.jpg)

Battery Labels (for products with battery)

![Simple line drawing of a trash bin with crossed lines indicating no waste or prohibition (no text or symbols)](.cpci-a3mxm-50m-32014-1000-02/8b600cc6f617aaa265a0508c9bedf945c5cfa26f9c61432045a75db2a55116d3.jpg)

![Li-ion](.cpci-a3mxm-50m-32014-1000-02/98a1199e80456fdc493c516141b33c4984ead0dc286f7dc0b30e1dc4ddeddb5a.jpg)

![RECYCLE\nRBRC\nLi·ion\n7.800.822.8837](.cpci-a3mxm-50m-32014-1000-02/b5d6041b5bde488fb53fb521f67d3323573f1fcee06e03277345b7518bccc722.jpg)

![廢電池請回收](.cpci-a3mxm-50m-32014-1000-02/a7c3d128f33abe4d9a661b0effc198f23f8c93e7b0b66dad1b9cc347e037662c.jpg)

# California Proposition 65 Warning

![The image displays a standard warning sign featuring a yellow triangle with a thick black border. Inside the triangle is a large black exclamation mark.](.cpci-a3mxm-50m-32014-1000-02/bc515a77b8858ce8479f603effedf7573a087bc4c62b1f7e08708116142945e6.jpg)

WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP,

DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Conventions

Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly.

The cPCI-A3MXM Module (MXM-A1000 or MXM-A4500)

![The image displays a white document icon with a folded top-right corner and horizontal lines, overlaid with a large red checkmark.](.cpci-a3mxm-50m-32014-1000-02/4dced6529c8e037a847c46b891852ae52035ce5d360156670686dfe7eec33226.jpg)
NOTE:

Additional information, aids, and tips that help users perform tasks.

![The image displays a yellow triangular warning sign with a black border. Inside the triangle, there is a large, black exclamation mark centered vertically and horizontally.](.cpci-a3mxm-50m-32014-1000-02/597bb2b579cef1b661675dcec91d1b326d0b375977fdd69f10be4a2f33e5b735.jpg)
CAUTION:

Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.

![The image shows a red triangular warning sign with a white exclamation mark centered inside it.](.cpci-a3mxm-50m-32014-1000-02/aba11f613193fb0281d65407eb9a825c483bdaa65521623904169ce23f24b597.jpg)
WARNING:

Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task.

# Table of Contents

# Preface...

# List of Figures .... ..vi

# List of Tables...... ..vi

# 1 Introduction....

1.1 Features...
1.2 Package Contents.

# 2 Specifications ....

2.1 Product Specifications.... .3
2.2 Block Diagram.. .4

# 3 Mechanical Layout .....

3.1 cPCI-A3MXM Connector and Switch Locations.. .5
3.2 DB-A3PW Connector Locations and Functions.. .6

# 4 Connector Pinouts ..

4.1 cPCI-A3MXM CompactPCI P1 Connector.. .9
4.2 cPCI-A3MXM CompactPCI P2 Connector. .9
4.3 cPCI-A3MXM CompactPCI P3 Connector. ...10
4.4 DB-A3PW P1 Connector -SKU1 . ..10
4.5 DB-A3PW RJ4 Connector -SKU2.. .11
4.6 DisplayPort Connector (CN2-CN5)..... ..12
4.7 cPCI-A3MXM Board to Board Connector (CN6).. .13
4.8 MXM Connector.. ..14
4.9 DB-A3PW Board to Board Connector (CN6) – SKU1. .17
4.10 DB-A3PW FAN Connector (FAN1) – SKU1.. ..18
4.11 DB-A3PW ATX 4 Pin Power Connector (CN\_PWR) – SKU2.. ...18
4.12 DIP Switch Connector... ..19

# 5 Driver Installation .... .21

5.1 Windows Driver.. .21

# Safety Instructions......... .22

# Getting Services.... .23

# List of Figures

Figure 1: Functional block diagram. 4

Figure 2: cPCI-A3MXM IO connector and switch locations (Top). 5

Figure 3:cPCI-A3MXM connector and switch locations (Bottom) . .6

Figure 4:DB-A3PW power board connector locations (Top).. .6

Figure 5:DB-A3PW power board connector locations (Bottom)..

Figure 6:DB-A3PW daughter board – SKU1: Power input from P1)..

Figure 7:DB-A3PW rear board – SKU 2: Power input from ATX 4 pin connector........8

Figure 8:Switch locations (Bottom) .. ..19

# List of Tables

Table 1: cPCI-A3MXM CompactPCI P1 connector. 9

Table 2: cPCI-A3MXM CompactPCI P2 connector.. .9

Table 3: cPCI-A3MXM CompactPCI P3 connector.. ..10

Table 4: DB-A3PW P1 connector -SKU1.. ..10

Table 5: DB-A3PW RJ4 connector -SKU2. .11

Table 6: DisplayPort connector.. .12

Table 7: cPCI-A3MXM board to board connector.. ..13

Table 8: MXM connector . .14

Table 9: DB-A3PW Board to Board Connector. .17

Table 10: DB-A3PW FAN connector . ..18

Table 11: DB-A3PW ATX 4 pin power connector .. .18

Table 12: Switch connector 1 and 2 . .19

# 1 Introduction

The 3U 4HP/8HP CPCI-S.0 Compact PCI Serial peripheral cPCI-A3MXM is an MXM carrier card that supports both type A and type B MXM GPU card, via PCIe Gen4 x 8. All display signal will support both front and rear transitions. The cPCI-A3MXM is a CompactPCI Serial card designed to be compatible with standard CPCI-S.0 systems.

The front panel of the cPCI-A3MXM features 4 x DP connectors, and a locking mechanism is required. The rear transition of the cPCI-A3MXM supports all rear signals to P3.

# 1.1 Features

• Follow PICMG® CompactPCI® Serial design guide
• CompactPCI® Serial, 3U 4HP/8HP (100mm x 160mm)
Compatible with MXM Type A (82 mm x 70 mm) or Type B (82 mm x 105 mm)
Supports NVIDIA A1000 with 2048 CUDA® cores, 16 RT cores and 64 Tensor cores or NVIDIA RTX™ A4500 with 5888 CUDA® cores, 46 RT cores, and 184 Tensor cores.
• 4x DisplayPort 1.4, supporting 4K (3840x2160) resolution
Operating temperature: -40°C to +70°C
Designed to meet EN50155 standards

# 1.2 Package Contents

The cPCI-A3MXM is packaged with the following components. If any of the following items are missing or damaged, retain the shipping carton and packing material and contact the dealer for inspection. Please obtain authorization before returning any product to ADLINK. The packing contents of cPCI-A3MXM non-standard configurations will vary depending on customer requests.

# CompactPCI Module

The cPCI-A3MXM Module (MXM-A1000 or MXM-A4500)

![The image shows a document icon with a white background and a black outline, featuring a folded top-left corner. Faint horizontal lines run across the page. A large, red checkmark is superimposed diagonally over the document, extending from the bottom left to the top right.](.cpci-a3mxm-50m-32014-1000-02/7129e9b510ff2fdac52c1f250ef393824dfad1f6730acf03beb86a99a97c3012.jpg)
NOTE:

The contents of non-standard cPCI-A3MXM configurations may vary depending on the customer’s requirements.

![The image displays a yellow equilateral triangle with a thick black outline. Centered inside the triangle is a large black exclamation point.](.cpci-a3mxm-50m-32014-1000-02/1e0156b977f75311ecc7995e7100eb9af099b6bb5b6e1b688632e8ee0a7693a8.jpg)
CAUTION:

This product must be protected from static discharge and physical shock. Never remove any of the components except at a static-free workstation. Use the anti-static bag shipped with the product when putting the board on a surface. Wear an anti-static wrist strap properly grounded on one of the system's ESD ground jacks when installing or servicing system components.

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# 2 Specifications

# 2.1 Product Specifications

<table><tr><td>PCIe Bus Architecture</td><td>Follow PICMG® CompactPCI® Serial design guide1x PCIe Gen 4.0 x 8 from P1 &amp; P2 (with Gen 3.0 connector now)</td></tr><tr><td>Form Factor</td><td>4x Display Port 1.4, support 4K (3840x2160) resolutionWith MXM-A10004HP CPCI-S.0 R2.0 standard with locking handle and two front panel securing screwsWith MXM A45008HP CPCI-S.0 R2.0 standard with locking handle and two front panel securing screws with BTB power board</td></tr><tr><td>MXM</td><td>Type A (MXM-A1000) &amp; Type B (MXM-A4500)Support Max 120WSupport PCIe Gen 4.0 x 8</td></tr><tr><td>Power Board</td><td>As DB-A3PW for more power with 8HP for MXM-A4500 configuration for heat sink version, 12V input from P1</td></tr><tr><td>OS Support</td><td>Windows 10Ubuntu 22.X</td></tr><tr><td>Environmental</td><td>Operating temperature: (With Heat sink version)4HP: -40°C to70°C with airflow, supports display out only.8HP: -40°C to 70°C, EN50155 OT3 Class +ST1 (+85C for 10mins) when provided with airflow (GPU card will be screen out by ETT. Without heater support)Storage temperature: -40°C to 95°CHumidity: 5% to 95% relative humidity (non-condensing)</td></tr><tr><td>Dimensions</td><td>With MXM-A1000 (air cooling type)4HP: 100 mm x 160 mm x 20.32 mm (L x W x H)With MXM-A4500 (air cooling type)8HP: 100 mm x 160 mm x 40.64 mm (L x W x H)</td></tr><tr><td>MTBF</td><td>15.1 years at minimum</td></tr><tr><td>Weight</td><td>4HP: 0.6 kg, 8HP: 0.7 kg (including heatsink)</td></tr></table>

# 2.2 Block Diagram

![**Labeled Blocks:**\n*   **Left Column:** Four vertically stacked blocks labeled 'DP'.\n*   **Top Row:** Four blocks labeled 'DP++ Mux'.\n*   **Center:** One large block labeled 'MXM A & B Type'.\n*   **Bottom Center:** One block labeled 'PCIe x8 retimer'.\n*   **Right Column:** Six vertically stacked blocks. The top three are grey and labeled 'P6', 'P5', and 'P4'. The bottom three are blue and labeled 'RTM', 'P2', and 'P1'.\n\n**Connections:**\n*   The four 'DP' blocks connect via lines to the four 'DP++ Mux' blocks.\n*   The four 'DP++ Mux' blocks connect to the top of the 'MXM A & B Type' block.\n*   The 'MXM A & B Type' block connects to the 'PCIe x8 retimer' block.\n*   The rightmost 'DP++ Mux' block connects to the 'RTM' block.\n*   The 'PCIe x8 retimer' block connects to the 'P2' and 'P1' blocks.\n*   The 'P6', 'P5', and 'P4' blocks are unconnected.](.cpci-a3mxm-50m-32014-1000-02/1903e26a2e543943d9bacd8312c63bddc364f1f6ad48e67dec5f537d7a1fa9b9.jpg)

Figure 1: Functional block diagram

# 3 Mechanical Layout

# 3.1 cPCI-A3MXM Connector and Switch Locations

![Display conn 1\n (Location CN4)\nDisplay conn 2\n (Location CN2)\nDisplay conn 3\n (Location CN5)\nDisplay conn 4\n (Location CN3)\nMXM conn\nPCIE GEN4\nretimer\nL1\nL8\nL10\n2\n1\n2\n3\n4\n5\n6\n7\n8\n9\n10\n11\n12\n13\n14\n15\n16\n17\n18\n19\n20\n21\n22\n23\n24\n25\n26\n27\n28\n29\n30\n31\n32\n33\n34\n35\n36\n37\n38\n39\n40\n41\n42\n43\n44\n45\n46\n47\n48\n49\n50\n51\n52\n53\n54\n55\n56\n57\n58\n59\n60\n61\n62\n63\n64\n65\n66\n67\n68\n69\n70\n71\n72\n73\n74\n75\n76\n77\n78\n79\n80\n81\n82\n83\n84\n85\n86\n87\n88\n89\n90\n91\n92\n93\n94\n95\n96\n97\n98\n99\n100](.cpci-a3mxm-50m-32014-1000-02/24fecaec6853e23fe770732337d5e0fb8a4b2b119181207350be731018b73ff1.jpg)

<table><tr><td>P1 to P3</td><td>CompactPCI Serial connectors</td></tr><tr><td>BTB connector</td><td>Power board connector (DB-A3PW)</td></tr><tr><td>Retimer</td><td>PCIe retimer</td></tr><tr><td>MXM connector</td><td>PCIe MXM card connector(MXM-A1000 or MXM-A4500)</td></tr><tr><td>DP connector</td><td>Front panel DisplayPort connectors</td></tr></table>

Figure 2: cPCI-A3MXM IO connector and switch locations (Top)

![Display corn1\n(Location CN4)\nDisplay corn2\n(Location CN2)\nEEPROM\nfor PCIE retimer\nDisplay MUX 1-Location U10\nSW2\nDisplay MUX 2-Location U8\nDisplay corn3\n(Location CN5)\nDisplay MUX 3-Location U11\nSW1\nDisplay MUX 4-Location U9\nDisplay corn4\n(Location CN3)](.cpci-a3mxm-50m-32014-1000-02/a0d0a0cd7c88215d2bdcb7580ba12df21de5190d8c3a8e1104c88453be39f799.jpg)

<table><tr><td>SW1 to SW2</td><td>Display port output switch</td></tr></table>

Figure 3:cPCI-A3MXM connector and switch locations (Bottom)

# 3.2 DB-A3PW Connector Locations and Functions

![FAN conn\npower conn\n(Location CN_PWR)\nLED\ncPCI-S conn\n(Location P3)\ncPCI-S conn\n(Location P1)](.cpci-a3mxm-50m-32014-1000-02/aadb574e289965dd89002b17d4b97712f45d4c5e7b8f60e9bb08e2bdaebbb8f7.jpg)

<table><tr><td>P1 to P3</td><td>CompactPCI Serial connectors</td></tr><tr><td>LED</td><td>12V Power OK</td></tr><tr><td>Power connector</td><td>12V ATX 4 pin power connector</td></tr><tr><td>Fan connector</td><td>Fan connector</td></tr></table>

Figure 4:DB-A3PW power board connector locations (Top)

![BTB conn\n(Location CN6)](.cpci-a3mxm-50m-32014-1000-02/a9654c3042bc6d0a97e55847b1eb1bbd5a055a327565aef0995ecd779df03629.jpg)

<table><tr><td>P1 to P3</td><td>CompactPCI Serial connectors</td></tr></table>

Figure 5:DB-A3PW power board connector locations (Bottom)
![FAN connector\nS/N\n51-32203-0A10\nC424W 300W 300W\nC419\nC418\nC417\nC416\nC415\nC414\nC413\nC412\nR14\nH2\nADLINK\nCA19\nCA08\nCA07\nCA06\nCA05\nCA04\nCA03\nCA02\nCA01\nCA00\nCA99\nCA98\nCA97\nCA96\nCA95\nCA94\nCA93\nCA92\nCA91\nCA90\nCA89\nCA88\nCA87\nCA86\nCA85\nCA84\nCA83\nCA82\nCA81\nCA80\nCA79\nCA78\nCA77\nCA76\nCA75\nCA74\nCA73\nCA72\nCA71\nCA70\nCA69\nCA68\nCA67\nCA66\nCA65\nCA64\nCA63\nCA62\nCA61\nCA60\nCA59\nCA58\nCA57\nCA56\nCA55\nCA54\nCA53\nCA52\nCA51\nCA50\nCA49\nCA48\nCA47\nCA46\nCA45\nCA44\nCA43\nCA42\nCA41\nCA40\nCA39\nCA38\nCA37\nCA36\nCA35\nCA34\nCA33\nCA32\nCA31\nCA30\nCA29\nCA28\nCA27\nCA26\nCA25\nCA24\nCA23\nCA22\nCA21\nCA20\nCA19\nCA18\nCA17\nCA16\nCA15\nCA14\nCA13\nCA12\nCA11\nCA10\nCA9](.cpci-a3mxm-50m-32014-1000-02/9481615b82fd12b684d15771dac224b41cbc654453c84e267f796aed5df54067.jpg)

Figure 6:DB-A3PW daughter board – SKU1: Power input from P1)

![ATX 4 Pin Power connector\nS/10\n51-32203-0410\n98 MAX ALE WaDr 60\ncPCI-S connector\nADLINK\nCJ19\nC208\nC207\nC206\nC205\nC204\nC203\nC202\nC201\nC200\nC199\nC198\nC197\nC196\nC195\nC194\nC193\nC192\nC191\nC190\nC189\nC188\nC187\nC186\nC185\nC184\nC183\nC182\nC181\nC180\nC179\nC178\nC177\nC176\nC175\nC174\nC173\nC172\nC171\nC170\nC169\nC168\nC167\nC166\nC165\nC164\nC163\nC162\nC161\nC160\nC159\nC158\nC157\nC156\nC155\nC154\nC153\nC152\nC151\nC150\nC149\nC148\nC147\nC146\nC145\nC144\nC143\nC142\nC141\nC140\nC139\nC138\nC137\nC136\nC135\nC134\nC133\nC132\nC131\nC130\nC129\nC128\nC127\nC126\nC125\nC124\nC123\nC122\nC121\nC120\nC119\nC118\nC117\nC116\nC115\nC114\nC113\nC112\nC111\nC110\nCAIINK](.cpci-a3mxm-50m-32014-1000-02/2f090754d635bf7ebe25e91b06f7bfa91622d329620bba7442d32a518b76611b.jpg)

Figure 7:DB-A3PW rear board – SKU 2: Power input from ATX 4 pin connector

# 4 Connector Pinouts

# 4.1 cPCI-A3MXM CompactPCI P1 Connector

Table 1: cPCI-A3MXM CompactPCI P1 connector

<table><tr><td>Name</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>1</td><td>P_+12V</td><td>NC_P_+5VSB</td><td>GND</td><td>P_+12V</td><td>P_+12V</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>P1_I2C_SCL</td><td>P1_I2C_SDA</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>P1_PCIE_CLK_DP</td><td>P1_PCIE_CLK_DN</td></tr><tr><td>5</td><td>PCIE_TX0_DP</td><td>PCIE_TX0_DN</td><td>GND</td><td>PCIE_RX0_DP</td><td>PCIE_RX0_DN</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>PCIE_TX2_DP</td><td>PCIE_TX2_DN</td><td>GND</td><td>PCIE_RX2_DP</td><td>PCIE_RX2_DN</td></tr></table>

<table><tr><td>Name</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>1</td><td>P_+12V</td><td>P_+12V</td><td>GND</td><td>P_+12V</td><td>P_+12V</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>P1_PRST_N</td><td>NC_P1_WAKE_OUT_N</td><td>GND</td><td>P1_PCIE_EN_N</td><td>NC_P1_SYSEN_N</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>PCIE_TX1_DP</td><td>PCIE_TX1_DN</td><td>GND</td><td>PCIE_RX1_DP</td><td>PCIE_RX1_DN</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>PCIE_TX3_DP</td><td>PCIE_TX3_DN</td><td>GND</td><td>PCIE_RX3_DP</td><td>PCIE_RX3_DN</td></tr></table>

# 4.2 cPCI-A3MXM CompactPCI P2 Connector

Table 2: cPCI-A3MXM CompactPCI P2 connector

<table><tr><td>Pin</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>1</td><td>PCIE_TX4_DP</td><td>PCIE_TX4_DN</td><td>GND</td><td>PCIE_RX4_DP</td><td>PCIE_RX4_DN</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>PCIE_TX6_DP</td><td>PCIE_TX6_DN</td><td>GND</td><td>PCIE_RX6_DP</td><td>PCIE_RX6_DN</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>7</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr></table>

<table><tr><td>Pin</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>1</td><td>PCIE_TX5_DP</td><td>PCIE_TX5_DN</td><td>GND</td><td>PCIE_RX5_DP</td><td>PCIE_RX5_DN</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>PCIE_TX7_DP</td><td>PCIE_TX7_DN</td><td>GND</td><td>PCIE_RX7_DP</td><td>PCIE_RX7_DN</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>7</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr></table>

# 4.3 cPCI-A3MXM CompactPCI P3 Connector

Table 3: cPCI-A3MXM CompactPCI P3 connector

<table><tr><td>Pin</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>1</td><td>REAR_DP_B_L0_DP</td><td>REAR_DP_B_L0_DN</td><td>GND</td><td>REAR_DP_B_L1_DP</td><td>REAR_DP_B_L1_DN</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>REAR_DP_B_HPD</td><td>NC</td><td>GND</td><td>REAR_DP_B_AUX_R_DP</td><td>REAR_DP_B_AUX_R_DN</td></tr><tr><td>3</td><td>REAR_DP_B_L2_DP</td><td>REAR_DP_B_L2_DN</td><td>GND</td><td>REAR_DP_B_L3_DP</td><td>REAR_DP_B_L3_DN</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>REAR_DP_D_HPD</td><td>NC</td><td>GND</td><td>REAR_DP_D_AUX_R_DP</td><td>REAR_DP_D_AUX_R_DN</td></tr><tr><td>5</td><td>REAR_DP_A_L0_DP</td><td>REAR_DP_A_L0_DN</td><td>GND</td><td>REAR_DP_A_L1_DP</td><td>REAR_DP_A_L1_DN</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>REAR_DP_A_HPD</td><td>NC</td><td>GND</td><td>REAR_DP_A_AUX_R_DP</td><td>REAR_DP_A_AUX_R_DN</td></tr><tr><td>7</td><td>REAR_DP_A_L2_DP</td><td>REAR_DP_A_L2_DN</td><td>GND</td><td>REAR_DP_A_L3_DP</td><td>REAR_DP_A_L3_DN</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>REAR_DP_C_HPD</td><td>NC</td><td>GND</td><td>REAR_DP_C_AUX_R_DP</td><td>REAR_DP_C_AUX_R_DN</td></tr></table>

<table><tr><td>Pin</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>1</td><td>REAR_DP_D_L0_DP</td><td>REAR_DP_D_L0_DN</td><td>GND</td><td>REAR_DP_D_L1_DP</td><td>REAR_DP_D_L1_DN</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>REAR_DP_D_L2_DP</td><td>REAR_DP_D_L2_DN</td><td>GND</td><td>REAR_DP_D_L3_DP</td><td>REAR_DP_D_L3_DN</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>REAR_DP_C_L0_DP</td><td>REAR_DP_C_L0_DN</td><td>GND</td><td>REAR_DP_C_L1_DP</td><td>REAR_DP_C_L1_DN</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>7</td><td>REAR_DP_C_L2_DP</td><td>REAR_DP_C_L2_DN</td><td>GND</td><td>REAR_DP_C_L3_DP</td><td>REAR_DP_C_L3_DN</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>P_+3V3</td><td>P_+3V3</td><td>GND</td><td>P_+3V3</td><td>P_+3V3</td></tr></table>

# 4.4 DB-A3PW P1 Connector -SKU1

Table 4: DB-A3PW P1 connector -SKU1

<table><tr><td>Pin</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>1</td><td>P_+12V</td><td>NC</td><td>GND</td><td>P_+12V</td><td>P_+12V</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>Pin</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>1</td><td>P_+12V</td><td>P_+12V</td><td>GND</td><td>P_+12V</td><td>P_+12V</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td><td>NC</td></tr><tr><td>4</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr></table>

# 4.5 DB-A3PW RJ4 Connector -SKU2

Table 5: DB-A3PW RJ4 connector -SKU2

<table><tr><td>Pin</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>1</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>GND</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>P_+12V</td><td>P_+12V</td><td>GND</td><td>P_+12V</td><td>P_+12V</td></tr><tr><td>5</td><td>P_+12V</td><td>P_+12V</td><td>GND</td><td>P_+12V</td><td>P_+12V</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>7</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr></table>

<table><tr><td>Pin</td><td>G</td><td>H</td><td>I</td><td>J</td><td>K</td><td>L</td></tr><tr><td>1</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>P_+12V</td><td>P_+12V</td><td>GND</td><td>P_+12V</td><td>P_+12V</td></tr><tr><td>5</td><td>P_+12V</td><td>P_+12V</td><td>GND</td><td>P_+12V</td><td>P_+12V</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr><tr><td>7</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>NC</td><td>NC</td><td>GND</td><td>NC</td><td>NC</td></tr></table>

# 4.6 DisplayPort Connector (CN2-CN5)

Table 6: DisplayPort connector
![16.10 (.634)\n12.00 (.472)\n19-0.50 (.020)(PITCH)\nCL OF 16.10\nPIN 1\n4.76 (.187)\n1.64+0.1 (.065+0.004)\nPIN 19\nA\n3.65 (.144)\n①\n②\nPIN 20\nA ← CL OF 12.00\n1.64+0.1 (.065+0.004)\n10.50 (.413)\n(16.50 (.650))\n5-R0.30+0.2 (R.012+0.008)\nPIN 2](.cpci-a3mxm-50m-32014-1000-02/35e8956c1291e9290d4e18543a60a0d022cda1a711763f29978719326c231a4f.jpg)

<table><tr><td>Pin</td><td>Signal</td><td>Function</td></tr><tr><td>1</td><td>DP LANE0+</td><td>Main Link Lane 0+ channel</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>DP LANE0-</td><td>Main Link Lane 0- channel</td></tr><tr><td>4</td><td>DP LANE1+</td><td>Main Link Lane 1+ channel</td></tr><tr><td>5</td><td>GND</td><td>Ground</td></tr><tr><td>6</td><td>DP LANE1-</td><td>Main Link Lane 1- channel</td></tr><tr><td>7</td><td>DP LANE2+</td><td>Main Link Lane 2+ channel</td></tr><tr><td>8</td><td>GND</td><td>Ground</td></tr><tr><td>9</td><td>DP LANE2-</td><td>Main Link Lane 2- channel</td></tr><tr><td>10</td><td>DP LANE3+</td><td>Main Link Lane 3+ channel</td></tr><tr><td>11</td><td>GND</td><td>Ground</td></tr><tr><td>12</td><td>DP LANE3-</td><td>Main Link Lane 3- channel</td></tr><tr><td>13</td><td>Config1</td><td></td></tr><tr><td>14</td><td>Config2</td><td></td></tr><tr><td>15</td><td>AUX+</td><td>Auxiliary + channel</td></tr><tr><td>16</td><td>GND</td><td>Ground</td></tr><tr><td>17</td><td>AUX-</td><td>Auxiliary - channel</td></tr><tr><td>18</td><td>HOT PLUG</td><td>Hot plug detects for DP panel</td></tr><tr><td>19</td><td>RTN_PWR</td><td>the power</td></tr><tr><td>20</td><td>DP PWR</td><td>3.3V power for DP panel</td></tr></table>

# 4.7 cPCI-A3MXM Board to Board Connector (CN6)

Table 7: cPCI-A3MXM board to board connector
![02\n.195(4.95)\n.182(4.62)\nØ.256(6.50)](.cpci-a3mxm-50m-32014-1000-02/bc838f969727b8ba13008b60e19c5d2b9127aabe5f41d17518f3ef3d7813b929.jpg)

<table><tr><td>Pin</td><td>Signal</td><td>Function</td></tr><tr><td>1</td><td>P12V_PSU</td><td rowspan="6">Provides more power from another peripheral card (Power board).</td></tr><tr><td>2</td><td>P12V_PSU</td></tr><tr><td>3</td><td>P12V_PSU</td></tr><tr><td>4</td><td>P12V_PSU</td></tr><tr><td>5</td><td>P12V_PSU</td></tr><tr><td>6</td><td>P12V_PSU</td></tr><tr><td>7</td><td>GND</td><td>Ground</td></tr><tr><td>8</td><td>GND</td><td>Ground</td></tr><tr><td>9</td><td>GND</td><td>Ground</td></tr><tr><td>10</td><td>GND</td><td>Ground</td></tr><tr><td>11</td><td>NC</td><td>Not Connect</td></tr><tr><td>12</td><td>GND</td><td>Ground</td></tr></table>

# 4.8 MXM Connector

Table 8: MXM connector
![E2_1\nE4_10\nE4_1\nPIN-2\nDATE CODE AREA\n0.50 TYP.\n0.50\n0.12±0.01\n0.14\n(0.750)\nE2_10\nE3_10\nSTD\nCkt1\nE3_1\nE1_10\nE1_1\n2.50\n4 Y\nPIN-124\nPIN-134\nPIN-280\n0718D50\nPIN-125\nPIN-133\n0.50 TYP.\n0.50 TYP.\n(84.33)\n(86.54)\n(1.63)\nX\nAGBS](.cpci-a3mxm-50m-32014-1000-02/085daa6ac873e8b862fa01beb64eaee577f0c3e00efdbff731d909632b47ec02.jpg)

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>E1</td><td>P_+12V_MXM</td><td>E2</td><td>P_+12V_MXM</td></tr><tr><td>E3</td><td>GND</td><td>E4</td><td>GND</td></tr><tr><td>1</td><td>P_+5V_MXM</td><td>2</td><td>MXM_PRSNT_R_N</td></tr><tr><td>3</td><td>P_+5V_MXM</td><td>4</td><td>MXM_WAKE_N</td></tr><tr><td>5</td><td>P_+5V_MXM</td><td>6</td><td>MXM_PWRGD</td></tr><tr><td>7</td><td>P_+5V_MXM</td><td>8</td><td>MXM_CB_PWR_PG</td></tr><tr><td>9</td><td>P_+5V_MXM</td><td>10</td><td></td></tr><tr><td>11</td><td>GND</td><td>12</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>14</td><td></td></tr><tr><td>15</td><td>GND</td><td>16</td><td></td></tr><tr><td>17</td><td>GND</td><td>18</td><td>MXM_PWR_LEVEL</td></tr><tr><td>19</td><td>MXM_PCIE_STD_SW_N</td><td>20</td><td>MXM_TH_OVERT_N</td></tr><tr><td>21</td><td>MXM_VGA_DISABLE_N</td><td>22</td><td>MXM_TH_ALERT_N</td></tr><tr><td>23</td><td></td><td>24</td><td>MXM_TH_PWM</td></tr><tr><td>25</td><td></td><td>26</td><td></td></tr><tr><td>27</td><td></td><td>28</td><td></td></tr><tr><td>29</td><td></td><td>30</td><td></td></tr><tr><td>31</td><td></td><td>32</td><td>MXM_I2CS_SDA_3V3</td></tr><tr><td>33</td><td></td><td>34</td><td>MXM_I2CS_SCL_3V3</td></tr><tr><td>35</td><td></td><td>36</td><td>GND</td></tr><tr><td>37</td><td>GND</td><td>38</td><td></td></tr><tr><td>39</td><td></td><td>40</td><td></td></tr><tr><td>41</td><td></td><td>42</td><td></td></tr><tr><td>43</td><td></td><td>44</td><td></td></tr><tr><td>45</td><td></td><td>46</td><td>GND</td></tr><tr><td>47</td><td>GND</td><td>48</td><td></td></tr><tr><td>49</td><td></td><td>50</td><td></td></tr><tr><td>51</td><td></td><td>52</td><td>GND</td></tr><tr><td>53</td><td>GND</td><td>54</td><td></td></tr><tr><td>55</td><td></td><td>56</td><td></td></tr><tr><td>57</td><td></td><td>58</td><td>GND</td></tr><tr><td>59</td><td>GND</td><td>60</td><td></td></tr><tr><td>61</td><td></td><td>62</td><td></td></tr><tr><td>63</td><td></td><td>64</td><td>GND</td></tr><tr><td>65</td><td>GND</td><td>66</td><td></td></tr><tr><td>67</td><td></td><td>68</td><td></td></tr><tr><td>69</td><td></td><td>70</td><td>GND</td></tr><tr><td>71</td><td>GND</td><td>72</td><td></td></tr><tr><td>73</td><td></td><td>74</td><td></td></tr><tr><td>75</td><td></td><td>76</td><td>GND</td></tr><tr><td>77</td><td>GND</td><td>78</td><td></td></tr><tr><td>79</td><td></td><td>80</td><td></td></tr><tr><td>81</td><td></td><td>82</td><td>GND</td></tr><tr><td>83</td><td>GND</td><td>84</td><td></td></tr><tr><td>85</td><td></td><td>86</td><td></td></tr><tr><td>87</td><td></td><td>88</td><td>GND</td></tr><tr><td>89</td><td>GND</td><td>90</td><td></td></tr><tr><td>91</td><td></td><td>92</td><td></td></tr><tr><td>93</td><td></td><td>94</td><td>GND</td></tr><tr><td>95</td><td>GND</td><td>96</td><td>GPU_PCIE_RX7_DN</td></tr><tr><td>97</td><td>GPU_PCIE_TX7_DN</td><td>98</td><td>GPU_PCIE_RX7_DP</td></tr><tr><td>99</td><td>GPU_PCIE_TX7_DP</td><td>100</td><td>GND</td></tr><tr><td>101</td><td>GND</td><td>102</td><td>GPU_PCIE_RX6_DN</td></tr><tr><td>103</td><td>GPU_PCIE_TX6_DN</td><td>104</td><td>GPU_PCIE_RX6_DP</td></tr><tr><td>105</td><td>GPU_PCIE_TX6_DP</td><td>106</td><td>GND</td></tr><tr><td>107</td><td>GND</td><td>108</td><td>GPU_PCIE_RX5_DN</td></tr><tr><td>109</td><td>GPU_PCIE_TX5_DN</td><td>110</td><td>GPU_PCIE_RX5_DP</td></tr><tr><td>111</td><td>GPU_PCIE_TX5_DP</td><td>112</td><td>GND</td></tr><tr><td>113</td><td>GND</td><td>114</td><td>GPU_PCIE_RX4_DN</td></tr><tr><td>115</td><td>GPU_PCIE_TX4_DN</td><td>116</td><td>GPU_PCIE_RX4_DP</td></tr><tr><td>117</td><td>GPU_PCIE_TX4_DP</td><td>118</td><td>GND</td></tr><tr><td>119</td><td>GND</td><td>120</td><td>GPU_PCIE_RX3_DN</td></tr><tr><td>121</td><td>GPU_PCIE_TX3_DN</td><td>122</td><td>GPU_PCIE_RX3_DP</td></tr><tr><td>123</td><td>GPU_PCIE_TX3_DP</td><td>124</td><td>GND</td></tr><tr><td>125</td><td>GND</td><td></td><td></td></tr><tr><td>133</td><td>GND</td><td>134</td><td>GND</td></tr><tr><td>135</td><td>GPU_PCIE_TX2_DN</td><td>136</td><td>GPU_PCIE_RX2_DN</td></tr><tr><td>137</td><td>GPU_PCIE_TX2_DP</td><td>138</td><td>GPU_PCIE_RX2_DP</td></tr><tr><td>139</td><td>GND</td><td>140</td><td>GND</td></tr><tr><td>141</td><td>GPU_PCIE_TX1_DN</td><td>142</td><td>GPU_PCIE_RX1_DN</td></tr><tr><td>143</td><td>GPU_PCIE_TX1_DP</td><td>144</td><td>GPU_PCIE_RX1_DP</td></tr><tr><td>145</td><td>GND</td><td>146</td><td>GND</td></tr><tr><td>147</td><td>GPU_PCIE_TX0_DN</td><td>148</td><td>GPU_PCIE_RX0_DN</td></tr><tr><td>149</td><td>GPU_PCIE_TX0_DP</td><td>150</td><td>GPU_PCIE_RX0_DP</td></tr><tr><td>151</td><td>GND</td><td>152</td><td>GND</td></tr><tr><td>153</td><td>MXM_PCIE_CLK_C_DN</td><td>154</td><td>MXM_PCIE_CLK_REQ_N</td></tr><tr><td>155</td><td>MXM_PCIE_CLK_C_DP</td><td>156</td><td>PLTRST_MXM_N2</td></tr><tr><td>157</td><td>GND</td><td>158</td><td></td></tr><tr><td>159</td><td></td><td>160</td><td></td></tr><tr><td>161</td><td></td><td>162</td><td></td></tr><tr><td>163</td><td></td><td>164</td><td></td></tr><tr><td>165</td><td></td><td>166</td><td>GND</td></tr><tr><td>167</td><td></td><td>168</td><td></td></tr><tr><td>169</td><td></td><td>170</td><td></td></tr><tr><td>171</td><td></td><td>172</td><td></td></tr><tr><td>173</td><td>GND</td><td>174</td><td>GND</td></tr><tr><td>175</td><td></td><td>176</td><td></td></tr><tr><td>177</td><td></td><td>178</td><td></td></tr><tr><td>179</td><td>GND</td><td>180</td><td>GND</td></tr><tr><td>181</td><td></td><td>182</td><td></td></tr><tr><td>183</td><td></td><td>184</td><td></td></tr><tr><td>185</td><td>GND</td><td>186</td><td>GND</td></tr><tr><td>187</td><td></td><td>188</td><td></td></tr><tr><td>189</td><td></td><td>190</td><td></td></tr><tr><td>191</td><td>GND</td><td>192</td><td>GND</td></tr><tr><td>193</td><td></td><td>194</td><td></td></tr><tr><td>195</td><td></td><td>196</td><td></td></tr><tr><td>197</td><td>GND</td><td>198</td><td>GND</td></tr><tr><td>199</td><td>MXM_DP_C_L0_DN</td><td>200</td><td></td></tr><tr><td>201</td><td>MXM_DP_C_L0_DP</td><td>202</td><td></td></tr><tr><td>203</td><td>GND</td><td>204</td><td>GND</td></tr><tr><td>205</td><td>MXM_DP_C_L1_DN</td><td>206</td><td>MXM_DP_D_L0_DN</td></tr><tr><td>207</td><td>MXM_DP_C_L1_DP</td><td>208</td><td>MXM_DP_D_L0_DP</td></tr><tr><td>209</td><td>GND</td><td>210</td><td>GND</td></tr><tr><td>211</td><td>MXM_DP_C_L2_DN</td><td>212</td><td>MXM_DP_D_L1_DN</td></tr><tr><td>213</td><td>MXM_DP_C_L2_DP</td><td>214</td><td>MXM_DP_D_L1_DP</td></tr><tr><td>215</td><td>GND</td><td>216</td><td>GND</td></tr><tr><td>217</td><td>MXM_DP_C_L3_DN</td><td>218</td><td>MXM_DP_D_L2_DN</td></tr><tr><td>219</td><td>MXM_DP_C_L3_DP</td><td>220</td><td>MXM_DP_D_L2_DP</td></tr><tr><td>221</td><td>GND</td><td>222</td><td>GND</td></tr><tr><td>223</td><td>MXM_DP_C_AUX_DN</td><td>224</td><td>MXM_DP_D_L3_DN</td></tr><tr><td>225</td><td>MXM_DP_C_AUX_DP</td><td>226</td><td>MXM_DP_D_L3_DP</td></tr><tr><td>227</td><td></td><td>228</td><td>GND</td></tr><tr><td>229</td><td></td><td>230</td><td>MXM_DP_D_AUX_DN</td></tr><tr><td>231</td><td></td><td>232</td><td>MXM_DP_D_AUX_DP</td></tr><tr><td>233</td><td></td><td>234</td><td>DP_C_HPD</td></tr><tr><td>235</td><td></td><td>236</td><td>DP_D_HPD</td></tr><tr><td>237</td><td></td><td>238</td><td></td></tr><tr><td>239</td><td></td><td>240</td><td>P_+3V3_MXM</td></tr><tr><td>241</td><td></td><td>242</td><td>P_+3V3_MXM</td></tr><tr><td>243</td><td></td><td>244</td><td>GND</td></tr><tr><td>245</td><td></td><td>246</td><td>MXM_DP_B_L0_DN</td></tr><tr><td>247</td><td></td><td>248</td><td>MXM_DP_B_L0_DP</td></tr><tr><td>249</td><td></td><td>250</td><td>GND</td></tr><tr><td>251</td><td>GND</td><td>252</td><td>MXM_DP_B_L1_DN</td></tr><tr><td>253</td><td>MXM_DP_A_L0_DN</td><td>254</td><td>MXM_DP_B_L1_DP</td></tr><tr><td>255</td><td>MXM_DP_A_L0_DP</td><td>256</td><td>GND</td></tr><tr><td>257</td><td>GND</td><td>258</td><td>MXM_DP_B_L2_DN</td></tr><tr><td>259</td><td>MXM_DP_A_L1_DN</td><td>260</td><td>MXM_DP_B_L2_DP</td></tr><tr><td>261</td><td>MXM_DP_A_L1_DP</td><td>262</td><td>GND</td></tr><tr><td>263</td><td>GND</td><td>264</td><td>MXM_DP_B_L3_DN</td></tr><tr><td>265</td><td>MXM_DP_A_L2_DN</td><td>266</td><td>MXM_DP_B_L3_DP</td></tr><tr><td>267</td><td>MXM_DP_A_L2_DP</td><td>268</td><td>GND</td></tr><tr><td>269</td><td>GND</td><td>270</td><td>MXM_DP_B_AUX_DN</td></tr><tr><td>271</td><td>MXM_DP_A_L3_DN</td><td>272</td><td>MXM_DP_B_AUX_DP</td></tr><tr><td>273</td><td>MXM_DP_A_L3_DP</td><td>274</td><td>DP_B_HPD</td></tr><tr><td>275</td><td>GND</td><td>276</td><td>DP_A_HPD</td></tr><tr><td>277</td><td>MXM_DP_A_AUX_DN</td><td>278</td><td>P_+3V3_MXM</td></tr><tr><td>279</td><td>MXM_DP_A_AUX_DP</td><td>280</td><td>P_+3V3_MXM</td></tr><tr><td>281</td><td>MXM_PRSNT_N</td><td></td><td></td></tr></table>

# 4.9 DB-A3PW Board to Board Connector (CN6) – SKU1

Table 9: DB-A3PW Board to Board Connector
![-S: SINGLE ROW\n02\n72\n.295 (7.49)\nREF\n01\n71\n.200 (5.08) REF\n2° MAX SWAY\n(EITHER DIRECTION)](.cpci-a3mxm-50m-32014-1000-02/4aa0f75bb0664d579a73c2021c7a90f49bad0100e6da617eaf1a2102a3817db9.jpg)

<table><tr><td>Pin</td><td>Signal</td><td>Function</td></tr><tr><td>1</td><td>P12V PSU</td><td rowspan="6">12V power from P1 via CN6 to 1F front board</td></tr><tr><td>2</td><td>P12V PSU</td></tr><tr><td>3</td><td>P12V PSU</td></tr><tr><td>4</td><td>P12V PSU</td></tr><tr><td>5</td><td>P12V PSU</td></tr><tr><td>6</td><td>P12V PSU</td></tr><tr><td>7</td><td>GND</td><td>Ground</td></tr><tr><td>8</td><td>GND</td><td>Ground</td></tr><tr><td>9</td><td>GND</td><td>Ground</td></tr><tr><td>10</td><td>GND</td><td>Ground</td></tr><tr><td>11</td><td>GND</td><td>Ground</td></tr><tr><td>12</td><td>GND</td><td>Ground</td></tr></table>

# 4.10 DB-A3PW FAN Connector (FAN1) – SKU1

Table 10: DB-A3PW FAN connector
![B\nY\n(0.9)\nA\n0.625\n1.25\n(ピッチ)\n(PITCH)\n(0.6)\n0.4\nZ\n2.4\n2.2\nM\n(2.2)\n2.75\n0.725\n0.4 Y Z\n0.5 Y\nピン PIN\n0.625\n1.25\n(ピッチ)\n(PITCH)\n0.32\n回路番号1\nCIRCUIT NO.1](.cpci-a3mxm-50m-32014-1000-02/22b5a8b4a5f6a023265e130053e3ff1659ecedc15662a9dab764e2a190442e90.jpg)

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>NC</td></tr><tr><td>2</td><td>NC</td></tr><tr><td>3</td><td>FAN_PWR</td></tr><tr><td>4</td><td>GND</td></tr></table>

# 4.11 DB-A3PW ATX 4 Pin Power Connector (CN\_PWR) – SKU2

Table 11: DB-A3PW ATX 4 pin power connector
![Circuit 4\nCircuit 2\nCircuit 1\n△ 4Pin](.cpci-a3mxm-50m-32014-1000-02/9801fb9e5f65052bdae1c776bf186bc97ef5592c0a3441c1341cd2bbb770b340.jpg)

<table><tr><td>Pin</td><td>Signal Name</td><td>Function</td></tr><tr><td>1</td><td>GND</td><td>Ground</td></tr><tr><td>2</td><td>GND</td><td>Ground</td></tr><tr><td>3</td><td>P_+12V</td><td>12V Power Source</td></tr><tr><td>4</td><td>P_+12V</td><td>12V Power Source</td></tr></table>

# 4.12 DIP Switch Connector

The cPCI-A3MXM has two DIP switches (SW1-2) to set the switch connectors.

![BOT side\nSW2\nSW1\nFGND](.cpci-a3mxm-50m-32014-1000-02/76a912f3aaf2d4bb1f5daa98825f07a4701ea126a38f87372f09661a85ba0c1a.jpg)

Figure 8:Switch locations (Bottom)

Table 12: Switch connector 1 and 2
SW1 Mode Switch Settings

<table><tr><td>SW1</td><td>Pin1</td><td>Pin2</td><td>Pin3</td><td>Pin4</td></tr><tr><td>Display Port 3 Output (CN5)</td><td></td><td></td><td>OFF</td><td>ON</td></tr><tr><td>Display Port 4 Output (CN3)</td><td>OFF</td><td>ON</td><td></td><td></td></tr></table>

SW2 Mode Switch Settings

<table><tr><td>SW2</td><td>Pin1</td><td>Pin2</td><td>Pin3</td><td>Pin4</td></tr><tr><td>Display Port 1 Output (CN4)</td><td></td><td></td><td>OFF</td><td>ON</td></tr><tr><td>Display Port 2 Output (CN2)</td><td>OFF</td><td>ON</td><td></td><td></td></tr></table>

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# 5 Driver Installation

# 5.1 Windows Driver

Please download the Windows drivers from the ADLINK website. The following describes the cPCI-A3MXM driver installation procedures for Windows 10. Install the Windows operating system before installing any driver. Most standard I/O device drivers are installed during Windows installation. Extract the following files and execute the program to install the corresponding driver.

A1000 Driver:

Download Software Resources | ADLINK (adlinktech.com)

A4500 Driver:

Download Software Resources | ADLINK (adlinktech.com)

# Safety Instructions

Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use.

Please read these safety instructions carefully.
• Please keep this User‘s Manual for later reference.
• Read the specifications section of this manual for detailed information on the operating environment of this equipment.
• When installing/mounting or uninstalling/removing equipment, turn off the power and unplug any power cords/cables.
• To avoid electrical shock and/or damage to equipment:

Keep equipment away from water or liquid sources.
Keep equipment away from high heat or high humidity.
 Keep equipment properly ventilated (do not block or cover ventilation openings).
 Make sure to use recommended voltage and power source settings.
 Always install and operate equipment near an easily accessible electrical socket-outlet.
Secure the power cord (do not place any object on/over the power cord).
 Only install/attach and operate equipment on stable surfaces and/or recommended mountings.
 If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source.

• Never attempt to fix the equipment. Equipment should only be serviced by qualified personne

# Getting Services

Ask an Expert: https://www.adlinktech.com/en/Askanexpert

# ADLINK Technology, Inc.

<table><tr><td>Address:</td><td>No. 66, Huaya 1st Road, Guishan DistrictTaoyuan City 333, Taiwan</td></tr><tr><td>Tel:</td><td>+886-3-216-5088</td></tr><tr><td>Fax:</td><td>+886-3-328-5723</td></tr><tr><td>Email:</td><td>service@adlinktech.com</td></tr></table>

# Ampro ADLINK Technology, Inc.

Address: 6450 Via Del Oro, San Jose, CA 95119-1208, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-600-1189

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

<table><tr><td>Address:</td><td>300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area Shanghai, 201203 China</td></tr><tr><td>Tel:</td><td>+86-21-5132-8988</td></tr><tr><td>Fax:</td><td>+86-21-5132-3588</td></tr><tr><td>Email:</td><td>market@adlinktech.com</td></tr></table>

# ADLINK Technology GmbH

<table><tr><td>Address:</td><td>Hans-Thoma-Strasse 8-10, D-68163, Mannheim, Germany</td></tr><tr><td>Tel:</td><td>+49-621-43214-0</td></tr><tr><td>Fax:</td><td>+49-621 43214-30</td></tr><tr><td>Email:</td><td>emea@adlinktech.com</td></tr></table>

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you.
[🔗 Link to the original document](.cpci-a3mxm-50m-32014-1000-02/cpci-a3mxm-50m-32014-1000-02.pdf)