# EGX-MXM-A500

NVIDIA Ampere™ GA107 RTX A500 Embedded Graphics Module

User’s Manual

![Close-up of a green printed circuit board (PCB) with visible components and gold contacts, no readable text or symbols.](.egx-mxm-a500-50m-7c006-1000-10/89af61108d78fdd610f9572b889e87cb41cb074674b5f0a7d93e3223ea0dee7c.jpg)

Manual Rev.: 1.0

Revision Date: July 17, 2023

Part No: 50M-7C006-1000

Revision History

<table><tr><td>Revision</td><td>Release Date</td><td>Description of Change(s)</td></tr><tr><td>1.0</td><td>2023-07-17</td><td>Initial Release</td></tr></table>

# Preface

# Copyright © 2023 ADLINK Technology Inc.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

![Symbol of a trash bin crossed out by two diagonal lines (no text or numbers present)](.egx-mxm-a500-50m-7c006-1000-10/fda4133142a5dcc626fbacb1e46ca8e1e8ef5990e81a20795820ec6b3099c8a7.jpg)

![The image displays a black background featuring a graphic element at the top left. This element consists of two parallel horizontal white lines running across the top edge. Below these lines, on the left side, a vertical black area extends downwards, creating the appearance of a corner or header section.](.egx-mxm-a500-50m-7c006-1000-10/4973174043069e8bc6158d9fa19b636a5d90dd243fe0c612687aedbb0259b15e.jpg)

Battery Labels (for products with battery)
![The image displays a horizontal row of four black-and-white icons related to battery disposal and recycling:\n\n1.  **Left:** A wheeled trash bin crossed out with a large 'X' (the WEEE symbol).\n2.  **Center-Left:** A square containing the universal recycling symbol (Mobius loop) with the text '**Li-ion**' underneath.\n3.  **Center-Right:** A circular logo. The word '**RECYCLE**' is arched across the top. In the center is the acronym '**RBRC**' above a small recycling symbol and the text '**Li-ion**' below it. The bottom of the circle contains the phone number '**1.800.822.8837**'.\n4.  **Right:** A square containing a stylized, blocky recycling symbol. Below it is the text '**廢電池請回收**'.](.egx-mxm-a500-50m-7c006-1000-10/1e092ae6f6eee642c036c6bd2d637cb7cdc2c624cb182d61f00c8807e3da24d2.jpg)

# California Proposition 65 Warning

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WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl) phosphate (TDCPP), 1,4- Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Conventions

Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly.

![The image shows an icon of a piece of paper with a folded top-right corner and faint horizontal lines. A large, bold red checkmark is superimposed over the document, slanting from the bottom left to the top right.](.egx-mxm-a500-50m-7c006-1000-10/952c427b46f83c3a45bf2f962260be44eb1ab057f2289301a4659fffa9a48b92.jpg)
NOTE:

Additional information, aids, and tips that help users perform tasks.

![A yellow triangular warning sign with a black exclamation point in the center.](.egx-mxm-a500-50m-7c006-1000-10/2e0e344357d3f299d624e4c363fca93d511d564029821ba058c1ef768592b2cf.jpg)
CAUTION:

Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.

![The image displays a standard hazard warning symbol: a red triangle with a white border containing a white exclamation point in the center.](.egx-mxm-a500-50m-7c006-1000-10/b37dd39ff31d6d08d1d1da16c0498f8c917c0d8e86eddce5d74c5de2684973c6.jpg)
WARNING:

Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task.

# Table of Contents

# Revision History........... ii

# Preface ............ iii

# List of Tables......... ... vii

# List of Figures ........ ix

# 1 Introduction .......

1.1 Overview...... 1
1.2 Features.... 2
1.3 Specifications... 3

1.3.1 Graphics Module . . 3
1.3.2 Display Support and Options.... 4
1.3.3 Software Support.. 4

1.4 Functional Block Diagram..... 4
1.5 Mechanical Layout.. 5
1.6 MXM Connector Pin Definitions.. 8
1.7 Thermal Policy ...... 13
1.8 Unpacking Checklist .. 13

# 2 System Requirements...... . 15

2.1 Power Sequencing....... . 15
2.2 Module Power Up and Down... 15
2.3 Reset Requirements.. 16
2.4 System BIOS Settings ...... . 17
2.5 Driver Installation .. 18
2.6 Certifications & Agencies.. . 18

# Important Safety Instructions ....... 19

# Getting Service......... .. 21

# List of Tables

Table 1-1: MXM Connector Pin Definitions... 8

Table 1-2: Thermal Policy..... . 13

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# List of Figures

Figure 1-1: EGX-MXM-A500 Functional Block Diagram............... 4
Figure 1-2: EGX-MXM-A500 Dimensions.. 5
Figure 1-3: EGX-MXM-A500 Top and Side Views...... 6
Figure 1-4: EGX-MXM-A500 Bottom View... 7
Figure 1-5: MXM Connector.. 7
Figure 2-1: Power Sequencing . . 15
Figure 2-2: Module Power Down .. . 16
Figure 2-3: Reset Sequencing . . 16
Figure 2-4: Sample BIOS Menu Settings..... .. 17

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# 1 Introduction

# 1.1 Overview

The EGX-MXM-A500 embedded graphics module features the NVIDIA RTX A500 embedded GPU based on the advanced NVIDIA Ampere GA107 architecture in MXM 3.1 Type A form factor. The module brings a new level of performance to visual graphics and computing applications, fully integrating hardware acceleration for both graphics and computing code, enabling hardware acceleration for a wider class of software applications than ever before.

The EGX-MXM-A500 can support operation in an extended temperature range of $\angle 0 ^ { \circ } \mathsf { C }$ to $7 0 ^ { \circ } \mathsf { C }$ , suitable for mission-critical harsh environments. The 2048 CUDA core Ampere GPU delivers the latest leading-edge GPU performance for your embedded system. Its superior graphics performance, GPU computing and video capabilities are the ideal solution for systems such as digital signage, medical image, defense and aerospace applications.

# 1.2 Features

 MXM 3.1 Type A FF (82 x 70 mm)
 2048 CUDA cores
 6.54 TFLOPS FP32 peak performance
 2/4 GB GDDR6 memory
 112 GB/s maximal memory bandwidth
 25W-40W TGP
 5 year performance warranty
 NVIDIA RTX A500 GPU

 Package 23 x 23 mm
 Base Clock @925 MHz with 40W TGP
 Boost Clock @1702 MHz with 40W TGP
 Base Clock @435 MHz with 25W TGP
 Boost Clock @1335 MHz with 25W TGP

# 1.3 Specifications

# 1.3.1 Graphics Module

<table><tr><td>Model</td><td>EGX-MXM-A500</td></tr><tr><td colspan="2">Graphics Core</td></tr><tr><td>Architecture</td><td>NVIDIA® Ampere GA107</td></tr><tr><td>GPU</td><td>RTX A500</td></tr><tr><td>Display Outputs</td><td>N/A</td></tr><tr><td>Signal Interface</td><td>MXM 3.1, PCI Express Gen4 x4 support</td></tr><tr><td colspan="2">GPGPU Computing</td></tr><tr><td>CUDA Support</td><td>CUDA Toolkit 8.0, CUDA Compute version 6.1OpenCLTM 1.2, DirectX® 12.1, OpenGL 4.6, Vulcan 1.0</td></tr><tr><td colspan="2">Memory</td></tr><tr><td>GDDR6 Memory</td><td>2/4GB @7GHz for 40W2/4GB @6Ghz for 25W</td></tr><tr><td>Configuration</td><td>256Mb x32 for 2GB512Mb x32 for 4GB</td></tr><tr><td>Bandwidth</td><td>64-bit96 GB/s data rate for 25W112GB/s data rate for 40Wx32 GDDR6 DRAM device data width</td></tr><tr><td colspan="2">Physical</td></tr><tr><td>Dimensions</td><td>82 (W) x 70 (D) x 4.8 (H) mm</td></tr><tr><td>Locking Mechanism</td><td>Standard MXM 3.1 Type A</td></tr><tr><td colspan="2">Environmental</td></tr><tr><td>Operating Temp.</td><td>Standard: 0 to 55°C, Extended: -20°C to 70°C</td></tr><tr><td>Storage Temp.</td><td>-40°C to 85°C</td></tr><tr><td colspan="2">Operating Systems</td></tr><tr><td>Supported OS</td><td>Windows 10, Windows 11 &amp; Linux Drivers, 64-bit</td></tr></table>

# 1.3.2 Display Support and Options

# 1.3.3 Software Support

 CUDA Toolkit 8.0 and higher
 CUDA Compute version 6.1 and higher
 OpenCL™ 1.2
 DirectX® 12
 OpenGL 4.6
 Vulcan 1.0

# 1.4 Functional Block Diagram

![Based on the provided flowchart, here are the labeled blocks and their connections:\n\n**Labeled Blocks:**\n*   **MxM Connector** (Large vertical rectangle on the left)\n*   **EN-20-M2** (Large vertical rectangle in the center, containing the text **TGP:40W**)\n    *   Internal port labels on the right edge: **PCIE**, **I2C**, **PM**, **JTAG**\n*   **GDDR6 x32 memory down** (Two separate boxes stacked vertically)\n*   **Total support 4GB or 2GB** (Text above the memory boxes)\n*   **VBIOS** (Small rectangle on the right)\n*   **LED*2** (Small rectangle below VBIOS)\n\n**Connections:**\n*   **PCIE x4 Gen4**: Connects the **MxM Connector** to the **PCIE** port on the EN-20-M2 block (arrow points right).\n*   **GDDR6 Channel A**: Connects the EN-20-M2 block to the two **GDDR6 x32 memory down** boxes (arrow points right).\n*   **SPI**: Connects the EN-20-M2 block to the **VBIOS** box (double-headed arrow).\n*   **I2C**: Connects the **I2C** port on the EN-20-M2 block to the **MxM Connector** (arrow points left).\n*   **Power Management (PWR_EN, PWR_GOOD, WAKE#)**: Connects the **PM** port on the EN-20-M2 block to the **MxM Connector** (arrow points left).\n*   **JTAG**: Connects the **JTAG** port on the EN-20-M2 block to the **MxM Connector** (arrow points left).](.egx-mxm-a500-50m-7c006-1000-10/4b7a658bd27cac4d092cfafe585c588d2d8bf3c4561868817e576d01994f0a58.jpg)

Figure 1-1: EGX-MXM-A500 Functional Block Diagram

# 1.5 Mechanical Layout

![An icon depicting a white document with a folded corner and faint horizontal lines, overlaid with a large red checkmark.](.egx-mxm-a500-50m-7c006-1000-10/bf00dd53c7a536dcbcfb411dd89dd2f374777f62b9ec5466cee8c6bc875fc401.jpg)
NOTE:

All dimensions shown are in mm

![82\n70](.egx-mxm-a500-50m-7c006-1000-10/4c39b47217ac6d807a98a5c16811f511d613c26645802d873d2eef498bea250d.jpg)

Figure 1-2: EGX-MXM-A500 Dimensions

![0\n14\n21.36\n28.5\n35.64\n43\n0\nB\nC\nC\nB\n16.75\n24.28\n31.25\n38.22\n45.75\n37.50\n39\n39.51\n34.49\n1.45 MIN\n3.10\n0.50\n135x0.35\n0.85\n2x4.82\n2xR0.5±0.05\nTop side](.egx-mxm-a500-50m-7c006-1000-10/096d4d28e5cb85e5cc7b137c90d54c0b4c1ba1211482ab063f104d9e4ef86d0a.jpg)

![The image displays a technical drawing of two concentric circles. Two dimension lines with arrowheads indicate diameters. On the left, text reads 'Ø 3.2' with a leader line pointing to the inner circle. On the right, text reads 'Ø 6' with a leader line pointing to the outer circle. The symbol 'Ø' denotes diameter.](.egx-mxm-a500-50m-7c006-1000-10/9c40b4d5260a6e51c0bff97c07bceb321f743be02052a3565e251f1d9f25757d.jpg)
Section-B Scale 2:1

![Ø6\nØ3.2](.egx-mxm-a500-50m-7c006-1000-10/7bb64dc6cecaa1ae14b90e0293de69d898aaaeee0f98b54c7e978fbe4a1b1fcc.jpg)

Section-C Scale 2:1

![1.20\n2.05\n0.85](.egx-mxm-a500-50m-7c006-1000-10/11dd0e712d24e1279e447d7875745b2c93dddfa14b23ef06e83e5a39b780fe43.jpg)

![The image displays a technical line drawing featuring a vertical rectangular shape on the left side. Inside the upper portion of this rectangle are three horizontal lines. From the top right corner, a line extends diagonally upwards, accompanied by the text '45°±10°'. At the bottom right, there is a horizontal line and a vertical dimension line with arrows pointing to a specific distance, labeled '0.18'.](.egx-mxm-a500-50m-7c006-1000-10/7cccff1f85b8c1816e16437231f9f312130024abfc56e469f0c86eb75183542b.jpg)
Section-A Scale 2:1

PTH HOLE 2 PCS
PTH HOLE 4 PCS
TOP SIDE: OD=6.0mm; ID=3.2mm BOTTOM SIDE: OD=7.0mm; ID=3.2mm
![1.25\n1.25\n0.5\n0.5\n1\n3.75](.egx-mxm-a500-50m-7c006-1000-10/50510c3079f4c31157627e5d72f315243e45c0f90f76b48c6cc509b8a7ed6981.jpg)

Section-D Scale 2:1

![1\n1\n0.5\n0.5](.egx-mxm-a500-50m-7c006-1000-10/e3623d86875705c592ac973d788a1a9e5500633cb1e0753291b85135ee586fdb.jpg)

Section-E Scale 2:1
Figure 1-3: EGX-MXM-A500 Top and Side Views

![0\nB\nC\nC\nB\n39.76\n34.74\n31\n28.75\n3.10\nE\n129x0.35\n2x4.82\n2.35\n1.85](.egx-mxm-a500-50m-7c006-1000-10/41070b0b45b2fb3d4019c1adfcdbb6910e059e469c49d8225aca8fbecc96b84c.jpg)

Figure 1-4: EGX-MXM-A500 Bottom View

![Pin 281\nPin 125\nPin 133\n(R G5 X G6)\nPin E1\nPin E3\nPin 134\nPin 124\nPin E4\nPin E2](.egx-mxm-a500-50m-7c006-1000-10/2affdf52df00a0d0606b0b60ac1b0883c8967dc72f36845e12885dacc3156d67.jpg)

Figure 1-5: MXM Connector

# 1.6 MXM Connector Pin Definitions

<table><tr><td colspan="3">Primary Side (bottom side)</td><td colspan="3">Secondary Side (top side)</td></tr><tr><td>Pin</td><td>Signal</td><td>PU/PD</td><td>Pin</td><td>Signal</td><td>PU/PD</td></tr><tr><td>E1</td><td>PWR_SRC</td><td></td><td>E2</td><td>PWR_SRC</td><td></td></tr><tr><td>E3</td><td>GND</td><td></td><td>E4</td><td>GND</td><td></td></tr><tr><td>1</td><td>5V</td><td></td><td>2</td><td>PRSNT_R#</td><td>0ohm PD</td></tr><tr><td>3</td><td>5V</td><td></td><td>4</td><td>RSVD</td><td></td></tr><tr><td>5</td><td>5V</td><td></td><td>6</td><td>PWR_GOOD</td><td></td></tr><tr><td>7</td><td>5V</td><td></td><td>8</td><td>PWR_EN</td><td></td></tr><tr><td>9</td><td>5V</td><td></td><td>10</td><td>27MHZ_REF</td><td></td></tr><tr><td>11</td><td>GND</td><td></td><td>12</td><td>GND</td><td></td></tr><tr><td>13</td><td>GND</td><td></td><td>14</td><td>RSVD</td><td></td></tr><tr><td>15</td><td>GND</td><td></td><td>16</td><td>RSVD</td><td></td></tr><tr><td>17</td><td>GND</td><td></td><td>18</td><td>PWR_LEVEL</td><td>100K PU to 3.3V</td></tr><tr><td>19</td><td>RSVD</td><td></td><td>20</td><td>TH_OVERT#</td><td>100K PU to 3.3V</td></tr><tr><td>21</td><td>RSVD</td><td></td><td>22</td><td>TH_ALERT#</td><td>100K PU to 3.3V</td></tr><tr><td>23</td><td>RSVD</td><td></td><td>24</td><td>RSVD</td><td></td></tr><tr><td>25</td><td>RSVD</td><td></td><td>26</td><td>RSVD</td><td></td></tr><tr><td>27</td><td>RSVD</td><td></td><td>28</td><td>RSVD</td><td></td></tr><tr><td>29</td><td>RSVD</td><td></td><td>30</td><td>RSVD</td><td></td></tr><tr><td>31</td><td>RSVD</td><td></td><td>32</td><td>SMB_DAT</td><td>100K PU to 3.3V</td></tr><tr><td>33</td><td>RSVD</td><td></td><td>34</td><td>SMB_CLK</td><td>100K PU to 3.3V</td></tr><tr><td>35</td><td>RSVD</td><td></td><td>36</td><td>GND</td><td></td></tr><tr><td>37</td><td>GND</td><td></td><td>38</td><td>RSVD</td><td></td></tr><tr><td>39</td><td>RSVD</td><td></td><td>40</td><td>RSVD</td><td></td></tr><tr><td>41</td><td>RSVD</td><td></td><td>42</td><td>RSVD</td><td></td></tr><tr><td>43</td><td>RSVD</td><td></td><td>44</td><td>RSVD</td><td></td></tr><tr><td>45</td><td>RSVD</td><td></td><td>46</td><td>GND</td><td></td></tr></table>

Table 1-1: MXM Connector Pin Definitions

<table><tr><td colspan="3">Primary Side (bottom side)</td><td colspan="3">Secondary Side (top side)</td></tr><tr><td>Pin</td><td>Signal</td><td>PU/PD</td><td>Pin</td><td>Signal</td><td>PU/PD</td></tr><tr><td>47</td><td>GND</td><td></td><td>48</td><td>PEX_TX15#</td><td></td></tr><tr><td>49</td><td>PEX_RX15#</td><td></td><td>50</td><td>PEX_TX15</td><td></td></tr><tr><td>51</td><td>PEX_RX15</td><td></td><td>52</td><td>GND</td><td></td></tr><tr><td>53</td><td>GND</td><td></td><td>54</td><td>PEX_TX14#</td><td></td></tr><tr><td>55</td><td>PEX_RX14#</td><td></td><td>56</td><td>PEX_TX14</td><td></td></tr><tr><td>57</td><td>PEX_RX14</td><td></td><td>58</td><td>GND</td><td></td></tr><tr><td>59</td><td>GND</td><td></td><td>60</td><td>PEX_TX13#</td><td></td></tr><tr><td>61</td><td>PEX_RX13#</td><td></td><td>62</td><td>PEX_TX13</td><td></td></tr><tr><td>63</td><td>PEX_RX13</td><td></td><td>64</td><td>GND</td><td></td></tr><tr><td>65</td><td>GND</td><td></td><td>66</td><td>PEX_TX12#</td><td></td></tr><tr><td>67</td><td>PEX_RX12#</td><td></td><td>68</td><td>PEX_TX12</td><td></td></tr><tr><td>69</td><td>PEX_RX12</td><td></td><td>70</td><td>GND</td><td></td></tr><tr><td>71</td><td>GND</td><td></td><td>72</td><td>PEX_TX11#</td><td></td></tr><tr><td>73</td><td>PEX_RX11#</td><td></td><td>74</td><td>PEX_TX11</td><td></td></tr><tr><td>75</td><td>PEX_RX11</td><td></td><td>76</td><td>GND</td><td></td></tr><tr><td>77</td><td>GND</td><td></td><td>78</td><td>PEX_TX10#</td><td></td></tr><tr><td>79</td><td>PEX_RX10#</td><td></td><td>80</td><td>PEX_TX10</td><td></td></tr><tr><td>81</td><td>PEX_RX10</td><td></td><td>82</td><td>GND</td><td></td></tr><tr><td>83</td><td>GND</td><td></td><td>84</td><td>PEX_TX9#</td><td></td></tr><tr><td>85</td><td>PEX_RX9#</td><td></td><td>86</td><td>PEX_TX9</td><td></td></tr><tr><td>87</td><td>PEX_RX9</td><td></td><td>88</td><td>GND</td><td></td></tr><tr><td>89</td><td>GND</td><td></td><td>90</td><td>PEX_TX8#</td><td></td></tr><tr><td>91</td><td>PEX_RX8#</td><td></td><td>92</td><td>PEX_TX8</td><td></td></tr><tr><td>93</td><td>PEX_RX8</td><td></td><td>94</td><td>GND</td><td></td></tr><tr><td>95</td><td>GND</td><td></td><td>96</td><td>PEX_TX7#</td><td></td></tr><tr><td>97</td><td>PEX_RX7#</td><td></td><td>98</td><td>PEX_TX7</td><td></td></tr><tr><td>99</td><td>PEX_RX7</td><td></td><td>100</td><td>GND</td><td></td></tr><tr><td>101</td><td>GND</td><td></td><td>102</td><td>PEX_TX6#</td><td></td></tr><tr><td>103</td><td>PEX_RX6#</td><td></td><td>104</td><td>PEX_TX6</td><td></td></tr><tr><td>105</td><td>PEX_RX6</td><td></td><td>106</td><td>GND</td><td></td></tr></table>

Table 1-1: MXM Connector Pin Definitions

<table><tr><td colspan="3">Primary Side (bottom side)</td><td colspan="3">Secondary Side (top side)</td></tr><tr><td>Pin</td><td>Signal</td><td>PU/PD</td><td>Pin</td><td>Signal</td><td>PU/PD</td></tr><tr><td>107</td><td>GND</td><td></td><td>108</td><td>PEX_TX5#</td><td></td></tr><tr><td>109</td><td>PEX_RX5#</td><td></td><td>110</td><td>PEX_TX5</td><td></td></tr><tr><td>111</td><td>PEX_RX5</td><td></td><td>112</td><td>GND</td><td></td></tr><tr><td>113</td><td>GND</td><td></td><td>114</td><td>PEX_TX4#</td><td></td></tr><tr><td>115</td><td>PEX_RX4#</td><td></td><td>116</td><td>PEX_TX4</td><td></td></tr><tr><td>117</td><td>PEX_RX4</td><td></td><td>118</td><td>GND</td><td></td></tr><tr><td>119</td><td>GND</td><td></td><td>120</td><td>PEX_TX3#</td><td></td></tr><tr><td>121</td><td>PEX_RX3#</td><td></td><td>122</td><td>PEX_TX3</td><td></td></tr><tr><td>123</td><td>PEX_RX3</td><td></td><td>124</td><td>GND</td><td></td></tr><tr><td>125</td><td>GND</td><td></td><td>126</td><td>KEY</td><td></td></tr><tr><td>127</td><td>KEY</td><td></td><td>128</td><td>KEY</td><td></td></tr><tr><td>129</td><td>KEY</td><td></td><td>130</td><td>KEY</td><td></td></tr><tr><td>131</td><td>KEY</td><td></td><td>132</td><td>KEY</td><td></td></tr><tr><td>133</td><td>GND</td><td></td><td>134</td><td>GND</td><td></td></tr><tr><td>135</td><td>PEX_RX2#</td><td></td><td>136</td><td>PEX_TX2#</td><td></td></tr><tr><td>137</td><td>PEX_RX2</td><td></td><td>138</td><td>PEX_TX2</td><td></td></tr><tr><td>139</td><td>GND</td><td></td><td>140</td><td>GND</td><td></td></tr><tr><td>141</td><td>PEX_RX1#</td><td></td><td>142</td><td>PEX_TX1#</td><td></td></tr><tr><td>143</td><td>PEX_RX1</td><td></td><td>144</td><td>PEX_TX1</td><td></td></tr><tr><td>145</td><td>GND</td><td></td><td>146</td><td>GND</td><td></td></tr><tr><td>147</td><td>PEX_RX0#</td><td></td><td>148</td><td>PEX_TX0#</td><td></td></tr><tr><td>149</td><td>PEX_RX0</td><td></td><td>150</td><td>PEX_TX0</td><td></td></tr><tr><td>151</td><td>GND</td><td></td><td>152</td><td>GND</td><td></td></tr><tr><td>153</td><td>PEX_REFCLK#</td><td></td><td>154</td><td>PEX_CLK_REQ#</td><td></td></tr><tr><td>155</td><td>PEX_REFCLK</td><td></td><td>156</td><td>PEX_RST#</td><td></td></tr><tr><td>157</td><td>GND</td><td></td><td>158</td><td>RSVD</td><td></td></tr><tr><td>159</td><td>RSVD</td><td></td><td>160</td><td>RSVD</td><td></td></tr><tr><td>161</td><td>RSVD</td><td></td><td>162</td><td>RSVD</td><td></td></tr><tr><td>163</td><td>RSVD</td><td></td><td>164</td><td>RSVD</td><td></td></tr><tr><td>165</td><td>RSVD</td><td></td><td>166</td><td>GND</td><td></td></tr></table>

Table 1-1: MXM Connector Pin Definitions

<table><tr><td colspan="3">Primary Side (bottom side)</td><td colspan="3">Secondary Side (top side)</td></tr><tr><td>Pin</td><td>Signal</td><td>PU/PD</td><td>Pin</td><td>Signal</td><td>PU/PD</td></tr><tr><td>167</td><td>RSVD</td><td></td><td>168</td><td>RSVD</td><td></td></tr><tr><td>169</td><td>RSVD</td><td></td><td>170</td><td>RSVD</td><td></td></tr><tr><td>171</td><td>RSVD</td><td></td><td>172</td><td>RSVD</td><td></td></tr><tr><td>173</td><td>GND</td><td></td><td>174</td><td>GND</td><td></td></tr><tr><td>175</td><td>RSVD</td><td></td><td>176</td><td>RSVD</td><td></td></tr><tr><td>177</td><td>RSVD</td><td></td><td>178</td><td>RSVD</td><td></td></tr><tr><td>179</td><td>GND</td><td></td><td>180</td><td>GND</td><td></td></tr><tr><td>181</td><td>RSVD</td><td></td><td>182</td><td>RSVD</td><td></td></tr><tr><td>183</td><td>RSVD</td><td></td><td>184</td><td>RSVD</td><td></td></tr><tr><td>185</td><td>GND</td><td></td><td>186</td><td>GND</td><td></td></tr><tr><td>187</td><td>RSVD</td><td></td><td>188</td><td>RSVD</td><td></td></tr><tr><td>189</td><td>RSVD</td><td></td><td>190</td><td>RSVD</td><td></td></tr><tr><td>191</td><td>GND</td><td></td><td>192</td><td>GND</td><td></td></tr><tr><td>193</td><td>RSVD</td><td></td><td>194</td><td>RSVD</td><td></td></tr><tr><td>195</td><td>RSVD</td><td></td><td>196</td><td>RSVD</td><td></td></tr><tr><td>197</td><td>GND</td><td></td><td>198</td><td>GND</td><td></td></tr><tr><td>199</td><td>DP_C_L0#</td><td></td><td>200</td><td>RSVD</td><td></td></tr><tr><td>201</td><td>DP_C_L0</td><td></td><td>202</td><td>RSVD</td><td></td></tr><tr><td>203</td><td>GND</td><td></td><td>204</td><td>GND</td><td></td></tr><tr><td>205</td><td>DP_C_L1#</td><td></td><td>206</td><td>DP_D_L0#</td><td></td></tr><tr><td>207</td><td>DP_C_L1</td><td></td><td>208</td><td>DP_D_L0</td><td></td></tr><tr><td>209</td><td>GND</td><td></td><td>210</td><td>GND</td><td></td></tr><tr><td>211</td><td>DP_C_L2#</td><td></td><td>212</td><td>DP_D_L1#</td><td></td></tr><tr><td>213</td><td>DP_C_L2</td><td></td><td>214</td><td>DP_D_L1</td><td></td></tr><tr><td>215</td><td>GND</td><td></td><td>216</td><td>GND</td><td></td></tr><tr><td>217</td><td>DP_C_L3#</td><td></td><td>218</td><td>DP_D_L2#</td><td></td></tr><tr><td>219</td><td>DP_C_L3</td><td></td><td>220</td><td>DP_D_L2</td><td></td></tr><tr><td>221</td><td>GND</td><td></td><td>222</td><td>GND</td><td></td></tr><tr><td>223</td><td>DP_C_AUX#</td><td></td><td>224</td><td>DP_D_L3#</td><td></td></tr><tr><td>225</td><td>DP_C_AUX</td><td></td><td>226</td><td>DP_D_L3</td><td></td></tr></table>

Table 1-1: MXM Connector Pin Definitions

<table><tr><td colspan="3">Primary Side (bottom side)</td><td colspan="3">Secondary Side (top side)</td></tr><tr><td>Pin</td><td>Signal</td><td>PU/PD</td><td>Pin</td><td>Signal</td><td>PU/PD</td></tr><tr><td>227</td><td>RSVD</td><td></td><td>228</td><td>GND</td><td></td></tr><tr><td>229</td><td>RSVD</td><td></td><td>230</td><td>DP_D_AUX#</td><td></td></tr><tr><td>231</td><td>RSVD</td><td></td><td>232</td><td>DP_D_AUX</td><td></td></tr><tr><td>233</td><td>RSVD</td><td></td><td>234</td><td>DP_C_HPD</td><td>PD 100K</td></tr><tr><td>235</td><td>RSVD</td><td></td><td>236</td><td>DP_D_HPD</td><td>PD 100K</td></tr><tr><td>237</td><td>RSVD</td><td></td><td>238</td><td>RSVD</td><td></td></tr><tr><td>239</td><td>RSVD</td><td></td><td>240</td><td>3V3</td><td></td></tr><tr><td>241</td><td>RSVD</td><td></td><td>242</td><td>3V3</td><td></td></tr><tr><td>243</td><td>RSVD</td><td></td><td>244</td><td>GND</td><td></td></tr><tr><td>245</td><td>RSVD</td><td></td><td>246</td><td>DP_B_L0#</td><td></td></tr><tr><td>247</td><td>RSVD</td><td></td><td>248</td><td>DP_B_L0</td><td></td></tr><tr><td>249</td><td>RSVD</td><td></td><td>250</td><td>GND</td><td></td></tr><tr><td>251</td><td>GND</td><td></td><td>252</td><td>DP_B_L1#</td><td></td></tr><tr><td>253</td><td>DP_A_L0#</td><td></td><td>254</td><td>DP_B_L1</td><td></td></tr><tr><td>255</td><td>DP_A_L0</td><td></td><td>256</td><td>GND</td><td></td></tr><tr><td>257</td><td>GND</td><td></td><td>258</td><td>DP_B_L2#</td><td></td></tr><tr><td>259</td><td>DP_A_L1#</td><td></td><td>260</td><td>DP_B_L2</td><td></td></tr><tr><td>261</td><td>DP_A_L1</td><td></td><td>262</td><td>GND</td><td></td></tr><tr><td>263</td><td>GND</td><td></td><td>264</td><td>DP_B_L3#</td><td></td></tr><tr><td>265</td><td>DP_A_L2#</td><td></td><td>266</td><td>DP_B_L3</td><td></td></tr><tr><td>267</td><td>DP_A_L2</td><td></td><td>268</td><td>GND</td><td></td></tr><tr><td>269</td><td>GND</td><td></td><td>270</td><td>DP_B_AUX#</td><td></td></tr><tr><td>271</td><td>DP_A_L3#</td><td></td><td>272</td><td>DP_B_AUX</td><td></td></tr><tr><td>273</td><td>DP_A_L3</td><td></td><td>274</td><td>DP_B_HPD</td><td>PD 100K</td></tr><tr><td>275</td><td>GND</td><td></td><td>276</td><td>DP_A_HPD</td><td>PD 100K</td></tr><tr><td>277</td><td>DP_A_AUX#</td><td></td><td>278</td><td>3V3</td><td></td></tr><tr><td>279</td><td>DP_A_AUX</td><td></td><td>280</td><td>3V3</td><td></td></tr><tr><td>281</td><td>PRSNT_L#</td><td>0 ohm PD</td><td></td><td></td><td></td></tr></table>

Table 1-1: MXM Connector Pin Definitions

# 1.7 Thermal Policy

The GPU core clock throttles at temperatures (T ) past the thresholds shown with the behaviors as listed. Thermal throttling ensures that the highest temperature on the die does not exceed the sense temperature for prolonged periods of time.

<table><tr><td>Parameter</td><td>Value</td><td>Units</td></tr><tr><td>Thermal Resistance (Junction to Case, RJC)</td><td>0.042</td><td>°C/W</td></tr><tr><td>Thermal Resistance (Junction to PCB Board, RJB)</td><td>2.38</td><td>°C/W</td></tr><tr><td>GPU Maximum Operating Temperature1</td><td>89</td><td>°C</td></tr><tr><td>GPU Slowdown Temperature (THERM_ALERT)2</td><td>97</td><td>°C</td></tr><tr><td>GPU Shutdown Temperature (OVERT)3</td><td>100</td><td>°C</td></tr></table>

Table 1-2: Thermal Policy

![The image displays an icon of a white sheet of paper with faint horizontal gray lines running across it. The top-right corner of the paper is folded down. A large, bold red checkmark is superimposed over the left and center portion of the document.](.egx-mxm-a500-50m-7c006-1000-10/fa97c172ff690d58068a58c602715b7c0b08968fa60404bc341e3026f9449ddb.jpg)
NOTE:

 Max.GPU operating temperature is the maximum at which the GPU is guaranteed to operate at target performance (base clock) under total board power level
 THERM\_ALERT generates a 50% (÷2) hardware clock slowdown.
 OVERT generates a 87.5% (÷8) hardware clock slowdown

# 1.8 Unpacking Checklist

Before unpacking, check the shipping carton for any damage. If the shipping carton and/or contents are damaged, inform your dealer immediately. Retain the shipping carton and packing materials for inspection. Obtain authorization from your dealer before returning any product to ADLINK. Ensure that the following items are included in the package.

 EGX-MXM-A500 embedded graphics module

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# 2 System Requirements

# 2.1 Power Sequencing

For initial power on, or to Resume from S3 and S4, this sequence must be followed.

![| Component           | Value |\n|---------------------|-------|\n| PWR_SRC             | T_PV-PE |\n| 5V                  | T_PV-PE |\n| 3V3                 | T_PV-PE |\n| PWR_EN              | T_PV-PE |\n| Module Internal Power | T_PE-PG |\n| PWR_GOOD            | T_PV-PE |\n| Total Time          | T_PV-PE ≥0ms |\n| Total Time          | T_PE-PG ≤90ms |](.egx-mxm-a500-50m-7c006-1000-10/c4bc7d9673a5d86a455bbbc3a8f932c0403f0d819b801c7339959295dd1433ef.jpg)

Figure 2-1: Power Sequencing

# 2.2 Module Power Up and Down

Issuing the PWR\_EN signal powers the MXM module down, and the system designer can decide whether to keep the module input power when the MXM module is powered down.

![MODULE\nINPUT POWER\nPWR_EN\nMODULE\nINTERNAL POWER\nPWR_GOOD](.egx-mxm-a500-50m-7c006-1000-10/502822ef00e6dae979d3ba76eb3cb7bff4ca18ba44c97bd8770098a6a4c5142b.jpg)

Figure 2-2: Module Power Down

# 2.3 Reset Requirements

![| Signal          | Value     |\n|-----------------|-----------|\n| Module INPUT POWER | T_PVPERL  |\n| PWR_EN          | T_PERST-PG |\n| PWR_GOOD        | T_PERST-CLK |\n| PEX_REFCLK      | T_PVPERL  |\n| PEX_RST#        | T_PERST-CLK |\n| T_PVPERL ≥100 ms | T_PERST-PG |\n| T_PVPERL ≥100 ms | T_PERST-CLK |\n| T_PVPERL ≥200 μs | T_PERST-PG |\n| T_PVPERL ≥200 μs | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥100 ms | T_PVPERL ≥100 ms |\n| T_PVPERL ≥100 ms | T_PERST-CLK ≥100 μs |\n| T_PVPERL ≥100 ms | T_PERST-CLK ≥200 μs |\n| T_PVPERL ≥100 ms | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥100 ms | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥100 ms | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥100 ms | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥100 ms | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥100 ms | T_FAIL ( 500 ns |\n| T_PVPERL ≥100 ms | T_FAIL ( 500 ns |\n| T_PVPERL ≥100 ms | T_FAIL ( 500 ns |\n| T_PVPERL ≥100 ms | T_FAIL ( 500 ns |\n| T_PVPERL ≥100 ms | T_FAIL ( 500 ns |\n| T_PVPERL ≥10Oms  | T_PVPERL   |\n| T_PVPERL ≥1Oms  | T_PERST-PG |\n| T_PVPERL ≥1Oms  | T_PERST-CLK |\n| T_PVPERL ≥1Oms  | T_FAIL    |\n| T_PVPERL ≥1Oms  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Oms  | T_FAIL ( 500 ns |\n| T_PVPERL ≥1Oms  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Oms  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Oms  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Oms  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Oms  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_PVPERL   |\n| T_PVPERL ≥1Ors  | T_PERST-PG |\n| T_PVPERL ≥1Ors  | T_PERST-CLK |\n| T_PVPERL ≥1Ors  | T_FAIL    |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ( 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Oors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVPERL ≥1Ors  | T_FAIL ≤ 500 ns |\n| T_PVDER          | TP_VPERL   |\n| PWR_EN          | TP_VPERL   |\n| PWR_GOOD       | TP_VPERL   |\n| PEX_REFCLK      | PEX_REFCLK |\n| PEX_RST#        | PEX_RST#   |](.egx-mxm-a500-50m-7c006-1000-10/9e81ff444fceef9226a25bb6dda034ff85f3057978d16d84a42d70d524ad89be.jpg)

Figure 2-3: Reset Sequencing

# 2.4 System BIOS Settings

The system BIOS must meet the following criteria:

SBIOS must support the "Above 4G decoding" feature to support a resizable BAR1 size.
 SBIOS must enable "Above 4G decoding" as the default configuration.

The following is a sample BIOS menu setting for reference. The actual menu setting can vary depending on the specific SBIOS design.

![Aptio Setup Utility - Copyright (C) 2022 American Megatrends, Inc.\nChipset\nSystem Agent (SA) Configuration\nSA PCIe Code Version 7.0.108.64\nVT-d Supported\n► Memory Configuration\n► Graphics Configuration\n► PEG Port Configuration\nVT-d (Enabled)\nAbove 4GB MMIO BIOS (Enabled)\nassignment\nEnable/Disable above\n4GB MemoryMappedIO BIOS\nassignment\nThis is enabled\nautomatically when\nAperture Size is set to\n2048MB.\n+: Select Screen\n↑↓: Select Item\nEnter: Select\n+/-: Change Opt.\nF1: General Help\nF8: Previous Values\nF9: Optimized Defaults\nF10: Save & Exit\nESC: Exit\nVersion 2.20.1275. Copyright (C) 2022 American Megatrends, Inc.](.egx-mxm-a500-50m-7c006-1000-10/363aad0bdea180ac6a25fe2ca99a9f302da1e6d73c5f4e64257b1da138e79461.jpg)

![Aptio Setup Utility - Copyright (C) 2022 American Megatrends, Inc.\nChipset\nSystem Agent (SA) Configuration\nSA PCIe Code Version 7.0.108.64\nVT-d Supported\n► Memory Configuration\n► Graphics Configuration\n► PEG Port Configu Above 4GB MMIO BIOS assignment —\nVT-d\nAbove 4GB MMIO B\nassignment\nEnabled\nDisabled\nEnter: Select\n+/-: Change Opt.\nF1: General Help\nF8: Previous Values\nF9: Optimized Defaults\nF10: Save & Exit\nESC: Exit\nVersion 2.20.1275. Copyright (C) 2022 American Megatrends, Inc.](.egx-mxm-a500-50m-7c006-1000-10/d28331a2a34a4766c755de4e6a6d4b2d472af3eb4b8c2b76c7a573bee9e1f0d5.jpg)

Figure 2-4: Sample BIOS Menu Settings

# 2.5 Driver Installation

Drivers can be downloaded from:

https://www.adlinktech.com/Products/Embedded\_Graphics/ embedded-graphics-solutions/EGX-MXM-A500

# 2.6 Certifications & Agencies

Windows Hardware Quality Lab (WHQL) certified for Windows 10 and Windows 11
 EU Reduction of Hazardous Substances (EU-RoHS)
 Conformité Européenne (CE)
 Federal Communications Commission (FCC)

# Important Safety Instructions

For user safety, please read and follow all instructions, Warnings, Cautions, and Notes marked in this manual and on the associated device before handling/operating the device, to avoid injury or damage.

S'il vous plaît prêter attention stricte à tous les avertissements et mises en garde figurant sur l'appareil , pour éviter des blessures ou des dommages.

 Read these safety instructions carefully
 Keep the User’s Manual for future reference
Read the Specifications section of this manual for detailed information on the recommended operating environment
 The device can be operated at an ambient temperature of 55ºC
When installing/mounting or uninstalling/removing device; or when removal of a chassis cover is required for user servicing:
 Turn off power and unplug any power cords/cables
 Reinstall all chassis covers before restoring power

 To avoid electrical shock and/or damage to device:

 Keep device away from water or liquid sources
 Keep device away from high heat or humidity
 Keep device properly ventilated (do not block or cover ventilation openings)
 Always use recommended voltage and power source settings
 Always install and operate device near an easily accessible electrical outlet
 Secure the power cord (do not place any object on/over the power cord)
 Only install/attach and operate device on stable surfaces and/or recommended mountings

If the device will not be used for long periods of time, turn off and unplug from its power source

 Never attempt to repair the device, which should only be serviced by qualified technical personnel using suitable tools
 The device must be serviced by authorized technicians when:

 The power cord or plug is damaged
 Liquid has entered the device interior
 The device has been exposed to high humidity and/or moisture
 The device is not functioning or does not function according to the User’s Manual
 The device has been dropped and/or damaged and/or shows obvious signs of breakage

Disconnect the power supply cord before loosening the thumbscrews and always fasten the thumbscrews with a screwdriver before starting the system up
 It is recommended that the device be installed only in a server room or computer room where access is:

 Restricted to qualified service personnel or users familiar with restrictions applied to the location, reasons therefor, and any precautions required
 Only afforded by the use of a tool or lock and key, or other means of security, and controlled by the authority responsible for the location.

![Yellow triangular warning sign with black smoke symbol indicating hot weather](.egx-mxm-a500-50m-7c006-1000-10/60b4467723f1083e6cd206a0bda8262aaf2caa6716b5fd6c89b05e0334746efa.jpg)

# BURN HAZARD

Touching this surface could result in bodily injury. To reduce risk, allow the surface to cool before touching.

# RISQUE DE BRÛLURES

Ne touchez pas cette surface, cela pourrait entraîner des blessures.

Pour éviter tout danger, laissez la surface refroidir avant de la toucher.

# Getting Service

Ask an Expert: http://askanexpert.adlinktech.com

# ADLINK Technology, Inc.

No. 66, Huaya 1st Rd., Guishan District

Taoyuan City 333411, Taiwan

Tel: +886-3-216-5088

Fax: +886-3-328-5706

Email: service@adlinktech.com

# Ampro ADLINK Technology, Inc.

6450 Via Del Oro

San Jose, CA 95119-1208, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-600-1189

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

300 Fang Chun Rd., Zhangjiang Hi-Tech Park

Pudong New Area, Shanghai, 201203 China

Tel: +86-21-5132-8988

Fax: +86-21-5132-3588

Email: market@adlinktech.com

# ADLINK Technology GmbH

Hans-Thoma-Straße 11

D-68163 Mannheim, Germany

Tel: +49-621-43214-0

Fax: +49-621 43214-30

Email: emea@adlinktech.com

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you.
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