# COM

# Express

# Express-I W400

# User's Manual

Manual Revision: 2.00

Revision Date: October 22, 2007

Part Number: 50-1J010-1000

![Close-up of a green printed circuit board with multiple microchips and connectors (no visible text or symbols)](.express-iw400-manual-3/14df7e01fa496f9c9ae7f2994d4ea8311e4e4b257a2d80196b7fa22355e752a2.jpg)

# Preliminary

# Release

![The image displays a red logo shaped like an upward-pointing triangle with a curved bottom edge. Inside the red shape are four horizontal white stripes that curve slightly upward. A small registered trademark symbol (®) is visible in the bottom right corner.](.express-iw400-manual-3/42e9a2bf984356bab9a001acd78b93a515035cb32570f1766e3d489a792639f4.jpg)

ADLINK

TECHNOLOGY INC.

Revision History

<table><tr><td>Release</td><td>Date</td><td>Change</td></tr><tr><td>2.0</td><td>2007/10/22</td><td>Initial release</td></tr></table>

# Preface

# Copyright 2007 ADLINK Technology, Inc.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Trademarks

AT, XT, CGA, PC, VGA, OS/2 and PS/2 are registered trademarks of International Business Machines Corporation. AMIBIOS8 $^{™}$ is a trademark of American Megatrends, Inc. Microsoft $^{®}$ , DOS $^{®}$ , MS-DOS $^{®}$ , Windows $^{®}$ , Windows $^{®}$ 3.x, Windows $^{®}$ 95, Windows $^{®}$ 98, Windows $^{®}$ 2000, Windows $^{®}$ NT $^{®}$ , and Windows $^{®}$ Vista $^{®}$ are registered trademarks of Microsoft Corporation. Intel $^{®}$ , Pentium $^{®}$ , Celeron $^{®}$ , and SpeedStep $^{®}$ are registered trademarks of Intel Corporation. PCI Express $^{®}$ , COM Express $^{®}$ and Express $^{®}$ are registered trademarks of the Peripheral Component Interconnect Special Interest Group (PCI-SIG).

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Warranty Policy

Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully.

1) Before using ADLINK's products please read the user manual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA application form which can be downloaded from:

http://rma.adlinktech.com/policy/

2) All ADLINK products come with a limited two-year warranty, one year for products bought in China:

The warranty period starts on the day the product is shipped from ADLINK's factory.

Peripherals and third-party products not manufactured by ADLINK will be covered by the original manufacturers' warranty.

For products containing storage devices (hard drives, flash cards, etc.), please back up your data before sending them for repair. ADLINK is not responsible for any loss of data.

Please ensure the use of properly licensed software with our systems. ADLINK does not condone the use of pirated software and will not service systems using such software. ADLINK will not be held legally responsible for products shipped with unlicensed software installed by the user.

For general repairs, please do not include peripheral accessories. If peripherals need to be included, be certain to specify which items you sent on the RMA Request & Confirmation Form. ADLINK is not responsible for items not listed on the RMA Request & Confirmation Form.

3) Repair service is not covered by ADLINK's two-year guarantee in the following situations:

Damage caused by not following instructions in the User's Manual.

Damage caused by carelessness on the user's part during product transportation.

Damage caused by fire, earthquakes, floods, lightening, pollution, other acts of God, and/or incorrect usage of voltage transformers.

Damage caused by inappropriate storage environments such as high temperatures, high humidity, or volatile chemicals.

Damage caused by leakage of battery fluid during or after change of batteries by customer/user.

Damage from improper repair by unauthorized technicians.
Products with altered and/or damaged serial numbers are not entitled to our service.
This warranty is not transferable or extendable.
▶ Other categories not protected under our warranty.

4) Customers are responsible for all fees necessary to transport damaged products to ADLINK.
5) To ensure the speed and quality of product repair, please download an RMA application form from our company website: http://rma.adlinktech.com/policy/ Products with attached RMA forms receive priority.

For further questions, please e-mail our FAE staff:

service@adlinktech.com

# Using this Manual

# Audience and Scope

The Express-IW400 User's Manual is intended for hardware technicians and systems operators with knowledge of installing, configuring and using COM Express® modules. This document is specifically intended to describe implementing ADLINK Express-IW400 modules to a wide array of user applications.

# Manual Organization

This manual is organized as follows:

Preface: Presents important copyright notifications, disclaimers, trademarks, warranty, safety, and associated information on the proper understanding and usage of this document and its associated product(s).

Chapter 1, Introduction: Introduces the ADLINK Express-IW400, its features and applications.

Chapter 2, Specifications: The physical attributes of the module, operating environment and power consumption.

Chapter 3, Function Diagram: Module functional layout.

Chapter 4, Mechanical Dimensions: Physical dimensions of the module.

Chapter 5, Watch Dog Timer: Presents Watch Dog Timer driver and demo application specifications.

Chapter 6, Connectors: A full description of the module pin-outs, signal descripitions and mechanical characteristics.

Chapter 7, System Resources: A detailed presentation of module memory and I/O resources.

Chapter 8, AMIBIOS8 $^{™}$ : Describes system BIOS settings and configurations.

Appendix A, USB Client Port: Explains how to get a console port to the Express-IW400 module.

# Conventions

Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly.

![Red checkmark inside a document icon (no text or symbols)](.express-iw400-manual-3/aa13af1aa35d4f49eb2688fdad02ee4d61b996d2de3888eb2fa0d8c66787053f.jpg)

NOTE:

Additional information, aids, and tips that help users perform tasks.

![Yellow triangular warning sign with exclamation mark (no text or symbols)](.express-iw400-manual-3/c5d24ecbe9cdc605ec6b3c2b4722d362650aff3e8264921e308f77e082d0ff1f.jpg)

CAUTION:

Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.

![Red triangular warning symbol with exclamation mark (no text or numbers)](.express-iw400-manual-3/b4a3e77cc2bc99c0c9d3e65054236c6b78d09e7ecb019b69bcdc9939222fd8c5.jpg)

WARNING:

Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task.

# Important Safety Instructions

For user safety, please read and follow all instructions, WARNINGS, CAUTIONS, and NOTES marked in this manual and on the associated equipment before handling/operating the equipment.

Read these safety instructions carefully.
Keep this user's manual for future reference.
Read the specifications section of this manual for detailed information on the operating environment of this equipment.
When installing/mounting or uninstalling/removing equipment:
▶ Turn off power and unplug any power cords/cables.
To avoid electrical shock and/or damage to equipment:

▶ Keep equipment away from water or liquid sources;
▶ Keep equipment away from high heat or high humidity;
▶ Keep equipment properly ventilated (do not block or cover ventilation openings);
Make sure to use recommended voltage and power source settings;
▶ Always install and operate equipment near an easily accessible electrical socket-outlet;
▶ Secure the power cord (do not place any object on/over the power cord);
Only install/attach and operate equipment on stable surfaces and/or recommended mountings; and,
If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source.

▶ Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.

A Lithium-type battery may be provided for uninterrupted, backup or emergency power.

![The image shows a standard safety warning sign featuring a yellow triangle with a black border. Inside the triangle is a black exclamation point. Below the triangle, the word 'CAUTION:' is written in black, uppercase letters.](.express-iw400-manual-3/bca447758eda4ec2a7f24aa134a98863e0fe4b951f8b9cb954f5fad8512c6582.jpg)

Risk of explosion if battery is replaced by an incorrect type. Dispose of used batteries according to the instructions.

▶ Equipment must be serviced by authorized technicians when:

The power cord or plug is damaged;
▶ Liquid has penetrated the equipment;
It has been exposed to high humidity/moisture;
It is not functioning or does not function according to the user's manual;
It has been dropped and/or damaged; and/or,
It has an obvious sign of breakage.

# Acronyms & Terminology

The following terms are used throughout this document. This list is prepared in alphabetical order for clarity.

10/100/1000BASE-T - A standard for gigabit Ethernet over copper wiring as specified in Clause 28 of IEEE 802.3-2002.

ACPI - Advanced Configuration and Power Interface

ASF - Alert Standard Format

BIOS - Basic Input/Output System

CF - CompactFlash®

CMOS - Complementary metal-oxide-semiconductor

COM Express® - Computer-On-Module Express

CPU - Central Processing Unit

DDR2 (DDR2 SDRAM) - double-data-rate two synchronous dynamic random access memory

DRAM - Dynamic random access memory

ECC - Error-Correcting Code

ECP - Extended Capability Port

EDMA (DMA) - Enhanced Direct Memory Access

EEPROM (E2PROM) - Electrically Erasable Programmable Read-Only Memory

FSB - Front Side Bus

FWH - Firmware Hub

GB (GByte) - Gigabyte (1,073,741,824 bytes)

GHz - Gigahertz (one billion hertz)

Gigabit Ethernet (GbE or GigE) - A term describing various technologies for transmitting Ethernet frames at a rate of a gigabit per second, as defined by the IEEE 802.3-2005 standard.

HCT - Hardware Compatibility Tests

HD - Hard Drive

I/O (IO) - Input / Output

IA - Embedded Intel $^{®}$ Architecture

ICH - I/O Controller Hub

IDE - Integrated Drive Electronics

IEEE - Institute of Electrical and Electronics Engineers

IMCH - Integrated Memory Controller Hub

IRQ / SERIRQ - Interrupt Request / Serial Interrupt Request

kb - Kilobit (1,024 bits)

kB - Kilobyte (1,024 bytes)

LAN - Local Area Network

LPC - Low Pin Count

MB - Megabyte (1,048,576 bytes)

MCH - Memory Controller Hub

MHz - Megahertz (one million hertz)

N/A (N.A.) - Not Applicable

NMI - Non-maskable Interrupt

OS - Operating System

PC - Personal Computer

PCI Express $^{®}$ (PCIe $^{®}$ or PCI-E $^{®}$ ) - An I/O interconnect bus standard (which includes a protocol and a layered architecture) that expands on and doubles the data transfer rates of original PCI

PnP - Plug and Play

POST - Power-On Self Test

PXE - Pre-Boot Execution Environment

RAM - Random Access Memory

RoHS - Restriction of Hazardous Substances Directive. The Directive on the Restriction of the Use of Certain Hazardous Substances in Electrical and Electronic Equipment

ROM - Read Only Memory

RS-232 (Recommended Standard 232) - is a standard for serial binary data signals

S-ATA - Serial - Advanced Technology Attachment

SCI - System Control Interrupt

SODIMM - small outline dual in-line memory module

Super I/O - a class of I/O controller integrated circuits that combines interfaces for a variety of low-bandwidth devices.

TBD - To Be Determined

TOM - Top of Memory

USB - Universal Serial Bus

VGA - Video Graphics Accelerator

X86 - A generic term that refers to the CISC (complex instruction set computer) architecture, the most commercially successful central processing unit (CPU) architecture in modern computing.

# Reference Documentation

The following list of documents may be used as reference materials to support installation and using the ADLINK Express-IW400. This list is prepared in alphabetical order (by vendor name, then by document title) for clarity.

<table><tr><td>Vendor</td><td>Title</td></tr><tr><td>American Megatrends</td><td>AMIBIOS8TM Check Point and Beep Code List</td></tr><tr><td>American Megatrends</td><td>Setup for AMIBIOS8TM</td></tr><tr><td>Intel®</td><td>Watch Dog Timer (WDT) Driver Specification, Rev. 1.0</td></tr><tr><td>Intel®</td><td>Watch Dog Timer (WDT) Demo Application Specification, Rev. 1.0</td></tr><tr><td>PICMG®</td><td>PICMG® COM.0 R1.0: COM Express® Module Base Specification</td></tr></table>

# Getting Service

Contact us should you require any service or assistance.

# ADLINK TECHNOLOGY INC. (HEADQUARTERS)

Web Site: http://www.adlinktech.com

Sales & Service: service@adlinktech.com

Telephone No.: +886-2-8226-5877

Fax No.: +886-2-8226-5717

Mailing Address: 9F No. 166 Jian Yi Road, Chungho City,

Taipei 235, Taiwan, ROC

# ADLINK TECHNOLOGY AMERICA INC.

Sales & Service: info@adlinktech.com

Toll-Free: +1-866-423-5465

Fax No.: +1-949-727-2099

Mailing Address: 8900 Research Drive,

Irvine, CA 92618, USA

# ADLINK TECHNOLOGY CO. LTD. (BEIJING)

Sales & Service: market@adlinkchina.com.cn

Telephone No.: +86-10-5885-8666

Fax No.: +86-10-5885-8625

Mailing Address: Rm. 801, Power Creative E, No. 1, B/D Shang Di East Rd.

Beijing, 100085 China

# ADLINK TECHNOLOGY CO. LTD. (SHANGHAI)

Sales & Service: market@adlinkchina.com.cn

Telephone No.: +86-21-6495-5210

Fax No.: +86-21-5450-0414

Mailing Address: 4F, Bldg. 39, No.333 Qinjiang Road, Chao He Jing Hi Tech Park

Shanghai, 200233 China

# ADLINK TECHNOLOGY CO. LTD. (SHENZHEN)

Sales & Service: market@adlinkchina.com.cn

Telephone No.: +86-755-2643-4858

Fax No.: +86-755-2664-6353

Mailing Address: 2F, C Block, Bldg. A1, Cyber-Tech Zone, Gao Xin Ave. Sec. 7,

High-Tech Industrial Park S., Shenzhen, 518057 China

# ADLINK TECHNOLOGY INC. (EUROPE)

Sales & Service: emea@adlinktech.com

Toll-Free: +49-211-495-5552

Fax No.: +49-211-495-5557

Mailing Address: Nord Carree 3, 40477

Düsseldorf, Germany

# ADLINK TECHNOLOGY INC. (INDIA)

Sales & Service: india@adlinktech.com

Telephone No.: +91-80-6560-5817

Fax No.: +91-80-2244-3548

Mailing Address: No. 1357, Ground Floor, "Anupama", Aurobindo Marg JP Nagar (Ph-1) Bangalore, Karnataka 560078, India

# ADLINK TECHNOLOGY JAPAN CORP.

Sales & Service: japan@adlinktech.com

Telephone No.: +81-3-4455-3722

Fax No.: +81-3-5333-6040

Mailing Address: Asahiseimei Hatagaya Bldg. 1-1-2 Hatagaya Shibuya-ku, Tokyo, Japan

# ADLINK TECHNOLOGY INC. (SOUTH KOREA)

Sales & Service: korea@adlinkchina.com.cn

Telephone No.: +82-2-2057-0565

Fax No.: +82-2-2057-0563

Mailing Address: 4F, Kostech Building, 262-2, Yangjae-Dong, Seocho-Gu, Seoul, 137-130, South Korea

# ADLINK TECHNOLOGY SINGAPORE PTE. LTD.

Sales & Service: singapore@adlinktech.com

Telephone No.: +65-6844-2261

Fax No.: +65-6844-2263

Mailing Address: 84 Genting Lane #07-02A, Cityneon Design Center, Singapore 349584

# Table of Contents

# Express-IW400....1

Revision History 2

# Preface 3

Copyright 2007 ADLINK Technology, Inc. 3

Disclaimer 3

Trademarks 3

Warranty Policy 4

Using this Manual 6

Conventions 7

Important Safety Instructions 8

Acronyms & Terminology .... 10

Reference Documentation 12

Getting Service 13

# 1 Introduction 19

1.1 Description 19

# 2 Specifications 21

2.1 General 21

2.2 Video 22

2.3 LAN 22

2.4 Multi I/O 22

2.5 Module Power Consumption 23

2.6 Mechanical and Environmental 23

# 3 Function diagram 25

# 4 Mechanical Dimensions....27

# 5 Watch Dog Timer (WDT) 29

5.1 Overview 29

5.2 Installing the WDT Driver 29

5.3 Interface with the Driver 30

5.3.1 Symbolic Link 30

5.3.2 Supported IOCTLs 31

5.4 Watch Dog Timer Windows® XP Demo Utility 35

5.5 Using the Demo Application 36

5.5.1 Setting the Mode 37

5.5.2 Locking the WDT Device 37

5.5.3 Configuring the WDT 37

5.5.4 Testing the User Mode Call Function 38
5.5.5 Retrieving the Driver and Dynamic Link Version Number 38
5.5.6 Downloading the Stage 1 and Stage 2 Time-out Values....38
5.5.7 Information about WDT 38
5.5.8 Setting the Reload Rate 38
5.5.9 Starting and Stopping the Refresh of the WDT 39
5.5.10 Starting and Stopping the reload counter 39

# 6 Connectors....41

6.1 COM Express® Type 2 41
6.2 COM Express® Board to Board Connectors 42

# 7 System Resources 45

7.1 System Memory Map 45
7.2 Direct Memory Access Channels 45
7.3 Legacy I/O Map 46
7.4 Interrupt Request (IRQ) Lines 47
7.5 PCI Configuration Space Map 48
7.6 PCI Interrupt Routing Map 49
7.7 System Management Bus and I2C Bus 49

# 8 AMIBIOS8™ Setup Utility 51

8.1 Starting the BIOS 51
8.1.1 Setup Menu 52
8.1.2 Navigation 53
8.2 Main Setup 55
8.2.1 System Time/System Date 55
8.3 Advanced BIOS Setup 56
8.3.1 CPU Configuration 57
8.3.2 IDE Configuration 58
8.3.3 Floppy Configuration 61
8.3.4 Super IO Configuration 62
8.3.5 Advanced ACPI Configuration 66
8.3.6 AHCI Settings 67
8.3.7 APM Configuration 68
8.3.8 Event Log Configuration 70
8.3.9 Hardware Health Configuration....71
8.3.10 Remote Access Configuration 72
8.3.11 USB Configuration 74
8.4 PCI/PnP Setup 76
8.5 Boot Setup 77
8.6 Security Setup 78
8.6.1 Password Support 78

8.6.2 Change Supervisor Password 80
8.7 Chipset Setup 82
8.7.1 South Bridge Configuration 82
8.8 Exit Menu 84
8.9 AMIBIOS™ Checkpoints and Beep Codes 86
8.9.1 Checkpoints and Beep Codes Definition 86
8.9.2 Viewing BIOS Checkpoints 86
8.10 Bootblock Initialization Code Checkpoints 87
8.11 Bootblock Recovery Code Checkpoints 88
8.12 POST Code Checkpoints 89
8.13 OEM POST Error Checkpoints 91
8.14 DIM Code Checkpoints 91
8.15 ACPI Runtime Checkpoints 92
8.16 Boot Block Beep Codes 93
8.17 POST BIOS Beep Codes 93
8.17.1 Troubleshooting POST BIOS Beep Codes 93

# Appendix A: USB Client Port 95

A.1 Description 95

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# 1 Introduction

# 1.1 Description

The Express-IW400 is based on the Intel $^{®}$ 3100 single chip, server level chipset with enhanced Intel $^{®}$ SpeedStep $^{®}$ support. The Intel $^{®}$ 3100 Chipset is a single integrated chip that contains the functionality of a Memory Controller Hub and an I/O Controller Hub. It can support Intel $^{®}$ Celeron $^{®}$ M and Pentium $^{®}$ M CPU's in the range of 1 GHz to 1.8 GHz at FSB400. The Intel $^{®}$ 3100 chipset combines

![The image shows a close-up, vertical view of a computer processor. In the center is a black square chip featuring the white 'intel' logo inside a circle. The processor is mounted on a green circuit board or substrate. Surrounding the central chip are rows of small, gold-colored contact pads arranged in a grid pattern. There are faint, blurry markings on the green board, including some text near the bottom left corner, but they are illegible.](.express-iw400-manual-3/15eae1974dcbeab0f047a0e7c06b53b1fc4d6b6bc63f6d66df9f244daa58a365.jpg)

server-class memory and I/O controller functions into a single component, creating the first integrated Intel $^{®}$ chipset specifically optimized for embedded, communications, and storage applications. Both chipset and processors are part of the Embedded Intel $^{®}$ Architecture (IA) that warrants long production life for applications that need extended availability.

![The image displays the Intel Celeron M Inside sticker logo. The top portion features the standard Intel logo with the word 'intel' in blue lowercase letters inside a blue oval ring. Below this, on a light blue background, is the text 'Celeron® M' in white, followed by the word 'inside™' in white italics underneath.](.express-iw400-manual-3/4f79d682632e4a67c73056004b5ce2ec6121a789d5155bfe237f4a0e384fb3c8.jpg)

![The image displays a rounded rectangular logo badge divided into two sections. The top section has a white background featuring the blue 'intel' wordmark in lowercase with a blue swoosh underneath. The bottom section is a solid blue rectangle containing the text 'Pentium® M' in white serif font, with 'inside™' written below it in white italicized sans-serif font.](.express-iw400-manual-3/c37a9302980142d3343340dbbe4d39bcf4fbe43faf2b311598ac9cee548bd66f.jpg)

# ECC Memory Support

The Express-IW400 supports registered ECC type, single channel DDR2 400 MHz memory. Either available as two vertically positioned SODIMM sockets or one horizontally positioned SODIMM socket.

# High Bandwidth PCI Express $^{®}$ up to x8

The Intel $^{®}$ 3100 Chipset provides one configurable x8 PCI Express $^{®}$ interface with a maximum theoretical bandwidth of 4 GByte/s. The x8 PCI Express $^{®}$ interface may alternatively be configured as two independent x4 PCI Express $^{®}$ interfaces with a maximum theoretical bandwidth of 2 GBytes/s each. The Intel $^{®}$ 3100 Chipset also supports an additional x4 PCI Express $^{®}$ interface with a maximum theoretical bandwidth of 2 GBytes/s which may alternatively be configured as four independent x1 PCI Express $^{®}$ interfaces.

![Intel®\n3100\nChipset\nx1\nx1\nx1\n(x1)\nx4\nx8\nx4](.express-iw400-manual-3/3da9f41d61976ed64b5241b7e72121ede8247c677511a7ed09c81f6e356e971e.jpg)

# EDMA on PCI Express®

The IMCH includes an integrated four-channel Enhanced Direct Memory Access (EDMA) controller to perform background data transfers between locations in main memory, or from main memory to a memory-mapped I/O destination. These transfers may be individually designated to be coherent (snooped on the FSB) or non-coherent (not snooped on the FSB), providing improvements in system performance and utilization when cache coherence is managed by software rather than hardware.

The module comes with a single onboard Gigabit Ethernet port and four channel SATA. It has legacy support for Parallel IDE, 32-bit PCI and LPC bus support. The Express-IW400 comes equipped with many embedded features such as: Remote console, CMOS backup, CPU and System monitoring and a Dual Watchdog timer for NMI or RESET.

Express-IW400 is an RoHS compliant and lead-free product.

![ADLINK\nGREEN\nRoHS Compliant](.express-iw400-manual-3/b07241a500495f371547b7ff87180ff075871f72071f036b2e7117e1993991bd.jpg)

# 2 Specifications

# 2.1 General

CPU: Intel® Pentium® M 745 at 1.8 Ghz, LV Intel® Pentium® M 738 at 1.4 Ghz, soldered only

Intel $^{®}$ Celeron $^{®}$ M 370 at 1.5 Ghz,
ULV Intel $^{®}$ Celeron $^{®}$ M 373 at 1.0 Ghz, soldered only

▶ Memory: Single channel registered ECC DDR2 at 400 MHz up to 4 GB
Option 1: one horizontal SODIMM socket max 2 GB
Option 2: two vertical SODIMM sockets max 4 GB
Chipset: Intel® 3100 single integrated chipset containing MCH and ICH
L2 Cache: Dothan type processors: 1 MB (Celeron® M), 2 MB (Pentium® M)
BIOS: AMIBIOS8™ in 1 MB FWH with console redirection and CMOS EEPROM backup
Hardware Monitor: Supply Voltages and CPU temperature
▶ Watchdog Timer: Dual stage watchdog timer

![Close-up of a green printed circuit board with multiple microchips and connectors (no visible text or symbols)](.express-iw400-manual-3/3db743d01ea04a742231764fa3fb60a14182e590288bef401e5953c2e9bbb4f1.jpg)

Option 1 Memory

Configuration

Option 2 Memory

Configuration

![Close-up of a green computer motherboard with visible CPU socket and RAM slots (no text or symbols)](.express-iw400-manual-3/62fcc384eba621e51fbdd8cd3f331919addde40f6ef55dcf31c31cc477adc920.jpg)

# ▶ Expansion Busses :

One x8 PCI Express lane can also be used as two x4 PCI Express® lanes
▶ Four PCI Express $^{®}$ x1 lanes (one claimed by onboard GbE)
▶ Four 32-bit PCI 2.3 Masters at 33/66 MHz
▶ Low Pin Count (LPC) interface for Super I/O on carrier
▶ SMBus interface support
▶ Four GPIO input, Four GPIO output

# Power Mode Support :

▶ ACPI v2.0, supports S0 - S3 - S4 - S5 power modes

# 2.2 Video

On carrier: optional VGA support can be located on carrier board using PCI or PCI Express $^{®}$ x1, X4 or X8 bus interface

# 2.3 LAN

Chipset: Intel® 82573 PCI Express®-based Gb Ethernet connection
▶ Type: Triple speed 10/100/1000BASE-T IEEE 802.3 compliant witch supports ASF 2.0 and Advanced Pass

# 2.4 Multi I/O

Chipset: integrated in Intel® 3100
USB: supports up to four USB 2.0 ports, supports legacy keyboard/mouse
Serial: accessible via dedicated USB port (client USB)
▶ SATA: four integrated Serial ATA 150 ports
▶ PATA IDE: single channel IDE for CF card support (SATA to IDE conversion)

# 2.5 Module Power Consumption

All power testing was done on power supply wiring leading to the Express $^{®}$ carrier board. Although all voltages were measured, only 12 V and 5 VSB are relevant because they are the only ones used by the Express $^{®}$ module. The typical power level was measured under Windows $^{®}$ XP without applications running. Maximum level was measured under 100% system stress generate by HCT and Kpower loading.

![Yellow triangular warning sign with a black lightning bolt symbol (no text)](.express-iw400-manual-3/ff01b7f6a9d49261558ead587813671f2c6473e3ee197ea880a8a82f649d2879.jpg)

Testing was done with 512 MB DDR2 533 on installed SODIMM.

Express-IA533-373/0 (BGA type Celeron® M 373 at 1 GHz)

<table><tr><td>Standby</td><td>TBD</td></tr><tr><td>Typical</td><td>12 Watt</td></tr><tr><td>Max</td><td>16 Watt</td></tr></table>

Express-IA533-738/0 (BGA type Pentium® M 738 at 1.4 GHz)

<table><tr><td>Standby</td><td>TBD</td></tr><tr><td>Typical</td><td>14 Watt</td></tr><tr><td>Max</td><td>20 Watt</td></tr></table>

Express-IA533-S/0 with socket type Pentium® M 745 at 1.8 GHz

<table><tr><td>Standby</td><td>TBD</td></tr><tr><td>Typical</td><td>19 Watt</td></tr><tr><td>Max</td><td>29 Watt</td></tr></table>

Express-IA533-S/0 with socket type Pentium® M 760 at 2.0 GHz

<table><tr><td>Standby</td><td>TBD</td></tr><tr><td>Typical</td><td>20 Watt</td></tr><tr><td>Max</td><td>32 Watt</td></tr></table>

# 2.6 Mechanical and Environmental

Formfactor and Type: Standard COM Express® Type II
▶ Dimensions: 95 x 125 mm
▶ Operating Temperature: 0°C to 60°C
▶ Relative Humidity: up to 90% at 55°C

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# 3 Function diagram

![Based on the provided image, here is the accurate description of the flowchart:\n\n**Labeled Blocks:**\n*   **Pentium® M (Dothan)** (Top center red block)\n*   **Intel® 3100** (Center large red block)\n*   **ECC type DDR2 SO-RDIMM** (Two blue blocks stacked on the right)\n*   **CD** (Left gray vertical bar)\n*   **AB** (Right gray vertical bar)\n*   **SATA to PATA** (Red block, bottom left)\n*   **TPM** (Red block, bottom left)\n*   **BIOS** (Blue block, bottom left)\n*   **Monitor** (Red block, bottom center)\n*   **Intel® GbE** (Red block, middle right)\n*   **USB to Serial** (Red block, bottom right)\n\n**Connections:**\n*   **Pentium® M (Dothan)** connects to **Intel® 3100** via a double-headed arrow.\n*   **Intel® 3100** connects to the two **ECC type DDR2 SO-RDIMM** blocks via arrows pointing right.\n*   **Intel® 3100** connects to the **CD** bar via two left-pointing arrows:\n    *   One labeled **PCI**\n    *   One labeled **Two PCI Express® x4 or One PCI Express® x8**\n*   **Intel® 3100** connects to the **AB** bar via multiple right-pointing arrows:\n    *   **Three PCI Express® x1**\n    *   **Six USB v2.0**\n    *   **Four SATA**\n    *   **GPIO**\n    *   **I2C bus**\n    *   **SM Bus**\n    *   **LPC**\n*   **Intel® 3100** connects to **Intel® GbE** via an arrow labeled **PCIe® x1**.\n*   **Intel® GbE** connects to the **AB** bar via an arrow labeled **GbE**.\n*   **Intel® 3100** connects to **USB to Serial** via an arrow labeled **COM1**.\n*   **USB to Serial** connects to the **AB** bar via an arrow labeled **USB Client**.\n*   **Intel® 3100** connects to **SATA to PATA** via an arrow labeled **SATA**.\n*   **SATA to PATA** connects to the **CD** bar via an arrow labeled **IDE (PATA)**.\n*   **Intel® 3100** connects to **TPM** via a left-pointing arrow.\n*   **Intel® 3100** connects to **BIOS** via a left-pointing arrow.\n*   **Intel® 3100** connects to **Monitor** via a downward-pointing arrow.](.express-iw400-manual-3/dc0bde0fed02924ce2413d3b9abf5484047a3ccb3356104925abcc3ac667988b.jpg)

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# 4 Mechanical Dimensions

![| Dimension | Value   |\n| --------- | ------- |\n| Width     | 125.00  |\n| Height    | 4.00    |\n| Top Margin | 80.00   |\n| Bottom Margin | 4.00  |\n| Top Margin (Right) | 34.00 |\n| Middle Margin | 16.5   |\n| Bottom Margin (Left) | 4.00 |\n| Total Width | 125.00 |\n| Total Height | 66.00 |\n| Total Height (Right) | 91.00 |\n| Total Height (Left) | 91.00 |\n| Total Height (Right) | 95.00 |\n| Vertical Line (Left) | 4.00 |\n| Vertical Line (Right) | 51.00 |\n| Vertical Line (Left) | 66.00 |\n| Vertical Line (Right) | 91.00 |\n| Horizontal Line (Left) | 125.00 |\n| Horizontal Line (Right) | 121.00 |\n| Horizontal Line (Left) | 4.00 |\n| Horizontal Line (Right) | 95.00 |\n| Vertical Line (Right) | 4.00 |\n| Vertical Line (Left) | 66.00 |\n| Vertical Line (Right) | 91.00 |\n| Vertical Line (Left) | 91.00 |\n| Vertical Line (Right) | 95.00 |\n| Vertical Line (Right) | 51.00 |\n| Vertical Line (Left) | 66.00 |\n| Vertical Line (Right) | 91.00 |\n| Vertical Line (Left) | 91.00 |\n| Vertical Line (Right) | 95.00 |\n| Vertical Line (Right) | 51.00 |\n| Vertical Line (Left) | 66.00 |\n| Vertical Line (Right) | 91.51 |\n| Vertical Line (Left) | 91.51 |\n| Vertical Line (Right) | 95.51 |\n| Vertical Line (Right) | 51.51 |\n| Vertical Line (Left) | 66.51 |\n| Vertical Line (Right) | 91.51 |\n| Vertical Line (Left) | 91.51 |\n| Vertical Line (Right) | 95.51 |\n| Vertical Line (Right) | 51.51 |\n| Vertical Line (Left) | 66.51 |\n| Vertical Line (Right) | 91.51 |\n| Vertical Line (Left) | 91.51 |\n|\n| Vertical Line (Right) | 95.51 |\n| Vertical Line (Right) | 51.51 |\n| Vertical Line (Left) | 66.51 |\n|\n| Vertical Line (Right) | 91.51 |\n|\n| Vertical Line (Left) | 91.51 |\n|\n| Vertical Line (Right) | 95.51 |\n|\nVertical Line (Right) | 51.51 |\n| Vertical Line (Left) | 66.51 |\n|\n| Vertical Line (Right) | 91.51 |\n|\n| Vertical Line (Left) | 91.51 |\n|\n| Vertical Line (Right) | 95.51 |\n|\nVertical Line (Right) | 51.51 |\n| Vertical Line (Left) | 66.51 |\n| Vertical Line (Right) | 91.51 |\n|\n| Vertical Line (Left) | 91.51 |\n|\n| Vertical Line (Right) | 95.51 |\n|\nVertical Line (Right) | 51.51 |\n| Vertical Line (Left) | 66.51 |\n|\n| Vertical Line (Right) | 91.51 |\n|\n| Vertical Line (Left) | 91.27 |\n|\n| Vertical Line (Right) | 95.27 |\n|\nVertical Line (Right) | 51.27 |\n| Vertical Line (Left) | 66.51 |\n|\n| Vertical Line (Right) | 91.27 |\n|\n| Vertical Line (Left) | 91.27 |\n|\n| Vertical Line (Right) | 95.27 |\n|\nVertical Line (Right) | 51.27 |\n| Vertical Line (Left) | 66.51 |\n|\n| Vertical Line (Right) | 91.27 |\n|\n| Vertical Line (Left) | 91.27 |\n|\n| Vertical Line (Right) | 94.27 |\n|\nVertical Line (Right) | 51.27 |\n|\nVertical Line (Left) | 66.51 |\n|\n| Vertical Line (Right) | 91.27 |\n|\nVertical Line (Left) | 91.27 |\n|\nVertical Line (Right) | 94.27 |\n|\nVertical Line (Right) | 51.27 |\n|\nVertical Line (Left) | 66.51 |\n|\n| Vertical Line (Right) | 91.27 |\n|\nVertical Line (Left) | 91.27 |\n|\nVertical Line (Right) | 94.27 |\n|\nVertical Line (Right) | 51.27 |\n|\nVertical Lines at End of the Column\nVertical Lines at Left of the Column\nVertical Lines at Right of the Column\nVertical Lines at Left of the Column\nVertical Lines at Right of the Column\nVertical Lines at Left of the Column\nVertical Lines at Right of the Column\nVertical Lines at Left of the Column\nVertical Lines at Right of the Column\nVertical Lines at Right of the Column\nVertical Lines at Left of the Column\nVertical Lines at Right of the Column\nVertical Lines at Left of the Column\nVertical Lines at Right of the Column\nVertical Lines at Right of the Column\nVertical Lines at Left of the Column\nVertical Lines at Right of the Column\nVertical Lines at Left of the Column\nVertical Lines at Right of the Column\nVertical Lines at Right of the Column\nVertical Lines at Left of the Column: φ2, φ3, φ4, φ5, φ6, φ7, φ8, φ9, φ10, φ11, φ12, φ13, φ14, φ15, φ16, φ17, φ18, φ19, φ20, φ21, φ22, φ23, φ24, φ25, φ26, φ27, φ28, φ29, φ30, φ31, φ32, φ33, φ34, φ35, φ36, φ37, φ38, φ39, φ40, φ41, φ42, φ43, φ44, φ45, φ46, φ47, φ48, φ49, φ50, φ51, φ52, φ53, φ54, φ55, φ56, φ57, φ58, φ59, φ60, φ61, φ62, φ63, φ64, φ65, φ66, φ67, φ68, φ69, φ70, φ71, φ72, φ73, φ74, φ75, φ76, φ77, φ78, φ79, φ80, φ81, φ82, φ83, φ84, φ85, φ86, φ87, φ88, φ89, φ90, φ91, φ92, φ93, φ94, φ95, φ96, φ97, φ98, φ99](.express-iw400-manual-3/b37b58661db637143b7047bc643602eff93c922b280b1e2b2e110273a1307aa8.jpg)

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# 5 Watch Dog Timer (WDT)

# 5.1 Overview

The Intel $^{®}$ 3100 Chipset Watch Dog Timer (WDT) is a kernel mode driver designed to run on Microsoft $^{®}$ Windows $^{®}$ OS (XP, Server $^{®}$ 2003, Vista $^{®}$ , and XP Embedded) platforms. When enabled, the WDT can generate an interrupt or reboot the system in the event of a system lockup.

This WDT supports a number of IOCTL commands. These commands enable the applications to access and control all the aspects of the WDT.

The WDT is located on the LPC bus. As such, it is not detected by the Plug-n-Play (PnP) manager. To install the driver, the user must manually go through the "Add Device" wizard in the Control Panel. Installation details are covered later in this chapter.

# 5.2 Installing the WDT Driver

The WDT driver does not announce itself to the device manager.

To install the WDT driver:

![The image displays a white document icon with a folded upper-right corner. It features faint horizontal lines suggesting text and a large red checkmark superimposed over the center.](.express-iw400-manual-3/eefd12b7405bf3621f9f012586226f163ae499c734b5dcb91df22eafc135f09d.jpg)
NOTE:

These instructions assume that you are in the default Microsoft Windows $^{®}$ XP control panel view.

1. Open Control Panel and click "Printers and Other Hardware".
2. In the "See Also" box at the top left hand corner, click "Add Hardware".
3. Click "Next" to look for hardware.
4. Click "Yes, I have already connected the hardware" and then click "Next".
5. Scroll to the bottom of the "Installed hardware" list and select "Add a new hardware device".
6. Click "Install the hardware that I manually select from a list" and then Click "Next".
7. Click "Show All Devices" and then Click "Next".
8. Click "Have Disk...", point to the location where the WDT driver is stored and click "OK".
9. Click on "Intel® 3100 Chipset Watch Dog Timer" and install.

# 5.3 Interface with the Driver

The only supported driver communication method is through IOCTLs. The IOCTLs defined in this section allow a user-mode application to access all the capabilities of the WDT.

# 5.3.1 Symbolic Link

The driver creates a named device object that can be accessed through the symbolic link " \\ \ \ . \\SAWD1". As such, the application can communicate with the driver by obtaining a handle from CreateFile() with the path, " \\ \ \ . \\SAWD1".

```txt
/* Example: Getting a handle to the WDT driver */
HANDLE handle_to_wdt;
handle_to_wdt = CreateFile(
    "\\\\\\.\\SAWD1",
    GENERIC_WRITE,
    FILE_SHARE_WRITE,
    NULL,
    OPEN_EXISTING,
    0,
    NULL);
```

Once a handle is obtained successfully, the application uses the DeviceIoControl() function to communicate with the driver.

```c
/* Example: Sending an IOCTL to the driver. Here we assume
* handle_to_wdt was obtained successfully
*/

BOOL status;
int return_length;
status = DeviceIoControl(
    handle_to_wdt,    /* handle to wdt */
    IOCTL_ENABLE_WDT,    /* IOCTL to send */
    NULL,    /* no input buffer */
    0,    /* input length = 0 */
    NULL,    /* no output buffer */
    0,    /* output length = 0 */
    &return_length,    /* should be 0 */
    NULL );    /* wait until I/O completes */
```

# 5.3.2 Supported IOCTLs

IOCTL\_GET\_CAPABILITIES
```c
#define IOCTL_GET_CAPABILITIES \
CTL_CODE( FILE_DEVICE_UNKNOWN, 0x802, \
METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL accepts a buffer of type PSAWD\_CAPABILITY\_OUT\_BUFF, and fills in the min and max field, indicating the minimum and maximum downcounter value. The Version field will be set to 1.

```c
typedef struct _SAWD_CAPABILITY_OUT_BUFF {
unsigned long Version; /* version of interface used */
unsigned long min; /* minimum value in msecs */
unsigned long max; /* maximum value in msecs */
} SAWD_CAPABILITY_OUT_BUFF, *PSAWD_CAPABILITY_OUT_BUFF;
```

IOCTL\_ENABLE\_WDT
```c
#define IOCTL_ENABLE_WDT
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D00,\
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL enables the Watch Dog Timer.

IOCTL\_DISABLE\_WDT
```c
#define IOCTL_DISABLE_WDT
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D01,\
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL disables the Watch Dog Timer.

IOCTL\_LOAD\_COUNTER
```c
#define IOCTL_LOAD_COUNTER \
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D02, \
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL accepts a buffer of type PSAWD\_CTRL, and loads the preload counter 1 and 2 using the data in the Preload1 and Preload2 fields.

```c
typedef struct _SAWD_CTRL {

HANDLE UserEvent; /* Handle to a Ring 3 user event */
unsigned long Version; /* version of interface used */
unsigned long Flags; /* flags defined below */
unsigned long Preload1; /* Preload register # 1 */
unsigned long Preload2; /* Preload Register # 2 */
unsigned long DownCount; /* Holds current down count */
```

```c
unsigned long ConfigReg; /* 16 bit Configuration register */
unsigned short DeviceStatus; /* store device status bits */
unsigned short ReloadReg; /* 16 bit reload register */
unsigned short LockReg; /* 8 bit Lock register */
unsigned long InterruptCount; /* # of times stage 1 INT occurred */
unsigned short IRQ;
short BusType;
unsigned short BusNumber;
unsigned short IrqOffset;
} SAWD_CTRL, *PSAWD_CTRL;
```

IOCTL\_PING\_THE\_WDT
```c
#define IOCTL_PING_THE_WDT
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D02,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL reloads the Watch Dog Timer's down-counter with the preload value to prevent a timeout. If the WDT is in stage 1 of the countdown, then preload value 1 will be loaded into the main down counter. If the WDT is in stage 2 of the countdown, then preload value 2 will be loaded into the main down counter.

IOCTL\_SET\_PRESCALAR
```c
#define IOCTL_SET_PRESCALAR
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D04,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL sets how the 20-bit preload value will be loaded into the 35-bit down counter. The IOCTL accepts an unsigned long integer set to 0 or 1 in the input buffer. If the input is 0, then the 20-bit preload value will be counted down at 1KHz. If the input is 1, then the 20-bit preload value will be counted down at 1MHz.

IOCTL\_READ\_DOWN\_COUNTER
```c
#define IOCTL_READ_DOWN_COUNTER
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D05,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL returns the current value of the down counter (in an unsigned long integer).

IOCTL\_SET\_EXTERNAL\_OUT
```c
#define IOCTL_SET_EXTERNAL_OUT
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D07,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL enables or disables the external out pin when stage 2 time out occurs. This function accepts an unsigned long integer set to 0 (enable) or 1 (disable).

IOCTL\_LOCK\_DEVICE
```c
#define IOCTL_LOCK_DEVICE
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D08,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL locks the WDT device. Once locked, the state (WDT mode vs. free running mode, and Enabled vs. Disabled) of the Watch Dog Timer cannot be changed until the system resets.

IOCTL\_ROUTE\_INTERRUPT
```c
#define IOCTL_ROUTE_INTERRUPT
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D09,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL accepts an unsigned long integer, sets to 0-3, and uses it to set the type of interrupt to trigger when stage 1 timer expires.

```txt
0 sets interrupt type to PCI
1 sets interrupt type to NMI
2 sets interrupt type to SMI
3 disables stage 1 interrupt
```

IOCTL\_USER\_HANDLE
```c
#define IOCTL_USER_HANDLE
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D0D,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL accepts a buffer of type PSAWD\_CTRL, and creates an internal reference to the function specified by the UserEvent field. When a stage 2 timeout occurs, the driver will call this function.

IOCTL\_TEST\_CALLBACK
```c
#define IOCTL_TEST_CALLBACK
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D0F,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL is used for testing the event handling code and to verify that the application thread is released when the shared UserEvent is signaled by the WDT driver. This IOCTL exists mainly for application developers to debug their application.

IOCTL\_GET\_STATUS
```c
#define IOCTL_GET_STATUS
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D13,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL accepts a buffer of type PSAWD\_CTRL, and fills the ConfigReg and LockReg fields with the current values of those two registers.

IOCTL\_GET\_STATUS
```c
#define IOCTL_SET_MODE
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D15,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL accepts an unsigned long integer, sets to 0 or 1, and uses it to set the WDT mode. If the input is 0, then the WDT is set to Watch Dog Timer mode. If the input is 1, then the WDT is set to free running mode.

IOCTL\_GET\_TIMEOUT\_STATUS
```c
#define IOCTL_GET_TIMEOUT_STATUS
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D16,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL accepts an unsigned long integer and uses it as both input and output.

As an input parameter, if the integer is set to 1, then the time out bit on the WDT device will be reset.

As an output parameter, the integer is set to 1 if both stage 1 and stage 2 timers have expired.

IOCTL\_GET\_STAGE\_1\_TIMEOUT\_STATUS
```c
#define IOCTL_GET_STAGE_1_TIMEOUT_STATUS
    CTL_CODE( FILE_DEVICE_UNKNOWN, 0x0D17,
    METHOD_BUFFERED, FILE_ANY_ACCESS )
```

This IOCTL accepts an unsigned long integer and uses it as both input and output.

As an input parameter, if the integer is set to 1, then the time out bit on the WDT device will be reset.

As an output parameter, the integer is set to 1 if the stage 1 timer has expired.

# 5.4 Watch Dog Timer Windows® XP Demo Utility

This specification describes the WDT demo utility "Wdtdemo.exe". The demo tool is a MFC based dialog application that is used to control and monitor the WDT device in the Microsoft\* Windows\* OS environment. Wdtdemo.exe is to be used only for demonstration of the WDT's functionality and should not be used as a customer solution.

```txt
MFC UTILITY APPLICATION
Wdtdemo.exe
iwdtlib.dll
```

```sql
KERNEL MODE DRIVER
wdtdrvr.sys
```

# 5.5 Using the Demo Application

The Wdtdemo.exe application has a number of buttons and text entry fields for configuring and controlling the Watch Dog Timer (WDT). Each of the following items has a corresponding button or entry field on the application screen.

▶ Setting the mode [Mode]
▶ Locking the WDT device [LOCK]
▶ Configuring the WDT device [Configure]
▶ Testing the user mode call function [Test Callback]
▶ Retrieving the driver and dynamic link version number [Lib Version]
▶ Downloading the Stage 1 and Stage 2 time-out values [Preload Counters]
▶ Information about WDT [WDT Status]
▶ Setting the refresh rate [WDT Reload Rate]
Starting and Stopping the refresh of the WDT [Enable] [Disable]
▶ Synchronizing the start of reload [Synch Start of Reload]
Starting and Stopping the reload counter [Reload Counter]

![Watchdog Timer Demo Application\nMode\nWatchdog\nFree Running\nPreload Counters\nCount 1 Max Count 2 Max\nDownload to WDT\nLock\nConfigure\nTest Callback\nAbout\nWDT Status\nWDT_LOCK BIT 0\nWDT_ENABLE BIT 0\nWDT_TOUT_CNF BIT 0\nWDT_INTR_ACT BIT 0\nWDT_TIMEOUT BIT 0 CLR\nStage 1 Timeouts 0\nIRQ Count 0\nWDT Reload Rate\n1 x 1000 ms\nExit WDT Control Cancel\nIntel Corporation Copyright 2006\nStage 1 Stage 2\n0 0\nEnable Disable\nSync Start of Reload\nReload Counter\n0\nStart Stop\nForce Reload Now](.express-iw400-manual-3/8e5e53badba140a46899c65d3c36650c222e7413ba59140faf1d3c5373d20ccd.jpg)

# 5.5.1 Setting the Mode

The mode can be set to either Watch Dog Mode or Free Running Mode using the radio select button at the upper left of the dialog.

![Mode\n● Watchdog\n○ Free Running](.express-iw400-manual-3/eabd6a7047ce997033cc00fced5be157540a327ab11730c325f66e5a3f7e8f74.jpg)

# 5.5.2 Locking the WDT Device

The WDT can be locked by software. The LOCK button locks the WDT so that no further changes to the configuration registers are possible until a system reset. A locked WDT cannot be enabled or disabled.

# 5.5.3 Configuring the WDT

Click the configure button to program the following three configuration options:

Output Enable, Set Prescalar and Interrupt Routing.

![Set Configuration Register\nOutput Enable\nEnabled  Disabled\nSet Prescalar\n34 : 15  24 : 5\nInterrupt Routing\nSERIRQ\nNMI\nSMI\nDisabled\nOK  Cancel](.express-iw400-manual-3/4ea3ccc6fdec8896eb9ec4064510090057537b8db59faffe01c7231e7df87342.jpg)

# [Output Enable]

Enables or disables the toggling of the external output pin if the WDT times out.

# [Set Prescalar]

Specifies a prescalar value for the 35-bit, count-down counter. The default value is 34:15. See the WDT Driver Specification for details on pre-scalar.

# [Interrupt Routing]

Select one of the three interrupt methods (SERIRQ, NMI, or SMI) or "Disabled" to disable interrupt. When SERIRQ is selected, the System BIOS designated interrupt is retrieved from the WDT.

# 5.5.4 Testing the User Mode Call Function

This button verifies that the interrupt handler and callback mechanism are working correctly. Clicking the Test Callback button increments the Stage 1 interrupt count.

# 5.5.5 Retrieving the Driver and Dynamic Link Version Number

Click the Lib Version button to retrieve the driver and dynamic link version number.

# 5.5.6 Downloading the Stage 1 and Stage 2 Time-out Values

There are two edit boxes that specify Stage 1 and Stage 2 count-down values. Enter the values and then click the Download to WDT button to program the values from the application to the WDT device. Both counters are 35-bit counters that decrement using a 20-bit prescalar.

# 5.5.7 Information about WDT

This area shows status of the WDT.

# 5.5.8 Setting the Reload Rate

The reload rate is set by using the button control that is in the lower center of the application. The rate can be adjusted from between 0 and 100 seconds.

![WDT Reload Rate\n1 x 1000 ms](.express-iw400-manual-3/f335c97d08771a68760429fa5fbe39e8918b1ed23e6d4ebd5ea2636acb61253e.jpg)

# 5.5.9 Starting and Stopping the Refresh of the WDT

Clicking the Enable button starts the WDT counting down. Click the Disable button to stop the WDT from counting down.

![Stage 1\n0\n0\nStage 2\nEnable\nDisable](.express-iw400-manual-3/38c0d03da1566da8af4b31b5c5607ef8cd6b7c0f65cff0b55b16e86d38ec6e16.jpg)

# 5.5.10 Starting and Stopping the reload counter

Click the Start button to begin refreshing the WDT. Click the Stop button to stop refreshing the WDT. You can force an immediate refresh of the WDT by clicking the Force Reload Now button. To prevent Stage 1 or Stage 2 timeouts you must start "refresh" and have a refresh rate that ensures that the timer is refreshed before the first stage and or second stage time out.

![Reload Counter\n0\nStart Stop\nForce Reload Now](.express-iw400-manual-3/92215c9f5c7218bc425a85838963be21a0ae17bf0d9c4b8dfbddbefb5958ce00.jpg)

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# 6 Connectors

# 6.1 COM Express® Type 2

All pin-outs on AB and CD connector of the Express-IW400 comply with pin-out and signal descriptions used in the original "PICMG® COM.0 R1.0: COM Express Module Base Specification". This document contains a description of pin-outs, signal descriptions, and mechanical characteristics of the COM Express® (Expresss®) formfactor.

An additional document, “Express® Design Guide” gives a general introduction to carrier board designs for COM Express® (Express®) modules.

AB Connector

<table><tr><td>1 Gigabit Ethernet port</td></tr><tr><td>LPC interface</td></tr><tr><td>4 Serial ATA channels</td></tr><tr><td>High Definition Audio</td></tr><tr><td>8 USB 2.0 ports</td></tr><tr><td>3 PCI Express Lanes x1</td></tr><tr><td>Dual 24-bit LVDS channels</td></tr><tr><td>Analog VGA</td></tr><tr><td>TV-out ports (SDTV/HDTV)</td></tr><tr><td>8 GPIO pins</td></tr><tr><td>+12V primary power input</td></tr><tr><td>+5V standby and 3V RTC</td></tr></table>

![125mm.\n95mm\nAB\nCD](.express-iw400-manual-3/1e4362fbc3a659afcec931959fcb4a58fbd897dab6183d71680d3ba084ba5e01.jpg)

CD Connector

<table><tr><td>Parallel ATA, IDE port alternate definition assigns this to 2 additional Gigabit Ethernet ports</td></tr><tr><td>32-bit PCI v2.3 bus alternate definition assigns this to 10 additional PCI Express x1 lanes</td></tr><tr><td>PCI Express x16 for Graphics these pins can also be assigned to two SDVO extensions (multiplexed)</td></tr><tr><td>SMB and I2C bus</td></tr><tr><td>Power / Thermal control</td></tr><tr><td>+12V primary power input</td></tr></table>

![COM\nExpress](.express-iw400-manual-3/c923912f3bef1ba48504e8bf364450fcdd899f738827f48fe737579b07b9519d.jpg)

# 6.2 COM Express® Board to Board Connectors

Signals and Pin-out for :

Basic formfactor, Type 2.

![D1\nC1\nD110\nC110](.express-iw400-manual-3/f65a8a96c69725dcf11bfca73213f366e820e31ced0a3fa3072c49544e88776f.jpg)

C D

![B1\nA1\nB110\nA110](.express-iw400-manual-3/4b31e72a05e4fe7e57fa416ec1622fe2e95e1f301080273f02fbbcc44d33150e.jpg)

A B

Row A

<table><tr><td>Pin No.</td><td>Pin Name</td><td></td><td>Pin No.</td><td>Pin Name</td></tr><tr><td>A1</td><td>GND (FIXED)</td><td></td><td>B1</td><td>GND (FIXED)</td></tr><tr><td>A2</td><td>GBE0_MDI3-</td><td></td><td>B2</td><td>GBE0_ACT#</td></tr><tr><td>A3</td><td>GBE0_MDI3+</td><td></td><td>B3</td><td>LPC_FRAME#</td></tr><tr><td>A4</td><td>GBE0_LINK100#</td><td></td><td>B4</td><td>LPC_AD0</td></tr><tr><td>A5</td><td>GBE0_LINK1000#</td><td></td><td>B5</td><td>LPC_AD1</td></tr><tr><td>A6</td><td>GBE0_MDI2-</td><td></td><td>B6</td><td>LPC_AD2</td></tr><tr><td>A7</td><td>GBE0_MDI2+</td><td></td><td>B7</td><td>LPC_AD3</td></tr><tr><td>A8</td><td>NC</td><td></td><td>B8</td><td>LPC_DRQ1#</td></tr><tr><td>A9</td><td>GBE0_MDI1-</td><td></td><td>B9</td><td>LPC_DRQ1#</td></tr><tr><td>A10</td><td>GBE0_MDI1+</td><td></td><td>B10</td><td>LPC_CLK</td></tr><tr><td>A11</td><td>GND (FIXED)</td><td></td><td>B11</td><td>GND (FIXED)</td></tr><tr><td>A12</td><td>GBE0_MDI0-</td><td></td><td>B12</td><td>PWRBTN#</td></tr><tr><td>A13</td><td>GBE0_MDI0+</td><td></td><td>B13</td><td>SMB_CK</td></tr><tr><td>A14</td><td>GBE0_CTREF</td><td></td><td>B14</td><td>SMB_DAT</td></tr><tr><td>A15</td><td>SUS_S3#</td><td></td><td>B15</td><td>SMB_ALERT#</td></tr><tr><td>A16</td><td>SATA0_TX+</td><td></td><td>B16</td><td>SATA1_TX+</td></tr><tr><td>A17</td><td>SATA0_TX-</td><td></td><td>B17</td><td>SATA1_TX-</td></tr><tr><td>A18</td><td>SUS_S4#</td><td></td><td>B18</td><td>SUS_STAT#</td></tr><tr><td>A19</td><td>SATA0_RX+</td><td></td><td>B19</td><td>SATA1_RX+</td></tr><tr><td>A20</td><td>SATA0_RX-</td><td></td><td>B20</td><td>SATA1_RX-</td></tr><tr><td>A21</td><td>GND (FIXED)</td><td></td><td>B21</td><td>GND (FIXED)</td></tr><tr><td>A22</td><td>SATA2_TX+</td><td></td><td>B22</td><td>SATA3_TX+</td></tr><tr><td>A23</td><td>SATA2_TX-</td><td></td><td>B23</td><td>SATA3_TX-</td></tr><tr><td>A24</td><td>SUS_S5#</td><td></td><td>B24</td><td>PWR_OK</td></tr><tr><td>A25</td><td>SATA2_RX+</td><td></td><td>B25</td><td>SATA3_RX+</td></tr><tr><td>A26</td><td>SATA2_RX-</td><td></td><td>B26</td><td>SATA3_RX-</td></tr><tr><td>A27</td><td>NC</td><td></td><td>B27</td><td>WDT</td></tr><tr><td>A28</td><td>ATA_ACT#</td><td></td><td>B28</td><td>NC</td></tr><tr><td>A29</td><td>NC</td><td></td><td>B29</td><td>NC</td></tr><tr><td>A30</td><td>NC</td><td></td><td>B30</td><td>NC</td></tr><tr><td>A31</td><td>GND (FIXED)</td><td></td><td>B31</td><td>GND (FIXED)</td></tr><tr><td>A32</td><td>NC</td><td></td><td>B32</td><td>SPKR</td></tr><tr><td>A33</td><td>NC</td><td></td><td>B33</td><td>I2C_CK</td></tr><tr><td>A34</td><td>BIOS_DISABLE#</td><td></td><td>B34</td><td>I2C_DAT</td></tr><tr><td>A35</td><td>THRMTRIP#</td><td></td><td>B35</td><td>THRM#</td></tr><tr><td>A36</td><td>NC</td><td></td><td>B36</td><td>NC</td></tr><tr><td>A37</td><td>NC</td><td></td><td>B37</td><td>NC</td></tr><tr><td>A38</td><td>NC</td><td></td><td>B38</td><td>USB_4_5_OC#</td></tr><tr><td>A39</td><td>USB4- Client</td><td></td><td>B39</td><td>NC</td></tr><tr><td>A40</td><td>USB4+ Client</td><td></td><td>B40</td><td>NC</td></tr><tr><td>A41</td><td>GND (FIXED)</td><td></td><td>B41</td><td>GND (FIXED)</td></tr><tr><td>A42</td><td>USB2-</td><td></td><td>B42</td><td>USB3-</td></tr><tr><td>A43</td><td>USB2+</td><td></td><td>B43</td><td>USB3+</td></tr><tr><td>A44</td><td>USB_2_3_OC#</td><td></td><td>B44</td><td>USB_0_1_OC#</td></tr><tr><td>A45</td><td>USB0-</td><td></td><td>B45</td><td>USB1-</td></tr><tr><td>A46</td><td>USB0+</td><td></td><td>B46</td><td>USB1+</td></tr></table>

Row B

Row C
Row D

<table><tr><td>Pin No.</td><td>Pin Name</td><td></td><td>Pin No.</td><td>Pin Name</td></tr><tr><td colspan="5"></td></tr><tr><td>C1</td><td>GND FIXED)</td><td></td><td>D1</td><td>GND FIXED)</td></tr><tr><td>C2</td><td>IDE_D7</td><td></td><td>D2</td><td>IDE_D5</td></tr><tr><td>C3</td><td>IDE_D6</td><td></td><td>D3</td><td>IDE_D10</td></tr><tr><td>C4</td><td>IDE_D3</td><td></td><td>D4</td><td>IDE_D11</td></tr><tr><td>C5</td><td>IDE_D15</td><td></td><td>D5</td><td>IDE_D12</td></tr><tr><td>C6</td><td>IDE_D8</td><td></td><td>D6</td><td>IDE_D4</td></tr><tr><td>C7</td><td>IDE_D9</td><td></td><td>D7</td><td>IDE_D0</td></tr><tr><td>C8</td><td>IDE_D2</td><td></td><td>D8</td><td>IDE_REQ</td></tr><tr><td>C9</td><td>IDE_D13</td><td></td><td>D9</td><td>IDE_IOW#</td></tr><tr><td>C10</td><td>IDE_D1</td><td></td><td>D10</td><td>IDE_ACK#</td></tr><tr><td>C11</td><td>GND (FIXED)</td><td></td><td>D11</td><td>GND (FIXED)</td></tr><tr><td>C12</td><td>IDE_D14</td><td></td><td>D12</td><td>IDE_IRQ</td></tr><tr><td>C13</td><td>IDE_IORDY</td><td></td><td>D13</td><td>IDE_A0</td></tr><tr><td>C14</td><td>IDE_IOR#</td><td></td><td>D14</td><td>IDE_A1</td></tr><tr><td>C15</td><td>PCI_PME#</td><td></td><td>D15</td><td>IDE_A2</td></tr><tr><td>C16</td><td>PCI_GNT2#</td><td></td><td>D16</td><td>IDE_CS1#</td></tr><tr><td>C17</td><td>PCI_REQ2#</td><td></td><td>D17</td><td>IDE_CS3#</td></tr><tr><td>C18</td><td>PCI_GNT1#</td><td></td><td>D18</td><td>IDE_RESET#</td></tr><tr><td>C19</td><td>PCI_REQ1#</td><td></td><td>D19</td><td>PCI_REQ3#</td></tr><tr><td>C20</td><td>PCI_GNT0#</td><td></td><td>D20</td><td>PCI_GNT3#</td></tr><tr><td>C21</td><td>GND (FIXED)</td><td></td><td>D21</td><td>GND (FIXED)</td></tr><tr><td>C22</td><td>PCI_REQ0#</td><td></td><td>D22</td><td>PCI_AD1</td></tr><tr><td>C23</td><td>PCI_RESET#</td><td></td><td>D23</td><td>PCI_AD3</td></tr><tr><td>C24</td><td>PCI_AD0</td><td></td><td>D24</td><td>PCI_AD5</td></tr><tr><td>C25</td><td>PCI_AD2</td><td></td><td>D25</td><td>PCI_AD7</td></tr><tr><td>C26</td><td>PCI_AD4</td><td></td><td>D26</td><td>PCI_C/BE0#</td></tr><tr><td>C27</td><td>PCI_AD6</td><td></td><td>D27</td><td>PCI_AD9</td></tr><tr><td>C28</td><td>PCI_AD8</td><td></td><td>D28</td><td>PCI_AD11</td></tr><tr><td>C29</td><td>PCI_AD10</td><td></td><td>D29</td><td>PCI_AD13</td></tr><tr><td>C30</td><td>PCI_AD12</td><td></td><td>D30</td><td>PCI_AD15</td></tr><tr><td>C31</td><td>GND (FIXED)</td><td></td><td>D31</td><td>GND (FIXED)</td></tr><tr><td>C32</td><td>PCI_AD14</td><td></td><td>D32</td><td>PCI_PAR</td></tr><tr><td>C33</td><td>PCI_C/BE1#</td><td></td><td>D33</td><td>PCI_SERR#</td></tr><tr><td>C34</td><td>PCI_PERR#</td><td></td><td>D34</td><td>PCI_STOP#</td></tr><tr><td>C35</td><td>PCI_LOCK#</td><td></td><td>D35</td><td>PCI_TRDY#</td></tr><tr><td>C36</td><td>PCI_DEVSEL#</td><td></td><td>D36</td><td>PCI_FRAME#</td></tr><tr><td>C37</td><td>PCIIRDY#</td><td></td><td>D37</td><td>PCI_AD16</td></tr><tr><td>C38</td><td>PCI_C/BE2#</td><td></td><td>D38</td><td>PCI_AD18</td></tr><tr><td>C39</td><td>PCI_AD17</td><td></td><td>D39</td><td>PCI_AD20</td></tr><tr><td>C40</td><td>PCI_AD19</td><td></td><td>D40</td><td>PCI_AD22</td></tr><tr><td>C41</td><td>GND (FIXED)</td><td></td><td>D41</td><td>GND (FIXED)</td></tr><tr><td>C42</td><td>PCI_AD21</td><td></td><td>D42</td><td>PCI_AD24</td></tr><tr><td>C43</td><td>PCI_AD23</td><td></td><td>D43</td><td>PCI_AD26</td></tr><tr><td>C44</td><td>PCI_C/BE3#</td><td></td><td>D44</td><td>PCI_AD28</td></tr><tr><td>C45</td><td>PCI_AD25</td><td></td><td>D45</td><td>PCI_AD30</td></tr><tr><td>C46</td><td>PCI_AD27</td><td></td><td>D46</td><td>PCI_IRQC#</td></tr><tr><td>A48</td><td>EXCD0_PERST#</td><td rowspan="2"></td><td>B48</td><td>EXCD1_CPPE#</td></tr><tr><td>A49</td><td>EXCD0_CPPE#</td><td>B49</td><td>SYS_RESET#</td></tr><tr><td>A50</td><td>LPC_SERIRQ</td><td></td><td>B50</td><td>CB_RESET#</td></tr><tr><td>A51</td><td>GND (FIXED)</td><td></td><td>B51</td><td>GND (FIXED)</td></tr><tr><td>A52</td><td>NC</td><td></td><td>B52</td><td>NC</td></tr><tr><td>A53</td><td>NC</td><td></td><td>B53</td><td>NC</td></tr><tr><td>A54</td><td>GPIO</td><td></td><td>B54</td><td>GPO1</td></tr><tr><td>A55</td><td>NC</td><td></td><td>B55</td><td>NC</td></tr><tr><td>A56</td><td>NC</td><td></td><td>B56</td><td>NC</td></tr><tr><td>A57</td><td>GND</td><td></td><td>B57</td><td>GPO2</td></tr><tr><td>A58</td><td>PCIE_TX3+</td><td></td><td>B58</td><td>PCIE_RX3+</td></tr><tr><td>A59</td><td>PCIE_TX3-</td><td></td><td>B59</td><td>PCIE_RX3-</td></tr><tr><td>A60</td><td>GND (FIXED)</td><td></td><td>B60</td><td>GND (FIXED)</td></tr><tr><td>A61</td><td>PCIE_TX2+</td><td></td><td>B61</td><td>PCIE_RX2+</td></tr><tr><td>A62</td><td>PCIE_TX2-</td><td></td><td>B62</td><td>PCIE_RX2-</td></tr><tr><td>A63</td><td>GPI1</td><td></td><td>B63</td><td>GPO3</td></tr><tr><td>A64</td><td>PCIE_TX1+</td><td></td><td>B64</td><td>PCIE_RX1+</td></tr><tr><td>A65</td><td>PCIE_TX1-</td><td></td><td>B65</td><td>PCIE_RX1-</td></tr><tr><td>A66</td><td>GND</td><td>B66</td><td colspan="2">WAKE0#</td></tr><tr><td>A67</td><td>GPI2</td><td></td><td>B67</td><td>WAKE1#</td></tr><tr><td>A68</td><td>PCIE_TX0+</td><td></td><td>B68</td><td>PCIE_RX0+</td></tr><tr><td>A69</td><td>PCIE_TX0-</td><td></td><td>B69</td><td>PCIE_RX0-</td></tr><tr><td>A70</td><td>GND (FIXED)</td><td></td><td>B70</td><td>GND (FIXED)</td></tr><tr><td>A71</td><td>NC</td><td></td><td>B71</td><td>NC</td></tr><tr><td>A72</td><td>NC</td><td></td><td>B72</td><td>NC</td></tr><tr><td>A73</td><td>NC</td><td></td><td>B73</td><td>NC</td></tr><tr><td>A74</td><td>NC</td><td></td><td>B74</td><td>NC</td></tr><tr><td>A75</td><td>NC</td><td></td><td>B75</td><td>NC</td></tr><tr><td>A76</td><td>NC</td><td></td><td>B76</td><td>NC</td></tr><tr><td>A77</td><td>NC</td><td></td><td>B77</td><td>NC</td></tr><tr><td>A78</td><td>NC</td><td></td><td>B78</td><td>NC</td></tr><tr><td>A79</td><td>NC</td><td></td><td>B79</td><td>NC</td></tr><tr><td>A80</td><td>GND (FIXED)</td><td></td><td>B80</td><td>GND (FIXED)</td></tr><tr><td>A81</td><td>NC</td><td></td><td>B81</td><td>NC</td></tr><tr><td>A82</td><td>NC</td><td></td><td>B82</td><td>NC</td></tr><tr><td>A83</td><td>NC</td><td></td><td>B83</td><td>NC</td></tr><tr><td>A84</td><td>NC</td><td></td><td>B84</td><td>VCC_5V_SBY</td></tr><tr><td>A85</td><td>GPI3</td><td></td><td>B85</td><td>VCC_5V_SBY</td></tr><tr><td>A86</td><td>KBD_RST#</td><td></td><td>B86</td><td>VCC_5V_SBY</td></tr><tr><td>A87</td><td>KBD_A20GATE</td><td></td><td>B87</td><td>VCC_5V_SBY</td></tr><tr><td>A88</td><td>PCIE0_CK_REF+</td><td></td><td>B88</td><td>RSVD</td></tr><tr><td>A89</td><td>PCIE0_CK_REF-</td><td></td><td>B89</td><td>NC</td></tr><tr><td>A90</td><td>GND (FIXED)</td><td></td><td>B90</td><td>GND (FIXED)</td></tr><tr><td>A91</td><td>RSVD</td><td rowspan="2"></td><td>B91</td><td>NC</td></tr><tr><td>A92</td><td>RSVD</td><td>B92</td><td>NC</td></tr><tr><td>A93</td><td>GPO0</td><td rowspan="7"></td><td>B93</td><td>NC</td></tr><tr><td>A94</td><td>RSVD</td><td>B94</td><td>NC</td></tr><tr><td>A95</td><td>RSVD</td><td>B95</td><td>NC</td></tr><tr><td>A96</td><td>GND</td><td>B96</td><td>NC</td></tr><tr><td>A97</td><td>VCC_12V</td><td>B97</td><td>NC</td></tr><tr><td>A98</td><td>VCC_12V</td><td>B98</td><td>NC</td></tr><tr><td>A99</td><td>VCC_12V</td><td>B99</td><td>NC</td></tr><tr><td>A100</td><td>GND (FIXED)</td><td rowspan="9"></td><td>B100</td><td>GND (FIXED)</td></tr><tr><td>A101</td><td>VCC_12V</td><td>B101</td><td>VCC_12V</td></tr><tr><td>A102</td><td>VCC_12V</td><td>B102</td><td>VCC_12V</td></tr><tr><td>A103</td><td>VCC_12V</td><td>B103</td><td>VCC_12V</td></tr><tr><td>A104</td><td>VCC_12V</td><td>B104</td><td>VCC_12V</td></tr><tr><td>A105</td><td>VCC_12V</td><td>B105</td><td>VCC_12V</td></tr><tr><td>A106</td><td>VCC_12V</td><td>B106</td><td>VCC_12V</td></tr><tr><td>A107</td><td>VCC_12V</td><td>B107</td><td>VCC_12V</td></tr><tr><td>A108</td><td>VCC_12V</td><td>B108</td><td>VCC_12V</td></tr></table>

Row C (cont.)
Row D

<table><tr><td>Pin No.</td><td>Pin Name</td><td></td><td>Pin No.</td><td>Pin Name</td></tr><tr><td colspan="5"></td></tr><tr><td>C48</td><td>PCI_AD31</td><td></td><td>D48</td><td>PCI_CLKRUN#</td></tr><tr><td>C49</td><td>PCI_IRQA#</td><td></td><td>D49</td><td>NC</td></tr><tr><td>C50</td><td>PCI_IRQB#</td><td></td><td>D50</td><td>PCI_CLK</td></tr><tr><td>C51</td><td>GND (FIXED)</td><td></td><td>D51</td><td>GND (FIXED)</td></tr><tr><td>C52</td><td>PCIE_RX16+</td><td></td><td>D52</td><td>PCIE_TX16+</td></tr><tr><td>C53</td><td>PCIE_RX16-</td><td></td><td>D53</td><td>PCIE_TX16-</td></tr><tr><td>C54</td><td>NC</td><td></td><td>D54</td><td>NC</td></tr><tr><td>C55</td><td>PCIE_RX17+</td><td></td><td>D55</td><td>PCIE_TX17+</td></tr><tr><td>C56</td><td>PCIE_RX17-</td><td></td><td>D56</td><td>PCIE_TX17-</td></tr><tr><td>C57</td><td>NC</td><td></td><td>D57</td><td>TYPE2#</td></tr><tr><td>C58</td><td>PCIE_RX18+</td><td></td><td>D58</td><td>PCIE_TX18+</td></tr><tr><td>C59</td><td>PCIE_RX18-</td><td></td><td>D59</td><td>PCIE_TX18-</td></tr><tr><td>C60</td><td>GND (FIXED)</td><td></td><td>D60</td><td>GND (FIXED)</td></tr><tr><td>C61</td><td>PCIE_RX19+</td><td></td><td>D61</td><td>PCIE_TX19+</td></tr><tr><td>C62</td><td>PCIE_RX19-</td><td></td><td>D62</td><td>PCIE_TX19-</td></tr><tr><td>C63</td><td>RSVD</td><td></td><td>D63</td><td>RSVD</td></tr><tr><td>C64</td><td>RSVD</td><td></td><td>D64</td><td>RSVD</td></tr><tr><td>C65</td><td>PCIE_RX20+</td><td></td><td>D65</td><td>PCIE_TX20+</td></tr><tr><td>C66</td><td>PCIE_RX20-</td><td></td><td>D66</td><td>PCIE_TX20-</td></tr><tr><td>C67</td><td>RSVD</td><td></td><td>D67</td><td>GND</td></tr><tr><td>C68</td><td>PCIE_RX21+</td><td></td><td>D68</td><td>PCIE_TX21+</td></tr><tr><td>C69</td><td>PCIE_RX21-</td><td></td><td>D69</td><td>PCIE_TX21-</td></tr><tr><td>C70</td><td>GND (FIXED)</td><td></td><td>D70</td><td>GND (FIXED)</td></tr><tr><td>C71</td><td>PCIE_RX22+</td><td></td><td>D71</td><td>PCIE_TX22+</td></tr><tr><td>C72</td><td>PCIE_RX22-</td><td></td><td>D72</td><td>PCIE_TX22-</td></tr><tr><td>C73</td><td>NC</td><td></td><td>D73</td><td>NC</td></tr><tr><td>C74</td><td>PCIE_RX23+</td><td></td><td>D74</td><td>PCIE_TX23+</td></tr><tr><td>C75</td><td>PCIE_RX23-</td><td></td><td>D75</td><td>PCIE_TX23-</td></tr><tr><td>C76</td><td>GND</td><td></td><td>D76</td><td>GND</td></tr><tr><td>C77</td><td>RSVD</td><td></td><td>D77</td><td>IDE_CBLID#</td></tr><tr><td>C78</td><td>NC</td><td></td><td>D78</td><td>NC</td></tr><tr><td>C79</td><td>NC</td><td></td><td>D79</td><td>NC</td></tr><tr><td>C80</td><td>GND (FIXED)</td><td></td><td>D80</td><td>GND (FIXED)</td></tr><tr><td>C81</td><td>NC</td><td></td><td>D81</td><td>NC</td></tr><tr><td>C82</td><td>NC</td><td></td><td>D82</td><td>NC</td></tr><tr><td>C83</td><td>RSVD</td><td></td><td>D83</td><td>RSVD</td></tr><tr><td>C84</td><td>GND</td><td></td><td>D84</td><td>GND</td></tr><tr><td>C85</td><td>NC</td><td></td><td>D85</td><td>NC</td></tr><tr><td>C86</td><td>NC</td><td></td><td>D86</td><td>NC</td></tr><tr><td>C87</td><td>GND</td><td></td><td>D87</td><td>GND</td></tr><tr><td>C88</td><td>NC</td><td></td><td>D88</td><td>NC</td></tr><tr><td>C89</td><td>NC</td><td></td><td>D89</td><td>NC</td></tr><tr><td>C90</td><td>GND (FIXED)</td><td></td><td>D90</td><td>GND (FIXED)</td></tr><tr><td>C91</td><td>NC</td><td></td><td>D91</td><td>NC</td></tr><tr><td>C92</td><td>NC</td><td></td><td>D92</td><td>NC</td></tr><tr><td>C93</td><td>GND</td><td></td><td>D93</td><td>GND</td></tr><tr><td>C94</td><td>NC</td><td></td><td>D94</td><td>NC</td></tr><tr><td>C95</td><td>NC</td><td></td><td>D95</td><td>NC</td></tr><tr><td>C96</td><td>GND</td><td></td><td>D96</td><td>GND</td></tr><tr><td>C97</td><td>RSVD</td><td></td><td>D97</td><td>NC</td></tr><tr><td>C98</td><td>NC</td><td></td><td>D98</td><td>NC</td></tr><tr><td>C99</td><td>NC</td><td></td><td>D99</td><td>NC</td></tr><tr><td>C100</td><td>GND (FIXED)</td><td></td><td>D100</td><td>GND (FIXED)</td></tr><tr><td>C101</td><td>NC</td><td></td><td>D101</td><td>NC</td></tr><tr><td>C102</td><td>NC</td><td></td><td>D102</td><td>NC</td></tr><tr><td>C103</td><td>GND</td><td></td><td>D103</td><td>GND</td></tr><tr><td>C104</td><td>VCC_12V</td><td></td><td>D104</td><td>VCC_12V</td></tr><tr><td>C105</td><td>VCC_12V</td><td></td><td>D105</td><td>VCC_12V</td></tr><tr><td>C106</td><td>VCC_12V</td><td></td><td>D106</td><td>VCC_12V</td></tr><tr><td>C107</td><td>VCC_12V</td><td></td><td>D107</td><td>VCC_12V</td></tr><tr><td>C108</td><td>VCC_12V</td><td></td><td>D108</td><td>VCC_12V</td></tr></table>

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# 7 System Resources

# 7.1 System Memory Map

<table><tr><td>Address Range (decimal)</td><td>Address Range (hex)</td><td>Size</td><td>Description</td></tr><tr><td>1024 K - TOM (1)</td><td>100000 - N.A</td><td>N.A.</td><td>Note (1)</td></tr><tr><td>960 K - 1024 K</td><td>F0000 - FFFFF</td><td>64 KB</td><td>System BIOS Area</td></tr><tr><td>928 K - 960 K</td><td>E0000 - EFFFF</td><td>64 KB</td><td>Extended System BIOS Area</td></tr><tr><td>800 K - 928 K</td><td>C8000 - E7FFF</td><td>160 KB</td><td>Expansion ROM. Note (2)</td></tr><tr><td>768 K - 800 K</td><td>C0000 - C7FFF</td><td>32 KB</td><td>Extended VGA BIOS. Note (2)</td></tr><tr><td>640 K - 768 K</td><td>A0000 - BFFFF</td><td>128 KB</td><td>Video Buffer &amp; SMM space</td></tr><tr><td>0 - 640 K</td><td>00000 - 7FFFF</td><td>640K</td><td>Conventional memory</td></tr></table>

![The image displays a stylized icon of a white document or form with a folded top-right corner and faint horizontal gray lines. A large, bold red checkmark is superimposed diagonally across the center of the document, indicating approval or completion.](.express-iw400-manual-3/b11b3b7232244f0216db9bbfb64fd2de27b3c2fc5487b17d253e605429f2477e.jpg)
NOTE:

(1) TOM = Top of Memory, some memory ranges such as the ACPI reserved area are unavailable for use.

![The image displays a digital icon of a document. It depicts a white sheet of paper with faint horizontal gray lines running across it. Superimposed over the document is a large, bold red checkmark (or tick mark) angled from the bottom left to the top right. The icon has a slight drop shadow and a glossy finish.](.express-iw400-manual-3/8c9ef7b8f3039b2ae9636941818dc83c214d03592a6b5aacd0f90ec66af07d90.jpg)
NOTE:

(2) When a PCI/PCIE VGA card is used, it may need a larger memory range than 32 KB. The VGA BIOS area may be changed to 48 KB or 64 KB. When onboard LAN PXE functionality is enabled, it will occupy memory from the expansion ROM range.

# 7.2 Direct Memory Access Channels

<table><tr><td>Channel Number</td><td>Data Width</td><td>System Resource</td><td>Available</td></tr><tr><td>0</td><td>8- or 16-bits</td><td></td><td>Note (1)</td></tr><tr><td>1</td><td>8- or 16-bits</td><td>Parallel Port</td><td>Note (1), (2)</td></tr><tr><td>2</td><td>8- or 16-bits</td><td>Floppy Controller</td><td>Note (1)</td></tr><tr><td>3</td><td>8- or 16-bits</td><td>Parallel Port</td><td>Note (1), (2)</td></tr><tr><td>4</td><td>8- or 16-bits</td><td>Reserved. Cascade channel</td><td>No</td></tr><tr><td>5</td><td>16-bits</td><td></td><td>Note (1)</td></tr><tr><td>6</td><td>16-bits</td><td></td><td>Note (1)</td></tr><tr><td>7</td><td>16-bits</td><td></td><td>Note (1)</td></tr></table>

![The image displays a white document icon featuring faint gray horizontal lines simulating text. A large red checkmark with a drop shadow is overlaid on the left side of the page.](.express-iw400-manual-3/1472570e911ab08ad68504b94a7d4f1d7251145151fd7ca29555ee9b194fab6d.jpg)
NOTE:

(1) The DMA channels can only be used on LPC bus.

![The image displays a white document icon with a folded top-right corner and faint grey horizontal lines representing text. A large, bold red checkmark is superimposed diagonally across the document.](.express-iw400-manual-3/064cdb6f96c73c3f3460dcc30379abbbe5093b0681c402cf75fff6a9e6966352.jpg)
NOTE:

(2) The parallel port ECP mode will occupy channel 1 or 3. If it is enabled, it will occupy memory from the expansion ROM range.

# 7.3 Legacy I/O Map

<table><tr><td>Address (hex)</td><td>Size</td><td>Description</td><td>Available</td></tr><tr><td>0000 - 00FF</td><td>256 bytes</td><td>Motherboard resources</td><td>No</td></tr><tr><td>0278 - 027F</td><td>8 bytes</td><td>Parallel Port 2 (LPT2)</td><td>Note (1)</td></tr><tr><td>02E0 - 02E7</td><td>8 bytes</td><td>CIR Port</td><td>Note (1)</td></tr><tr><td>02E8 - 02EF</td><td>8 bytes</td><td>Serial Port 4 (COM4)</td><td>Note (2)</td></tr><tr><td>02F8 - 02FF</td><td>8 bytes</td><td>Serial Port 2 (COM2)</td><td>Note (2)</td></tr><tr><td>0378 - 037F</td><td>8 bytes</td><td>Parallel Port 1 (LPT1)</td><td>Note (1)</td></tr><tr><td>03B0 - 03BB</td><td>12 bytes</td><td>Video (monochrome)</td><td>No</td></tr><tr><td>03BC - 03BF</td><td>4 bytes</td><td>Parallel Port 3 (LPT3)</td><td>Note (2)</td></tr><tr><td>03C0 - 03DF</td><td>32 bytes</td><td>Video (VGA)</td><td>No</td></tr><tr><td>03E0 - 03E7</td><td>8 bytes</td><td>CIR Port</td><td>Note (1)</td></tr><tr><td>03E8 - 03EF</td><td>8 bytes</td><td>Serial Port 3 (COM3)</td><td>Note (2)</td></tr><tr><td>03F0 - 03F5</td><td>6 bytes</td><td>Diskette controller</td><td>Note (1)</td></tr><tr><td>03F8 - 03FF</td><td>8 bytes</td><td>Serial Port 1(COM1)</td><td>Note (2)</td></tr><tr><td>0400 - 047F</td><td>128 bytes</td><td>Motherboard resource</td><td>No</td></tr><tr><td>04D0 - 04D1</td><td>2 bytes</td><td>Motherboard resource</td><td>No</td></tr><tr><td>0500 - 055F</td><td>96 bytes</td><td>Motherboard resource</td><td>No</td></tr><tr><td>0A00 - 0A07</td><td>8 bytes</td><td>Motherboard resource</td><td>No</td></tr><tr><td>0CF9</td><td>1 byte</td><td>Motherboard resource</td><td>No</td></tr><tr><td>1000 - EFFF</td><td></td><td>PCI Bus</td><td>Note (3)</td></tr></table>

![The image shows an icon of a white document with a folded top-right corner and faint horizontal lines on the lower half. A large, glossy red checkmark is superimposed diagonally across the left side of the paper.](.express-iw400-manual-3/8a8a5071ea45c0e7c7d8a25f7f300e5ac309470857a79db1032867974d03ce0d.jpg)
NOTE:

(1) The occupation of I/O ranges depends on BIOS setting, only one I/O range will be used and the others are forwarded to LPC bus.

![The image displays a white document icon with a folded top-right corner. Faint horizontal lines are visible on the surface of the paper. A large red checkmark is centered on the document, and a drop shadow is cast to the right, giving the icon a three-dimensional appearance.](.express-iw400-manual-3/6d944f9d4890bac3d81a9af5a931d00ce44791dfccf4ea278624379d85a72ede.jpg)
NOTE:

(2) The occupation of I/O range depends on BIOS setting. If external Super I/O controller is present for two external serial ports on LPC bus, the I/O range must be set in BIOS in order to make sure they are really forwarded to LPC bus.

![A white document icon with a folded top corner and faint horizontal lines. A large red checkmark with a motion blur effect is superimposed over it.](.express-iw400-manual-3/833af8ce7d9faf4b8f40b2fd150cfe1d5c8142c9e8f24e639fe4c4ce308d2076.jpg)
NOTE:

(3) Non PnP/PCI devices must not occupy I/O resource in these areas to avoid abnormal behavior.

# 7.4 Interrupt Request (IRQ) Lines

PIC Mode Only

<table><tr><td>IRQ#</td><td>Typical Interrupt Resource</td><td>Connected</td><td>Available</td></tr><tr><td>0</td><td>AT Timer</td><td>N.A.</td><td>No</td></tr><tr><td>1</td><td>Keyboard</td><td>N.A.</td><td>No</td></tr><tr><td>2</td><td>Cascade interrupt</td><td>N.A.</td><td>No</td></tr><tr><td>3</td><td>COM2/PCI device</td><td>IRQ3 via SERIRQ</td><td>Note (1)</td></tr><tr><td>4</td><td>COM1/PCI device</td><td>IRQ4 via SERIRQ</td><td>Note (1)</td></tr><tr><td>5</td><td>LPT/PCI device</td><td>IRQ5 via SERIRQ</td><td>Note (1)</td></tr><tr><td>6</td><td>Floppy Drive Controller</td><td>IRQ6 via SERIRQ</td><td>No</td></tr><tr><td>7</td><td>LPT/PCI device</td><td>IRQ7 via SERIRQ</td><td>Note (1)</td></tr><tr><td>8</td><td>System CMOS/Real-time clock</td><td>N.A.</td><td>No</td></tr><tr><td>9</td><td>Microsoft® ACPI-Compliant System</td><td>IRQ9 via SERIRQ</td><td>Note (1), (2)</td></tr><tr><td>10</td><td>PCI device</td><td>IRQ10 via SERIRQ</td><td>Yes</td></tr><tr><td>11</td><td>PCI device</td><td>IRQ11 via SERIRQ</td><td>Yes</td></tr><tr><td>12</td><td>PS/2 Mouse</td><td>IRQ12 via SERIRQ</td><td>No</td></tr><tr><td>13</td><td>Math Processor</td><td>N.A.</td><td>No</td></tr><tr><td>14</td><td>PCI device</td><td>IRQ14 via SERIRQ</td><td>Yes</td></tr><tr><td>15</td><td>PCI device</td><td>IRQ15 via SERIRQ</td><td>Yes</td></tr></table>

![An icon depicting a white document with a folded top-right corner and faint horizontal lines, featuring a large red checkmark overlaid on the left side.](.express-iw400-manual-3/8c28ed53b202124f34a77a11384777c8def2f1424fff8bdfadc6d5607ca73565.jpg)
NOTE:

(1) Enable/disable onboard devices. When disabled, the IRQ is free for other PCI devices to use.

![This image shows a digital icon of a white document or piece of paper with a folded top-right corner. Faint horizontal lines appear near the bottom, suggesting text. A large red checkmark is drawn diagonally across the center of the document.](.express-iw400-manual-3/70396045fa4a5a0d124bcd4b1849a97a0123d7eaf55854e094896d125d6b0c8f.jpg)
NOTE:

(2) In ACPI mode, IRQ9 is used for the SCI (System Control Interrupt) to issue an ACPI

7.5 PCI Configuration Space Map

<table><tr><td>Bus Number</td><td>Device Number</td><td>Function Number</td><td>Routing</td><td>Description</td></tr><tr><td>00h</td><td>00h</td><td>00h</td><td>Internal</td><td>Intel® Host Bridge</td></tr><tr><td>00h</td><td>00h</td><td>01h</td><td>Internal</td><td>Intel® DRAM Error Reporting Device</td></tr><tr><td>00h</td><td>01h</td><td>00h</td><td>Internal</td><td>Intel® EDMA Device</td></tr><tr><td>00h</td><td>02h</td><td>00h</td><td>Internal</td><td>Intel® PCI Express® Port A0</td></tr><tr><td>00h</td><td>03h</td><td>00h</td><td>Internal</td><td>Intel® PCI Express® Port A1</td></tr><tr><td>00h</td><td>1Ch</td><td>00h</td><td>Internal</td><td>Intel® PCI Express® Port B0</td></tr><tr><td>00h</td><td>1Ch</td><td>01h</td><td>Internal</td><td>Intel® PCI Express® Port B1</td></tr><tr><td>00h</td><td>1Ch</td><td>02h</td><td>Internal</td><td>Intel® PCI Express® Port B2</td></tr><tr><td>00h</td><td>1Ch</td><td>03h</td><td>Internal</td><td>Intel® PCI Express® Port B3</td></tr><tr><td>00h</td><td>1Dh</td><td>00h</td><td>Internal</td><td>Intel® USB 1.1 Controller</td></tr><tr><td>00h</td><td>1Dh</td><td>01h</td><td>Internal</td><td>Intel® USB 1.1 Controller</td></tr><tr><td>00h</td><td>1Dh</td><td>07h</td><td>Internal</td><td>Intel® USB 2.0 Host Controller</td></tr><tr><td>00h</td><td>1Eh</td><td>00h</td><td>Internal</td><td>Intel® PCI to PCI Bridge</td></tr><tr><td>00h</td><td>1Fh</td><td>00h</td><td>Internal</td><td>Intel® LPC Interface</td></tr><tr><td>00h</td><td>1Fh</td><td>02h</td><td>Internal</td><td>Intel® SATA Host Controller</td></tr><tr><td>00h</td><td>1Fh</td><td>03h</td><td>Internal</td><td>Intel® SMbus Controller</td></tr><tr><td>05h</td><td>00h</td><td>00h</td><td>INTA - INTD</td><td>Intel® Ethernet Controller (Note 1)</td></tr><tr><td>01h</td><td>04h</td><td>00h</td><td>INTA - INTD</td><td>External PCI Slot 1 (Note 1)</td></tr><tr><td>01h</td><td>05h</td><td>00h</td><td>INTA - INTD</td><td>External PCI Slot 2 (Note 1)</td></tr></table>

![The image displays a low-resolution icon of a document or file. It features a white page with a folded top-right corner and faint horizontal lines representing text. A large, red checkmark is superimposed diagonally over the center of the document.](.express-iw400-manual-3/0d78bd0d338e3c8ec6266b5bbca5060950ff4594d09b79891a02a6ed9332451f.jpg)
NOTE:

The bus number will change when a PCIe $^{®}$ VGA card is plugged into the system.

# 7.6 PCI Interrupt Routing Map

<table><tr><td>PIRQ</td><td>INT</td><td>Lan</td><td>SATA</td><td>UHCI1</td><td>UHCI2</td><td>EHCI</td><td>PCI slot1</td><td>PCI slot1</td><td>PCIe devices</td></tr><tr><td>A</td><td>INTA</td><td>INTA</td><td></td><td></td><td></td><td></td><td>INTA</td><td>INTD</td><td>INTA</td></tr><tr><td>B</td><td>INTB</td><td>INTB</td><td></td><td></td><td></td><td></td><td>INTB</td><td>INTA</td><td>INTB</td></tr><tr><td>C</td><td>INTC</td><td>INTC</td><td></td><td></td><td></td><td></td><td>INTC</td><td>INTB</td><td>INTC</td></tr><tr><td>D</td><td>INTD</td><td>INTD</td><td>INTB</td><td></td><td>INTB</td><td></td><td>INTD</td><td>INTC</td><td>INTD</td></tr><tr><td>E</td><td>INTE</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>F</td><td>INTF</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>G</td><td>INTG</td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>H</td><td>INTH</td><td></td><td></td><td>INTA</td><td></td><td>INTA</td><td></td><td></td><td></td></tr></table>

# 7.7 System Management Bus and I²C Bus

Internally the SMB bus and I²C bus are one and the same, both coming from the same source, the GX2 companion chip CS5535. The X4 connector has pin-outs for both I²C and SMB bus. The following onboard devices are connected to the SMB/I²C bus :

<table><tr><td>Address (hex)</td><td>Function</td><td>Device</td><td>Bus</td></tr><tr><td>01001100 (4C)</td><td>Thermal Sensor</td><td>NS LM63</td><td></td></tr><tr><td>10100000 (A0)</td><td>DDR2</td><td>SO-RDIMM1</td><td></td></tr><tr><td>10100010 (A2)</td><td>DDR2</td><td>SO-RDIMM2</td><td></td></tr><tr><td>10101100 (AC)</td><td>EEPROM (optional)</td><td>AT24C02A</td><td></td></tr><tr><td>10101110 (AE)</td><td>EEPROM (optional)</td><td>AT24C02A</td><td></td></tr><tr><td>11100010 (D2)</td><td>Clock generator</td><td>ICS932S208</td><td></td></tr><tr><td>11101100 (DC)</td><td>Clock buffer</td><td>ICS9DB108</td><td></td></tr></table>

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# 8 AMIBIOS8™ Setup Utility

The following chapter describes the basic navigation of the AMIBIOS8 $^{™}$ BIOS setup utility.

# 8.1 Starting the BIOS

To enter the setup screen, follow these steps:

1. Power on the motherboard
2. Press the &lt;Delete&gt; key on your keyboard when you see the following text prompt:
3. After you press the &lt;Delete&gt; key, the main BIOS setup menu displays. You can access the other setup screens from the main BIOS setup menu, such as the Chipset and Power menus.

```txt
&lt;Press DEL to run Setup&gt;
```

![American\nMegatrends\nwww.ami.com\nAMIBIOS (C) 2002 American Megatrends, Inc.\nBIOS Date: 10/08/07 12:39:39 Ver: 00.00.04\nIntel(R) Celeron(R) M Processor\nPress DEL to run Setup\nChecking NURAM..\nUSD Device(s): 2 Keyboards, 2 Mice, 1 Hub, 1 Storage Device\n1024MB OK\nAuto-Detecting Pri Master..IDE Hard Disk\nAuto-Detecting Pri Slave...ATAPI CDROM\nPri Master: 3.20 ST3B410A 007A](.express-iw400-manual-3/0544dddb0984c56132e0ea9b77570e87c506ed8fc74e43bc3cb3cbadeefcc304.jpg)

![The image displays a white document icon featuring a folded top-right corner and faint horizontal lines. A large, bold red checkmark is superimposed over the center of the page.](.express-iw400-manual-3/58a2e8be2969f1c5bfac46b1b818e2c20f1666e6c5bb4bdc9b4e062c0f9883ab.jpg)
NOTE:

This manual describes the standard look of the setup screen. The motherboard manufacturer has the ability to change any and all of the settings described in this manual. This means that some of the options described in this manual do not exist in your motherboard's AMIBIOS.

![The image displays a graphic icon of a document, depicted as a white sheet of paper with a folded top-right corner and horizontal lines running across it. A large, red checkmark is stamped diagonally across the left side of the document.](.express-iw400-manual-3/666a6afb8794ee6193ca2ebbcda00afa8f435fb9fc891e02f4c84429c0e43cd9.jpg)
NOTE:

In most cases, the &lt;Delete&gt; key is used to invoke the setup screen. There are a few cases that other keys are used, such as &lt;F1&gt;, &lt;F2&gt;, and so on.

# 8.1.1 Setup Menu

The main BIOS setup menu is the first screen that you can navigate. Each main BIOS setup menu option is described in this user's guide.

The Main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. "Grayed-out" options cannot be configured. Options is blue can be.

The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it.

![The image displays a graphic icon of a white document or piece of paper. On the page, there are several horizontal gray lines representing text. Overlaid on the document is a large, red checkmark (or tick mark) that is semi-transparent, allowing the gray lines underneath to be visible. The checkmark is oriented diagonally from the lower left to the upper right.](.express-iw400-manual-3/44fd2124d6908924d7b7f34865c1ca68256bbff7133f01f98989373068eda5f3.jpg)
NOTE:

AMIBIOS8™ has default text messages built into it. The motherboard manufacture retains the option to include, leave out, or change any of these text messages. They can also add their own text messages. Because of this, many screen shots in this manual are different from your setup screen.

<table><tr><td colspan="7">BIOS SETUP UTILITY</td></tr><tr><td>Main</td><td>Advanced</td><td>PCIPnP</td><td>Boot</td><td>Security</td><td>Chipset</td><td>Exit</td></tr><tr><td colspan="5">System Overview</td><td rowspan="5" colspan="2">Use [ENTER], [TAB]or [SHIFT-TAB] toselect a field.Use [+] or [-] toconfigure system Time.</td></tr><tr><td colspan="5">AMIBIOS</td></tr><tr><td colspan="5">Version :08.00.14Build Date:10/08/07ID :IW400A11</td></tr><tr><td colspan="5">Processor</td></tr><tr><td colspan="5">Speed :255MHzCount :255</td></tr><tr><td colspan="5">System Memory</td><td rowspan="3" colspan="2">← Select Screen↑↓ Select Item+- Change FieldTab Select FieldF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="5">Size :1024MB</td></tr><tr><td colspan="5">System Time[16:49:28]System Date[Thu 01/03/2002]</td></tr></table>

v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.

# 8.1.2 Navigation

The BIOS setup/utility uses a key-based navigation system called hot keys. Most of the BIOS setup utility hot keys can be used at any time during the setup navigation process. These keys include &lt;F1&gt;, &lt;F10&gt;, &lt;Enter&gt;, &lt;ESC&gt;, &lt;Arrow&gt; keys, and so on.

![Based on the provided image, here is the accurate and concise description of the flowchart:\n\n**Main Flow:**\n*   A top block labeled **'BIOS Setup Utility'** points downward to the text **'Screens'**.\n*   From **'Screens'**, a downward arrow points to the text **'Items'**.\n\n**Screen Navigation:**\n*   Below 'Screens' is a horizontal row of boxes labeled **'Screen 1'**, **'Screen 2'**, **'Screen 3'**, **'Screen 4'**, and **'Screen 5'**, linked by double-headed arrows.\n*   A box to the left labeled **'Left and Right Keys to Select a Setup Screen'** connects via a dotted arrow to the link between 'Screen 1' and 'Screen 2'.\n\n**Items and Fields Grid:**\n*   Below 'Items' is a set of boxes containing the symbol **'±'**.\n    *   The top row contains three such boxes connected by double-headed horizontal arrows.\n    *   The bottom row contains three such boxes connected by double-headed horizontal arrows.\n    *   A double-headed vertical arrow connects the center box of the top row to the center box of the bottom row.\n*   The text **'Fields'** is connected via a bracket-like line to the bottom row of boxes.\n\n**Annotations:**\n*   **'Tab Key to Select Fields'**: A dotted arrow points from this box to the top row of boxes.\n*   **'+ To Change Field Values'**: A dotted arrow points from this box to the rightmost box in the top row.\n*   **'Up and Down Keys to Select a Setup Item'**: A dotted arrow points from this box to the vertical double-headed arrow connecting the two rows.](.express-iw400-manual-3/108e52283ef6da106280030e482b1b0b51a43e6b00457e0568953ba4e439fa6b.jpg)

![The image displays a white document icon with the top right corner folded down. Faint gray horizontal lines run across the paper, simulating text. A large red checkmark with a motion blur effect is overlaid centrally on the document.](.express-iw400-manual-3/035ea02cd8246da20edbadd00f728fa8a923c8aefa0070abad8b341e0289dec8.jpg)
NOTE:

There is a hot key legend located in the right frame on most setup screens.

Hot Key Description

<table><tr><td rowspan="2">→←</td><td>Left/Right The Left and Right &lt;Arrow &gt; keys allow you to select an setup screen.</td></tr><tr><td>For example: Main screen, Advanced screen, Chipset screen, and so on.</td></tr><tr><td>↑↓</td><td>Up/Down The Up and Down &lt;Arrow &gt; keys allow you to select an setup item or sub-screen.</td></tr><tr><td rowspan="2">+ -</td><td>Plus/Minus The Plus and Minus &lt;Arrow &gt; keys allow you to change the field value of a particular setup item.</td></tr><tr><td>For example: Date and Time.</td></tr><tr><td>Tab</td><td>The &lt;Tab &gt; key allows you to select setup fields.</td></tr></table>

![The image displays a white document icon with a folded top-right corner and faint horizontal lines suggesting text. A large, bold red checkmark is superimposed over the center and left side of the document.](.express-iw400-manual-3/8bc6f4d71bd4589d6f714d1f9eedc1d328c4508e01e2a3cd4a690f6dea2af92f.jpg)
NOTE:

The &lt;F8&gt; key on your keyboard is the Fail-Safe key. It is not displayed on the key legend by default. To set the Fail-Safe settings of the BIOS, press the &lt;F8&gt; key on your keyboard. It is located on the upper row of a standard 101 keyboard. The Fail-Safe settings allow the motherboard to boot up with the least amount of options set. This can lessen the probability of conflicting settings.

# Hot Key Description

F1 The &lt; F1 &gt; key allows you to display the General Help screen.

Press the &lt; F1 &gt; key to open the General Help screen.

General Help

<table><tr><td>↔</td><td>Select Screen</td><td>↓↑</td><td>Select Item</td></tr><tr><td>+-</td><td>Change Screen</td><td>Enter</td><td>Go to Sub Screen</td></tr><tr><td>PGDN</td><td>Next Page</td><td>PGUP</td><td>Previous Page</td></tr><tr><td>Home</td><td>Go to Top of the Screen</td><td>End</td><td>Go to Bottom of Screen</td></tr><tr><td>F2/F3</td><td>Change Colors</td><td>F7</td><td>Discard Changes</td></tr><tr><td>F8</td><td>Load Failsafe Defaults</td><td>F9</td><td>Load Optimal Defaults</td></tr><tr><td>F10</td><td>Save and Exit</td><td>ESC</td><td>Exit</td></tr></table>

[Ok]

F10 The &lt; F10 &gt; key allows you to save any changes you have made and exit Setup. Press the &lt; F10 &gt; key to save your changes. The following screen will appear:

Save configuration changes and exit now?

[Ok]

[Cancel]

Press the &lt;Enter&gt; key to save the configuration and exit. You can also use the &lt;Arrow&gt; key to select Cancel and then press the &lt;Enter&gt; key to abort this function and return to the previous screen.

ESC The &lt;Esc&gt; key allows you to discard any changes you have made and exit the Setup. Press the &lt;Esc&gt; key to exit the setup without saving your changes. The following screen will appear:

Discard changes and exit setup now?

[Ok]

[Cancel]

Press the &lt;Enter&gt; key to discard changes and exit. You can also use the &lt;Arrow&gt; key to select Cancel and then press the &lt;Enter&gt; key to abort this function and return to the previous screen.

Enter The &lt;Enter&gt; key allows you to display or change the setup option listed for a particular setup item. The &lt;Enter&gt; key can also allow you to display the setup sub-screens.

# 8.2 Main Setup

When you first enter the Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab. There are two Main Setup options. They are described in this section. The Main BIOS Setup screen is shown below.

<table><tr><td colspan="7">BIOS SETUP UTILITY</td></tr><tr><td>Main</td><td>Advanced</td><td>PCIPnP</td><td>Boot</td><td>Security</td><td>Chipset</td><td>Exit</td></tr><tr><td colspan="5">System Overview</td><td rowspan="5" colspan="2">Use [ENTER], [TAB]or [SHIFT-TAB] toselect a field.Use [+] or [-] toconfigure system Time.</td></tr><tr><td colspan="5">AMIBIOS</td></tr><tr><td colspan="5">Version :08.00.14Build Date:10/08/07ID :IW400A11</td></tr><tr><td colspan="5">Processor</td></tr><tr><td colspan="5">Speed :255MHzCount :255</td></tr><tr><td colspan="5">System MemorySize :1024MB</td><td rowspan="2" colspan="2">← Select Screen↑↓ Select Item+- Change FieldTab Select FieldF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="5">System Time[16:49:28]System Date[Thu 01/03/2002]</td></tr><tr><td colspan="7">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# 8.2.1 System Time/System Date

Use this option to change the system time and date. Highlight System Time or System Date using the &lt;Arrow&gt; keys. Enter new values through the keyboard. Press the &lt;Tab&gt; key or the &lt;Arrow&gt; keys to move between fields. The date must be entered in MM/DD/YY format. The time is entered in HH:MM:SS format.

![The image displays a graphic icon of a white document with a folded top-right corner and faint horizontal lines running across the page. A large, bold red checkmark is stamped diagonally across the front of the document.](.express-iw400-manual-3/7f84932db3fe4180fdba8ed2defb11e2117fda10e3933e04a22c3da087679ed6.jpg)
NOTE:

The time is in 24-hour format. For example, 5:30 A.M. appears as 05:30:00, and 5:30 P.M. as 17:30:00.

# 8.3 Advanced BIOS Setup

Select the Advanced tab from the setup screen to enter the Advanced BIOS Setup screen. You can select any of the items in the left frame of the screen, such as SuperIO Configuration, to go to the sub menu for that item. You can display an Advanced BIOS Setup option by highlighting it using the &lt;Arrow&gt; keys. All Advanced BIOS Setup options are described in this section. The Advanced BIOS Setup screen is shown below.

The sub menus are described on the following pages.

<table><tr><td colspan="6">BIOS SETUP UTILITY</td></tr><tr><td>Main</td><td>Advanced</td><td>PCIPnP</td><td>Boot</td><td>Security</td><td>Chipset Exit</td></tr><tr><td colspan="5">Advanced Settings</td><td>Configure CPU.</td></tr><tr><td colspan="5">WARNING: Setting wrong values in below sections may cause system to malfunction.</td><td></td></tr><tr><td colspan="5">CPU ConfigurationIDE ConfigurationFloppy ConfigurationSuperIO ConfigurationACPI ConfigurationAHCI ConfigurationAPM ConfigurationEvent Log ConfigurationHardware Health ConfigurationRemote Access ConfigurationUSB Configuration</td><td>← Select Screen↑↓ Select ItemEnter Go to Sub ScreenF1 General HelpF10 Save and ExitESC Exit</td></tr></table>

v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.

# 8.3.1 CPU Configuration

# CPU Configuration Settings

You can use this screen to select options for the CPU Configuration Settings. Use the up and down &lt;Arrow&gt; keys to select an item. Use the &lt;Plus&gt; and &lt;Minus&gt; keys to change the value of the selected option. A description of the selected item appears on the right side of the screen. The settings are described on the following pages. An example of the CPU Configuration screen is shown below.

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td colspan="2">Advanced</td></tr><tr><td>Configure advanced CPU settingsModule Version -13.04Manufacturer:IntelBrand String:Frequency :255MHzFSB Speed :400MHzCache L1 :0 KBCache L2 :0 KB</td><td>← Select Screen↑↓ Select ItemF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="2">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# 8.3.2 IDE Configuration

# IDE Configuration Settings

You can use this screen to select options for the IDE Configuration Settings. Use the up and down &lt;Arrow&gt; keys to select an item. Use the &lt;Plus&gt; and &lt;Minus&gt; keys to change the value of the selected option. A description of the selected item appears on the right side of the screen. The settings are described on the following pages. An example of the IDE Configuration screen is shown below.

<table><tr><td colspan="3">BIOS SETUP UTILITY</td></tr><tr><td colspan="3">Advanced</td></tr><tr><td colspan="2">IDE Configuration</td><td rowspan="3">Select whether the IDE channels should be initialized in Compatible or Enhanced mode of operation.</td></tr><tr><td>ATA/IDE Configuration Configure SATA as</td><td>[Enhanced] [IDE]</td></tr><tr><td>Primary IDE MasterPrimary IDE SlaveSecondary IDE MasterSecondary IDE Slave</td><td>: [ATAPI CDROM]: [Not Detected]: [Hard Disk]: [Not Detected]</td></tr><tr><td></td><td></td><td>← Select Screen↑↓ Select Item+- Change OptionF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="3">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# Onboard PCI IDE Controller

This item specifies the IDE channels used by the onboard PCI IDE controller. The settings are Disabled, Primary, Secondary, or Both. The Optimal and Fail-Safe default setting is Both.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to prevent the computer system from using the onboard IDE controller.</td></tr><tr><td>Primary</td><td>Set this value to allow the computer system to detect only the Primary IDE channel. This includes both the Primary Master and the Primary Slave.</td></tr><tr><td>Secondary</td><td>Set this value to allow the computer system to detect only the Secondary IDE channel. This includes both the Secondary Master and the Secondary Slave.</td></tr><tr><td>Both</td><td>Set this value to allow the computer system to detect the Primary and Secondary IDE channels. This includes both the Primary Master, Primary Slave, Secondary Master, and Secondary Slave. This is the default setting.</td></tr></table>

Primary IDE Master, Primary IDE Slave, Secondary IDE Master, Secondary IDE Slave

Select one of the hard disk drives to configure it. Press &lt;Enter&gt; to access its the sub menu. The options on the sub menu are described in the following sections.

# Hard disk drive Write Protect

Set this option to protect the hard disk drive from being overwritten. The Optimal and Fail-Safe default setting is Disabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to allow the hard disk drive to be used normally. Read, write, and erase functions can be performed to the hard disk drive. This is the default setting.</td></tr><tr><td>Enabled</td><td>Set this value to prevent the hard disk drive from being erased.</td></tr></table>

# IDE Detect Time Out (Seconds)

Set this option to stop the AMIBIOS from searching for IDE devices within the specified number of seconds. Basically, this allows you to fine-tune the settings to allow for faster boot times. Adjust this setting until a suitable timing that can detect all IDE disk drives attached is found.

The Optimal and Fail-Safe default setting is 35.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>0</td><td>This value is the best setting to use if the onboard IDE controllers are set to a specific IDE disk drive in the AMIBIOS.</td></tr><tr><td>5</td><td>Set this value to stop the AMIBIOS from searching the IDE bus for IDE disk drives in five seconds. A large majority of ultra ATA hard disk drives can be detected well within five seconds.</td></tr><tr><td>10</td><td>Set this value to stop the AMIBIOS from searching the IDE bus for IDE disk drives in 10 seconds.</td></tr><tr><td>15</td><td>Set this value to stop the AMIBIOS from searching the IDE bus for IDE disk drives in 15 seconds.</td></tr><tr><td>20</td><td>Set this value to stop the AMIBIOS from searching the IDE bus for IDE disk drives in 20 seconds.</td></tr><tr><td>25</td><td>Set this value to stop the AMIBIOS from searching the IDE bus for IDE disk drives in 25 seconds.</td></tr><tr><td>30</td><td>Set this value to stop the AMIBIOS from searching the IDE bus for IDE disk drives in 30 seconds.</td></tr><tr><td>35</td><td>35 is the default value. It is the recommended setting when all IDE connectors are set to AUTO in the AMIBIOS setting.</td></tr></table>

![A white document icon with a folded top-right corner and horizontal lines, featuring a large red checkmark with a motion blur effect.](.express-iw400-manual-3/e74e2abf75347bb9373d8b101f914da9cbb8e799fe9a6d1a12c95a8f03f16bb7.jpg)
NOTE:

Different IDE disk drives take longer for the BIOS to locate than others do.

# ATA (PI) 80 pin Cable Detection

Set this option to select the method used to detect the ATA (PI) 80 pin cable. The Optimal and Fail-Safe setting is Host & Device.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Host &amp; Device</td><td>Set this value to use both the motherboard onboard IDE controller and IDE disk drive to detect the type of IDE cable used. This is the default setting.</td></tr><tr><td>Host</td><td>Set this value to use motherboard onboard IDE controller to detect the type of IDE cable used.</td></tr><tr><td>Device</td><td>Set this value to use IDE disk drive to detect the type of IDE cable used.</td></tr></table>

The use of an 80-conductor ATA cable is mandatory for running Ultra ATA/66, Ultra ATA/100 and Ultra ATA/133 IDE hard disk drives. The standard 40-conductor ATA cable cannot handle the higher speeds.

80-conductor ATA cable is plug compatible with the standard 40-conductor ATA cable. Because of this, the system must determine the presence of the correct cable. This detection is achieved by having a break in one of the lines on the 80-conductor ATA cable that is normally an unbroken connection in the standard 40-conductor ATA cable. It is this break that is used to make this determination. The AMIBIOS can instruct the drive to run at the correct speed for the cable type detected.

# 8.3.3 Floppy Configuration

# Floppy Configuration Settings

You can use this screen to specify options for the Floppy Configuration Settings. Use the up and down &lt;Arrow&gt; keys to select an item. Use the &lt;Plus&gt; and &lt;Minus&gt; keys to change the value of the selected option. The settings are described on the following pages. The screen is shown below.

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td>Advanced</td><td></td></tr><tr><td>Floppy Configuration</td><td>Select the type offloppy driveconnected to thesystem.</td></tr><tr><td>Floppy A [1.44 MB 31⁄2&quot;]</td><td>← Select Screen↑↓ Select Item+- Change OptionF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="2">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# Floppy Drive A:

Move the cursor to these fields via up and down &lt;arrow&gt; keys. Select the floppy type. The Optimal setting for floppy drive A: is 1.44 MB 3½". The Fail-Safe setting for floppy drive A: is 1.44 MB 3½".

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to prevent the use of the selected floppy disk drive channel. This option should be set if no floppy disk drive is installed on the specified channel.</td></tr><tr><td>360 KB 5 1⁄4&quot;</td><td>Set this value if the floppy disk drive attached to the corresponding channel is a 360 KB 51⁄4&quot; floppy disk drive.</td></tr><tr><td>1.2 MB 5 1⁄4&quot;</td><td>Set this value if the floppy disk drive attached to the corresponding channel is a 1.2 MB 51⁄4&quot; floppy disk drive.</td></tr><tr><td>720 KB 3 1⁄2&quot;</td><td>Set this value if the floppy disk drive attached to the corresponding channel is a 720 KB 31⁄2&quot; floppy disk drive.</td></tr><tr><td>1.44 MB 3 1⁄2&quot;</td><td>Set this value if the floppy disk drive attached to the corresponding channel is a 1.44 MB 31⁄2&quot; floppy disk drive. This is the default setting for Floppy Drive A.</td></tr></table>

# 8.3.4 Super IO Configuration

# SuperIO Configuration Screen

You can use this screen to select options for the Super I/O settings. Use the up and down &lt;Arrow&gt; keys to select an item. Use the &lt;Plus&gt; and &lt;Minus&gt; keys to change the value of the selected option. The settings are described on the following pages. The screen is shown below.

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td colspan="2">Advanced</td></tr><tr><td colspan="2">Configure Win627 Super IO Chipset</td></tr><tr><td>OnBoard Floppy Controller</td><td>[Enabled]</td></tr><tr><td>Floppy Drive Swap</td><td>[Disabled]</td></tr><tr><td>Serial Port1 Address</td><td>[3F8/IRQ4]</td></tr><tr><td>Serial Port2 Address</td><td>[2F8/IRQ3]</td></tr><tr><td>Serial Port2 Mode</td><td>[Normal]</td></tr><tr><td>ICH SIO Serial Port1 Address</td><td>[2E8]</td></tr><tr><td>ICH SIO Serial Port1 IRQ</td><td>[IRQ11]</td></tr><tr><td>OnBoard CIR Port</td><td>[Disabled]</td></tr><tr><td>Parallel Port Address</td><td>[378]</td></tr><tr><td>Parallel Port Mode</td><td>[Normal]</td></tr><tr><td>Parallel Port IRQ</td><td>[IRQ7]</td></tr><tr><td></td><td></td></tr></table>

v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.

# OnBoard Floppy Controller

This option enables the floppy drive controller on the module. The settings are Enabled and Disabled. The default setting is Enabled.

# Floppy Drive Swap

This option is used to logically swap the mapping of drives A: and B:. This option is dependent upon having two installed floppy drives. The settings are Enabled and Disabled. The Fail-Safe default setting is Disabled.

# Serial Port1 Address

This option specifies the base I/O port address and Interrupt Request address of serial port 1. The Optimal setting is 3F8/IRQ4. The Fail-Safe default setting is Disabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to prevent the serial port from accessing any system resources. When this option is set to Disabled, the serial port physically becomes unavailable.</td></tr><tr><td>3F8/IRQ4</td><td>Set this value to allow the serial port to use 3F8 as its I/O port address and IRQ 4 for the interrupt address. This is the default setting. The majority of serial port 1 or COM1 ports on computer systems use IRQ4 and I/O Port 3F8 as the standard setting. The most common serial device connected to this port is a mouse. If the system will not use a serial device, it is best to set this port to Disabled.</td></tr><tr><td>2F8/IRQ3</td><td>Set this value to allow the serial port to use 2F8 as its I/O port address and IRQ 3 for the interrupt address. If the system will not use a serial device, it is best to set this port to Disabled.</td></tr><tr><td>3E8/IRQ4</td><td>Set this value to allow the serial port to use 3E8 as its I/O port address and IRQ 4 for the interrupt address. If the system will not use a serial device, it is best to set this port to Disabled.</td></tr><tr><td>2E8/IRQ3</td><td>Set this value to allow the serial port to use 2E8 as its I/O port address and IRQ 3 for the interrupt address. If the system will not use a serial device, it is best to set this port to Disabled.</td></tr></table>

# Serial Port2 Address

This option specifies the base I/O port address and Interrupt Request address of serial port 2. The Optimal setting is 2F8/IRQ3. The Fail-Safe setting is Disabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to prevent the serial port from accessing any system resources. When this option is set to Disabled, the serial port physically becomes unavailable.</td></tr><tr><td>3F8/IRQ4</td><td>Set this value to allow the serial port to use 3F8 as its I/O port address and IRQ 4 for the interrupt address. If the system will not use a serial device, it is best to set this port to Disabled.</td></tr><tr><td>2F8/IRQ3</td><td>Set this value to allow the serial port to use 2F8 as its I/O port address and IRQ 3 for the interrupt address. This is the default setting. The majority of serial port 2 or COM2 ports on computer systems use IRQ3 and I/O Port 2F8 as the standard setting. The most common serial device connected to this port is an external modem. If the system will not use an external modem, set this port to Disabled.</td></tr></table>

![The image displays a digital icon of a white document with a folded upper-left corner. Faint horizontal lines are visible inside the document to represent text. A large, bold red checkmark is superimposed over the center of the document. The right edge of the document has a slight grey shadow, giving it a 3D appearance.](.express-iw400-manual-3/71651faa9a8210bed46a00ac2ee41f6609c5ab6003cde99ca10c1ead60f8663e.jpg)
NOTE:

Most internal modems require the use of the second COM port and use 3F8 as its I/O port address and IRQ 4 for its interrupt address. This requires that the Serial Port2 Address be set to Disabled or another base I/O port address and Interrupt Request address.

3E8/IRQ4 Set this value to allow the serial port to use 3E8 as its I/O port address and IRQ 4 for the interrupt address. If the system will not use a serial device, it is best to set this port to Disabled.

2E8/IRQ3 Set this value to allow the serial port to use 2E8 as its I/O port address and IRQ 3 for the interrupt address. If the system will not use a serial device, it is best to set this port to Disabled.

# Serial Port2 Mode

This option specifies allows installation of an Infra-red device by the Serial Port. The settings are Normal, IRDA and ASK IR. The Fail-Safe setting is Normal.

# ICH SIO Serial Port1 Address

This option specifies the bas I/O port address and Interrupt Request address of serial port 3. The Optimal setting is 3E8/IRQ5. The Fail-Safe default setting is Disabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to preven the serial port form accessing any system ressources. When this option is set to Disabled, the serial port physically becomes unavailable.</td></tr><tr><td>3F8/IRQ4</td><td>Set this value to allow the serial port to use 3F8 as its I/O port address and IRQ 4 for the interrupt address. This is the default setting. The majority of serial port 1 or COM 1 ports on computer systems use IRQ4 and I/O Port 3F8 as the standard setting. The most common serial device connected to this port is a mouse. If the system will not use a serial device, it is best to set this port to Disabled.</td></tr><tr><td>2F8/IRQ3</td><td>Set this value to allow the serial port to use 2F8 as its I/O port address and IRQ 3 for the interrupt address. If the system will not use a serial device, it is best to set this port to Disabled.</td></tr><tr><td>3E8/IRQ5</td><td>Set this value to allow the serial port to use 3E8 as its I/O port address and IRQ 5 for the interrupt address. If the system will not use a serial device, it is best to set this port to Disabled.</td></tr><tr><td>2E8/IRQ7</td><td>Set this value to allow the serial port to use 2E8 as its I/O port address and IRQ 7 for the interrupt address. If the system will not use a serial device, it is best to set this port to Disabled.</td></tr></table>

# Onboard CIR Port

This option specifies the base I/O port address of the onboard CIR port. The Optimal setting is 3E0. The Fail-Safe setting is Disabled

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to prevent the Onboard CIR Port from accessing any system resources. When the value of this option is set to Disabled, the infrared port becomes unavailable.</td></tr><tr><td>3E0</td><td>Set this value to allow the Onboard CIR Port to use 3E0 as its I/O port address.</td></tr><tr><td>2E0</td><td>Set this value to allow the Onboard CIR Port to use 2E0 as its I/O port address.</td></tr></table>

# Parallel Port Address

This option specifies the I/O address used by the parallel port. The Optimal setting is 378. The Fail-Safe setting is Disabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to prevent the parallel port from accessing any system resources. When the value of this option is set to Disabled, the printer port becomes unavailable.</td></tr><tr><td>378</td><td>Set this value to allow the parallel port to use 378 as its I/O port address. This is the default setting. The majority of parallel ports on computer systems use IRQ7 and I/O Port 378H as the standard setting.</td></tr><tr><td>278</td><td>Set this value to allow the parallel port to use 278 as its I/O port address.</td></tr><tr><td>3BC</td><td>Set this value to allow the parallel port to use 3BC as its I/O port address.</td></tr></table>

# Parallel Port Mode

This option specifies the parallel port mode. The Optimal setting is Normal. The Fail-Safe setting is Disabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Normal</td><td>Set this value to allow the standard parallel port mode to be used. This is the default setting.</td></tr><tr><td>Bi-Directional</td><td>Set this value to allow data to be sent to and received from the parallel port.</td></tr><tr><td>EPP</td><td>The parallel port can be used with devices that adhere to the Enhanced Parallel Port (EPP) specification. EPP uses the existing parallel port signals to provide asymmetric bi-directional data transfer driven by the host device.</td></tr><tr><td>ECP</td><td>The parallel port can be used with devices that adhere to the Extended Capabilities Port (ECP) specification. ECP uses the DMA protocol to achieve data transfer rates up to 2.5 Megabits per second. ECP provides symmetric bi-directional communication.</td></tr></table>

# Parallel Port IRQ

This option specifies the IRQ used by the parallel port. The Optimal and Fail-Safe default setting is 7.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>5</td><td>Set this value to allow the serial port to use Interrupt 3.</td></tr><tr><td>7</td><td>Set this value to allow the serial port to use Interrupt 7. This is the default setting. The majority of parallel ports on computer systems use IRQ7 and I/O Port 378H as the standard setting.</td></tr></table>

# 8.3.5 Advanced ACPI Configuration

# Advanced ACPI Configuration

You can use this screen to select options for the ACPI Advanced Configuration Settings. Use the up and down &lt;Arrow&gt; keys to select an item. Use the &lt;Plus&gt; and &lt;Minus&gt; keys to change the value of the selected option. A description of the selected item appears on the right side of the screen. The settings are described on this page. The screen is shown below.

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td>Advanced Advanced ACPI ConfigurationACPI Aware O/SSuspend mode [Yes][S3 (STR)]</td><td>Enable / DisableACPI support for Operating System.ENABLE: If OS supports ACPI.DISABLE: If OS does not support ACPI.← Select Screen↑↓ Select Item+- Change OptionF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="2">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# ACPI Aware O/S

Set this value to allow the system to utilize the Intel ACPI (Advanced Configuration and Power Interface) specification. The Optimal and Fail-Safe default setting is Yes.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>No</td><td>This setting should be set if the operating system in use does not comply with the ACPI (Advanced Configuration and Power Interface) specification. DOS®, Windows 3.x®, and Windows NT® are examples of non-ACPI aware operating systems.</td></tr><tr><td>Yes</td><td>This setting should be set if the operating system complies with the ACPI (Advanced Configuration and Power Interface) specification. This is the default setting. Windows 95®, Windows 98® and Windows 2000® are examples of ACPI aware operating systems.</td></tr></table>

# Suspend mode (S3 STR)

Set this value to allow Suspend to RAM (STR) support. The Optimal and Fail-Safe default setting is Disabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>This setting prevents the system to save information to main memory when in a low power state. This is the default setting.</td></tr><tr><td>Enabled</td><td>This setting causes the system to enter a low power state instead of being completely shut off. This allows the computer system to boot up in a few seconds. Suspend to RAM (STR) is a technology that is closely associated with the S3 state of the ACPI (Advanced Configuration and Power Interface) specification. STR allows a properly configured system to go into a low power state while saving information to main memory about the system&#x27;s configuration, open applications, and active files. While in the low power (STR) state, memory remains powered to retain the system information while most other components turn off to conserve energy. Fans are turned off to provide silent operation and to minimize power consumption. Properly configured systems in STR typically can use less than 5 watts.</td></tr></table>

# 8.3.6 AHCI Settings

Set this value to allow the Advanced Host Controller Interface. It is an interface specification that allows the SATA controller driver to support advanced features like Native Command Queuing and Hot Plug.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>This setting prevents the system to use its AHCI features after boot.</td></tr><tr><td>Enabled</td><td>This setting causes the system to enable its AHCI features after boot to detect the presence of IDE devices.</td></tr></table>

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td colspan="2">Advanced</td></tr><tr><td>AHCI Settings</td><td rowspan="7">While entering setup,BIOS auto detects the presence of IDE devices. This displays the status of auto detection of IDE devices.</td></tr><tr><td>▶ AHCI Port0 [Not Detected]</td></tr><tr><td>▶ AHCI Port1 [Not Detected]</td></tr><tr><td>▶ AHCI Port2 [Not Detected]</td></tr><tr><td>▶ AHCI Port3 [Not Detected]</td></tr><tr><td>▶ AHCI Port4 [Not Detected]</td></tr><tr><td>▶ AHCI Port5 [Not Detected]</td></tr><tr><td></td><td>← Select Screen↑↓ Select ItemEnter Go to Sub ScreenF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="2">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# 8.3.7 APM Configuration

Select the Power tab from the setup screen to enter the Power Management BIOS Setup screen. You can display a Power Management BIOS Setup option by highlighting it using the &lt;Arrow&gt; keys. All Power Management BIOS Setup options are described in this section.

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td colspan="2">Advanced</td></tr><tr><td colspan="2">APM Configuration</td></tr><tr><td>Power Management/APM</td><td>[Enabled]</td></tr><tr><td>Video Power Down Mode</td><td>[Suspend]</td></tr><tr><td>Hard Disk Power Down Mode</td><td>[Suspend]</td></tr><tr><td>Suspend Time Out</td><td>[Disabled]</td></tr><tr><td>Power Button Mode</td><td>[On/Off]</td></tr><tr><td colspan="2">Advanced Resume Event Controls</td></tr><tr><td>Resume On LAN</td><td>[Disabled]</td></tr><tr><td>Resume On PME#</td><td>[Disabled]</td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr></table>

![The image depicts a white document icon with a folded upper-left corner and faint gray horizontal lines representing text. A large, red checkmark with a gradient shading is placed diagonally over the center of the document.](.express-iw400-manual-3/b49a77f7c59a87cc316377e7d9f22d76d913e8332c6a7ca730d4af56eb57ddab.jpg)
NOTE:

The Power Management Setup screen is not displayed when Advanced Power Management (APM) is not supported. The Power Setup screen can vary for different motherboards.

# Power Management/APM

Set this value to allow Power Management/APM support. The Optimal and Fail-Safe default setting is Enabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to prevent the chipset power management and APM (Advanced Power Management) features.</td></tr><tr><td>Enabled</td><td>Set this value to allow the chipset power management and APM (Advanced Power Management) features. This is the default setting.</td></tr></table>

# Video Power Down Mode

This option specifies the Power State that the video subsystem enters when the BIOS places it in a power saving state after the specified period of display inactivity has expired. The Optimal and Fail-Safe setting is Suspend.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>This setting prevents the BIOS from initiating any power saving modes concerned with the video display or monitor.</td></tr><tr><td>Standby</td><td>This option places the monitor into standby mode after the specified period of display inactivity has expired. This means the monitor is not off. The screen will appear blacked out. The standards do not cite specific power ratings because they vary from monitor to monitor.</td></tr><tr><td>Suspend</td><td>This option places the monitor into suspend mode after the specified period of display inactivity has expired. This means the monitor is not off. The screen will appear blacked out. The standards do not cite specific power ratings because they vary from monitor to monitor, but this setting use less power than Standby mode. This is the default setting.</td></tr></table>

# Hard Disk Drive Power Down Mode

This option specifies the power conserving state that the hard disk drive enters after the specified period of hard drive inactivity has expired. The Optimal and Fail-Safe setting is Suspend.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>This setting prevents hard disk drive power down mode.</td></tr><tr><td>Standby</td><td>This option stops the hard disk drives from spinning during a system standby.</td></tr><tr><td>Suspend</td><td>This option cuts the power to the hard disk drives during a system suspend. This is the default setting.</td></tr></table>

# Suspend Time Out (Minute)

This option specifies the length of time the system waits before it enters suspend mode. The Optimal and Fail-Safe default setting is Disabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>This setting prevents the system from entering suspend mode. This is the default setting.</td></tr><tr><td>1Min</td><td>Set this value to allow the computer system to enter suspend mode after being inactive for 1 minute.</td></tr><tr><td>5Min</td><td>Set this value to allow the computer system to enter suspend mode after being inactive for 5 minutes.</td></tr><tr><td>10Min</td><td>Set this value to allow the computer system to enter suspend mode after being inactive for 10 inutes.</td></tr></table>

# Power Button Mode

This option specifies how the externally mounted power button on the front of the computer chassis is used. The Optimal and Fail-Safe default setting is On/Off.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>On/Off</td><td>Pushing the power button turns the computer on or off. This is the default setting. This is the default setting.</td></tr><tr><td>Standby</td><td>Pushing the power button places the computer in Standby mode</td></tr><tr><td>Suspend</td><td>Pushing the power button places the computer in Suspend mode or Full On power mode.</td></tr></table>

# 8.3.8 Event Log Configuration

# View Event Log

Displays a window with the view of all unread events on the event log. Errors and warnings during boot up of the BIOS will be logged in the event log.

Mark all events as read

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Ok</td><td>Displays a window with the question “Mark all Events as read now?”.</td></tr><tr><td>Cancel</td><td>Cancels the action.</td></tr></table>

Clear Event Log

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Ok</td><td>Displays a window with the question “Clear Event Log now?”.</td></tr><tr><td>Cancel</td><td>Cancels the action.</td></tr></table>

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td colspan="2">Advanced</td></tr><tr><td>Event Logging detailsView Event LogMark all events as readClear Event LogECC Event Logging [Disabled]Hub Interface Event Logging [Disabled]System Bus Event Logging [Disabled]Memory Buffer Event Logging [Disabled]PCI Error Logging [Disabled]</td><td>View all unread events on the Event Log.← Select Screen↑↓ Select ItemEnter Go to Sub ScreenF1 General HelpF10 Save and ExitESC Exit</td></tr></table>

v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.

# 8.3.9 Hardware Health Configuration

This option displays the current status of all of the monitored hardware devices/components such as CPU voltages, temperatures and fan speeds.

Option Description

Enabled Enables Hardware Health Monitoring Devices.

Disabled Disables Hardware Health Monitoring Devices.

<table><tr><td colspan="3">BIOS SETUP UTILITY</td></tr><tr><td colspan="3">Advanced</td></tr><tr><td>H/W Health Function</td><td>[Enabled]</td><td rowspan="2">Enables HardwareHealth MonitoringDevice.</td></tr><tr><td>Current CPU Temperature</td><td>:46°C/114°F</td></tr><tr><td></td><td></td><td>← Select Screen↑↓ Select Item+- Change OptionF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="3">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# 8.3.10 Remote Access Configuration

# Remote Access Configuration

You can use this screen to select options for the Remote Access Configuration. Use the up and down &lt;Arrow&gt; keys to select an item. Use the &lt;Plus&gt; and &lt;Minus&gt; keys to change the value of the selected option. The settings are described on the following pages. The screen is shown below.

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td colspan="2">Advanced</td></tr><tr><td colspan="2">Configure Remote Access type and parameters</td></tr><tr><td>Remote Access</td><td>[Enabled]</td></tr><tr><td>Serial port number</td><td>[COM1]</td></tr><tr><td>Base Address, IRQ</td><td>[3F8h, 4]</td></tr><tr><td>Serial Port Mode</td><td>[115200 8,n,1]</td></tr><tr><td>Flow Control</td><td>[None]</td></tr><tr><td>Redirection After BIOS POST</td><td>[Disabled]</td></tr><tr><td>Terminal Type</td><td>[ANSI]</td></tr><tr><td>UT-UTF8 Combo Key Support</td><td>[Enabled]</td></tr><tr><td>Sredir Memory Display Delay</td><td>[No Delay]</td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr></table>

# Remote Access

You can disable or enable the BIOS remote access feature here.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to prevent the BIOS from using Remote Access.</td></tr><tr><td>Serial</td><td>Set the value for this option to Serial to allow the system to use the remote access feature. Theremote access feature requires a dedicated serial port connection.</td></tr></table>

# Serial Port Number

Select the serial port you want to use for console redirection. You can set the value for this option to either COM1 or COM2.

Option Description

<table><tr><td>COM1</td><td>Set this value to allow the system to use COM1 (Communication port1) for the remote access interface.</td></tr><tr><td>COM2</td><td>Set this value to allow the system to use COM2 (Communication port2) for the remote access interface.</td></tr></table>

# Serial Port Mode

Select the baud rate you want the serial port to use for console redirection.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>115200</td><td>8,n,1 Set this value to allow you to select 115200 as the baud rate (transmitted bits per second) of the serial port.</td></tr><tr><td>57600</td><td>8,n,1 Set this value to allow you to select 57600 as the baud rate (transmitted bits per second) of the serial port.</td></tr><tr><td>19200</td><td>8,n,1 Set this value to allow you to select 19200 as the baud rate (transmitted bits per second) of the serial port.</td></tr></table>

# 8.3.11 USB Configuration

# USB Configuration

You can use this screen to select options for the USB Configuration. Use the up and down &lt;Arrow&gt; keys to select an item. Use the &lt;Plus&gt; and &lt;Minus&gt; keys to change the value of the selected option. The settings are described on the following pages. The screen is shown below.

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td colspan="2">Advanced</td></tr><tr><td>USB Configuration</td><td rowspan="4">Enables USB host controllers.</td></tr><tr><td>Module Version - 2.24.0-12.4</td></tr><tr><td>USB Devices Enabled :1 Mouse, 1 Drive</td></tr><tr><td>USB Function [4 USB Ports]Legacy USB Support [Enabled]USB 2.0 Controller [Enabled]USB 2.0 Controller Mode [HiSpeed]</td></tr><tr><td>► USB Mass Storage Device Configuration</td><td>← Select Screen↑↓ Select Item+- Change OptionF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="2">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# USB Function

Set this value to allow the system to enable or disable the onboard USB ports. The Optimal and Fail-Safe default setting is Enabled.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>This setting makes the onboard USB ports unavailable.</td></tr><tr><td>Enabled</td><td>This setting allows the use of the USB ports. This is the default setting.</td></tr></table>

# Legacy USB Support

Legacy USB Support refers to the USB mouse and USB keyboard support. Normally if this option is not enabled, any attached USB mouse or USB keyboard will not become available until a USB compatible operating system is fully booted with all USB drivers loaded. When this option is enabled, any attached USB mouse or USB keyboard can control the system even when there is no USB drivers loaded on the system. Set this value to enable or disable the Legacy USB Support. The Optimal and Fail-Safe default setting is Disabled.

Option Description

<table><tr><td>Disabled</td><td>Set this value to prevent the use of any USB device in DOS or during system boot. This is the default setting.</td></tr><tr><td>Enabled</td><td>Set this value to allow the use of USB devices during boot and while using DOS.</td></tr><tr><td>Auto</td><td>This option auto detects USB Keyboards or Mice and if found, allows them to be utilized during boot and while using DOS.</td></tr></table>

# USB Zip Emulation

USB Zip Emulation refers the system being able to boot to a USB Zip drive. Normally if this option is not enabled, any attached USB Zip drive will not become available until a USB compatible operating system is fully booted with all USB drivers loaded. When this option is enabled, any attached USB Zip drive can boot the system even when there is no USB drivers loaded on the system. Set this value to allow the system to select the Emulation type for a USB ZIP drive.

Option Description

<table><tr><td>Auto</td><td>Set this value to allow the system to automatically detect a USB Zip drive emulation type.</td></tr><tr><td>Floppy</td><td>Set this value to allow the system to select floppy emulation type.</td></tr><tr><td>Hard disk</td><td>Set this value to allow the system to select hard disk drive emulation type.</td></tr></table>

# USB Beep Message

Set this value to allow the system to enable or disable generating a beep during USB devices enumeration.

Option Description

<table><tr><td>Disabled</td><td>Set this value to allow the system to disable beep generation during USB devices emulation.</td></tr><tr><td>Enabled</td><td>Set this value to allow the system to enable beep generation during USB devices emulation.</td></tr></table>

# 8.4 PCI/PnP Setup

Select the PCI/PnP tab from the setup screen to enter the Plug and Play BIOS Setup screen. You can display a Plug and Play BIOS Setup option by highlighting it using the &lt;Arrow&gt; keys. All Plug and Play BIOS Setup options are described in this section. The Plug and Play BIOS Setup screen is shown below.

<table><tr><td colspan="6">BIOS SETUP UTILITY</td></tr><tr><td>Main</td><td>Advanced</td><td>PCIPnP</td><td>Boot</td><td>Security</td><td>Chipset Exit</td></tr><tr><td colspan="5">Advanced PCI/PnP Settings</td><td rowspan="3">YES: Assigns IRQ to PCI VGA card if card requests IRQ.NO: Does not assign IRQ to PCI VGA card even if card requests an IRQ.← Select Screen↑↓ Select Item+- Change OptionF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="5">WARNING: Setting wrong values in below sections may cause system to malfunction.</td></tr><tr><td colspan="5">Allocate IRQ to PCI VGA [Yes]Onboard LAN Boot ROM [Disabled]</td></tr></table>

v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.

# Allocate IRQ to VGA

Set this value to allow or restrict the system from giving the VGA adapter card an interrupt address. The Optimal and Fail-Safe default setting is Yes.

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Yes</td><td>Set this value to allow the allocation of an IRQ to a VGA adapter card that uses the PCI local bus. This is the default setting.</td></tr><tr><td>No</td><td>Set this value to prevent the allocation of an IRQ to a VGA adapter card that uses the PCI local bus.</td></tr></table>

# 8.5 Boot Setup

Select the Boot tab from the setup screen to enter the Boot BIOS Setup screen. You can select any of the items in the left frame of the screen, such as Boot Device Priority, to go to the sub menu for that item. You can display an Boot BIOS Setup option by highlighting it using the &lt;Arrow&gt; keys. All Boot Setup options are described in this section. Select an item on the Boot Setup screen to access the sub menu for:

- Boot Device Priority
- Hard disk drives
- Removable Devices
- ATAPI CD-ROM Drives

The Boot Setup screen is shown below:

<table><tr><td colspan="7">BIOS SETUP UTILITY</td></tr><tr><td>Main</td><td>Advanced</td><td>PCIPnP</td><td>Boot</td><td>Security</td><td>Chipset</td><td>Exit</td></tr><tr><td colspan="5">Boot Settings</td><td colspan="2">Configure Settings during System Boot.</td></tr><tr><td colspan="5">▶ Boot Settings Configuration</td><td rowspan="5" colspan="2"></td></tr><tr><td colspan="5">▶ Boot Device Priority</td></tr><tr><td colspan="5">▶ Hard Disk Drives</td></tr><tr><td colspan="5">▶ Removable Drives</td></tr><tr><td colspan="5">▶ CD/DVD Drives</td></tr><tr><td colspan="5"></td><td colspan="2">← Select Screen↑↓ Select ItemEnter Go to Sub ScreenF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="7">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# 8.6 Security Setup

# 8.6.1 Password Support

# Two Levels of Password Protection

provides both a Supervisor and a User password. If you use both passwords, the Supervisor password must be set first.

The system can be configured so that all users must enter a password every time the system boots or when Setup is executed, using either or either the Supervisor password or User password.

The Supervisor and User passwords activate two different levels of password security. If you select password support, you are prompted for a one to six character password. Type the password on the keyboard. The password does not appear on the screen when typed. Make sure you write it down. If you forget it, you must drain NVRAM and reconfigure.

# Remember the Password

Keep a record of the new password when the password is changed. If you forget the password, you must erase the system configuration information in NVRAM. See (Deleting a Password) for information about erasing system configuration information.

Select Security Setup from the Setup main BIOS setup menu. All Security Setup options, such as password protection and virus protection, are described in this section. To access the sub menu for the following items, select the item and press &lt;Enter&gt;:

- Change Supervisor Password
- Change User Password
- Clear User Password

The Security Setup screen is shown below. The sub menus are documented on the following pages.

# Supervisor Password

Indicates whether a supervisor password has been set. If the password has been installed, Installed displays. If not, Not Installed displays.

# User Password

Indicates whether a user password has been set. If the password has been installed, Installed displays. If not, Not Installed displays.

# Change Supervisor Password

Select this option and press &lt;Enter&gt; to access the sub menu. You can use the sub menu to change the supervisor password.

# Change User Password

Select this option and press &lt;Enter&gt; to access the sub menu. You can use the sub menu to change the user password.

# Clear User Password

Select this option and press &lt;Enter&gt; to access the sub menu. You can use the sub menu to clear the user password.

# Boot Sector Virus Protection

This option is near the bottom of the Security Setup screen. The Optimal and Fail-Safe default setting is Disabled

<table><tr><td>Option</td><td>Description</td></tr><tr><td>Disabled</td><td>Set this value to prevent the Boot Sector Virus Protection. This is the default setting.</td></tr><tr><td>Enabled</td><td>Select Enabled to enable boot sector protection. displays a warning when any program (or virus) issues a Disk Format command or attempts to write to the boot sector of the hard disk drive. If enabled, the following appears when a write is attempted to the boot sector. You may have to type N several times to prevent the boot sector write.Boot Sector Write!Possible VIRUS: Continue (Y/N)? _The following appears after any attempt to format any cylinder, head, or sector of any hard disk drive via the BIOS INT 13 Hard disk drive Service:Format!!!Possible VIRUS: Continue (Y/N)? _</td></tr></table>

# 8.6.2 Change Supervisor Password

<table><tr><td colspan="7">BIOS SETUP UTILITY</td></tr><tr><td>Main</td><td>Advanced</td><td>PCIPnP</td><td>Boot</td><td>Security</td><td>Chipset</td><td>Exit</td></tr><tr><td colspan="5">Security Settings</td><td rowspan="3" colspan="2">Install or Change the password.</td></tr><tr><td colspan="5">Supervisor Password :Not InstalledUser Password :Not Installed</td></tr><tr><td colspan="5">Change Supervisor PasswordChange User PasswordClear User Password</td></tr><tr><td colspan="5">Boot Sector Virus Protection [Disabled]</td><td colspan="2">← Select Screen↑↓ Select ItemEnter ChangeF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="7">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

Select Change Supervisor Password from the Security Setup menu and press &lt;Enter&gt;.

Enter New Password:

appears. Type the password and press &lt;Enter&gt;. The screen does not display the characters entered. Retype the password as prompted and press &lt;Enter&gt;. If the password confirmation is incorrect, an error message appears. The password is stored in NVRAM after completes.

# Change User Password

Select Change User Password from the Security Setup menu and press &lt;Enter&gt;.

Enter New Password:

appears. Type the password and press &lt;Enter&gt;. The screen does not display the characters entered. Retype the password as prompted and press &lt;Enter&gt;. If the password confirmation is incorrect, an error message appears. The password is stored in NVRAM after completes.

# Clear User Password

Select Clear User Password from the Security Setup menu and press &lt;Enter&gt;.

Clear New Password

[Ok] [Cancel]

appears. Type the password and press &lt;Enter&gt;. The screen does not display the characters entered. Retype the password as prompted and press &lt;Enter&gt;. If the password confirmation is incorrect, an error message appears. The password is stored in NVRAM after completes.

# 8.7 Chipset Setup

Select the Chipset tab from the setup screen to enter the Chipset BIOS Setup screen. You can select any of the items in the left frame of the screen, such as CPU Configuration, to go to the sub menu for that item. You can display a Chipset BIOS Setup option by highlighting it using the &lt;Arrow&gt; keys. All Chipset BIOS Setup options are described in this section. The Chipset BIOS Setup screen is shown below.

# CPU Configuration

You can use this screen to select options for the CPU Configuration. Use the up and down &lt;Arrow&gt; keys to select an item. Use the &lt;Plus&gt; and &lt;Minus&gt; keys to change the value of the selected option.

![The image displays a standard document icon representing a white sheet of paper with the top-right corner folded down. A large, bold red checkmark is superimposed on the left side of the page. Faint grey horizontal lines run across the lower right portion, simulating lines of text.](.express-iw400-manual-3/ae0ee7543875de5bc13edb1fd8008dd8cae655624a5f065bde96f6d6550a3ef7.jpg)
NOTE:

The CPU Configuration setup screen varies depending on the installed processor.

# 8.7.1 South Bridge Configuration

<table><tr><td colspan="7">BIOS SETUP UTILITY</td></tr><tr><td>Main</td><td>Advanced</td><td>PCIPnP</td><td>Boot</td><td>Security</td><td>Chipset</td><td>Exit</td></tr><tr><td colspan="5">Advanced Chipset SettingsWARNING: Setting wrong values in below sections may cause system to malfunction.► SouthBridge Configuration</td><td colspan="2">Configure South Bridge features.← Select Screen↑↓ Select ItemEnter Go to Sub ScreenF1 General HelpF10 Save and ExitESC Exit</td></tr></table>

v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.

You can use this screen to select options for the South Bridge Configuration. South Bridge is a chipset on the motherboard that controls the basic I/O functions, USB ports, audio functions, modem functions, IDE channels, and PCI slots. Use the up and down &lt;Arrow&gt; keys to select an item. Use the &lt;Plus&gt; and &lt;Minus&gt; keys to change the value of the selected option.

# BIOS SETUP UTILITY

# Chipset

# South Bridge Chipset Configuration

SLP\_S4# Min. Assertion Width

Restore on AC Power Loss

[1 to 2 seconds]

[Last State]

# Options

4 to 5 seconds
3 to 4 seconds
2 to 3 seconds
1 to 2 seconds

← Select Screen

↑↓ Select Item

+- Change Option

F1 General Help

F10 Save and Exit

ESC Exit

v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.

![The image displays a white document icon with a folded top corner and faint horizontal lines, featuring a large red checkmark in the center.](.express-iw400-manual-3/716344609b463e9a699f5101e132197aeabf6b4c701083efd1bb1242535519a4.jpg)
NOTE:

The South Bridge Configuration setup screen varies depending on the supported South Bridge chipset.

# 8.8 Exit Menu

Select the Exit tab from the setup screen to enter the Exit BIOS Setup screen. You can display an Exit BIOS Setup option by highlighting it using the &lt;Arrow&gt; keys. All Exit BIOS Setup options are described in this section. The Exit BIOS Setup screen is shown below.

<table><tr><td colspan="2">BIOS SETUP UTILITY</td></tr><tr><td colspan="2">Main Advanced PCIPnP Boot Security Chipset Exit</td></tr><tr><td>Exit OptionsSave Changes and ExitDiscard Changes and ExitDiscard ChangesLoad Optimal DefaultsLoad Failsafe Defaults</td><td>Exit system setup after saving the changes.F10 key can be used for this operation.← Select Screen↑↓ Select ItemEnter Go to Sub ScreenF1 General HelpF10 Save and ExitESC Exit</td></tr><tr><td colspan="2">v02.61 (C) Copyright 1985-2006, American Megatrends, Inc.</td></tr></table>

# Exit Saving Changes

When you have completed the system configuration changes, select this option to leave Setup and reboot the computer so the new system configuration parameters can take effect. Select Exit Saving Changes from the Exit menu and press &lt;Enter&gt;.

Save Configuration Changes and Exit Now?

[Ok] [Cancel]

appears in the window. Select Ok to save changes and exit.

# Exit Discarding Changes

Select this option to quit Setup without making any permanent changes to the system configuration. Select Exit Discarding Changes from the Exit menu and press &lt;Enter&gt;.

Discard Changes and Exit Setup Now?

[Ok] [Cancel]

appears in the window. Select Ok to discard changes and exit.

# Load Optimal Defaults

Automatically sets all Setup options to a complete set of default settings when you Select this option. The Optimal settings are designed for maximum system performance, but may not work best for all computer applications. In particular, do not use the Optimal Setup options if your computer is experiencing system configuration problems.

Select Load Optimal Defaults from the Exit menu and press &lt;Enter&gt;.

Select Ok to load optimal defaults.

# Load Fail-Safe Defaults

Automatically sets all Setup options to a complete set of default settings when you Select this option. The Fail-Safe settings are designed for maximum system stability, but not maximum performance. Select the Fail-Safe Setup options if your computer is experiencing system configuration problems.

Select Load Fail-Safe Defaults from the Exit menu and press &lt;Enter&gt;.

Load Fail-Safe Defaults?

[Ok] [Cancel]

appears in the window. Select Ok to load Fail-Safe defaults.

# Discard Changes

Select Discard Changes from the Exit menu and press &lt;Enter&gt;.

Select Ok to discard changes.

# 8.9 AMIBIOS™ Checkpoints and Beep Codes

This section of this document lists checkpoints and beep codes generated by AMIBIOS. The checkpoints defined in this document are inherent to the AMIBIOS generic core, and do not include any chipset or board specific checkpoint definitions.

# 8.9.1 Checkpoints and Beep Codes Definition

A checkpoint is either a byte or word value output to I/O port 80h. The BIOS outputs checkpoints throughout bootblock and Power-On Self Test (POST) to indicate the task the system is currently executing. Checkpoints are very useful in aiding software developers or technicians in debugging problems that occur during the pre-boot process.

Beep codes are used by the BIOS to indicate a serious or fatal error to the end user. Beep codes are used when an error occurs before the system video has been initialized. Beep codes will be generated by the system board speaker, commonly referred to as the "PC speaker."

# 8.9.2 Viewing BIOS Checkpoints

Viewing all checkpoints generated by the BIOS requires a checkpoint card, also referred to as a "POST Card" or "POST Diagnostic Card". These are ISA or PCI add-in cards that show the value of I/O port 80h on a LED display. Checkpoint cards are available through a variety of computer mail-order outlets.

![Close-up of a yellow PCI card with two black USB drive slots and a green indicator light (no visible text or symbols)](.express-iw400-manual-3/dbb803f4610785296d783198958552e1c8919f9d4b52208a9d6f73685b29458e.jpg)

Some computers using AMIBIOS display checkpoints in the bottom right corner of the screen during POST. This display method is limited, since it only displays checkpoints that occur after the video card has been activated.

Keep in mind that not all computers using AMIBIOS enable this feature. In most cases, a checkpoint card is the best tool for viewing AMIBIOS checkpoints.

![American\nMegatrends\nwww.ami.com\nAMIBIOS (C) 2001 American Megatrends, Inc.\nBIOS Date: 10/01/01 12:39:39 Ver: 08.00.03\nPentium (R) III Processor, 933MHz\nPress DEL to run Setup\nChecking NURAM..\nCheckpoint Display\nEVALUATION COPY, NOT FOR SALE\n(C) American Megatrends Inc.,\n63-0100-000001-00101111-100101-015-0AAXT004-Y2KC\n6B3B](.express-iw400-manual-3/398a7ce03743d44adc603c8a0448d0fd5f0ad3c173aa65943ddc11d15c5f5bb5.jpg)

# 8.10 Bootblock Initialization Code Checkpoints

The Bootblock initialization code sets up the chipset, memory and other components before system memory is available. The following table describes the type of checkpoints that may occur during the bootblock initialization portion of the BIOS:

![An icon of a document with horizontal lines and a large red checkmark overlaid on it.](.express-iw400-manual-3/5b241bad5409ca5e316e32e4c45942e4a168ed44702853c2cfa796539384a959.jpg)
NOTE:

Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs from add-in PCI devices.

<table><tr><td>Checkpoint</td><td>Description</td></tr><tr><td>Before D0</td><td>If boot block debugger is enabled, CPU cache-as-RAM functionality is enabled at this point. Stack will be enabled from this point.</td></tr><tr><td>D0</td><td>Early Boot Strap Processor (BSP) initialization like microcode update, frequency and other CPU critical initialization. Early chipset initialization is done.</td></tr><tr><td>D1</td><td>Early super I/O initialization is done including RTC and keyboard controller. Serial port is enabled at this point if needed for debugging. NMI is disabled. Perform keyboard controller BAT test. Save power-on CPUID value in scratch CMOS. Go to flat mode with 4GB limit and GA20 enabled.</td></tr><tr><td>D2</td><td>Verify the boot block checksum. System will hang here if checksum is bad.</td></tr><tr><td>D3</td><td>Disable CACHE before memory detection. Execute full memory sizing module. If memory sizing module not executed, start memory refresh and do memory sizing in Boot block code. Do additional chipset initialization. Re-enable CACHE. Verify that flat mode is enabled.</td></tr><tr><td>D4</td><td>Test base 512KB memory. Adjust policies and cache first 8MB. Set stack.</td></tr><tr><td>D5</td><td>Bootblock code is copied from ROM to lower system memory and control is given to it. BIOS now executes out of RAM. Copies compressed boot block code to memory in right segments. Copies BIOS from ROM to RAM for faster access. Performs main BIOS checksum and updates recovery status accordingly.</td></tr><tr><td>D6</td><td>Both key sequence and OEM specific method is checked to determine if BIOS recovery is forced. If BIOS recovery is necessary, control flows to checkpoint E0. See Bootblock Recovery Code Checkpoints section of document for more information.</td></tr><tr><td>D7</td><td>Restore CPUID value back into register. The Bootblock-Runtime interface module is moved to system memory and control is given to it. Determine whether to execute serial flash.</td></tr><tr><td>D8</td><td>The Runtime module is uncompressed into memory. CPUID information is stored in memory.</td></tr><tr><td>D9</td><td>Store the Uncompressed pointer for future use in PMM. Copying Main BIOS into memory. Leaves all RAM below 1MB Read-Write including E000 and F000 shadow areas but closing SMRAM.</td></tr><tr><td>DA</td><td>Restore CPUID value back into register. Give control to BIOS POST (ExecutePOSTKernel). See POST Code Checkpoints section of document for more information.</td></tr><tr><td>DC</td><td>System is waking from ACPI S3 state</td></tr><tr><td>E1-E8EC-EE</td><td>OEM memory detection/configuration error. This range is reserved for chipset vendors &amp; system manufacturers. The error associated with this value may be different from one platform to the next.</td></tr></table>

# 8.11 Bootblock Recovery Code Checkpoints

The Bootblock recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is corrupt. The following table describes the type of checkpoints that may occur during the Bootblock recovery portion of the BIOS:

![The image displays a white document icon with the top right corner folded down. Faint gray horizontal lines run across the paper, simulating text. A large, bold red checkmark is superimposed diagonally across the center of the document.](.express-iw400-manual-3/998827a28d29f3e15bdb2da7f2f6e639ad91b18bbc2b4ab8cdc5fc373349c8fa.jpg)
NOTE:

Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs From add-in PCI devices.

<table><tr><td>Checkpoint</td><td>Description</td></tr><tr><td>E0</td><td>Initialize the floppy controller in the super I/O. Some interrupt vectors are initialized. DMA controller is initialized. 8259 interrupt controller is initialized. L1 cache is enabled.</td></tr><tr><td>E9</td><td>Set up floppy controller and data. Attempt to read from floppy.</td></tr><tr><td>EA</td><td>Enable ATAPI hardware. Attempt to read from ARMD and ATAPI CDROM.</td></tr><tr><td>EB</td><td>Disable ATAPI hardware. Jump back to checkpoint E9.</td></tr><tr><td>EF</td><td>Read error occurred on media. Jump back to checkpoint EB.</td></tr><tr><td>F0</td><td>Search for pre-defined recovery file name in root directory.</td></tr><tr><td>F1</td><td>Recovery file not found.</td></tr><tr><td>F2</td><td>Start reading FAT table and analyze FAT to find the clusters occupied by the recovery file.</td></tr><tr><td>F3</td><td>Start reading the recovery file cluster by cluster.</td></tr><tr><td>F5</td><td>Disable L1 cache.</td></tr><tr><td>FA</td><td>Check the validity of the recovery file configuration to the current configuration of the flash part.</td></tr><tr><td>FB</td><td>Make flash write enabled through chipset and OEM specific method. Detect proper flash part. Verify that the found flash part size equals the recovery file size.</td></tr><tr><td>F4</td><td>The recovery file size does not equal the found flash part size.</td></tr><tr><td>FC</td><td>Erase the flash part.</td></tr><tr><td>FD</td><td>Program the flash part.</td></tr><tr><td>FF</td><td>The flash has been updated successfully. Make flash write disabled. Disable ATAPI hardware. Restore CPUID value back into register. Give control to F000 ROM at F000:FFF0h.</td></tr></table>

# 8.12 POST Code Checkpoints

The POST code checkpoints are the largest set of checkpoints during the BIOS preboot process. The following table describes the type of checkpoints that may occur during the POST portion of the BIOS:

![The image displays a digital icon of a white document file with a folded top-left corner and gray horizontal lines representing text. A large, bold red checkmark is superimposed over the center of the document.](.express-iw400-manual-3/3aff89624aed218941d54654ec7579b7df3b410b3792c28fcfe03863de6654d3.jpg)
NOTE:

Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs From add-in PCI devices.

<table><tr><td>Checkpoint</td><td>Description</td></tr><tr><td>03</td><td>Disable NMI, Parity, video for EGA, and DMA controllers. Initialize BIOS, POST, Runtime data area. Also initialize BIOS modules on POST entry and GPNV area. Initialized CMOS as mentioned in the Kernel Variable "wCMOSFlags."</td></tr><tr><td>04</td><td>Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is OK. Verify CMOS checksum manually by reading storage area. If the CMOS checksum is bad, update CMOS with power-on default values and clear passwords. Initialize status register A.Initializes data variables that are based on CMOS setup questions.Initializes both the 8259 compatible PICs in the system</td></tr><tr><td>05</td><td>Initializes the interrupt controlling hardware (generally PIC) and interrupt vector table.</td></tr><tr><td>06</td><td>Do R/W test to CH-2 count reg. Initialize CH-0 as system timer.Install the POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt.Traps INT1Ch vector to "POSTINT1ChHandlerBlock."</td></tr><tr><td>07</td><td>Fixes CPU POST interface calling pointer.</td></tr><tr><td>08</td><td>Initializes the CPU. The BAT test is being done on KBC. Program the keyboard controller command byte is being done after Auto detection of KB/MS using AMI KB-5.</td></tr><tr><td>C0</td><td>Early CPU Init Start -- Disable Cache - Init Local APIC</td></tr><tr><td>C1</td><td>Set up boot strap processor Information</td></tr><tr><td>C2</td><td>Set up boot strap processor for POST</td></tr><tr><td>C5</td><td>Enumerate and set up application processors</td></tr><tr><td>C6</td><td>Re-enable cache for boot strap processor</td></tr><tr><td>C7</td><td>Early CPU Init Exit</td></tr><tr><td>0A</td><td>Initializes the 8042 compatible Key Board Controller.</td></tr><tr><td>0B</td><td>Detects the presence of PS/2 mouse.</td></tr><tr><td>0C</td><td>Detects the presence of Keyboard in KBC port.</td></tr><tr><td>0E</td><td>Testing and initialization of different Input Devices. Also, update the Kernel Variables.Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Uncompress all available language, BIOS logo, and Silent logo modules.</td></tr><tr><td>13</td><td>Early POST initialization of chipset registers.</td></tr><tr><td>20</td><td>Relocate System Management Interrupt vector for all CPU in the system.</td></tr><tr><td>24</td><td>Uncompress and initialize any platform specific BIOS modules. GPNV is initialized at this checkpoint.</td></tr><tr><td>2A</td><td>Initializes different devices through DIM.See DIM Code Checkpoints section of document for more information.</td></tr><tr><td>2C</td><td>Initializes different devices. Detects and initializes the video adapter installed in the system that have optional ROMs.</td></tr><tr><td>2E</td><td>Initializes all the output devices.</td></tr><tr><td>31</td><td>Allocate memory for ADM module and uncompress it. Give control to ADM module for initialization. Initialize language and font modules for ADM.Activate ADM module.</td></tr><tr><td>33</td><td>Initializes the silent boot module. Set the window for displaying text information.</td></tr><tr><td>37</td><td>Displaying sign-on message, CPU information, setup key message, and any OEM specific information.</td></tr><tr><td>38</td><td>Initializes different devices through DIM. See DIM Code Checkpointssection of document for more information. USB controllers are initialized at this point.</td></tr><tr><td>39</td><td>Initializes DMAC-1 &amp; DMAC-2.</td></tr><tr><td>3A</td><td>Initialize RTC date/time.</td></tr><tr><td>3B</td><td>Test for total memory installed in the system. Also, Check for DEL or ESC keys to limit memory test. Display total memory in the system.</td></tr><tr><td>3C</td><td>Mid POST initialization of chipset registers.</td></tr><tr><td>40</td><td>Detect different devices (Parallel ports, serial ports, and coprocessor in CPU, ... etc.) successfully installed in the system and update the BDA, EBDA...etc.</td></tr><tr><td>52</td><td>Updates CMOS memory size from memory found in memory test. Allocates memory for Extended BIOS Data Area from base memory. Programming the memory hole or any kind of implementation that needs an adjustment in system RAM size if needed.</td></tr><tr><td>60</td><td>Initializes NUM-LOCK status and programs the KBD typematic rate.</td></tr><tr><td>75</td><td>Initialize Int-13 and prepare for IPL detection.</td></tr><tr><td>78</td><td>Initializes IPL devices controlled by BIOS and option ROMs.</td></tr><tr><td>7C</td><td>Generate and write contents of ESCD in NVRam.</td></tr><tr><td>84</td><td>Log errors encountered during POST.</td></tr><tr><td>85</td><td>Display errors to the user and gets the user response for error.</td></tr><tr><td>87</td><td>Execute BIOS setup if needed / requested. Check boot password if installed.</td></tr><tr><td>8C</td><td>Late POST initialization of chipset registers.</td></tr><tr><td>8D</td><td>Build ACPI tables (if ACPI is supported)</td></tr><tr><td>8E</td><td>Program the peripheral parameters. Enable/Disable NMI as selected</td></tr><tr><td>90</td><td>Initialization of system management interrupt by invoking all handlers.Please note this checkpoint comes right after checkpoint 20h</td></tr><tr><td>A1</td><td>Clean-up work needed before booting to OS.</td></tr><tr><td>A2</td><td>Takes care of runtime image preparation for different BIOS modules. Fill the free area in F000h segment with OFFh. Initializes the Microsoft IRQ Routing Table. Prepares the runtime language module. Disables the system configuration display if needed.</td></tr><tr><td>A4</td><td>Initialize runtime language module. Display boot option popup menu.</td></tr><tr><td>A7</td><td>Displays the system configuration screen if enabled. Initialize the CPU's before boot, which includes the programming of the MTRR's.</td></tr><tr><td>A9</td><td>Wait for user input at config display if needed.</td></tr><tr><td>AA</td><td>Uninstall POST INT1Ch vector and INT09h vector.</td></tr><tr><td>AB</td><td>Prepare BBS for Int 19 boot. Init MP tables.</td></tr><tr><td>AC</td><td>End of POST initialization of chipset registers. De-initializes the ADM module.</td></tr><tr><td>B1</td><td>Save system context for ACPI. Prepare CPU for OS boot including final MTRR values.</td></tr><tr><td>00</td><td>Passes control to OS Loader (typically INT19h).</td></tr></table>

# 8.13 OEM POST Error Checkpoints

Checkpoints from the range 61h to 70h are reserved for chipset vendors & system manufacturers. The error associated with this value may be different from one platform to the next.

# 8.14 DIM Code Checkpoints

The Device Initialization Manager (DIM) gets control at various times during BIOS POST to initialize different system busses. The following table describes the main checkpoints where the DIM module is accessed:

![The image displays a graphic icon resembling a piece of paper or a document. It is a white rectangle with the top-left corner folded down (a 'dog-ear'). Inside the document, there are faint horizontal gray lines across the lower section, suggesting text. Superimposed over the document is a large, bold red checkmark (or 'V') angled from the bottom left to the top right. There is no actual legible text in the image.](.express-iw400-manual-3/3812c5bcc1a06290b3764fa0528d859d087d502fe9b45defc29b97331f17f0fa.jpg)
NOTE:

Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs from add-in PCI devices.

<table><tr><td>Checkpoint</td><td>Description</td></tr><tr><td>2A</td><td>Initialize different buses and perform the following functions: Reset, Detect, and Disable (function 0); Static Device Initialization (function 1); Boot Output Device Initialization (function 2). Function 0 disables all device nodes, PCI devices, and PnP ISA cards. It also assigns PCI bus numbers. Function 1 initializes all static devices that include manual configured onboard peripherals, memory and I/O decode windows in PCI-PCI bridges, and noncompliant PCI devices. Static resources are also reserved. Function 2 searches for and initializes any PnP, PCI, or AGP video devices.</td></tr><tr><td>38</td><td>Initialize different buses and perform the following functions: Boot Input Device Initialization (function 3); IPL Device Initialization (function 4); General Device Initialization (function 5). Function 3 searches for and configures PCI input devices and detects if system has standard keyboard controller. Function 4 searches for and configures all PnP and PCI boot devices. Function 5 configures all onboard peripherals that are set to an automatic configuration and configures all remaining PnP and PCI devices.</td></tr></table>

While control is in the different functions, additional checkpoints are output to port 80h as a word value to identify the routines under execution. The low byte value indicates the main POST Code Checkpoint. The high byte is divided into two nibbles and contains two fields. The details of the high byte of these checkpoints are as follows:

# HIGH BYTE XY

The upper nibble 'X' indicates the function number that is being executed. 'X' can be from 0 to 7.

0 = func#0, disable all devices on the BUS concerned.
1 = func#1, static devices initialization on the BUS concerned.
2 = func#2, output device initialization on the BUS concerned.
3 = func#3, input device initialization on the BUS concerned.
4 = func#4, IPL device initialization on the BUS concerned.
5 = func#5, general device initialization on the BUS concerned.
6 = func#6, error reporting for the BUS concerned.
7 = func#7, add-on ROM initialization for all BUSes.
8 = func#8, BBS ROM initialization for all BUSes.

The lower nibble 'Y' indicates the BUS on which the different routines are being executed. 'Y' can be from 0 to 5.

0 = Generic DIM (Device Initialization Manager).
1 = On-board System devices.
2 = ISA devices.
3 = EISA devices.
4 = ISA PnP devices.
5 = PCI devices.

# 8.15 ACPI Runtime Checkpoints

ACPI checkpoints are displayed when an ACPI capable operating system either enters or leaves a sleep state. The following table describes the type of checkpoints that may occur during ACPI sleep or wake events:

![The image displays a digital icon of a document. It features a white sheet of paper with a folded top-right corner. Faint grey horizontal lines are visible on the page, indicating text content, though no actual words are legible. A large, bold red checkmark is superimposed diagonally across the center of the document.](.express-iw400-manual-3/7a38071fbe6899f9d1c9032d15e5c48aa66eecaab0208c1f80bf0a7ed935e6c1.jpg)
NOTE:

Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs from add-in PCI devices.

<table><tr><td>Checkpoint</td><td>Description</td></tr><tr><td>AC</td><td>First ASL check point. Indicates the system is running in ACPI mode.</td></tr><tr><td>AA</td><td>System is running in APIC mode.</td></tr><tr><td>01, 02, 03, 04, 05</td><td>Entering sleep state S1, S2, S3, S4, or S5.</td></tr><tr><td>10, 20, 30, 40, 50</td><td>Waking from sleep state S1, S2, S3, S4, or S5.</td></tr></table>

# 8.16 Boot Block Beep Codes

<table><tr><td>Number of Beeps</td><td>Description</td></tr><tr><td>1</td><td>Insert diskette in floppy drive A:</td></tr><tr><td>2</td><td>‘AMIBOOT.ROM’ file not found in root directory of diskette in A:</td></tr><tr><td>3</td><td>Base Memory error</td></tr><tr><td>4</td><td>Flash Programming successful</td></tr><tr><td>5</td><td>Floppy read error</td></tr><tr><td>6</td><td>Keyboard controller BAT command failed</td></tr><tr><td>7</td><td>No Flash EPROM detected</td></tr><tr><td>8</td><td>Floppy controller failure</td></tr><tr><td>9</td><td>Boot Block BIOS checksum error</td></tr><tr><td>10</td><td>Flash Erase error</td></tr><tr><td>11</td><td>Flash Program error</td></tr><tr><td>12</td><td>‘AMIBOOT.ROM’ file size error</td></tr><tr><td>13</td><td>BIOS ROM image mismatch (file layout does not match image present in flash device)</td></tr></table>

# 8.17 POST BIOS Beep Codes

<table><tr><td>Number of Beeps</td><td>Description</td></tr><tr><td>1</td><td>Memory refresh timer error.</td></tr><tr><td>2</td><td>Parity error in base memory (first 64KB block)</td></tr><tr><td>3</td><td>Base memory read/write test error</td></tr><tr><td>4</td><td>Motherboard timer not operational</td></tr><tr><td>5</td><td>Processor error</td></tr><tr><td>6</td><td>8042 Gate A20 test error (cannot switch to protected mode)</td></tr><tr><td>7</td><td>General exception error (processor exception interrupt error)</td></tr><tr><td>8</td><td>Display memory error (system video adapter)</td></tr><tr><td>9</td><td>AMIBIOS ROM checksum error</td></tr><tr><td>10</td><td>CMOS shutdown register read/write error</td></tr><tr><td>11</td><td>Cache memory test failed</td></tr></table>

# 8.17.1 Troubleshooting POST BIOS Beep Codes

<table><tr><td>Number of Beeps</td><td>Troubleshooting Action</td></tr><tr><td>1, 2 or 3</td><td>Reseat the memory, or replace with known good modules.</td></tr><tr><td>4-7, 9-11</td><td>Fatal error indicating a serious problem with the system. Consult your system manufacturer. Before declaring the motherboard beyond all hope, eliminate the possibility of interference by a malfunctioning add-in card. Remove all expansion cards except the video adapter.If beep codes are generated when all other expansion cards are absent, consult your system manufacturer&#x27;s technical support.If beep codes are not generated when all other expansion cards are absent, one of the add-in cards is causing the malfunction. Insert the cards back into the system one at a time until the problem happens again. This will reveal the malfunctioning card.</td></tr><tr><td>8</td><td>If the system video adapter is an add-in card, replace or reseat the video adapter. If the video adapter is an integrated part of the system board, the board may be faulty.</td></tr></table>

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# Appendix A: USB Client Port

# A.1 Description

The Express-IW400 includes a USB client port that offers access to a RS-232 port comming off the Intel® 3100 chipset.

In headless applications without a Super I/O chip, this is the only way to get a “console port” to the Express-IW400.

The console port can be used to get BIOS setup access or to get a root terminal under Windows $^{®}$ .

The provided USB driver should be loaded under the host PC for console access, not on the Express-IW400.

![USB\nClient\nPort\nFour USB\nDevice Ports](.express-iw400-manual-3/d9f33d87291c6610b43d85e197083e63732e75d55c2b65d10501e089f04630ab.jpg)

![Laptop PC running Microsoft®\nWindows® XP/Vista®\nTarget System](.express-iw400-manual-3/917fc570eaff7968bec1f4ee7d59564ada70698f286e3a626e917a33a60e95da.jpg)

Installed USB TI driver and running terminal program
Express-IW400
Express-BASE

![The image displays the universal recycling symbol: a black circle featuring three white, bent arrows arranged in a triangular loop, chasing each other.](.express-iw400-manual-3/421a6b234bf76199366fe3c51adecd23e4eef4b260372a51d6f187c53420e84a.jpg)
[🔗 Link to the original document](.express-iw400-manual-3/express-iw400-manual-3.pdf)