Express-MV User’s Manual Manual Revision: 2.01 Revision Date: May 18, 2010 Part Number: 50-1J022-1010 Revision History Release Date 2.00 2.01 2009/11/18 2010/05/18 Change Initial Release Add SDVO/DP/HDMI switch settings (Appendix A); update contact addresses Page 2 Express-MV User’s Manual Table of Contents Preface ............................................................................................................................ 5 1 Introduction ............................................................................................................... 7 Description ........................................................................................................................... 7 1.1 2 Specifications ............................................................................................................ 8 General ................................................................................................................................. 8 2.1 Video .................................................................................................................................... 8 2.2 Audio .................................................................................................................................... 9 2.3 LAN ....................................................................................................................................... 9 2.4 Multi I/O ................................................................................................................................ 9 2.5 Super I/O .............................................................................................................................. 9 2.6 TPM (Trusted Platform Module) .......................................................................................... 9 2.7 Power Specifications ......................................................................................................... 10 2.8 Operating Systems ............................................................................................................ 11 2.9 2.10 Mechanical and Environmental ......................................................................................... 11 3 Function Diagram ................................................................................................... 12 4 Mechanical Dimensions .......................................................................................... 13 5 Pinout and Signal Descriptions .............................................................................. 14 COM Express™ Type 2 ..................................................................................................... 14 Pin Definitions .................................................................................................................... 15 Signal Descriptions ............................................................................................................ 17 5.1 5.2 5.3 6 Embedded Functions .............................................................................................. 26 6.1 Watchdog Timer ................................................................................................................. 26 GPIO ................................................................................................................................... 27 6.2 Hardware Monitoring ......................................................................................................... 28 6.3 7 System Resources .................................................................................................. 29 System Memory Map ......................................................................................................... 29 Direct Memory Access Channels ...................................................................................... 29 Legacy I/O Map .................................................................................................................. 30 Interrupt Request (IRQ) Lines ........................................................................................... 32 7.1 7.2 7.3 7.4 Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 3 Page 3 Page 3 7.5 7.6 7.7 PCI Configuration Space Map ........................................................................................... 33 PCI Interrupt Routing Map ................................................................................................ 34 SMBus Slave Device Address ........................................................................................... 34 8 BIOS Setup Utility .................................................................................................... 35 Starting the BIOS ................................................................................................................ 35 Main Setup ......................................................................................................................... 39 Advanced BIOS Setup ....................................................................................................... 41 Power Management .......................................................................................................... 59 Boot Setup .......................................................................................................................... 62 Security Setup .................................................................................................................... 65 Exit Menu ........................................................................................................................... 68 8.1 8.2 8.3 8.4 8.5 8.6 8.7 9 BIOS Checkpoints, Beep Codes ............................................................................. 70 Bootblock Initialization Code Checkpoints ........................................................................ 71 Bootblock Recovery Code Checkpoints ........................................................................... 72 POST Code Checkpoints ................................................................................................... 73 OEM POST Error Checkpoints .......................................................................................... 75 DIM Code Checkpoints ...................................................................................................... 75 ACPI Runtime Checkpoints ................................................................................................ 76 Boot Block Beep Codes ..................................................................................................... 77 POST BIOS Beep Codes .................................................................................................... 77 Troubleshooting POST BIOS Beep Codes ........................................................................ 78 9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 Appendix A: SDVO/DisplayPort/HDMI Switch ............................................................. 79 Important Safety Instructions ...................................................................................... 80 Getting Service ............................................................................................................. 82 Page 4 Express-MV User’s Manual Preface Copyright 2010 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. Disclaimer The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages. Environmental Responsibility ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company. Trademarks AMIBIOS®8 is a registered trademark of American Megatrends, Inc. COM Express™, and PICMG® are registered trademarks of the PCI Industrial Computer Manufacturers Group. Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 5 Page 5 Page 5 Conventions Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly. Additional information, aids, and tips that help users perform tasks. Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task. Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task. Page 6 Express-MV User’s Manual 1 Introduction 1.1 Description Express-MV is a COM Express compliant module specially designed to facilitate speedy development of semi-custom designs. The COM Express standard embodies the convergence of the latest technology standards based on serial differential signaling such as PCI Express, USB 2.0, SATA, LVDS and Serial DVO implemented on a compact, 95mm x 125mm, Computer-on-Module. Signals are brought out through two 220-pin board-to-board connectors that permit data transmission rates of up to 5GHz. Mounting holes connect the module with a custom-made, application specific carrier boards which provide protection from shock and vibration. The Express-MV combines a Penryn type Core™2 Duo CPU with Intel's Mobile GS45 Express Chipset. The chipset consisting of GS45/ICH9M North- and Southbridge supports up to 8 GB, dual channel DDR3 800/1066MHz memory on two stacked SODIMM sockets. The Mobile Intel® GS45 Express chipset integrates a Mobile Intel® Graphics Media Accelerator 4500MHD that provides CRT, single/dual channel 24-bit LVDS and TV-out (SDTV and HDTV). The GMA 4500MHD includes support for DirectX 10, Shader Model 4.0, and provides an increase in performance over previous chipsets. Intel® Clear Video Technology together with HDCP support allows for smooth Blu-Ray playback. In addition to the onboard integrated graphics, a PCI Express x16 graphics slot is available for connection to high end PCI Express x16 graphics chipsets or general purpose x8, x4 or x1 PCI Express devices. The PCI Express Graphics (PEG) x16 bus pinout can alternatively be used for 2 SDVO ports, two HDMI ports or three display ports mode to connect to DVI, TMDS or TV-out device controllers. The module comes with a single onboard Gigabit Ethernet port and four SATA ports. It has optional legacy IDE support through a SATA-to-PATA controller, 32-bit PCI and LPC. The module allows connection of up to five additional PCI Express x1 devices on the ICH8M Southbridge. The Express-MV comes equipped with a AMIBIOS8 supporting many embedded features such as: remote console, CMOS backup, CPU and system monitoring and a watchdog timer for NMI or RESET, operation over battery power, and extended power modes. The Express-MV is a RoHS compliant and lead-free product. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 7 Page 7 Page 7 2 Specifications 2.1 General (cid:102) CPU: Penryn Core BGA type Intel® Core™2 Duo SP9300, FSB 1066, 2.26 GHz, 6MB L2 cache, 25 W Intel® Core™2 Duo SL9400, FSB 1066, LV 1.86 GHz, 6MB L2 cache,17 W Intel® Core™2 Duo SU9300, FSB 800, ULV 1.2 GHz, 3MB L2 cache, 10 W Intel® Celeron® M 722, FSB 800, ULV 1.2GHz, 1MB L2 cache, 5.5 W (cid:102) Memory: Dual stacked SODIMM socket memory supporting dual channel memory bandwidth, for max 8 GB of non-ECC, 800/1066 MHz DDR3 (cid:102) Chipset: Intel® GS45 Express Graphic Memory Controller Hub SFF (Small Form Factor) and Intel® I/O Controller Hub ICH9M-SFF (cid:102) L2 Cache: 1 MB (Celeron® M), 2/4 MB (Core (2) Duo) (cid:102) BIOS: AMIBIOS8 with CMOS backup in 8 Mbit SPI BIOS (cid:102) Hardware Monitor: Supply Voltages and CPU temperature (cid:102) Watchdog Timer: Programmable timer ranges to generate RESET (cid:102) Expansion Busses: - Graphics PCI Express x16 bus for SDVO/HDMI/Display Port or General Purpose PCI Express x8, x4, or x1 - 6 PCI Express x1 (0/1/2/3/4 are free, 5 is occupied by GbE LAN), 0/1/2/3 PCIe x1 can be optionally configured as 1 x4 - 32-bit PCI 2.3 at 33MHz, supporting 4 bus masters - LPC, SMBus, I2C 2.2 Video (cid:102) Chipset: GS45 GMCH integrated Mobile Intel® Graphics Media Accelerator 4500MHD with core render clock 533-MHz @ 1.05-V core voltage or 266 MHz @ 1.025 L.P. Mode (cid:102) CRT Interface: Analog CRT support up to QXGA, 300MHz DAC, supports CRT hot plug (cid:102) LVDS Interface: Single or dual channel 18/24-bit at 25~112 MHz (cid:102) TV-out: NTSC/PAL up to 1024x768 resolution supported, HDTV 480p/720p/1080i/1080p modes support (without Macrovision) Page 8 Express-MV User’s Manual 2.3 Audio (cid:102) Chipset: Integrated in Intel® I/O Controller Hub 9 Mobile (ICH9M) (cid:102) Audio Codec: HDA type on carrier 2.4 LAN (cid:102) Chipset: Integrated in Intel® ICH9M with Intel® 82567LM PHY (cid:102) Interface: 10/100/1000 Mbps Ethernet 2.5 Multi I/O (cid:102) IDE (PATA): SATA-to-PATA JM20330 controller on SATA channel 3, Master only (cid:102) SATA: Four ports SATA 3 Gb/s with (optional) support for RAID 0, 1, 5, 10 (cid:102) USB: Supports up to eight ports USB v.2.0 2.6 Super I/O (cid:102) Connected to LPC bus on carrier if needed 2.7 TPM (Trusted Platform Module) (cid:102) Chipset: Infineon SLB9635TT1.2 (cid:102) Type: TPM 1.2 Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 9 Page 9 Page 9 2.8 Power Specifications (cid:102) Input Power: AT mode (12 V) and ATX mode (12 V and 5 VSB) (cid:102) Power Management: ACPI 3.0 compliant with battery support. The 12V measurement is power to the module only (excluding carrier board power draw). The 5Vsb measurement (in S3/S5 mode) includes both module power consumption plus active 5Vsb powered peripherals (such as PS/2 and USB) on the carrier that are needed for wakeup. Although all voltages were measured, only 12 V and 5 VSB are relevant because they are the only ones used by the Express module. The Idle power level was measured under Windows XP with no applications running (login screen). Max Load was measured under Windows XP running Burnin software or Kpower, whichever gave the highest power consumption. Intel® Core™2 Duo SP9300, 2.26 GHz Power State Idle (Windows XP login) Max. Load (Windows XP - Burnin/Kpower) S1 (standby powered on) S3 (suspend to RAM) S5 (soft off) +12V 0.94 A 2.76 A 0.97 A - - Intel® Core™2 Duo SL9400 LV, 1.86 GHz Power State Idle (Windows XP login) Max. Load (Windows XP - Burnin/Kpower) S1 (standby powered on) S3 (suspend to RAM) S5 (soft off) +12V 0.74 A 2.88 A 0.97 A - - Intel® Core™2 Duo SU9300 ULV, 1.2 GHz Power State Idle (Windows XP login) Max. Load (Windows XP - Burnin/Kpower) S1 (standby powered on) S3 (suspend to RAM) S5 (soft off) +12V 0.68 A 1.44 A 0.85 A - - +5VSB N.S. N.S. N.S. 0.22 A 0.10 A +5VSB N.S. N.S. N.S. 0.22 A 0.10 A +5VSB N.S. N.S. N.S. 0.22 A 0.10 A Power Consumption 11.3 W 33.1 W 11.6 W 1.1 W 0.5 W Power Consumption 8.9 W 34.6 W 11.6 W 1.1 W 0.5 W Power Consumption 8.2 W 17.3 W 10.2 W 1.1 W 0.5 W Page 10 Express-MV User’s Manual Intel® Celeron® M 722, 1.86 GHz Power State Idle (Windows XP login) Max. Load (Windows XP - Burnin/Kpower) S1 (standby powered on) S3 (suspend to RAM) S5 (soft off) +12V 0.76 A 1.20 A 0.68 A - - +5VSB N.S. N.S. N.S. 0.22 A 0.10 A Power Consumption 9.1 W 14.4 W 8.2 W 1.1 W 0.5 W CMOS Battery Power Consumption Current (+3V) 4.3 μA Power 0.0000129 W 2.9 Operating Systems (cid:102) Standard Support - Windows XP 32/64-bit - Windows Vista 32/64-bit - Windows Server 2003/2008 (cid:102) Extended Support (BSP) - Embedded XP BSP - WinCE 6.0 BSP - AIDI I2C Library for Win32, WinCE and Linux 2.10 Mechanical and Environmental (cid:102) Form factor and Type: PICMG COM.0, Standard COM Express™ Type II (cid:102) Dimensions: 95 x 125 mm (cid:102) Standard Operating Temperature: 0°C to 60°C (cid:102) Relative Humidity: up to 90% at 60°C Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 11 Page 11 Page 11 3 Function Diagram CPU Celeron® M Core™ 2 Duo Small Form Factor: 22 x 22 mm BGA FSB 800/1066 Mhz GMCH Intel® GS45 Small Form Factor DDR-3 Memory Controller Channel A DDR3 800/1066 SODIMM socket CRT TV-out LVDS Audio B A Intel LAN PHY Boazman PCIe x1, lane 5 PCIe x1, lane 0/1/2/3/4 or PCIe x4 Graphics Core 4500MHD Channel B DDR3 800/1066 SODIMM socket Analog VGA SDTV HDTV LVDS dual 18/24-bit PCIe x16 Gfx PCIe x8/x4/x1 SDVO (2) DisplayPort (3) HDMI (2) DMI ICH Intel® ICH9M Small Form Factor PCIe x16 (multiplexed) D C 1x SATA2 JM20330 SATA / PATA IDE Audio Gbe MAC Six PCIe x1 lanes SATA_0/1/2 USB_0/1/2/3/4/5/6/7 3x SATA2 8x USB 2.0 s u b M S RTC PCI SPI LPC PCI 33 Mhz v2.3 SMBus GPIO I2C F75111R LM95245 LM87 LPC BIOS BC Test header TPM Page 12 Express-MV User’s Manual 4 Mechanical Dimensions connectors on bottom side Top View All tolerances ± 0.05 mm Other tolerances ± 0.2 mm Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 13 Page 13 Page 13 5 Pinout and Signal Descriptions 5.1 COM Express™ Type 2 All pinouts on AB and CD connector of the Express-MV comply with pin-out and signal descriptions used in the original “PICMG® COM.0 R1.0: COM Express™ Module Base Specification”. This document contains a pinouts, signal descriptions, and mechanical characteristics of the COM Express™ (Express®) form factor. An additional document, “ Express® Design Guide” gives a general introduction to carrier board designs for COM Express™ (Express®) modules. AB Connector 1 Gigabit Ethernet port LPC interface 4 Serial ATA channels High Definition Audio 8 USB 2.0 ports 5 PCI Express Lanes x1 Dual 24-bit LVDS channels 95mm. Analog VGA TV-out ports (SDTV/HDTV) 8 GPIO pins +12V primary power input +5V standby and 3V RTC 125mm. AB CD CD Connector Parallel ATA, IDE port alternate definition assigns this to 2 additional Gigabit Ethernet ports 32-bit PCI v2.3 bus alternate definition assigns this to 10 additional PCI Express x1 lanes PCI Express x16 for Graphics these pins can also be assigned to two SDVO extensions (multiplexed) SMB and I2C bus Power / Thermal control +12V primary power input Page 14 Express-MV User’s Manual 5.2 Pin Definitions Pinouts for: Basic form factor, Type 2 D1 C1 B1 A1 C D A B D110 C110 B110 A110 Row A Row B Row C Row D Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name Pin No. Pin Name A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 GND (FIXED) GBE0_MDI3- GBE0_MDI3+ GBE0_LINK100# GBE0_LINK1000# GBE0_MDI2- GBE0_MDI2+ GBE0_LINK# GBE0_MDI1- GBE0_MDI1+ GND (FIXED) GBE0_MDI0- GBE0_MDI0+ GBE0_CTREF SUS_S3# SATA0_TX+ SATA0_TX- SUS_S4# SATA0_RX+ SATA0_RX- GND (FIXED) SATA2_TX+ SATA2_TX- SUS_S5# SATA2_RX+ SATA2_RX- BATLOW # ATA_ACT# AC_SYNC AC_RST# GND (FIXED) AC_BITCLK AC_SDOUT BIOS_DISABLE# THRMTRIP# USB6- USB6+ USB_6_7_OC# USB4- USB4+ GND (FIXED) USB2- USB2+ USB_2_3_OC# USB0- USB0+ VCC_RTC EXCD0_PERST# EXCD0_CPPE# LPC_SERIRQ B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 GND (FIXED) GBE0_ACT# LPC_FRAME# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_DRQ0# LPC_DRQ1# LPC_CLK GND (FIXED) PW RBTN# SMB_CK SMB_DAT SMB_ALERT# SATA1_TX+ SATA1_TX- SUS_STAT# SATA1_RX+ SATA1_RX- GND (FIXED) SATA3_TX+ (2) SATA3_TX- (2) PW R_OK SATA3_RX+ (2) SATA3_RX- (2) W DT AC_SDIN2 AC_SDIN1 AC_SDIN0 GND (FIXED) SPKR I2C_CK I2C_DAT THRM# USB7- USB7+ USB_4_5_OC# USB5- USB5+ GND (FIXED) USB3- USB3+ USB_0_1_OC# USB1- USB1+ NC NC SYS_RESET# CB_RESET# C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 C48 C49 C50 GND FIXED) IDE_D7 IDE_D6 IDE_D3 IDE_D15 IDE_D8 IDE_D9 IDE_D2 IDE_D13 IDE_D1 GND (FIXED) IDE_D14 IDE_IORDY IDE_IOR# PCI_PME# PCI_GNT2# PCI_REQ2# PCI_GNT1# PCI_REQ1# PCI_GNT0# GND (FIXED) PCI_REQ0# PCI_RESET# PCI_AD0 PCI_AD2 PCI_AD4 PCI_AD6 PCI_AD8 PCI_AD10 PCI_AD12 GND (FIXED) PCI_AD14 PCI_C/BE1# PCI_PERR# PCI_LOCK# PCI_DEVSEL# PCI_IRDY# PCI_C/BE2# PCI_AD17 PCI_AD19 GND (FIXED) PCI_AD21 PCI_AD23 PCI_C/BE3# PCI_AD25 PCI_AD27 PCI_AD29 PCI_AD31 PCI_IRQA# PCI_IRQB# D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 GND FIXED) IDE_D5 IDE_D10 IDE_D11 IDE_D12 IDE_D4 IDE_D0 IDE_REQ IDE_IOW # IDE_ACK# GND (FIXED) IDE_IRQ IDE_A0 IDE_A1 IDE_A2 IDE_CS1# IDE_CS3# IDE_RESET# PCI_GNT3# PCI_REQ3# GND (FIXED) PCI_AD1 PCI_AD3 PCI_AD5 PCI_AD7 PCI_C/BE0# PCI_AD9 PCI_AD11 PCI_AD13 PCI_AD15 GND (FIXED) PCI_PAR PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_AD16 PCI_AD18 PCI_AD20 PCI_AD22 GND (FIXED) PCI_AD24 PCI_AD26 PCI_AD28 PCI_AD30 PCI_IRQC# PCI_IRQD# PCI_CLKRUN# NC PCI_CLK Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 15 Page 15 Page 15 Row A Row B Pin No. Pin Name A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 GND (FIXED) PCIE_TX5+ (1) PCIE_TX5- (1) GPI0 PCIE_TX4+ PCIE_TX4- GND PCIE_TX3+ PCIE_TX3- GND (FIXED) PCIE_TX2+ PCIE_TX2- GPI1 PCIE_TX1+ PCIE_TX1- GND GPI2 PCIE_TX0+ PCIE_TX0- GND (FIXED) LVDS_A0+ LVDS_A0- LVDS_A1+ LVDS_A1- LVDS_A2+ LVDS_A2- LVDS_VDD_EN LVDS_A3+ LVDS_A3- GND (FIXED) LVDS_A_CK+ LVDS_A_CK- LVDS_I2C_CK LVDS_I2C_DAT GPI3 KBD_RST# KBD_A20GATE PCIE0_CK_REF+ PCIE0_CK_REF- GND (FIXED) RSVD RSVD GPO0 RSVD RSVD GND VCC_12V VCC_12V VCC_12V GND (FIXED) VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND (FIXED) Pin No. Pin Name B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98 B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 GND (FIXED) PCIE_RX5+ (1) PCIE_RX5- (1) GPO1 PCIE_RX4+ PCIE_RX4- GPO2 PCIE_RX3+ PCIE_RX3- GND (FIXED) PCIE_RX2+ PCIE_RX2- GPO3 PCIE_RX1+ PCIE_RX1- WAKE0# WAKE1# PCIE_RX0+ PCIE_RX0- GND (FIXED) LVDS_B0+ LVDS_B0- LVDS_B1+ LVDS_B1- LVDS_B2+ LVDS_B2- LVDS_B3+ LVDS_B3- LVDS_BKLT_EN GND (FIXED) LVDS_B_CK+ LVDS_B_CK- LVDS_BKLT_CTRL VCC_5V_SBY VCC_5V_SBY VCC_5V_SBY VCC_5V_SBY RSVD VGA_RED GND (FIXED) VGA_GRN VGA_BLU VGA_HSYNC VGA_VSYNC VGA_I2C_CK VGA_I2C_DAT TV_DAC_A TV_DAC_B TV_DAC_C GND (FIXED) VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND (FIXED) Row C Pin No. Pin Name C51 C52 C53 C54 C55 C56 C57 C58 C59 C60 C61 C62 C63 C64 C65 C66 C67 C68 C69 C70 C71 C72 C73 C74 C75 C76 C77 C78 C79 C80 C81 C82 C83 C84 C85 C86 C87 C88 C89 C90 C91 C92 C93 C94 C95 C96 C97 C98 C99 C100 C101 C102 C103 C104 C105 C106 C107 C108 C109 C110 GND (FIXED) PEG_RX0+ PEG_RX0- TYPE0# PEG_RX1+ PEG_RX1- TYPE1# PEG_RX2+ PEG_RX2- GND (FIXED) PEG_RX3+ PEG_RX3- RSVD RSVD PEG_RX4+ PEG_RX4- RSVD (1) PEG_RX5+ PEG_RX5- GND (FIXED) PEG_RX6+ PEG_RX6- SDVO_DATA PEG_RX7+ PEG_RX7- GND RSVD PEG_RX8+ PEG_RX8- GND (FIXED) PEG_RX9+ PEG_RX9- RSVD GND PEG_RX10+ PEG_RX10- GND PEG_RX11+ PEG_RX11- GND (FIXED) PEG_RX12+ PEG_RX12- GND PEG_RX13+ PEG_RX13- GND RSVD PEG_RX14+ PEG_RX14- GND (FIXED) PEG_RX15+ PEG_RX15- GND VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND (FIXED) Row D Pin No. Pin Name D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 D64 D65 D66 D67 D68 D69 D70 D71 D72 D73 D74 D75 D76 D77 D78 D79 D80 D81 D82 D83 D84 D85 D86 D87 D88 D89 D90 D91 D92 D93 D94 D95 D96 D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108 D109 D110 GND (FIXED) PEG_TX0+ PEG_TX0- PEG_LANE_RV# PEG_TX1+ PEG_TX1- TYPE2# PEG_TX2+ PEG_TX2- GND (FIXED) PEG_TX3+ PEG_TX3- DDPC_CTRLCLK DDPC_CTRLDATA PEG_TX4+ PEG_TX4- GND PEG_TX5+ PEG_TX5- GND (FIXED) PEG_TX6+ PEG_TX6- SDVO_CLK PEG_TX7+ PEG_TX7- GND IDE_CBLID# PEG_TX8+ PEG_TX8- GND (FIXED) PEG_TX9+ PEG_TX9- MCH_CFG_20 GND PEG_TX10+ PEG_TX10- GND PEG_TX11+ PEG_TX11- GND (FIXED) PEG_TX12+ PEG_TX12- GND PEG_TX13+ PEG_TX13- GND PEG_ENABLE# PEG_TX14+ PEG_TX14- GND (FIXED) PEG_TX15+ PEG_TX15- GND VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND (FIXED) (1) The 6th PCI Express x1 port (PCIE5) is occupied by the onboard LAN controller. For six PCI Express x1 port support from the Express-MV, please contact ADLINK for the no onboard LAN version. (2) The 4th SATA port (SATA3) is occupied by the onboard SATA/PATA bridge. For 4x SATA port support from the Express-MV, please contact ADLINK for the four SATA port version. Page 16 Express-MV User’s Manual 5.3 Signal Descriptions Row A Pin A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 Signal GND GBE0_MDI3- GBE0_MDI3+ Description Ground Ethernet Media Dependent Interface - Ethernet Media Dependent Interface + GBE0_LINK100# Ethernet Speed LED (100Mb) GBE0_LINK1000# Ethernet Speed LED (1000Mb) GBE0_MDI2- GBE0_MDI2+ GBE0_LINK# GBE0_MDI1- GBE0_MDI1+ GND GBE0_MDI0- GBE0_MDI0+ GBE0_CTREF ETHCTREF Ethernet Media Dependent Interface - Ethernet Media Dependent Interface + LAN Link LED Ethernet Media Dependent Interface - Ethernet Media Dependent Interface + Ground Ethernet Media Dependent Interface - Ethernet Media Dependent Interface + SUS_S3# SATA0_TX+ SATA0_TX- SUS_S4# SATA0_RX+ SATA0_RX- GND SATA2_TX+ SATA2_TX- SUS_S5# SATA2_RX+ SATA2_RX- BATLOW# ATA_ACT# AC_SYNC AC_RST# GND AC_BITCLK AC_SDOUT PM_SLP_S#3 SATA0_TX+ | SATA 0 Transmit Data + SATA0_TX- | SATA 0 Transmit Data - PM_SLP_S#4 SATA0_RX+ | SATA 0 Receive Data + SATA0_RX - | SATA 0 Receive Data - Ground SATA2_TX+ | SATA 2 Transmit Data + SATA2_TX- | SATA 2 Transmit Data - PM_SLP_S#5 SATA2_RX+ | SATA 2 Receive Data + SATA2_RX- | SATA 2 Receive Data - PM_BATLOW# | Battery Low ATA_LED# | SATA LED AC_SYNC | AC'97 Sync AC_RST# | AC'97 Reset Ground AC_BITCLK | AC'97 Clock AC_SDATAOUT | AC'97 Data BIOS_DISABLE# BIOS_DISABLE# THRMTRIP# USB6- USB6+ PM_THRMTRIP#_CON USB_PN6 | USB Data – Port6 USB_PP6 | USB Data + Port6 USB_6_7_OC# USB_OC#_6_7 | USB OverCurrent Port 6/7 USB4- USB4+ GND USB2- USB2+ USB_PN4 | USB Data - Port4 USB_PP4 | USB Data + Port4 Ground USB_PN2 | USB Data - Port2 USB_PP2 | USB Data + Port2 USB_2_3_OC# USB_OC#_2_3 | USB OverCurrent Port 2/3 USB0- USB0+ VCC_RTC USB_PN0 | USB Data - Port0 USB_PP0 | USB Data + Port0 V_BAT EXCD0_PERST# Express Card Support [0]|card reset EXCD0_CPPE# Express Card Support [0]| capable c. request LPC_SERIRQ INT_SERIRQ | Serial Interrupt Request GND PCIE5_TX+ PCIE5_TX- GPI0 PCIE4_TX+ Ground BOM option (LAN on PCIe 5) BOM option (LAN on PCIe 5) General Purpose Input 0 PCI Express 4 Transmit + Type PWR I/O - DP I/O - DP OD OD I/O - DP I/O - DP O-3.3 I/O - DP I/O - DP PWR I/O - DP I/O - DP O-1,8 O-3.3 O - DP O - DP O-3.3 I - DP I - DP PWR O - DP O - DP O-3.3 I - DP I - DP I-3.3 O-3.3 O-3.3 O-3.3 PWR O-3.3 O-3.3 I-3.3 O-3.3 I/O - DP I/O - DP I-3.3 I/O - DP I/O - DP PWR I/O - DP I/O - DP I-3.3 I/O - DP I/O - DP PWR O-3.3 I-3.3 IO-3.3 PWR NC NC I-3.3 O - DP PU/PD - - - - - - - - - - - - - - - - - - - - - - - - - PU 8k2 3.3Vsb PU 10k 3.3V - - - - - PU 10k 3.3V PU 10k 3.3V - - PU 10k 3.3Vsb - - - - - PU 10k 3.3Vsb - - - PU 10k 3.3Vsb PU 10k 3.3V PU 8k2 3.3V - - - PU 10k 3.3Vsb - Comment - - - On at 100Mb/s On at 1000Mb/s - - - - - - - - - - - - - - - - - - - - - - int. PU 15k in ICH9 int. PD 20k in ICH9 int. PD 20k in ICH9 int. PD 20k in ICH9 int. PD 20k in ICH9 - - int. PD 15k in ICH9 int. PD 15k in ICH9 - int. PD 15k in ICH9 int. PD 15k in ICH9 - int. PD 15k in ICH9 int. PD 15k in ICH9 int. PD 15k in ICH9 int. PD 15k in ICH9 - - - - - Optional : O - DP Optional : O - DP - - Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 17 Page 17 Page 17 Signal Descriptions (cont’d) Row A Pin A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 Signal PCIE4_TX- GND PCIE3_TX+ PCIE3_TX- GND PCIE2_TX+ PCIE2_TX- GPI1 PCIE1_TX+ PCIE1_TX- GND GPI2 PCIE0_TX+ PCIE0_TX- GND LVDS_A0+ LVDS_A0- LVDS_A1+ LVDS_A1- LVDS_A2+ LVDS_A2- Description PCI Express 4 Transmit - Ground PCI Express 3 Transmit + PCI Express 3 Transmit - Ground PCI Express 2 Transmit + PCI Express 2 Transmit - General Purpose Input 1 PCI Express 1 Transmit + PCI Express 1 Transmit - Ground General Purpose Input 2 PCI Express 0 + PCI Express 0 - Ground LVDS_AP0 | LVDS Channel A LVDS_AN0 | LVDS Channel A LVDS_AP1 | LVDS Channel A LVDS_AN1 | LVDS Channel A LVDS_AP2 | LVDS Channel A LVDS_AN2 | LVDS Channel A LVDS_VDD_EN LVDS_VDDEN | LVDS Panel Power LVDS_AP3 | LVDS Channel A LVDS_A3+ LVDS_AN3 | LVDS Channel A LVDS_A3- Ground GND LVDS_CLKAP | LVDS Channel A LVDS_A_CK+ LVDS_CLKAN | LVDS Channel A LVDS_A_CK- LVDS_I2C_CK LVDS_DDCPCLK | JILI I2C Clock LVDS_I2C_DAT LVDS_DDCPDATA | JILI I2C Data GPI3 KBD_RST# General Purpose Input 3 H_RCIN# | Keyboard Reset KBD_A20GATE H_A20GATE PCIE_CK_REF+ CLK_PCIE_REF P PCIE_CK_REF- CLK_PCIE_REF N GND RSVD RSVD GPO0 RSVD RSVD GND VCC_12V VCC_12V VCC_12V GND VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND Ground General Purpose Output 0 Ground Power 12V Power 12V Power 12V Ground Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Ground Type O - DP PWR O - DP O - DP PWR O - DP O - DP I-3.3 O - DP O - DP PWR I-3.3 O - DP O - DP PWR O - DP O - DP O - DP O - DP O - DP O - DP O-2,5 O - DP O - DP PWR O - DP O - DP IO-3.3 IO-3.3 I-3.3 I-3.3 I-3.3 O - DP O - DP PWR NC NC O-3.3 NC NC PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR PU/PD - - - - - - - PU 10k 3.3Vsb - - - PU 10k 3.3Vsb - - - - - - - - - PD 100k - - - - - PU 10k 3.3V PU 10k 3.3V PU 10k 3.3Vsb PU 10k 3.3V PU 8k2 3.3V - - - - - PU 10k 3.3Vsb - - - - - - - - - - - - - - - - - Comment - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Page 18 Express-MV User’s Manual Signal Descriptions (cont’d) Row B Pin B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 Signal GND GBE0_ACT# LPC_FRAME# LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_DRQ0# LPC_DRQ1# LPC_CLK GND PWRBTN# SMB_CK SMB_DAT SMB_ALERT# SATA1_TX+ SATA1_TX- SUS_STAT# SATA1_RX+ SATA1_RX- GND SATA3_TX+ SATA3_TX- PWR_OK SATA3_RX+ SATA3_RX- WDT AC_SDIN2 AC_SDIN1 AC_SDIN0 GND SPKR I2C_CK I2C_DAT THRM# USB7- USB7+ Description Ground LAN_ACTLED# | Ethernet Activity LED LPC_FRAME# | LPC Frame Indicator LPC_AD0 | LPC Adress & DATA Bus LPC_AD1 | LPC Adress & DATA Bus LPC_AD2 | LPC Adress & DATA Bus LPC_AD3 | LPC Adress & DATA Bus SIO_DRQ#0 | LPC Serial DMA Request 0 SIO_DRQ#1 | LPC Serial DMA Request 1 CLK_SIOEXTPCI Ground Power Button SMBUS Clock SMBUS Data SMB_ALERT# SATA1_TX+ | SATA 1 Transmit Data + SATA1_TX- | SATA 1 Transmit Data - PM_SUS_ STAT# SATA1_RX+ | SATA 1 Receive Data + SATA1_RX - | SATA 1 Receive Data - Ground BOM option (PATA bridge on SATA3) BOM option (PATA bridge on SATA3) Power OK BOM option (PATA bridge on SATA3) BOM option (PATA bridge on SATA3) Watch Dog Timer AC_SDATAIN2 AC_SDATAIN1 AC_SDATAIN0 Ground AC_SPKR I2CLK I2DAT PM THRM# CON | Over Temperature USB_PN7 | USB Data – Port7 USB_PP7 | USB Data + Port7 USB_4_5_OC# USB_OC#_4_5 | USB OverCurrent Port USB5- USB5+ GND USB3- USB3+ USB_PN5 | USB Data- Port5 USB_PP5 | USB Data+ Port5 Ground USB_PN3 | USB Data- Port3 USB_PP3 | USB Data+ Port3 USB_0_1_OC# USB_OC#_0_1 | USB OverCurrent Port USB1- USB1+ USB_PN1 | USB Data- Port1 USB_PP1 | USB Data+ Port1 ETX_SYS_RESET# | Reset Input EXCD1_PERST# Express Card Support [1]|card reset EXCD1_CPPE# Express Card Support [1]| capable c. SYS_RESET# CB_RESET# GND PCIE5_RX+ PCIE5_RX- GPO1 PCIE4_RX+ PCI_RST# | PCI Bus Reset Ground BOM option (LAN on PCIe 5) BOM option (LAN on PCIe 5) General Purpose Output 1 PCI Express 4 Recieve + Type PWR OD O-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 I-3.3 I-3.3 O-3.3 I-3.3 I-5 O-3.3 IO-3.3 I-3.3 O - DP O - DP O-3.3 I - DP I - DP PWR NC NC I,3.3 NC NC O-3.3 I-3.3 I-3.3 I-3.3 PWR O-3.3 O-3.3 IO-3.3 I-3.3 I/O - DP I/O - DP I-3.3 I/O - DP I/O - DP I-3.3 I/O - DP I/O - DP I-3.3 I/O - DP I/O - DP O-3.3 I-3.3 I-3.3 O-3.3 PWR NC NC O-3.3 I - DP PU/PD - PU 1k 3.3V - - - - - - - - - PU 10k 3.3Vsb PU 1k2 3.3V PU 1k2 3.3V PU 10k 3.3Vsb - - - - - - - - PU 10k 3.3V - - - - - - - PU 10k 3.3V PU 10k 3.3V PU 8k2 3.3V - - PU 10k 3.3Vsb - - - - - PU 10k 3.3Vsb - - PU 10k 3.3Vsb PU 10k 3.3V PU 10k 3.3Vsb - - - - PU 10k 3.3Vsb - Comment - - - int. PU 20k in ICH9 int. PU 20k in ICH9 int. PU 20k in ICH9 int. PU 20k in ICH9 int. PU 20k in ICH9 int. PU 20k in ICH9 - - - - - - - - - - - - Optional : O - DP Optional : O - DP - Optional : I - DP Optional : I - DP - int. PD 20k in ICH9 int. PD 20k in ICH9 int. PD 20k in ICH9 int. PD 20k in ICH9 - - - int. PD 15k in ICH9 int. PD 15k in ICH9 int. PD 15k in ICH9 int. PD 15k in ICH9 - int. PD 15k in ICH9 int. PD 15k in ICH9 - int. PD 15k in ICH9 int. PD 15k in ICH9 - - - - - Optional: I - DP Optional: I - DP - - Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 19 Page 19 Page 19 Signal Descriptions (cont’d) Row B Pin B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98 B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 Signal PCIE4_RX- GPO2 PCIE3_RX+ PCIE3_RX- GND PCIE2_RX+ PCIE2_RX- GPO3 PCIE1_RX+ PCIE1_RX- WAKE0# WAKE1# PCIE0_RX+ PCIE0_RX- GND LVDS_B0+ LVDS_B0- LVDS_B1+ LVDS_B1- LVDS_B2+ LVDS_B2- LVDS_B3+ LVDS_B3- Description PCI Express 4 Receive - General Purpose Output 2 PCI Express 3 Recieve + PCI Express 3 Receive - Ground PCI Express 2 Receive + PCI Express 2 Receive - General Purpose Output 3 PCI Express 1 Receive + PCI Express 1 Receive - PCIE_WAKEI# WAKE1# PCI Express 0 Receive + PCI Express 0 Receive - Ground LVDS_BP0 | LVDS Channel B Data0+ LVDS_BN0 | LVDS Channel B Data0- LVDS_BP1 | LVDS Channel B Data1+ LVDS_BN1 | LVDS Channel B Data1- LVDS_BP2 | LVDS Channel B Data2+ LVDS_BN2 | LVDS Channel B Data2- LVDS_BP3 | LVDS Channel B Data3+ LVDS_BN3 | LVDS Channel B Data3- LVDS_BKLT_EN LVDS Panel Backlight Enable GND LVDS_B_CK+ LVDS_B_CK- Ground LVDS_CLKBP | LVDS Channel B LVDS_CLKBM | LVDS Channel B LVDS_BKLT_CTRL Backlight Brightness 5V Standby VCC_5V_SBY 5V Standby VCC_5V_SBY 5V Standby VCC_5V_SBY 5V Standby VCC_5V_SBY NC RSVD Analog Video RGB-RED VGA_RED Ground GND Analog Video RGB-GREEN VGA_GRN Analog Video RGB-BLUE VGA_BLU Analog Video H-Sync VGA_HSYNC Analog Video V-Sync VGA_VSYNC Display Data Channel - Clock VGA_I2C_CK VGA_I2C_DAT Display Data Channel - Data TV_DAC_A TV_DAC_B TV_DAC_C GND VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND Composite CVBS TV Luminance Signal TV Chrominance Signal Ground Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Ground Type I - DP O-3.3 I - DP I - DP PWR I - DP I - DP O-3.3 I - DP I - DP I-3.3 I-3.3 I - DP I - DP PWR O - DP O - DP O - DP O - DP O - DP O - DP O - DP O - DP O-3.3 PWR O - DP O - DP O-3.3 PWR PWR PWR PWR NC OA PWR OA OA O-3.3 O-3.3 O-3.3 IO-3.3 OA OA OA PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR PU/PD - PU 10k 3.3Vsb - - - - - PU 10k 3.3Vsb - - PU 1k 3.3Vsb PU 10k 3.3Vsb - - - - - - - - - - - PD 100k - - - PD 100k - - - - - PD 150R - PD 150R PD 150R - - PU 2k2 3.3V PU 2k2 3.3V PD 150R PD 150R PD 150R - - - - - - - - - - - Comment - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Page 20 Express-MV User’s Manual Signal Descriptions (cont’d) Row C Pin C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 C48 C49 C50 C51 C52 C53 C54 C55 Signal GND IDE_D7 IDE_D6 IDE_D3 IDE_D15 IDE_D8 IDE_D9 IDE_D2 IDE_D13 IDE_D1 GND IDE_D14 IDE_IORDY IDE_IOR# PCI_PME# PCI_GNT2# PCI_REQ2# PCI_GNT1# PCI_REQ1# PCI_GNT0# GND PCI_REQ0# PCI_RESET# PCI_AD0 PCI_AD2 PCI_AD4 PCI_AD6 PCI_AD8 PCI_AD10 PCI_AD12 GND PCI_AD14 PCI_C/BE1# PCI_PERR# PCI_LOCK# Description Ground IDE Data Bus IDE Data Bus IDE Data Bus IDE Data Bus IDE Data Bus IDE Data Bus IDE Data Bus IDE Data Bus IDE Data Bus Ground IDE Data Bus IDE I/O Ready I/O read line to IDE device PCI Power Management Event PCI Bus Grant 2 PCI Bus Request 2 PCI Bus Grant 1 PCI Bus Request 1 PCI Bus Grant 0 Ground PCI Bus Reqest 0 PCI Bus Reset PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line Ground PCI Adress & Data Bus line PCI Bus Command and Byte enables PCI Bus Grant Error PCI Bus Lock PCI_DEVSEL# PCI Bus Device Select PCI_IRDY# PCI_C/BE2# PCI_AD17 PCI_AD19 GND PCI_AD21 PCI_AD23 PCI_C/BE3# PCI_AD25 PCI_AD27 PCI_AD29 PCI_AD31 PCI_IRQA# PCI_IRQB# GND PEG_RX0+ PEG_RX0- TYPE0# PEG_RX1+ PCI Bus Bus Initiator Ready PCI Bus Command and Byte enables PCI Adress & Data Bus line PCI Adress & Data Bus line Ground PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Bus Command and Byte enables PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Bus Interrupt Request A PCI Bus Interrupt Request B Ground PCIe 0 Recieve + / SDVO TV clock + PCIe 0 Recieve - / SDVO TV clock - Module type ID pin 0 PCIe 1 Recieve + / SDVO B Interrupt + Type PWR IO IO IO IO IO IO IO IO IO PWR IO I-3.3 O-3.3 IO-3.3 O-3.3 I-3.3 O-3.3 I-3.3 O-3.3 PWR I-3.3 O-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 PWR IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 PWR IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 I-3.3 I-3.3 PWR I - DP I - DP STO I - DP PU/PD - PD 10k - - - - - - - - - - PU 4K7 3.3V PU 8K2 3.3V PU 8K2 3.3V PU 8K2 3.3V - - - - - - - - - - - PU 8K2 3.3V PU 8K2 3.3V PU 8K2 3.3V PU 8K2 3.3V - - - - - - - - - PU 8K2 3.3V PU 8K2 3.3V - - - Comment - - - - - - - - - - - - - - int. PU 20k in ICH9 int. PU 20k in ICH9 - int. PU 20k in ICH9 - int. PU 20k in ICH9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - both modes supported both modes supported not connected both modes supported Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 21 Page 21 Page 21 Signal Descriptions (cont’d) Row C Pin C56 C57 C58 C59 C60 C61 C62 C63 C64 C65 C66 C67 C68 C69 C70 C71 C72 C73 C74 C75 C76 C77 C78 C79 C80 C81 C82 C83 C84 C85 C86 C87 C88 C89 C90 C91 C92 C93 C94 C95 C96 C97 C98 C99 C100 C101 C102 C103 C104 C105 C106 C107 C108 C109 C110 Signal PEG_RX1- TYPE1# PEG_RX2+ PEG_RX2- GND PEG_RX3+ PEG_RX3- RSVD RSVD PEG_RX4+ PEG_RX4- RSVD PEG_RX5+ PEG_RX5- GND PEG_RX6+ PEG_RX6- SDVO_DATA PEG_RX7+ PEG_RX7- GND RSVD PEG_RX8+ PEG_RX8- GND PEG_RX9+ PEG_RX9- RSVD GND PEG_RX10+ PEG_RX10- GND PEG_RX11+ PEG_RX11- GND PEG_RX12+ PEG_RX12- GND PEG_RX13+ PEG_RX13- GND RSVD PEG_RX14+ PEG_RX14- GND PEG_RX15+ PEG_RX15- GND VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND Description PCIe 1 Recieve - / SDVO B interrupt - Module type ID pin 1 PCIe 2 Recieve + / SDVO Field stall + PCIe 2 Recieve - / SDVO Field stall - Ground PCIe 3 Recieve + PCIe 3 Recieve - Rx from Board Controller Tx from Board Controller PCIe 4 Recieve + PCIe 4 Recieve - FAN_PWM_CTRL PCIe 5 Recieve + / SDVO C Interrupt + PCIe 5 Recieve - / SDVO C interrupt - Ground PCIe 6 Recieve + PCIe 6 Recieve - SDVO_CTRLDATA PCIe 7 Recieve + PCIe 7 Recieve - Ground FAN_TACH PCIe 8 Recieve + PCIe 8 Recieve - Ground PCIe 9 Recieve + PCIe 9 Recieve - Physical Presence Ground PCIe 10 Recieve + PCIe 10 Recieve - Ground PCIe 11 Recieve + PCIe 11 Recieve – Ground PCIe 12 Recieve + PCIe 12 Recieve - Ground PCIe 13 Recieve + PCIe 13 Recieve - Ground NC PCIe 14 Recieve + PCIe 14 Recieve - Ground PCIe 15 Recieve + PCIe 15 Recieve - Ground Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Ground Type I - DP STO I - DP I - DP PWR I - DP I - DP I-3.3 O-3.3 I - DP I - DP 0-5 I - DP I - DP PWR I - DP I - DP IO-2,5 I - DP I - DP PWR I-5 I - DP I - DP PWR I - DP I - DP I-3.3 PWR I - DP I - DP PWR I - DP I - DP PWR I - DP I - DP PWR I - DP I - DP PWR NC I - DP I - DP PWR I - DP I - DP PWR PWR PWR PWR PWR PWR PWR PWR PU/PD - - - - - - - - - - - - - - - - - - - - - - - - - - - PU 10k 3.3Vsb - - - - - - - - - - - - - - - - - - - - - - - - - - - Comment both modes supported not connected both modes supported both modes supported - - - - - - - - both modes supported both modes supported - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Page 22 Express-MV User’s Manual Signal Descriptions (cont’d) Row D Pin D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 Signal GND IDE_D5 IDE_D10 IDE_D11 IDE_D12 IDE_D4 IDE_D0 IDE_REQ# IDE_IOW# IDE_ACK# GND IDE_IRQ IDE_A0 IDE_A1 IDE_A2 IDE_CS1# IDE_CS3# IDE_RESET# PCI_GNT3# PCI_REQ3# GND PCI_AD1 PCI_AD3 PCI_AD5 PCI_AD7 PCI_C/BE0# PCI_AD9 PCI_AD11 PCI_AD13 PCI_AD15 GND PCI_PAR PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME# PCI_AD16 PCI_AD18 PCI_AD20 PCI_AD22 GND PCI_AD24 PCI_AD26 PCI_AD28 PCI_AD30 PCI_IRQC# PCI_IRQD# Description Ground IDE Data Bus IDE Data Bus IDE Data Bus IDE Data Bus IDE Data Bus IDE Data Bus IDE Device DMA Request. IDE IO Write IDE DMA Acknowledge Ground IDE Interrupt Request IDE Adress Bus IDE Adress Bus IDE Adress Bus IDE Chip Select for 1F0h to 1FFh range IDE Chip Select for 3F0h to 3FFh range IDE Reset Output to Device PCI Bus Grant 3 PCI Bus Reqest 3 Ground PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Bus Command and Byte enables 0 PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line Ground PCI Bus Parity PCI Bus System Error PCI Bus Stop PCI Bus Target Ready PCI Bus Cycle Frame PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line Ground PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Adress & Data Bus line PCI Bus Interrupt Request C PCI Bus Interrupt Request D PCI_CLKRUN# PCI Clock Run PCI_M66EN# PCI_CLK GND PEG_TX0+ PEG_TX0- Control PCI Speed 33/66 Mhz PCI Clock Ground PCIe 0 Transmit + / SDVO B [RED] + PCIe 0 Transmit - / SDVO B [RED] - PEG_LANE_RV# PCIe Lane Reversal PEG_TX1+ PCIe 1 Transmit + / SDVO B [GRN] + Type PWR IO IO IO IO IO IO IO O-3.3 O-3.3 PWR I-3.3 O-3.3 O-3.3 O-3.3 O-3.3 O-3.3 O-3.3 O-3.3 I-3.3 PWR IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 PWR IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 IO-3.3 PWR IO-3.3 IO-3.3 IO-3.3 IO-3.3 I-3.3 I-3.3 I-3.3 I-3.3 O-3.3 PWR O - DP O - DP I-3.3 O - DP PU/PD - - - - - - - PD 5k6 - - - PD 10k - - - - - - - PU 8K2 3.3V - - - - - - - - - - - - PU 8K2 3.3V PU 8K2 3.3V PU 8K2 3.3V PU 8K2 3.3V - - - - - - - - - PU 8K2 3.3V PU 8K2 3.3V PU 8K2 3.3V - PD 10k - - - - - Comment - - - - - - - int. PD 11.5k in ICH9 - - - - - - - - - - int. PU 20k in ICH9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Fixed to 33 Mhz - - both modes supported both modes supported - both modes supported Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 23 Page 23 Page 23 Signal Descriptions (cont’d) Row D Pin D56 D57 D58 D59 D60 D61 D62 D63 D64 D65 D66 D67 D68 D69 D70 D71 D72 D73 D74 D75 D76 D77 D78 D79 D80 D81 D82 D83 D84 D85 D86 D87 D88 D89 D90 D91 D92 D93 D94 D95 D96 D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108 D109 D110 Signal PEG_TX1- TYPE2# PEG_TX2+ PEG_TX2- GND PEG_TX3+ PEG_TX3- RSVD RSVD PEG_TX4+ PEG_TX4- GND PEG_TX5+ PEG_TX5- GND PEG_TX6+ PEG_TX6- SDVO_CLK PEG_TX7+ PEG_TX7- GND IDE_CBLID# PEG_TX8+ PEG_TX8- GND PEG_TX9+ PEG_TX9- RSVD GND PEG_TX10+ PEG_TX10- GND PEG_TX11+ PEG_TX11- GND PEG_TX12+ PEG_TX12- GND PEG_TX13+ PEG_TX13- GND Description PCIe 1 Transmit - / SDVO B [GRN] - Module type ID pin 2 PCIe 2 Transmit + / SDVO B [BLU] + PCIe 2 Transmit - / SDVO B [BLU] - Ground PCIe 3 Transmit + / SDVO B Clock + PCIe 3 Transmit - / SDVO B Clock - DDPC_CTRLCLK DDPC_CTRLDATA PCIe 4 Transmit + / SDVO C [RED] + PCIe 4 Transmit - / SDVO C [RED] - Ground PCIe 5 Transmit + / SDVO C [GRN] + PCIe 5 Transmit - / SDVO C [GRN] - Ground PCIe 6 Transmit + / SDVO C [BLU] + PCIe 6 Transmit - / SDVO C [BLU] - SDVO_CTRLCLK PCIe 7 Transmit + / SDVO C Clock + PCIe 7 Transmit - / SDVO C Clock - Ground IDE Cable Indicator Signal PCIe 8 Transmit + PCIe 8 Transmit - Ground PCIe 9 Transmit + PCIe 9 Transmit - MCH_CFG_20 Ground PCIe 10 Transmit + PCIe 10 Transmit - Ground PCIe 11 Transmit + PCIe 11 Transmit - Ground PCIe 12 Transmit + PCIe 12 Transmit - Ground PCIe 13 Transmit + PCIe 13 Transmit - Ground PEG_ENABLE# PCIe Enable PEG_TX14+ PEG_TX14- GND PEG_TX15+ PEG_TX15- GND VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V VCC_12V GND PCIe 14 Transmit + PCIe 14 Transmit - Ground PCIe 15 Transmit + PCIe 15 Transmit - Ground Power 12V Power 12V Power 12V Power 12V Power 12V Power 12V Ground Type O - DP STO O - DP O - DP PWR O - DP O - DP IO-3,3 IO-3,3 O - DP O - DP PWR O - DP O - DP PWR O - DP O - DP IO-2,5 O - DP O - DP PWR I-3.3 O - DP O - DP PWR O - DP O - DP O-3.3 PWR O - DP O - DP PWR O - DP O - DP PWR O - DP O - DP PWR O - DP O - DP PWR I-3.3 O - DP O - DP PWR O - DP O - DP PWR PWR PWR PWR PWR PWR PWR PWR PU/PD - - - - - - - - - - - - - - - - - - - - - PD 10k - - - - - PU 4K7 3.3V - - - - - - - - - - - - - PU 43K2 3.3V - - - - - - - - - - - - - Comment both modes supported not connected both modes supported both modes supported - both modes supported both modes supported - - both modes supported both modes supported - both modes supported both modes supported - both modes supported both modes supported - both modes supported both modes supported - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Page 24 Express-MV User’s Manual Signal Descriptions (cont’d) IO-2,5 IO-3,3 IO-5 I-3,3 I-5 O-2,5 O-3,3 O-5 IO OA OD I/O - DP O - DP I - DP PWR STO PU PD NC Signal Type Legend Bi-directional 2,5 V Input/Output Bi-directional 3,3 V Input/Output Bi-directional 5 V Input/Output 3,3 V Input 5 V Input 2,5 V Output 3,3 V Output 5 V Output Input/Output Analog Output Digital Output Differential Pair Input/Output Differential Pair Output Differential Pair Input Power or Ground Strapping Output Pull Up Resistor Pull Down Resistor Not Connected / Reserved Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 25 Page 25 Page 25 6 Embedded Functions All embedded board functions on ADLINK’s Computer on Modules are supported at the operating system level using the ADLINK Intelligent Device Interface (AIDI) library. The AIDI API programming interface is compatible and identical across all ADLINK Computer on Modules and all supported operating systems. The AIDI library includes a demo program to demonstrate the library’s functionallity. 6.1 Watchdog Timer The Express-MV implements a Watchdog timer that can be used to automatically detect software execution problems or system hangs and reset the board if necessary. The Watchdog timer consists of a counter that counts down from an initial value to zero. When the system is operating normally, the software that sets the intial value periodically resets the counter so that the it never reaches zero. If the counter reaches zero before the software resets it, the system is presumed to be malfunctioning and a reset signal is asserted. The AIDI Library Watchdog functions support Watchdog control of the board. If the Watchdog begins countdown and reaches zero, it will access the CPU's RESET signal to reset the system. This application must call another function named AidiWDogTrigger that triggers the Watchdog to restart to prevent system reset. AIDI Demo Program - Watchdog Tab The AIDI Demo Program allows retrieval of the current Watchdog status and updating of the Watchdog settings If the Watchdog is enabled, the user can click the WDT Trigger button to manually reset the counter and prevent the system from resetting Page 26 Express-MV User’s Manual 6.2 GPIO GPIO library support is limited to GPIO signals that originate from the Computer on Module and extended to the carrier board. COM Express modules support 4 GPO and 4 GPI signals. Some of ADLINK’s COM Express boards can configure all 8 ports for GPI or GPO use. GPIO signals can be monitored and controlled by using the ADLINK Intelligent Device Interface (AIDI) library that is compatible and identical across all ADLINK COM Express modules and all supported operating systems. The COM Express type II standard assigns the following pins for either GPI or GPO Pin A54 A63 A67 A85 A93 B54 B57 B63 Signal Type # AIDI ID (bit) Remark GPI0 GPI1 GPI2 GPI3 GPO0 GPO1 GPO2 GPO3 0 1 2 3 4 5 6 7 Express-MV can configure this pin for GPI and GPO Express-MV can configure this pin for GPI and GPO Express-MV can configure this pin for GPI andGPO Express-MV can configure this pin for GPI andGPO Express-MV can configure this pin for GPI and GPO Express-MV can configure this pin for GPI and GPO Express-MV can configure this pin for GPI and GPO Express-MV can configure this pin for GPI and GPO AIDI Demo Program - GPIO Tab The AIDI Demo Program displays current GPI or GPO status and allows reading of GPI and writing to GPO. The table above links logical port numbers in AIDI to physical port numbers on the COM Express board-to-board connector. For boards that support multi- direction the “SetDirection” button can configure the port for either GPI or GPO Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 27 Page 27 Page 27 6.3 Hardware Monitoring To ensure system health of your embedded system ADLINK’s COM Express modules come with built in support for monitoring and control of CPU and system temperatures, fan speed and critical module voltage levels. The AIDI Library provides simple APIs at the application level to support these functions and adds alarm functions when voltage or temperature levels exceeds the upper or lower limit set by the user. On the Express-MV the following monitored values can be read from the module: CPU temperature, system temperature, Vcore, 1.8V, 5V, 3.3V and 12V. AIDI Demo Program - HW Monitor Tab Field 1 displays detected sensors (number). Field 2 allows setting of upper and lower alarm limits. Field 3 displays read out information of sensors. Page 28 Express-MV User’s Manual 7 System Resources 7.1 System Memory Map Address Range (dec.) Address Range (hex) (4GB – 3GB) C0000000 - FFFFFFFF Size 1GB (3GB – XXMB) 15MB – 16MB 960 K – 1024 K 896 K – 960 K 768 K – 896 K E0000000 - EFFFFFFF D0000000 - DFFFFFFF XXXXXXXX - BFFFFFFF F00000 - FFFFFF F0000 - FFFFF E0000 - EFFFF C0000–DFFFF 256 MB 256 MB 0/32/64/128MB 1 MB 64 KB 64 KB 128 KB 640 K – 768 K 0 K – 640 K A0000–BFFFF 00000–9FFFF 128 KB 640 KB Description High BIOS Area, APIC, ACPI, Express base, PCI memory resource, VGA DVMT needed memory, etc. (Note 1) PCI Express Base DVMT needed memory (Note 2) Internal graphics share memory (Note 3) ISA Hole System BIOS Area Extended System BIOS Area PCI expansion ROM area C0000 – CFFFF: Onboard VGA BIOS D0000 – D17FF: PXE option ROM when onboard LAN boot ROM is enabled. Video Buffer & SMM space DOS Area (1) When 4GB of memory is used, BIOS and OS will not report the full memory size. It will be reported as 3GB or less. The difference is reserved for system resources and PCI resources and not available for application use to override the stored values for system or PCI configuration. (2) This size depends on BIOS setting for DVMT use; 256MB is the default. (3) This size depends on BIOS setting for Integrated Graphics shared memory; 32MB, 64MB or 128MB could be occupied. Default in BIOS is 32MB. 7.2 Direct Memory Access Channels Channel Number Data Width System Resource 0 1 2 3 4 5 6 7 8-bits 8-bits 8-bits 8-bits 16-bits 16-bits 16-bits Parallel port Parallel port Diskette drive Parallel port Reserved - cascade channel Open Open Open Comment Note (1) Note (1) Note (1) Note (1) (1) DMA channel 0/1/3 is selected when using parallel port. DMA2 is used by Floppy. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 29 Page 29 Page 29 7.3 Legacy I/O Map Address (hex) 0020 – 0021 0022 – 002D 002E - 002F 0030 – 003F 0040 – 0043 0044 – 0047 0048 – 004B 004E – 004F 0050 – 0053 0054 – 005F 0060 0061 0062 – 0063 0064 0065 – 006F 0070 – 0077 0078 – 0080 0081 – 008F 0092 0093 – 009F 00A0 – 00A1 00A4 – 00A5 00A8 – 00A9 00AC – 00AD 00B0 – 00B1 00B2 – 00B3 00B4 – 00B5 00B8 – 00B9 00BC – 00BD 00C0 – 00DF 00E0 – 00EF 00F0 – 00FF 0170 – 0177 01F0 – 01F7 0274 – 0277 0000 – 001F 0278 – 027F 0290 – 029F 02E8 – 02EF 02F8 – 02FF 0376 – 0377 0378 – 037F 03B0 – 03BB Size 2 bytes 12 bytes 2 bytes 16 bytes 4 bytes 4 bytes 4 bytes 2 bytes 4 bytes 12 bytes 1 byte 1 byte 2 bytes 1 byte 11 bytes 8 bytes 9 bytes 18 bytes 1 bytes 13 bytes 2 bytes 2 bytes 2 bytes 2 bytes 2 bytes 2 bytes 2 bytes 2 bytes 2 bytes 32 bytes 16 bytes 16 bytes 8 bytes 8 bytes 4 bytes 32 bytes 8 bytes 16 bytes 8 bytes 8 bytes 2 bytes 8 bytes 12 bytes Description Comment Interrupt controller System reserved LPC SIO System reserved Counter/Timer System reserved Counter/Timer TPM configuration port Counter/Timer System reserved Keyboard controller speaker control System reserved Keyboard controller System reserved Real time clock controller System reserved DMA controller Reset Generator System reserved Interrupt controller Interrupt controller Interrupt controller Interrupt controller Interrupt controller Power Management Interrupt controller Interrupt controller Interrupt controller DMA controller System reserved Numeric processor Secondary IDE controller Primary IDE controller ISA PnP read port DMA controller LPT2 Onboard Sensor index(0x295)/data port (0x296) COM4/Video COM2 Secondary IDE controller LPT1 Video (monochrome) Page 30 Express-MV User’s Manual Legacy I/O Map (cont’d) Address (hex) 03BC – 03BF 03C0 – 03DF 03E8 – 03EF 03F0 – 03F5, 03F7 03F6 – 03F7 03F8 – 03FF 0400 – 041F 04D0 – 04D1 0500 – 053F 0800 – 087F 0A79 – 0A79 0CF8 – 0CFF* 0CF9** 04700 – 0470F Size 4 bytes 32 bytes 8 bytes 7 bytes 2 bytes 8 bytes 32 bytes 2 bytes 64 bytes 128 bytes 1 bytes 8 bytes 1 byte 16 bytes (*) DWORD access only (**) Byte access only Description Comment LPT3 Video (VGA†) COM3 Diskette controller Primary IDE controller COM1 Onboard SMBus control registers Edge/level triggered PIC GPIO control registers ACPI control registers. ISA PnP read data Port PCI configuration registers Reset control register TPM control registers Note (*) Note (**) Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 31 Page 31 Page 31 7.4 Interrupt Request (IRQ) Lines PIC Mode IRQ# Typical Interrupt Resource Connected Available 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Counter 0 Keyboard controller Cascade interrupt from slave PIC Serial Port 2 (COM2) / PCI Serial Port 1 (COM1) / PCI Parallel Port 2 (LPT2) / PCI Floppy Drive Controller Parallel Port 1 (LPT1) / PCI Real-time clock SCI / PCI PCI PCI PS/2 Mouse / PCI Math Processor Primary IDE controller / PCI Secondary IDE controller / PCI N/A N/A N/A IRQ3 via SERIRQ IRQ4 via SERIRQ IRQ5 via SERIRQ IRQ6 via SERIRQ IRQ7 via SERIRQ, N/A IRQ9 via SERIRQ IRQ10 via SERIRQ IRQ11 via SERIRQ IRQ12 via SERIRQ N/A IRQ14 via SERIRQ IRQ15 via SERIRQ No No No Note (1) Note (1) Note (1) No Note (1) No Note (1) Note (1) Note (1) Note (1) No Note (1) Note (1) (1) These IRQs can be used for PCI devices when onboard device is disabled. APIC Mode IRQ# Typical Interrupt Resource Connected Available 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Counter 0 Keyboard controller Cascade interrupt from slave PIC Serial Port 2 (COM2) / PC Serial Port 1 (COM1) / PCI Parallel Port 2 (LPT2) / PCI Floppy Drive Controller Parallel Port 1 (LPT1) / PCI Real-time clock SCI / PCI PCI PCI PS/2 Mouse / PCI Math Processor Primary IDE controller / PCI Secondary IDE controller / PCI N/A N/A N/A N/A IRQ3 via SERIRQ IRQ4 via SERIRQ IRQ5 via SERIRQ IRQ6 via SERIRQ IRQ7 via SERIRQ N/A IRQ9 via SERIRQ IRQ10 via SERIRQ IRQ11 via SERIRQ IRQ12 via SERIRQ N/A IRQ14 via SERIRQ IRQ15 via SERIRQ PCI Slot INT A, HDA, USB, VGA controller No No No Note (1) Note (1) Note (1) No Note (1) No Note (1) Note (1) Note (1) Note (1) No Note (1) Note (1) Yes Page 32 Express-MV User’s Manual APIC Mode (cont’d) IRQ# Typical Interrupt Resource Connected Available 17 18 19 20 21 22 23 N/A N/A N/A N/A N/A N/A N/A PCI Slot INT B PCI Slot INT C, USB, EHCI PCI Slot INT D, USB controller 82567 Ethernet USB EHCI, USB Yes Yes Yes No No No No (1) These IRQs can be used for PCI devices when onboard device is disabled. 7.5 PCI Configuration Space Map Bus No. Device No. Function No. Routing Description 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 01h 01h 01h 01h 00h 02h 02h 19h 1Ah 1Ah 1Ah 1Ah 1Bh 1Ch 1Dh 1Dh 1Dh 1Dh 1Eh 1Fh 1Fh 1Fh 1Fh 1Fh 04h 05h 06h 07h 00h 00h 01h 00h 00h 01h 02h 07h 00h 00h/01h/02h/ 03h/04h/05h 00h 01h 02h 07h 00h 00h 01h 02h 03h 05h 00h 00h 00h 00h N/A Internal Internal Internal Internal Internal Internal Internal Internal Internal Intel Gm45 GMCH Host-Hub Interface Bridge Intel Integrated Graphics Device Intel Integrated Graphics Device (Function 1) Intel integrated Gigabit Ethernet Controller Intel USB UHCI controller Intel USB UHCI controller Intel USB UHCI controller Intel UsB EHCI controller High Definition Audio controller Intel ICH Express Root port (1) Internal Internal Internal Internal N/A N/A Internal Internal Internal Internal PIRQA-PIRQD PIRQA-PIRQD PIRQA-PIRQD PIRQA-PIRQD Intel USB UHCI Controller Intel USB UHCI Controller Intel USB UHCI controller Intel USB EHCI Controller Intel Hub Interface to PCI Bridge Intel LPC Interface Bridge Intel IDE Controller Intel SATA controller Intel SMBus Controller Intel IDE controller External PCI Slot 1 External PCI Slot 2 External PCI Slot 3 External PCI Slot 4 (1) The PCI Express root controller is visible when there is a device installed in the a PCI Express slot. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 33 Page 33 Page 33 7.6 PCI Interrupt Routing Map VGA UHCI 1 UHCI 2 UHCI 3 EHCI 1 UHCI 4 UHCI 5 UHCI 6 EHCI 2 IDE SMBus X X X X X X X INT INTA INTB INTC INTD PIRQ A B C D E F G H PIRQ INT SATA Audio X INTA INTB INTC INTD X A B C D E F G H X PCI Slot 1 INTA INTB INTC INTD X X PCI PCI PCI Slot 2 Slot 3 Slot 4 INTB INTC INTD INTC INTD INTA INTD INTA INTB INTA INTB INTC LAN X 7.7 SMBus Slave Device Address Address (hex) Function 4C 5C 9C A0 A2 AC D2 CPU Temperature Sensor Hardware Monitor GPIO DDR2 Channel A DDR2 Channel B CMOS Backup Clock Generator Device LM95245 LM87 F7511RG DDR2 socket DDR2 socket — CK505 Page 34 Express-MV User’s Manual 8 BIOS Setup Utility The following chapter describes basic navigation for the AMIBIOS8 BIOS setup utility for the ADLINK Express-MV COM Express module. 8.1 Starting the BIOS To enter the setup screen, follow these steps: 1. Power on the motherboard 2. Press the < Delete > key on your keyboard when you see the following text prompt: < Press DEL or Delete to run Setup > 3. After you press the < Delete > key, the main BIOS setup menu displays. You can access the other setup screens from the main BIOS setup menu, such as Chipset and Power menus. In most cases, the < Delete > key is used to invoke the setup screen. There are several cases that use other keys, such as < F1 >, < F2 >, and so on. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 35 Page 35 Page 35 8.1.1 Main Setup Menu The main BIOS setup menu is the first screen that you can navigate. Each main BIOS setup menu option is described in this user’s guide. The Main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. “Grayed” options cannot be configured, “Blue” options can be. The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it. Page 36 Express-MV User’s Manual 8.1.2 Navigation The BIOS setup/utility uses a key-based navigation system called hot keys. Most of the BIOS setup utility hot keys can be used at any time during the setup navigation process. These keys include < F1 >, < F10 >, < Enter >, < ESC >, < Arrow > keys, and so on. There is a hot key legend located in the right frame on most setup screens. Hot Key Description Left/Right The Left and Right < Arrow > keys allow you to select a setup screen. For example: Main screen, Advanced screen, Chipset screen, and so on. Up/Down The Up and Down < Arrow > keys allow you to select a setup item or sub-screen. +- Plus/Minus The Plus and Minus < Arrow > keys allow you to change the field value of a particular setup item. For example: Date and Time. The < Tab > key allows you to select setup fields. Tab The < F8 > key on your keyboard is the Fail-Safe key. It is not displayed on the key legend by default. To set the Fail-Safe settings of the BIOS, press the < F8 > key on your keyboard. It is located on the upper row of a standard 101 keyboard. The Fail-Safe settings allow the motherboard to boot up with the least amount of options set. This can lessen the probability of conflicting settings. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 37 Page 37 Page 37 Hot Key Description F1 The < F1 > key allows you to display the General Help screen. Press the < F1 > key to open the General Help screen. F10 The < F10 > key allows you to save any changes you have made and exit Setup. Press the < F10 > key to save your changes. The following screen will appear: ESC Press the < Enter > key to save the configuration and exit. You can also use the < Arrow > key to select Cancel and then press the < Enter > key to abort this function and return to the previous screen. The < Esc > key allows you to discard any changes you have made and exit the Setup. Press the < Esc > key to exit the setup without saving your changes. The following screen will appear: Press the < Enter > key to discard changes and exit. You can also use the < Arrow > key to select Cancel and then press the < Enter > key to abort this function and return to the previous screen. Enter The < Enter > key allows you to display or change the setup option listed for a particular setup item. The < Enter > key can also allow you to display the setup sub-screens. Page 38 Express-MV User’s Manual 8.2 Main Setup When you first enter the Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab. There are two Main Setup options. They are described in this section. The Main BIOS Setup screen is shown below. 8.2.1 System Time/System Date Use this option to change the system time and date. Highlight System Time or System Date using the < Arrow > keys. Enter new values using the keyboard. Press the < Tab > key or the < Arrow > keys to move between fields. The date must be entered in MM/DD/YY format. The time is entered in HH:MM:SS format. The time is in 24-hour format. For example, 5:30 A.M. appears as 05:30:00, and 5:30 P.M. as 17:30:00. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 39 Page 39 Page 39 8.2.2 System & Board Info The Main BIOS setup screen reports processor, memory and board information. BIOS Rev. Displays the current BIOS revision. BC Firmware Rev. Displays the current firmware revision of board controller (BC). Manufacture Date Displays the date which the board was manufactured. Last Repair Date Displays the date on which the board was last repaired. Serial Number Displays the serial number of board. Hardware Rev. The hardware revision is in XXXXX-YYYY-ZZZZ format. XXXXX represents the ADLINK internal P/N for this board. YYYY is the board PCB version and ZZZZ represents a special configuration of the board. LAN MAC ID Displays the MAC address of onboard Ethernet controller. Boot Counter Displays the number of times the board has been booted-up since production (max. 16777215). Running Time Displays the total time the board has been in operation since production. The units are in hours and the maximum value is 65535. Page 40 Express-MV User’s Manual 8.3 Advanced BIOS Setup Select the Advanced tab from the setup screen to enter the Advanced BIOS Setup screen. You can select any of the items in the left frame of the screen, such as SuperIO Configuration, to go to the sub menu for that item. You can display an Advanced BIOS Setup option by highlighting it using the < Arrow > keys. The Advanced BIOS Setup screen is shown below. The sub menus are described on the following pages. Setting incorrect or conflicting values in Advanced BIOS Setup may cause system malfunctions. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 41 Page 41 Page 41 8.3.1 CPU Configuration CPU Configuration Settings You can use this screen to select options for the CPU Configuration Settings. Use the up and down < Arrow > keys to select an item. Use the < + > and < - > keys to change the value of the selected option. A description of the selected item appears on the right side of the screen. The settings are described on the following pages. An example of the CPU Configuration screen is shown below. Hardware Prefetcher This feature is used for reducing the waiting time of DRAM. The hardware prefetcher looks for streams of data and tries to predict what data will be needed next by the processor and proactively tries to fetch these data. Adjacent Cache Line Prefetch This feature is used to enable optimal use of sequential memory access for performance purposes. Disable this setting for applications requiring high use of random memory access. Max CPUID Value Limit When the computer is boots, the operating system executes its CPUID instruction to identify the processor and its capabilities. Before it can do so, it must first query the processor to find out the highest input value the CPUID recognizes. This determines the kind of basic Page 42 Express-MV User’s Manual information CPUID can provide the operating system. This option allows you to circumvent problems with older operating systems. When Enabled, the processor will limit the maximum CPUID input value to 03h when queried, even if the processor supports a higher CPUID input value. When Disabled, the processor will return the actual maximum CPUID input value of the processor when queried. Intel Virtualization Tech. Intel Virtualization Technology consists of components that support virtualization of platforms based on Intel processors, thereby enabling the running of multiple operating systems and applications in independent partitions. Each partition behaves like a virtual machine (VM) and provides isolation and protection across partitions. Intel VT requires the use of a processor with Intel VT support. Additionally, a third-party VMM may also be required. Execute Disable Bit This is an Intel hardware-based security feature that can help reduce system exposure to viruses and malicious code. It allows the processor to classify areas in memory where application code can or cannot execute. When a malicious worm attempts to insert code in the buffer, the processor disables its code execution, preventing damage and worm propagation. To use Execute Disable Bit you must have a PC or server with a processor with Execute Disable Bit capability and a supporting operating system. Core Multi-Processing This item is visible depending on the CPU being used on the board. Multi-core capability of the CPU is enabled/disabled by this setting if the CPU supports this feature. Intel SpeedStep Tech. This option enables or disables Intel SpeedStep Technology. Intel C-STATE Tech. Intel C-STATE Technology is responsible for activating the processor’s own power consumption management. It allows the CPU to save more power under idle mode. Enhanced C-States Enhanced C-states are available on newest mobile processors. When this option is enabled, the CPU is automatically put into the lowest frequency/voltage mode when it enters a given C-state. MPS Revision It specifies the version of the Multi-Processor Specification (MPS) that the CPU board will use. 1.4 is the suggestion. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 43 Page 43 Page 43 8.3.2 Chipset Configuration Chipset Configuration Settings Memory Hole This option selects whether or not to open a memory hole. The memory hole will be located at 15MB-16MB of system memory. Max TOLUD Sets the maximum top of low usable DRAM. Gfx Low Power Mode This option is applicable for SFF only to enable low power mode. PEG Port Set this option to [Auto] to enable auto negotiation with a PEG device, [Enabled] to open the PEG port, or [Disabled] to disable the PEG port. Page 44 Express-MV User’s Manual 8.3.3 Video Function Configuration Video Function Configuration Settings You can use this screen to select options for Video Function configuration settings. The video function BIOS Setup screen is shown below. Boots Graphic Adapter Priority Select which graphics controller to use as the primary boot display device. IGD = Integrated Graphic device. PEG/PCI = external PCI/Express graphic device. Internal Graphics Mode Select Select the amount of system memory which is used by internal graphics device. DVMT Mode Select Unified Memory Architecture (UMA) is a concept whereby system memory is shared by both CPU and graphics processor. While this reduces cost, it also reduces the system's performance by taking up a large portion of memory for the graphics processor. Intel's Dynamic Video Memory Technology (DVMT) takes that concept further by allowing the system to dynamically allocate memory resources according to the demands of the system at any point in time. The key idea in DVMT is to improve the efficiency of the memory allocated to either system or graphics processor. When set to Fixed Mode, the graphics driver will reserve a fixed portion of the system memory as graphics memory. When set to DVMT Mode, the graphics chip will dynamically allocate system memory as graphics memory, according to system and graphics Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 45 Page 45 Page 45 requirements. When set to Combo Mode, the graphics driver will allocate a fixed amount of memory as dedicated graphics memory, as well as allow more system memory to be dynamically allocated between the graphics processor and the operating system. DVMT/FIXED Memory Sets the amount of memory according to DVMT Mode Select. PAVP Mode PAVP (Protected Audio Video Path) is a feature to ensure a robust and secure content protection path for high-definition video playback including Blu-ray discs on the Microsoft Windows Vista operating system. It can reduce processor utilization by off-loading the video decode onto the chipset to free up the processor to perform other tasks. Select Lite mode if want to use the PAVP feature. Boot Display Device Selects the display interface you want to make active on boot-up. Flat Panel Type When LVDS is selected from Boot Display Device, this option allows you to select resolution settings for correct timing to the LVDS interface you want to use. The supported resolutions are: 640x480 18-bit 1Ch, 800x600 18-bit 1Ch, 1024x768 18-bit 1Ch, 1024x768 24-bit 1Ch, 1280x800 24-bit 1Ch, 1280x1024 18-bit 2Ch, 1280x1024 24-bit 2Ch, 1400x1050 18-bit 2Ch, 1400x1050 24-bit 2Ch, 1600x1200 18-bit 2Ch, 1600x1200 24-bit 2Ch, 1680x1050 18-bit 2Ch, 1680x1050 24-bit 2Ch, 1920x1200 18-bit 2Ch, 1920x1200 24-bit 2Ch, 2048x1536 24-bit 2Ch. Boot Display Device Selects the display interface you want to make active on boot-up. TV Standard Selects the TV standard. TV Sub-Type Selects sub-type of the TV standard. Spread Spectrum Clock This option enables/disables the spread spectrum of Gfx. HDCP Support Enables/Disables High-bandwidth Digital Content Protection (HDCP) support. Page 46 Express-MV User’s Manual 8.3.4 IDE Configuration IDE Configuration Settings You can use this screen to select options for the IDE Configuration Settings. An example of the IDE Configuration screen is shown below. SATA#1 Configuration This item specifies whether SATA Channel 1 is initialized in Compatible or Enhanced mode of operation. The settings are Disabled, Compatible and Enhanced. Configure SATA#1 as When running in Compatible/Enhanced mode, the SATA Channel 1 can be configured as a legacy IDE channel, RAID (RAID0, RAID1 only), and AHCI mode. SATA#2 Configuration This item specifies whether the SATA Channel 2 is initialized in Enhanced mode of operation. Primary IDE Master/Slave, Secondary IDE Master/Slave Select one of the hard disk drives to configure it. Press < Enter > to access its sub menu. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 47 Page 47 Page 47 Hot Plug This option enables/disables the AHCI hotswap function (only visible when Configure SATA#1 as is set to AHCI). IDE Device Use Set this option to determine if IDE devices are used. Page 48 Express-MV User’s Manual 8.3.5 Onboard Device Configuration Onboard Device Configuration Settings You can use this screen to specify options for the Onboard Device Configuration settings. The screen is shown below. GbE Controller Set this value to Enable/Disable the onboard GbE controller. GbE LAN Boot Set this value to Enable/Disable the PXE function of the onboard GbE controller. GbE Wake Up From S5 Set this value to Enable/Disable the GbE wake up system from S5 power mode. HDA Controller Set this value to Enable/Disable the onboard HDA Controller. SMBusController Set this value to Enable/Disable the SMBus controller. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 49 Page 49 Page 49 SuperIO Configuration Screen SuperIO configuration screen is a sub-menu of Onboard Device Configuration. You can use this screen to select options for the Super IO settings. Use the up and down < Arrow > keys to select an item. Use the < + > and < - > keys to change the value of the selected option. The settings are described on the following pages. The screen is shown below. The visibility of this SuperIO configuration screen depends on the presence of an onboard SuperIO (Winbond W83627HF). If the Express-MV is used on a carrier w/o a SIO chip, the legacy-free mode will take effect. OnBoard Floppy Controller This option enables/disables the Super IO’s floppy controller. Floppy Drive Swap This option allows you to determine whether or not to enable Floppy Drive Swap function. Enabling it will swap floppy drive assignments so that Drive A becomes Drive B, and Drive B becomes Drive A. Page 50 Express-MV User’s Manual Serial Port1 Address This option specifies the base I/O port address and Interrupt Request address of serial port 1. Option Description Disabled 3F8/IRQ4 3E8/IRQ4 2F8/IRQ3 2E8/IRQ3 Set this value to prevent the serial port from accessing any system resources. When this option is set to Disabled, the serial port physically becomes unavailable. Set this value to allow the serial port to use 3F8 as its I/O port address and IRQ 4 for the interrupt address. Set this value to allow the serial port to use 3E8 as its I/O port address and IRQ 4 for the interrupt address. Set this value to allow the serial port to use 2F8 as its I/O port address and IRQ 3 for the interrupt address. Set this value to allow the serial port to use 2E8 as its I/O port address and IRQ 3 for the interrupt address. Serial Port2 Address This option specifies the base I/O port address and Interrupt Request address of Serial Port2. The settings of Serial Port2 are the same as Serial Port1. However, the setting used by Serial Port1 will not be available for Serial Port2. For example, if Serial Port1 uses 3F8/IRQ4, the option, the 3F8/IRQ4 will not appear in the options of Serial Port2. Serial Port2 Mode This option allows the BIOS to select a mode for Serial Port2. The settings are Normal, IrDA, and ASK IR. Parallel Port Address This option lets to configure the SuperIO’s parallel port address. Parallel Port Mode This option specifies the parallel port mode. Option Normal EPP ECP Description Set this value to allow the standard parallel port mode to be used. The parallel port can be used with devices that adhere to the Enhanced Parallel Port (EPP) specification. EPP uses the existing parallel port signals to provide asymmetric bidirectional data transfer driven by the host device. The parallel port can be used with devices that adhere to the Extended Capabilities Port (ECP) specification. ECP uses the DMA protocol to achieve data transfer rates up to 2.5 Megabits per second. ECP provides symmetric Bidirectional communication. EPP+ECP Allows the parallel port to support both the ECP and EPP modes simultaneously. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 51 Page 51 Page 51 Parallel Port IRQ This option specifies the IRQ used by the parallel port. Option Description IRQ5 IRQ7 Set this value to allow the serial port to use Interrupt 5. Set this value to allow the serial port to use Interrupt 7. The majority of parallel ports on computer systems use IRQ7 and I/O Port 378H as the standard setting. Floppy Drive A/B: Move the cursor to these fields via up and down < arrow > keys. Select the floppy type. The Optimal and Fail-Safe settings for floppy drive A: is 1.44 MB 3½”. Option Disabled Description Set this value to prevent the use of the selected floppy disk drive channel. This option should be set if no floppy disk drive is installed on the specified channel. 360 KB 5 ¼” Set this value if the floppy disk drive attached to the corresponding channel is a 360 KB 5¼” floppy disk drive. 1.2 MB 5 ¼” Set this value if the floppy disk drive attached to the corresponding channel is a 1.2 MB 5¼” floppy disk drive. 720 KB 3 ½” Set this value if the floppy disk drive attached to the corresponding channel is a 720 KB 3½” floppy disk drive. 1.44 MB 3 ½” Set this value if the floppy disk drive attached to the corresponding channel is a 1.44 MB 3½” floppy disk drive. This is the default setting for Floppy Drive A. 2.88 MB 3 ½” Set this value if the floppy disk drive attached to the corresponding channel is a 2.88 MB 3½” floppy disk drive. Hardware Health Configuration The hardware health on SuperIO only supports FAN speed monitoring. Page 52 Express-MV User’s Manual 8.3.6 USB Configuration USB Configuration Settings You can use this screen to specify options for the USB configuration Settings. Use the up and down < Arrow > keys to select an item. Use the < + > and < - > keys to change the value of the selected option. The settings are described on the following pages. The screen is shown below. USB Function Set this value to allow the system to Disable, Enable, and select a set number of onboard USB ports. USB 2.0 Controller This option depends on the setting of USB Function above. If USB Function is set to Disabled, this option will have no effect. Enabled will open USB 2.0 functionality to all USB ports. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 53 Page 53 Page 53 Legacy USB Support Legacy USB Support refers to USB mouse and keyboard support. Normally if this option is not enabled, any attached USB mouse or keyboard will not become available until a USB compatible operating system is fully booted with all USB drivers loaded. When this option is enabled, any attached USB mouse or keyboard can control the system even when there is no USB driver loaded on the system. Set this value to enable or disable the Legacy USB Support (see below). Option Description Disabled Set this value to prevent the use of any USB device in DOS or during system boot. Enabled Set this value to allow the use of USB devices during boot and while using DOS. Auto This option auto detects USB Keyboards or Mice and if found, allows them to be utilized during boot and while using DOS. Port 64/60 Emulation It uses USB to receive the IO port 64/60 trap to emulate the legacy keyboard controller. USB 2.0 Controller Mode The USB 2.0 Controller Mode configures the data rate of the USB port. The options are FullSpeed (12 Mbps) and HiSpeed (480 Mbps). BIOS EHCI hand-off This option provides a work around for OSes without ECHI hand-off support. The EHCI ownership change should be claimed by the EHCI driver. USB Mass Storage Device Configuration This is a submenu for configuring the USB Mass Storage Class Devices when BIOS finds they are in use on the USB ports. Emulation Type can be set according to the type of attached USB mass storage device(s). If set to Auto, USB devices less than 530MB will be emulated as Floppy and those greater than 530MB will remain as hard drive. The Forced FDD option can be used to force a hard disk type drive (such as a Zip drive) to boot as FDD. Page 54 Express-MV User’s Manual 8.3.7 PCIPnP Configuration PCIPnP Configuration Settings You can display a Plug and Play BIOS Setup option by highlighting it using the < Arrow > keys to select an item. The Plug and Play BIOS Setup screen is shown below. PCI Latency Timer Set this value to allow the PCI Latency Timer to be adjusted. This option sets the latency of all PCI devices on the PCI bus. Palette Snooping Set this value to allow the system to modify the Palette Snooping settings. Disabled - should not be changed unless the VGA card manufacturer requires Palette Snooping to be Enabled. Enabled - This setting informs the PCI devices that an ISA based Graphics device is installed in the system. It does this so the ISA based Graphics card will function correctly. This does not necessarily indicate a physical ISA adapter card. The graphics chipset can be mounted on a PCI card. Always check with your adapter card's manuals first, before modifying the setting in the BIOS. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 55 Page 55 Page 55 IRQ Set this value to allow the IRQ settings to be modified. Available - This setting allows the specified IRQ to be used by a PCI/PnP device. Reserved - This setting allows the specified IRQ to be used by a legacy ISA device. 8.3.8 Remote Access Configuration Remote Access (Console Redirection) Remote Access (or Console Redirection) allows you to control a system from a remote location by re-directing keyboard input and text output through the serial port.. This screen will not be visible if the module is used on a carrier board w/o a SuperIO chip, due to lack of serial port support. Page 56 Express-MV User’s Manual Remote Access Select this option to Enable or Disable the BIOS remote access feature here. Enabling Remote Access requires a dedicated serial port connection. Once both serial ports are configured to disabled, you should set this value to Disabled or it may cause an abnormal boot. Serial Port Number Select the serial port you want to use for the remote access interface. You can set the value for this option to either COM1 or COM2. If you have changed the resource assignment of the serial ports in Advanced>Onboard Device Configuration>SuperIO Configuration, you must Save Changes and Exit, reboot the system, and enter the setup menu again in order to see those changes reflected in the available Remote Access options. Serial Port Mode Select the baud rate you want the serial port to use for console redirection. The options are 115200 8,n,1; 57600 8,n,1; 19200 8,n,1; and 09600 8,n,1. Flow Control Set this option to select Flow Control for console redirection. The settings for this value are None, Hardware, or Software. Redirection After BIOS POST This option allows you to set Redirection configuration after BIOS POST. The settings for this value are Disabled, Boot Loader, or Always. Option Description Set this value to turn off the redirection after POST Disabled Boot Loader Set this value to allow the redirection to be active during POST and Boot Loader. Always Set this value to allow the redirection to be always active. Terminal Type This option is used to select either VT100/VT-UTF8 or ANSI terminal type. The settings for this value are ANSI, VT100, or VT-UTF8. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 57 Page 57 Page 57 VT-UTF8 Combo Key Support This option enables VT-UTF8 Combination Key Support for ANSI/VT100 terminals. The settings for this value are Enabled or Disabled. Sredir Memory Display Delay This option gives the delay in seconds to display memory information. The options for this value are No Delay, Delay 1 Sec, Delay 2 Sec, or Delay 4 Sec. 8.3.9 Trusted Computing Trusted Computing is an industry standard to make personal computers more secure through a dedicated hardware chip, called a Trusted Platform Module (TPM). This option allows you to enable or disable the TPM support. Page 58 Express-MV User’s Manual 8.4 Power Management Select the Power tab from the setup screen to enter the power management BIOS Setup screen. You can select any of the items in the left frame of the screen, such as ACPI Configuration, to go to the sub menu for that item. The power management BIOS Setup screen is shown below. 8.4.1 ACPI Configuration Advanced ACPI Configuration You can use this screen to select options for the ACPI Advanced Configuration Settings. Use the up and down < Arrow > keys to select an item. Use the < + > and < - > keys to change the value of the selected option. A description of the selected item appears on the right side of the screen. The settings are described on this page. The screen is shown below. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 59 Page 59 Page 59 Suspend Mode This setting selects either S1 (POS) or S3 (STR) system suspend mode. Option Description S1 (POS) Power On Suspend - Under this setting the CPU is not executing instructions, all power resources that supply system level reference of S0 are off, system memory context is maintained, devices that reference power resources that are on are on, and devices that can wake-up the system can cause the cpu to continue to execute from where it left off. S3 (STR) Suspend to RAM - Under this setting the system enters a low power state instead of being completely shut off. This allows the computer system to boot up in a few seconds. ACPI APIC Support This setting allows you to enable or disable ACPI APIC support. The ACPI APIC table pointer is included in the RSDT pointer list. Restore on AC Power Loss Determines what state the computer enters when AC power is restored after a power loss. The options for this value are Last State, Power On and Power Off. Option Description Set this value to always power off the system while AC power is restored. Power Off Power On Set this value to always power on the system while AC power is restored. Last State Set this value to power off/on the system depending on the last system power state while AC power is restored. Page 60 Express-MV User’s Manual 8.4.2 Hardware Health Configuration Throttle Temperature This setting allow user select the CPU throttling temperature or disable the CPU throttling function. Throttle Duty This option selects the CPU throttle duty cycle. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 61 Page 61 Page 61 8.5 Boot Setup Select the Boot tab from the setup screen to enter the Boot BIOS Setup screen. You can select any of the items in the left frame of the screen, such as Boot Device Priority, to go to the sub menu for that item. You can display an Boot BIOS Setup option by highlighting it using the < Arrow > keys. The Boot Settings screen is shown below: Boot Settings Configuration Use this screen to select options for the Boot Settings Configuration. Use the up and down keys to select an item. Use the and keys to change the value of the selected option. The settings are described on the following pages. The screen is shown below. Page 62 Express-MV User’s Manual Quick Boot Disabled - Set this value to allow the BIOS to perform all POST tests. Enabled - Set this value to allow the BIOS to skip certain POST tests to boot faster. Quiet Boot Disabled - Set this value to allow the computer system to display the POST messages. Enabled - Set this value to allow the computer system to display the OEM logo. Bootup Num-Lock Set this value to allow the Number Lock setting to be modified during boot up. Off - This option does not enable the keyboard Number Lock automatically. To use the 10-keys on the keyboard, press the Number Lock key located on the upper left-hand corner of the 10-key pad. The Number Lock LED on the keyboard will light up when the Number Lock is engaged. On - Set this value to allow the Number Lock on the keyboard to be enabled automatically when the computer system is boot up. This allows the immediate use of 10-keys numeric keypad located on the right side of the keyboard. To confirm this, the Number Lock LED light on the keyboard will be lit. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 63 Page 63 Page 63 Boot Device Priority Set the boot device options to determine the sequence in which the computer checks which device to boot from. Boot Device Groups The Boot devices are listed in groups by device type. First press to enter the sub-menu. Then you may use the arrow keys to select the desired device, then press <+>, <-> or , key to move it up/down in the priority list. For example, USB storage disks will be listed as “USB Drives” in the sub-menu as below. Only the first device in each device group will be available for selection in the Boot Device Priority option. Page 64 Express-MV User’s Manual 8.6 Security Setup 8.6.1 Password Support Two Levels of Password Protection Provides both a Supervisor and a User password. If you use both passwords, the Supervisor password must be set first. The system can be configured so that all users must enter a password every time the system boots or when Setup is executed, using either or either the Supervisor password or User password. The Supervisor and User passwords activate two different levels of password security. If you select password support, you are prompted for a one to six character password. Type the password on the keyboard. The password does not appear on the screen when typed. Make sure you write it down. If you forget it, you must drain NVRAM and re-configure. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 65 Page 65 Page 65 Remember the Password Keep a record of the new password when the password is changed. If you forget the password, you must erase the system configuration information in NVRAM. Select Security Setup from the Setup main BIOS setup menu. Security Setup options, such as password protection and virus protection, are described in this section. To access the sub menu for the following items, select the item and press < Enter >:o Change Supervisor Password - Change User Password - Clear User Password Supervisor Password Indicates whether a supervisor password has been set. User Password Indicates whether a user password has been set. Change Supervisor Password Select this option and press < Enter > to access the sub menu. You can use the sub menu to change the supervisor password. Change User Password Select this option and press < Enter > to access the sub menu. You can use the sub menu to change the user password. Clear User Password Select this option and press < Enter > to access the sub menu. You can use the sub menu to clear the user password. 8.6.2 Change Supervisor Password Select Change Supervisor Password from the Security Setup menu and press < Enter >. Enter New Password: Type the password and press < Enter >. The screen does not display the characters entered. Retype the password as prompted and press < Enter >. If the password confirmation is incorrect, an error message appears. The password is stored in NVRAM after setup completes. Page 66 Express-MV User’s Manual 8.6.3 Change User Password Select Change User Password from the Security Setup menu and press < Enter >. Enter New Password: Type the password and press < Enter >. The screen does not display the characters entered. Retype the password as prompted and press < Enter >. If the password confirmation is incorrect, an error message appears. The password is stored in NVRAM after setup completes. 8.6.4 Clear User Password Select Clear User Password from the Security Setup menu and press < Enter >. Clear New Password [Ok] [Cancel] Type the password and press < Enter >. The screen does not display the characters entered. Retype the password as prompted and press < Enter >. If the password confirmation is incorrect, an error message appears. The password is stored in NVRAM after setup completes. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 67 Page 67 Page 67 8.7 Exit Menu Select the Exit tab from the setup screen to enter the Exit BIOS Setup screen. You can display an Exit BIOS Setup option by highlighting it using the < Arrow > keys. The Exit BIOS Setup screen is shown below. Save Changes and Exit When you have completed the system configuration changes, select this option to leave Setup and reboot the computer so the new system configuration parameters can take effect. Select Exit Saving Changes from the Exit menu and press < Enter >. Save Configuration Changes and Exit Now? [Ok] [Cancel] appears in the window. Select Ok to save changes and exit. Discard Changes and Exit Select this option to quit Setup without making any permanent changes to the system configuration. Select Exit Discarding Changes from the Exit menu and press . Discard Changes and Exit Setup Now? [Ok] [Cancel] appears in the window. Select Ok to discard changes and exit. Page 68 Express-MV User’s Manual Discard Changes Select Discard Changes from the Exit menu and press < Enter >. Select Ok to discard changes. Load Optimal Defaults Automatically sets all Setup options to a complete set of default settings when you Select this option. The Optimal settings are designed for maximum system performance, but may not work best for all computer applications. In particular, do not use the Optimal Setup options if your computer is experiencing system configuration problems. Select Load Optimal Defaults from the Exit menu and press < Enter >. Select Ok to load optimal defaults. Load Failsafe Defaults Automatically sets all Setup options to a complete set of default settings when you Select this option. The Failsafe settings are designed for maximum system stability, but not maximum performance. Select the Fail-Safe Setup options if your computer is experiencing system configuration problems. Select Load Fail-Safe Defaults from the Exit menu and press < Enter >. Load Fail-Safe Defaults? [Ok] [Cancel] appears in the window. Select Ok to load Fail-Safe defaults. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 69 Page 69 Page 69 9 BIOS Checkpoints, Beep Codes This section of this document lists checkpoints and beep codes generated by AMIBIOS. The checkpoints defined in this document are inherent to the AMIBIOS generic core, and do not include any chipset or board specific checkpoint definitions. Checkpoints and Beep Codes Definition A checkpoint is either a byte or word value output to I/O port 80h. The BIOS outputs checkpoints throughout bootblock and Power-On Self Test (POST) to indicate the task the system is currently executing. Checkpoints are very useful for debugging problems that occur during the preboot process. Beep codes are used by the BIOS to indicate a serious or fatal error. They are used when an error occurs before the system video has been initialized, and generated by the system board speaker. Viewing BIOS Checkpoints Viewing all checkpoints generated by the BIOS requires a checkpoint card, also referred to as a “POST Card” or “POST Diagnostic Card”. These are ISA or PCI add-in cards that show the value of I/O port 80h on a LED display. Some computers display checkpoints in the bottom right corner of the screen during POST. This display method is limited, since it only displays checkpoints that occur after the video card has been activated. Keep in mind that not all computers using AMIBIOS enable this feature. In most cases, a checkpoint card is the best tool for viewing AMIBIOS checkpoints. Page 70 Express-MV User’s Manual 9.1 Bootblock Initialization Code Checkpoints The Bootblock initialization code sets up the chipset, memory and other components before system memory is available. The following table describes the type of checkpoints that may occur during the bootblock initialization portion of the BIOS: Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs from add-in PCI devices. Checkpoint Description Before D0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DC E1-E8, EC-EE If boot block debugger is enabled, CPU cache-as-RAM functionality is enabled at this point. Stack will be enabled from this point. Early Boot Strap Processor (BSP) initialization like microcode update, frequency and other CPU critical initialization. Early chipset initialization is done. Early super I/O initialization is done including RTC and keyboard controller. Serial port is enabled at this point if needed for debugging. NMI is disabled. Perform keyboard controller BAT test. Save power-on CPUID value in scratch CMOS. Go to flat mode with 4GB limit and GA20 enabled. Verify the boot block checksum. System will hang here if checksum is bad. Disable CACHE before memory detection. Execute full memory sizing module. If memory sizing module not executed, start memory refresh and do memory sizing in Boot block code. Do additional chipset initialization. Re-enable CACHE. Verify that flat mode is enabled. Test base 512KB memory. Adjust policies and cache first 8MB. Set stack. Bootblock code is copied from ROM to lower system memory and control is given to it. BIOS now executes out of RAM. Copies compressed boot block code to memory in right segments. Copies BIOS from ROM to RAM for faster access. Performs main BIOS checksum and updates recovery status accordingly. Both key sequence and OEM specific method is checked to determine if BIOS recovery is forced. If BIOS recovery is necessary, control flows to checkpoint E0. See Bootblock Recovery Code Checkpoints section of document for more information. Restore CPUID value back into register. The Bootblock-Runtime interface module is moved to system memory and control is given to it. Determine whether to execute serial flash. The Runtime module is uncompressed into memory. CPUID information is stored in memory. Store the Uncompressed pointer for future use in PMM. Copying Main BIOS into memory. Leaves all RAM below 1MB Read-Write including E000 and F000 shadow areas but closing SMRAM. Restore CPUID value back into register. Give control to BIOS POST (ExecutePOSTKernel). See POST Code Checkpoints section of document for more information. System is waking from ACPI S3 state OEM memory detection/configuration error. This range is reserved for chipset vendors & system manufacturers. The error associated with this value may be different from one platform to the next. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 71 Page 71 Page 71 9.2 Bootblock Recovery Code Checkpoints The Bootblock recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is corrupt. The following table describes the type of checkpoints that may occur during the Bootblock recovery portion of the BIOS: Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs From add-in PCI devices. Checkpoint Description E0 E9 EA EB EF F0 F1 F2 F3 F5 FA FB F4 FC FD FF Initialize the floppy controller in the super I/O. Some interrupt vectors are initialized. DMA controller is initialized. 8259 interrupt controller is initialized. L1 cache is enabled. Set up floppy controller and data. Attempt to read from floppy. Enable ATAPI hardware. Attempt to read from ARMD and ATAPI CDROM. Disable ATAPI hardware. Jump back to checkpoint E9. Read error occurred on media. Jump back to checkpoint EB. Search for pre-defined recovery file name in root directory. Recovery file not found. Start reading FAT table and analyze FAT to find the clusters occupied by the recovery file. Start reading the recovery file cluster by cluster. Disable L1 cache. Check the validity of the recovery file configuration to the current configuration of the flash part. Make flash write enabled through chipset and OEM specific method. Detect proper flash part. Verify that the found flash part size equals the recovery file size. The recovery file size does not equal the found flash part size. Erase the flash part. Program the flash part. The flash has been updated successfully. Make flash write disabled. Disable ATAPI hardware. Restore CPUID value back into register. Give control to F000 ROM at F000:FFF0h. Page 72 Express-MV User’s Manual 9.3 POST Code Checkpoints The POST code checkpoints are the largest set of checkpoints during the BIOS preboot process. The following table describes the type of checkpoints that may occur during the POST portion of the BIOS: Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs From add-in PCI devices. Checkpoint Description 03 04 05 06 07 08 C0 C1 C2 C5 C6 C7 0A 0B 0C 0E 13 20 24 2A 2C 2E Disable NMI, Parity, video for EGA, and DMA controllers. Initialize BIOS, POST, Runtime data area. Also initialize BIOS modules on POST entry and GPNV area. Initialized CMOS as mentioned in the Kernel Variable "wCMOSFlags." Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is OK. Verify CMOS checksum manually by reading storage area. If the CMOS checksum is bad, update CMOS with power-on default values and clear passwords. Initialize status register A. Initializes data variables that are based on CMOS setup questions. Initializes both the 8259 compatible PICs in the system Initializes the interrupt controlling hardware (generally PIC) and interrupt vector table. Do R/W test to CH-2 count reg. Initialize CH-0 as system timer.Install the POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt. Traps INT1Ch vector to "POSTINT1ChHandlerBlock." Fixes CPU POST interface calling pointer. Initializes the CPU. The BAT test is being done on KBC. Program the keyboard controller command byte is being done after Auto detection of KB/MS using AMI KB-5. Early CPU Init Start -- Disable Cache – Init Local APIC Set up boot strap processor Information Set up boot strap processor for POST Enumerate and set up application processors Re-enable cache for boot strap processor Early CPU Init Exit Initializes the 8042 compatible Key Board Controller. Detects the presence of PS/2 mouse. Detects the presence of Keyboard in KBC port. Testing and initialization of different Input Devices. Also, update the Kernel Variables. Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Uncompress all available language, BIOS logo, and Silent logo modules. Early POST initialization of chipset registers. Relocate System Management Interrupt vector for all CPU in the system. Uncompress and initialize any platform specific BIOS modules. GPNV is initialized at this checkpoint. Initializes different devices through DIM. See DIM Code Checkpoints section of document for more information. Initializes different devices. Detects and initializes the video adapter installed in the system that have optional ROMs. Initializes all the output devices. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 73 Page 73 Page 73 POST Code Checkpoints cont’d: Checkpoint Description 31 33 37 38 39 3A 3B 3C 40 52 60 75 78 7C 84 85 87 8C 8D 8E 90 A1 A2 A4 A7 A9 AA AB AC B1 00 Allocate memory for ADM module and uncompress it. Give control to ADM module for initialization. Initialize language and font modules for ADM. Activate ADM module. Initializes the silent boot module. Set the window for displaying text information. Displaying sign-on message, CPU information, setup key message, and any OEM specific information. Initializes different devices through DIM. See DIM Code Checkpoints section of document for more information. USB controllers are initialized at this point. Initializes DMAC-1 & DMAC-2. Initialize RTC date/time. Test for total memory installed in the system. Also, Check for DEL or ESC keys to limit memory test. Display total memory in the system. Mid POST initialization of chipset registers. Detect different devices (Parallel ports, serial ports, and coprocessor in CPU, … etc.) successfully installed in the system and update the BDA, EBDA…etc. Updates CMOS memory size from memory found in memory test. Allocates memory for Extended BIOS Data Area from base memory. Programming the memory hole or any kind of implementation that needs an adjustment in system RAM size if needed. Initializes NUM-LOCK status and programs the KBD typematic rate. Initialize Int-13 and prepare for IPL detection. Initializes IPL devices controlled by BIOS and option ROMs. Generate and write contents of ESCD in NVRam. Log errors encountered during POST. Display errors to the user and gets the user response for error. Execute BIOS setup if needed / requested. Check boot password if installed. Late POST initialization of chipset registers. Build ACPI tables (if ACPI is supported) Program the peripheral parameters. Enable/Disable NMI as selected Initialization of system management interrupt by invoking all handlers. Please note this checkpoint comes right after checkpoint 20h Clean-up work needed before booting to OS. Takes care of runtime image preparation for different BIOS modules. Fill the free area in F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares the runtime language module. Disables the system configuration display if needed. Initialize runtime language module. Display boot option popup menu. Displays the system configuration screen if enabled. Initialize the CPU’s before boot, which includes the programming of the MTRR’s. Wait for user input at config display if needed. Uninstall POST INT1Ch vector and INT09h vector. Prepare BBS for Int 19 boot. Init MP tables. End of POST initialization of chipset registers. De-initializes the ADM module. Save system context for ACPI. Prepare CPU for OS boot including final MTRR values. Passes control to OS Loader (typically INT19h). Page 74 Express-MV User’s Manual 9.4 OEM POST Error Checkpoints Checkpoints from the range 61h to 70h are reserved for chipset vendors & system manufacturers. The error associated with this value may be different from one platform to the next. 9.5 DIM Code Checkpoints The Device Initialization Manager (DIM) gets control at various times during BIOS POST to initialize different system busses. The following table describes the main checkpoints where the DIM module is accessed: Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs from add-in PCI devices. Checkpoint Description 2A 38 Initialize different buses and perform the following functions: Reset, Detect, and Disable (function 0); Static Device Initialization (function 1); Boot Output Device Initialization (function 2). Function 0 disables all device nodes, PCI devices, and PnP ISA cards. It also assigns PCI bus numbers. Function 1 initializes all static devices that include manual configured onboard peripherals, memory and I/O decode windows in PCI- PCI bridges, and noncompliant PCI devices. Static resources are also reserved. Function 2 searches for and initializes any PnP, PCI, or AGP video devices. Initialize different buses and perform the following functions: Boot Input Device Initialization (function 3); IPL Device Initialization (function 4); General Device Initialization (function 5). Function 3 searches for and configures PCI input devices and detects if system has standard keyboard controller. Function 4 searches for and configures all PnP and PCI boot devices. Function 5 configures all onboard peripherals that are set to an automatic configuration and configures all remaining PnP and PCI devices. While control is in the different functions, additional checkpoints are output to port 80h as a word value to identify the routines under execution. The low byte value indicates the main POST Code Checkpoint. The high byte is divided into two nibbles and contains two fields. The details of the high byte of these checkpoints are as follows: Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 75 Page 75 Page 75 HIGH BYTE XY The upper nibble ‘X’ indicates the function number that is being executed. ‘X’ can be from 0 to 7. 0 = func#0, disable all devices on the BUS concerned. 1 = func#1, static devices initialization on the BUS concerned. 2 = func#2, output device initialization on the BUS concerned. 3 = func#3, input device initialization on the BUS concerned. 4 = func#4, IPL device initialization on the BUS concerned. 5 = func#5, general device initialization on the BUS concerned. 6 = func#6, error reporting for the BUS concerned. 7 = func#7, add-on ROM initialization for all BUSes. 8 = func#8, BBS ROM initialization for all BUSes. The lower nibble ‘Y’ indicates the BUS on which the different routines are being executed. ‘Y’ can be from 0 to 5. 0 = Generic DIM (Device Initialization Manager). 1 = Onboard System devices. 2 = ISA devices. 3 = EISA devices. 4 = ISA PnP devices. 5 = PCI devices. 9.6 ACPI Runtime Checkpoints ACPI checkpoints are displayed when an ACPI capable operating system either enters or leaves a sleep state. The following table describes the type of checkpoints that may occur during ACPI sleep or wake events: Checkpoints may differ between different platforms based on system configuration. Checkpoints may change due to vendor requirements, system chipset or option ROMs from add-in PCI devices. Page 76 Express-MV User’s Manual 9.7 Boot Block Beep Codes No. of Beeps Description 1 2 3 4 5 6 7 8 9 10 11 12 13 Insert diskette in floppy drive A: ‘AMIBOOT.ROM’ file not found in root directory of diskette in A: Base Memory error Flash Programming successful Floppy read error Keyboard controller BAT command failed No Flash EPROM detected Floppy controller failure Boot Block BIOS checksum error Flash Erase error Flash Program error ‘AMIBOOT.ROM’ file size error BIOS ROM image mismatch (file layout does not match image present in flash device) 9.8 POST BIOS Beep Codes No. of Beeps Description 1 2 3 4 5 6 7 8 9 10 11 Memory refresh timer error. Parity error in base memory (first 64KB block) Base memory read/write test error Motherboard timer not operational Processor error 8042 Gate A20 test error (cannot switch to protected mode) General exception error (processor exception interrupt error) Display memory error (system video adapter) AMIBIOS ROM checksum error CMOS shutdown register read/write error Cache memory test failed Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 77 Page 77 Page 77 9.9 Troubleshooting POST BIOS Beep Codes No. of Beeps Description 1, 2 or 3 4-7, 9-11 8 Reseat the memory, or replace with known good modules. Fatal error indicating a serious problem with the system. Consult your system manufacturer. Before declaring the motherboard beyond all hope, eliminate the possibility of interference by a malfunctioning add-in card. Remove all expansion cards except the video adapter. - If beep codes are generated when all other expansion cards are absent, consult your system manufacturer’s technical support. - If beep codes are not generated when all other expansion cards are absent, one of the add-in cards is causing the malfunction. Insert the cards back into the system one at a time until the problem happens again. This will reveal the malfunctioning card. If the system video adapter is an add-in card, replace or reseat the video adapter. If the video adapter is an integrated part of the system board, the board may be faulty. Page 78 Express-MV User’s Manual Appendix A: SDVO/DisplayPort/HDMI Switch Switches SW1 and SW2 are used to set the Concurrent DisplayPort Configuration Strap Controls of the Express-MV. These settings control SDVO, PCI Express Graphics, DisplayPort (DP), and HDMI output. DP Port-B, HDMI Port-B, PCI Express Graphics (default)* SW2 SW1 Pin1 OFF ON Pin2 ON OFF SW1 SW2 DP Port-C, HDMI Port-C, PCI Express Graphics* Pin1 OFF ON Pin2 ON ON SW1 SW2 DP Port-D, HDMI Port-D, PCI Express Graphics* Pin1 ON ON Pin2 ON OFF SW1 SW2 *Set JP6 on the Express-BASE Carrier Board to PEG Enabled (short pins 2 & 3). SDVO** Pin1 ON OFF Pin2 ON OFF SW1 SW2 **Set JP6 on the Express-BASE Carrier Board to PEG Disabled (short pins 1 & 2). Set Boot Display Device in BIOS to CRT + SDVO or SDVO. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 79 Page 79 Page 79 Important Safety Instructions For user safety, please read and follow all instructions, warnings, cautions, and notes marked in this manual and on the associated equipment before handling/operating the equipment. (cid:102) Read these safety instructions carefully. (cid:102) Keep this user’s manual for future reference. (cid:102) Read the specifications section of this manual for detailed information on the operating environment of this equipment. (cid:102) When installing/mounting or uninstalling/removing equipment: - Turn off power and unplug any power cords/cables. (cid:102) To avoid electrical shock and/or damage to equipment: - Keep equipment away from water or liquid sources; - Keep equipment away from high heat or high humidity; - Keep equipment properly ventilated (do not block or cover ventilation openings); - Make sure to use recommended voltage and power source settings; - - Secure the power cord (do not place any object on/over the power cord); - Only install/attach and operate equipment on stable surfaces and/or recommended Always install and operate equipment near an easily accessible electrical socket-outlet; - mountings; and, If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source. (cid:102) Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel. (cid:102) A Lithium-type battery may be provided for uninterrupted, backup or emergency power. Risk of explosion if battery is replaced by an incorrect type. Dispose of used batteries according to the instructions. Page 80 Express-MV User’s Manual (cid:102) Equipment must be serviced by authorized technicians when: - The power cord or plug is damaged; - Liquid has penetrated the equipment; - - - - It has been exposed to high humidity/moisture; It is not functioning or does not function according to the user’s manual; It has been dropped and/or damaged; and/or, It has an obvious sign of breakage. Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 81 Page 81 Page 81 Getting Service Contact us should you require any service or assistance. ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Chungho City, Taipei County 235, Taiwan (cid:1536)(cid:1511)(cid:5628)(cid:1389)(cid:2121)(cid:1553)(cid:2540)(cid:1323)(cid:4609) 166 (cid:4550) 9 (cid:5204) +886-2-8226-5877 +886-2-8226-5717 Tel: Fax: Email: service@adlinktech.com Ampro ADLINK Technology, Inc. Address: 5215 Hellyer Avenue, #110, San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) +1-408-360-0222 Fax: info@adlinktech.com Email: ADLINK Technology Beijing Address: (cid:2283)(cid:1152)(cid:5078)(cid:9035)(cid:9108)(cid:2318)(cid:990)(cid:3332)(cid:1008)(cid:17347) 1 (cid:2507)(cid:11420)(cid:2031)(cid:2172)(cid:2159)(cid:3835)(cid:2426) E (cid:5243) 801 (cid:4472)(100085) Rm. 801, Power Creative E, No. 1, B/D Shang Di East Rd., Beijing, 100085 China +86-10-5885-8666 +86-10-5885-8625 Tel: Fax: Email: market@adlinktech.com ADLINK Technology Shanghai Address: (cid:990)(cid:9035)(cid:5078)(cid:9449)(cid:8839)(cid:8914)(cid:20652)(cid:12197)(cid:6228)(cid:5332)(cid:2469)(cid:2318)(cid:19066)(cid:8755)(cid:17347) 333 (cid:2507) 39 (cid:5174) 4 (cid:4630) (200233) 4F, Bldg 39, Caoheting Science & Technology Park, No.333 Qinjiang Rd., Shanghai, 200233 China +86-21-6495-5210 +86-21-5450-0414 Tel: Fax: Email: market@adlinktech.com ADLINK Technology Shenzhen Address: (cid:9157)(cid:3335)(cid:5078)(cid:2347)(cid:4677)(cid:2318)(cid:12197)(cid:6228)(cid:3265)(cid:2347)(cid:2318)(cid:20652)(cid:7044)(cid:2347)(cid:983)(cid:17959)(cid:3)(cid:6980)(cid:4395)(cid:6228)(cid:7427)(cid:3265)(cid:3) A1 (cid:7647) 2 (cid:8016) C (cid:2318) (518057) 2F, C Block, Bldg. A1, Cyber-Tech Zone, Gao Xin Ave. Sec. 7, High-Tech Industrial Park S., Shenzhen, 518054 China +86-755-2643-4858 +86-755-2664-6353 Tel: Fax: Email: market@adlinktech.com Page 82 Express-MV User’s Manual ADLINK Technology, Inc. (German Liaison Office) Address: Nord Carree 3, 40477 Duesseldorf, Germany Tel: Fax: Email: emea@adlinktech.com +49-211-495-5552 +49-211-495-5557 ADLINK Technology, Inc. (French Liaison Office) Address: 15 rue Emile Baudot, 91300 Massy CEDEX, France Tel: Fax: Email: +33 (0) 1 60 12 35 66 +33 (0) 1 60 12 35 66 france@adlinktech.com ADLINK Technology Japan Corporation Address: 151-0072 (cid:6642)(cid:2665)(cid:12794)(cid:7654)(cid:12081)(cid:3481)(cid:5128)(cid:17073)(cid:12081)(cid:14967) 1-1-2 (cid:6586)(cid:6371)(cid:8610)(cid:3694)(cid:5128)(cid:17073)(cid:12081)(cid:17038)(cid:17062) 8F Asahiseimei Hatagaya Bldg. 8F 1-1-2 Hatagaya, Shibuya-ku, Tokyo 151-0072, Japan +81-3-4455-3722 +81-3-5333-6040 japan@adlinktech.com Tel: Fax: Email: ADLINK Technology, Inc. (Korean Liaison Office) Address: (cid:26146)(cid:27582)(cid:26594) (cid:26146)(cid:29198)(cid:21106) (cid:26146)(cid:29198)(cid:22751) 1506-25 (cid:31330)(cid:22730) B/D 2 (cid:29499) 2F, Hando B/D, 1506-25, Seocho-Dong, Seocho-Gu, Seoul 137-070, Korea +82-2-2057-0565 +82-2-2057-0563 Tel: Fax: Email: korea@adlinktech.com ADLINK Technology Singapore Pte. Ltd. Address: 84 Genting Lane #07-02A, Cityneon Design Centre, Singapore 349584 +65-6844-2261 Tel: Fax: +65-6844-2263 Email: singapore@adlinktech.com ADLINK Technology Singapore Pte. Ltd. (Indian Liaison Office) Address: No. 1357, "Anupama", Sri Aurobindo Marg, 9th Cross, JP Nagar Phase I, Bangalore - 560078, India +91-80-65605817 +91-80-22443548 india@adlinktech.com Tel: Fax: Email: Express-MV User’s Manual Express-IA533 User’s Manual Express-IA533 User’s Manual Page 83 Page 83 Page 83 [🔗 Link to the original document](.express-mv-50-1j022-1010-201/express-mv-50-1j022-1010-201.pdf)