# IAP-E47-4U

# User’s Manual

4U Rackmount Industrial Automation Platforms with Q670 PCH and Intel® 12 th/13 th/14th Gen Core™ Processors

![Green printed circuit board with various electronic components and connectors (no readable text or symbols)](.iap-e47-4u-50m-12901-1000-01-240708/3a31820c5b8bc380b0126a099ceb64e401282ec4bc473935cf52be0f43cf2c6d.jpg)

Manual Rev.: 0.1 Preliminary

Revision Date: July 8, 2024

Part Number: 50M-12901-1000

# Preface

# Copyright

Copyright © 2024 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

![Symbol of a trash bin crossed with a diagonal line and a horizontal bar below (no text or labels)](.iap-e47-4u-50m-12901-1000-01-240708/201748d087cbac9fc440768c7f7988f8c39dc70482a143da72bed7b15b6edeb5.jpg)

Battery Labels (for products with battery)

![Simple line drawing of a trash bin with two crossed lines (no text or symbols)](.iap-e47-4u-50m-12901-1000-01-240708/7738f22de0b36cbd55f30b5e78de46db89e6ea2d8095222ed51bf0ba6d1af534.jpg)

![This image features a black recycling symbol enclosed in a square border, with the text 'Li-ion' centered below it.](.iap-e47-4u-50m-12901-1000-01-240708/2853b7b898bcb97dd6f544e5a7124f020dae7351d0e20d6e29c2bfba7fcab226.jpg)

![RECYCLE\nRBRC\nLi-ion\n7.800.822.8837](.iap-e47-4u-50m-12901-1000-01-240708/0ce6d87d14e7f92da49e47daddb1efed72f271e4795ad2ea044308d20a8c743c.jpg)

![廢電池請回收](.iap-e47-4u-50m-12901-1000-01-240708/10f6397f2f8406a8815713f9b6e5673d8606e5075634f284a8ff523499285a58.jpg)

# California Proposition 65 Warning

![A yellow triangular warning sign with a thick black border containing a black exclamation mark in the center.](.iap-e47-4u-50m-12901-1000-01-240708/1eabd897be378836a5df70349c60fceda96d8d1f5f651b990c6be5191becf4b3.jpg)

WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP,

DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

Revision History

<table><tr><td>Revision</td><td>Description</td><td>Date</td><td>By</td></tr><tr><td>0.1</td><td>Preliminary release</td><td>2024-07-08</td><td>AL</td></tr></table>

# Table of Contents

# Preface ....

# List of Figures .... .iv

# List of Tables...... .iv

# 1 Introduction...

1.1 Packing List...
1.2 Packing Content..
1.3 Driver Installation . .2
1.4 Optional Accessories.. .2
1.5 Features. .3

# 2 Specifications ...

2.1 Core System . 5
2.2 Environmental . 5
2.3 Certification ... 5
2.4 Functional Block Diagram.... .6

# 3 Mechanical Layout ..............

3.1 Schematics and Dimensions .
3.2 Rear Panel I/O Ports ... 8
3.3 Board layout.. 9

# 4 Connectors and Jumpers ....... .11

4.1 I/O Connectivity. .11
4.2 Rear IO Connectors . ..11
4.3 Onboard Connectors. .13
4.4 Jumpers and Switches . ..19

# 5 BIOS Setup.... .21

5.1 Menu Structure.... ..21
5.2 Main Menu . .22
5.3 Advanced Menu .... .22
5.4 Chipset.. .29
5.5 Security .. .32
5.6 Boot . .33
5.7 Save & Exit . ..36
5.8 MEBx .. ..36

# Safety Instructions... .37

# Getting Service....... .38

# List of Figures

Figure 1: Functional Block Diagram . .6

Figure 2: Board Dimensions..

Figure 3: Rear Panel I/O Ports. .8

Figure 4: IAP-E47 Board Layout . .9

# List of Tables

Table 1: IAP-E47-4U Processor .

Table 2: NuPRO-E47 I/O Connectivity . ..11

# 1 Introduction

The ADLINK’s IAP-E47-4U IPC system is a PICMG1.3 supporting 12th/13th/14th Generation Intel® Core™ i9/i7/i5/i3 desktop processors with an Intel® Q670 Chipset, and provides 14 expansion slots for a cost-competitive embedded computing solution. The NuPRO-E47 supports 10nm process CPUs at up to 5.0 GHz, with integrated graphics and memory controllers, and Direct Media Interface (DMI) connectivity to the Intel® Q670E Express chipset. Dual-channel DDR5 memory is supported up to a maximum of 64GB on two DIMM slots.

These advanced features, coupled with PCI Express® x16 expansion capability, dual PCI Express®-based Gigabit Ethernet, SATA 6 Gb/s, and USB 3.2 support, make the NuPRO-E47 ideal for vision and automation control applications.

Table 1: IAP-E47-4U Processor

<table><tr><td>Model Number</td><td>Chipset</td></tr><tr><td>IAP-E47-4U</td><td>Q670</td></tr></table>

Latest revisions of the datasheet, user’s manual, BIOS, drivers, and board support packages, can be downloaded from the product webpage on the ADLINK web site: www.adlinktech.com

# 1.1 Packing List

IMB-E47-4U IPC system

# 1.2 Packing Content

Before unpacking, check the shipping carton for any damage. If the shipping carton and/or contents are damaged, inform your dealer immediately. Retain the shipping carton and packing materials for inspection. Obtain authorization from the dealer before returning any product to ADLINK.

NuPRO-E47
• SATA data cable with latch (x2)
• 2-port USB 3.0 cable with bracket (2.0 mm pitch)
• 2-port COM cable with bracket (2.0 mm pitch)
• Printer port cable with bracket (2.0 mm pitch)

![The image displays a yellow triangular warning sign with a thick black border. Inside the triangle is a large black exclamation point centered on a yellow background.](.iap-e47-4u-50m-12901-1000-01-240708/d05331269b63caf2f44dbc9ecc1a2c807e3dc9c6f420d8fe5714ae21d017b4ff.jpg)

WARNING: The NuPRO-E47 must be protected from static discharge and physical shock. Never remove any of the socketed parts except at a static-free workstation. Use the anti-static bag shipped with the product to handle the board. Wear a grounded wrist strap when installing and/or servicing.

# 1.3 Driver Installation

Download and install the following requisite drivers for your system from https://www.adlinktech.com

• Intel® Chipset Device Software
Intel® Management Engine Components
• Intel® UHD Graphics Driver
Intel® Serial IO Driver
Intel® Network Connections Drivers
Intel® HID Event Filter
• Intel® Dynamic Tuning Technology
Intel® GNA
Intel® PPM
• Intel® Rapid Storage Technology
Realtek Audio ALC262

Note: To enable RAID or AHCI mode, you must pre-install the Intel® Rapid Storage Technology driver during the Windows\* installation process, using the F6 installation method.

# 1.4 Optional Accessories

ADLINK offers optional accessories for NuPRO-E47. Please contact ADLNIK sales representatives for details.

DB-Audio2 (high-definition audio) 91-49030-0010
• LGA1700 1U CPU cooler 32-21002-0000-A0
• LGA1700 2U CPU cooler 32-20976-1000-A0
DVI-D/VGA cable with bracket 30-25309-0000-A0
4-port USB 3.0 cable with bracket 30-25305-0020-A0
• 2-port USB 3.0 cable (right angle) with bracket 30-25046-0110-A0
1-port COM cable with bracket 30-25003-2100
• DIO cable with bracket 30-25304-0000-B0

1.5 Features

<table><tr><td>Dimension</td><td>427 mm (W) x 177 mm (H) x 447.9 mm(D)</td></tr><tr><td>CPU</td><td>Intel® CoreTM i9-12900E Processor</td></tr><tr><td>Motherboard</td><td>ALDINK NuPRO-E47</td></tr><tr><td>DRAM</td><td>64GB DDR5 4800MHz DIMM Non-ECC</td></tr><tr><td>Storage</td><td>128GB MLC SATA SSD</td></tr><tr><td>Display</td><td>1 x HDMI on rear I/O, resolution up to 4096 x 2160 @ 60Hz1x DVI-D via onboard pin header, resolution up to 1920 x 1200 @ 60HzVGA 1x VGA via onboard pin header, resolution up to 1920 x 1200 @ 60Hz</td></tr><tr><td>COM</td><td>2x RS-232 via onboard 2.0 pitch box header2x RS-232/422/485 with auto flow control via onboard 2.0 pitch box header</td></tr><tr><td>USB</td><td>3x USB 3.2 Gen 2x1 ports (10Gbps) on rear I/O6x USB 3.2 Gen 1x1 via onboard box headers1x USB 3.2 Gen 1x1 vertical type A port4x USB 2.0 to backplane</td></tr><tr><td>Ethernet</td><td>LAN1: Intel® I225-V via RJ45LAN2: Intel® I225-LM via RJ45</td></tr><tr><td>Expansion Slot</td><td>1x PCIe x16 slots3x PCIe x47x PCI</td></tr><tr><td>Audio</td><td>Intel® High-Definition Audio via onboard box header</td></tr><tr><td>Button</td><td>Power button, reset button</td></tr><tr><td>LED Indicator</td><td>Power LED, storage LED</td></tr><tr><td>PSU</td><td>Built in 1200W ATX</td></tr></table>

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# 2 Specifications

# 2.1 Core System

<table><tr><td>CPU</td><td>Intel® CoreTM i9-12900E, up to 5.0 GHz, 16 Cores, 30M Cache, 65W TDPIntel® CoreTM i9-12900TE, up to 4.8 GHz, 16 Cores, 30M Cache, 35W TDPIntel® CoreTM i7-12700E, up to 4.8 GHz, 12 Cores, 25M Cache, 65W TDPIntel® CoreTM i7-12700TE, up to 4.7 GHz, 12 Cores, 25M Cache, 35W TDPIntel® CoreTM i5-12500E, up to 4.5 GHz, 6 Cores, 18M Cache, 65W TDPIntel® CoreTM i5-12500TE, up to 4.3 GHz, 6 Cores, 18M Cache, 35W TDPIntel® CoreTM i3-12100E, up to 4.2 GHz, 4 Cores, 12M Cache, 60W TDPIntel® CoreTM i3-12100TE, up to 4.0 GHz, 4 Cores, 12M Cache, 35W TDPIntel® Pentium® Gold G7400E, up to 3.6 GHz, 2 Cores, 6M Cache, 46W TDPIntel® Pentium® Gold G7400TE, up to 3.0 GHz, 2 Cores, 6M Cache, 35W TDPIntel® Celeron® G6900E, up to 3.0 GHz, 2 Cores, 4M Cache, 46W TDPIntel® Celeron® G6900TE, up to 2.4 GHz, 2 Cores, 4M Cache, 35W TDP</td></tr><tr><td>Chipset</td><td>Intel® Q670 Express Chipset</td></tr><tr><td>Memory</td><td>Dual channel DDR5 4800 MHz, up to 64GB</td></tr><tr><td>Embedded BIOS</td><td>AMI® UEFI BIOS 256 Mbit SPI flash memory</td></tr><tr><td>Hardware Monitor</td><td>CPU temperature, system temperature, system voltage, CPU fan speed</td></tr></table>

# 2.2 Environmental

<table><tr><td rowspan="2">Temperature</td><td>Operating Temperature</td><td>0 to 40°C (32 to 104°F)</td></tr><tr><td>Storage (Non-Operating) Temperature</td><td>-20°C to 60°C (-4°F to 140°F)</td></tr><tr><td rowspan="2">Humidity</td><td>Operating Humidity</td><td>10% to 85% (non-condensing)</td></tr><tr><td>Storage (Non-Operating) Humidity</td><td>10% to 95% (non-condensing)</td></tr></table>

# 2.3 Certification

<table><tr><td>EMC</td><td>CE &amp; FCC Class A</td></tr><tr><td>Safety</td><td>LVD</td></tr></table>

2.4 Functional Block Diagram
![**Central Components:**\n*   **Top Block:** 'Intel Core i9/i7/i5/i3 Processor (Formally Alder Lake S) LGA 1700 Socket'\n*   **Bottom Block:** 'Intel Q670E Chipset'\n*   **Connection:** A double-headed arrow labeled 'DMI Gen4 x8' connects the Processor to the Chipset.\n\n**Processor Connections:**\n*   **Left Side:**\n    *   'DDI' connects the Processor to 'DP to HDMI', which connects to 'HDMI' via a link labeled 'HDMI'.\n    *   'DDI' connects the Processor directly to 'DVI-D'.\n    *   'DDI' connects the Processor to 'DP to VGA', which connects to 'VGA' via a link labeled 'VGA'.\n*   **Right Side:**\n    *   'Channel A' connects the Processor to a 'Vertical UDIMM' block.\n    *   'Channel B' connects the Processor to a second 'Vertical UDIMM' block.\n    *   'PCIe Gen3 x16' connects the Processor to 'PICMG 1.3 GF A & B'.\n    *   'PCIe Gen4 x4' connects the Processor to 'M.2 M Key'.\n\n**Chipset Connections (Left Column):**\n*   'PCIe x1' connects the Chipset to 'I225-V', which connects to an 'RJ45' port.\n*   'PCIe x1' connects the Chipset to 'I225-LM', which connects to an 'RJ45' port.\n*   Three 'USB 3.2 (10Gb)' ports connect to the Chipset via links labeled 'USB 3.2 & USB 2.0'.\n*   One 'USB 3.2 (5Gb)' port connects to the Chipset via a link labeled 'USB 3.2 & USB 2.0'.\n*   Five 'USB 3.2 header (5Gb)' blocks connect to the Chipset via links labeled 'USB 3.2 & USB 2.0'.\n*   'PCIe Gen3 x4' connects the Chipset to 'PICMG 1.3 GF A'.\n*   '4x USB 2.0' connects the Chipset to 'PICMG 1.3 GF C'.\n*   'PCIe x1' connects the Chipset to 'PCIe to PCI', which connects to 'PICMG 1.3 GF D' via '4x PCI'.\n*   'Buzzer' connects directly to the Chipset.\n\n**Chipset Connections (Right Column - Direct):**\n*   Six 'SATA 6Gb' blocks connect to the Chipset via links labeled 'SATA'.\n*   'HD Audio' connects the Chipset to an 'Audio header'.\n*   An unlabeled line connects the Chipset to an '8-bit GPIO header'.\n\n**Peripheral/Control Blocks (Far Right):**\n*   **Super IO:** Connected to the Chipset via 'eSPI'. It connects to:\n    *   Two 'RS232/422/485 header' blocks.\n    *   Two 'RS232 header' blocks.\n    *   'LTP header'.\n    *   'FAN header'.\n*   **BUS SW:** Connected to the Chipset via 'SPI'. It connects to:\n    *   'TPM' via 'SPI'.\n    *   'BIOS ROM' via 'SPI'.\n    *   'DB40 Connector' via 'SPI'.](.iap-e47-4u-50m-12901-1000-01-240708/632c4ca79bda861942751dfde12d288c9349c70c8ced5e6700d552d25db201f5.jpg)

Figure 1: Functional Block Diagram

# 3 Mechanical Layout

# 3.1 Schematics and Dimensions

All dimension measurements are in mm (millimeters).

![338.10\n333.60\n173.60\n126.39\n340.10\n104.80\n121.47](.iap-e47-4u-50m-12901-1000-01-240708/f31d82c23fa7488bd616c25291b848fada06b0da2c5b2575528934d15a8ebbfd.jpg)

Figure 2: Board Dimensions

# 3.2 Rear Panel I/O Ports

![A\nB\nC\nD\nE\nF](.iap-e47-4u-50m-12901-1000-01-240708/7735e2137b4a8285ae64bb4b6cf902223f7b8069e8565fb58469035816084d1b.jpg)

Figure 3: Rear Panel I/O Ports

<table><tr><td></td><td>Connector</td><td>Description</td></tr><tr><td>A</td><td>LAN2 (RJ-45)</td><td>2.5 Gigabit Ethernet (supports Intel® AMT)</td></tr><tr><td>B</td><td>LAN1 (RJ-45)</td><td>2.5 Gigabit Ethernet</td></tr><tr><td>C/D/E</td><td>USB 3.x x3</td><td>USB 3.2 Gen2 x1 ports</td></tr><tr><td>F</td><td>HDMI</td><td>HDMI connector for LCD monitor</td></tr></table>

# 3.3 Board layout

![A B\ni\nh\ng\nf\nC\nD E\nF G H I J K L N P R S T U\nM O Q\nV W\nX\ne d c b a Z Y\nPouphyday\nPouphyday\nPouphyday](.iap-e47-4u-50m-12901-1000-01-240708/301216b20e2c2dd1780b8667625e5c94f33d49533d208d6702ec6ad9bb9b784d.jpg)

Figure 4: IAP-E47 Board Layout

<table><tr><td></td><td>Connector</td><td>Description</td><td></td><td>Connector</td><td>Description</td></tr><tr><td>A</td><td>CN40</td><td>DIMM B0</td><td>S</td><td>CN27</td><td>USB3.0 #6/7</td></tr><tr><td>B</td><td>CN38</td><td>DIMM A0</td><td>T</td><td>CN28</td><td>USB3.0 #8/9</td></tr><tr><td>C</td><td>CN1</td><td>CPU</td><td>U</td><td>USB4</td><td>USB3.0 #10</td></tr><tr><td>D</td><td>FAN1</td><td>CPU fan header</td><td>V</td><td>CN41</td><td>Clear CMOS</td></tr><tr><td>E</td><td>M2M1</td><td>M.2 M Key</td><td>W</td><td>CN42</td><td>Clear RTC</td></tr><tr><td>F</td><td>CN35</td><td>System panel header</td><td>X</td><td>CN2</td><td>SMBus pull high voltage jumper (reserved)</td></tr><tr><td>G</td><td>CN22</td><td>LTP</td><td>Y</td><td>BT1</td><td>RTC battery</td></tr><tr><td>H</td><td>CN7</td><td>COM #1</td><td>Z</td><td>VGA1</td><td>VGA header</td></tr><tr><td>I</td><td>CN8</td><td>COM #2</td><td>a</td><td>CN5</td><td>Audio header</td></tr><tr><td>J</td><td>CN9</td><td>COM #3</td><td>b</td><td>CN34</td><td>DVI-D header</td></tr><tr><td>K</td><td>CN10</td><td>COM #4</td><td>c</td><td>DB3</td><td>DB40</td></tr><tr><td>L</td><td>CN43</td><td>SATA #5</td><td>d</td><td>CN50</td><td>Debug header</td></tr><tr><td>M</td><td>CN44</td><td>SATA #6</td><td>e</td><td>DIO</td><td>8-bit GPIO header</td></tr><tr><td>N</td><td>CN32</td><td>SATA #3</td><td>f</td><td>CN49</td><td>PCI BUS 5V/3.3V jumper (reserved)</td></tr><tr><td>O</td><td>CN33</td><td>SATA #4</td><td>g</td><td>FAN2</td><td>System fan header</td></tr><tr><td>P</td><td>CN30</td><td>SATA #1</td><td>h</td><td>PCN1</td><td>IMVP IC FW update jumper</td></tr><tr><td>Q</td><td>CN31</td><td>SATA #2</td><td>i</td><td>CN36</td><td>Power 4-pin (ATX 12V)</td></tr><tr><td>R</td><td>CN26</td><td>USB3.0 #4/5</td><td></td><td></td><td></td></tr></table>

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# 4 Connectors and Jumpers

# 4.1 I/O Connectivity

<table><tr><td>I/O</td><td>Bracket</td><td>Onboard</td><td>Edge Connector</td><td>Remarks</td></tr><tr><td>VGA</td><td>—</td><td>Y</td><td>—</td><td>Cable w/ bracket optional</td></tr><tr><td>DVI-D</td><td>—</td><td>Y</td><td>—</td><td>Cable w/ bracket optional</td></tr><tr><td>LAN1/2 (RJ-45)</td><td>Y</td><td>—</td><td>—</td><td>Act/Link/ Speed LEDs</td></tr><tr><td>USB 3.2 Gen2 x1</td><td>3</td><td>—</td><td>—</td><td></td></tr><tr><td>USB 3.2 Gen1 x1</td><td>—</td><td>7</td><td>—</td><td>Cable w/ bracket optional</td></tr><tr><td>USB 2.0</td><td>—</td><td>—</td><td>4</td><td></td></tr><tr><td>COM</td><td>—</td><td>4</td><td>—</td><td>2.00&quot; pitch</td></tr><tr><td>SATA</td><td>—</td><td>6</td><td>—</td><td>—</td></tr><tr><td>PCIe x4</td><td>—</td><td>—</td><td>Y</td><td>—</td></tr><tr><td>PCIe x16</td><td>—</td><td>—</td><td>Y</td><td>—</td></tr><tr><td>PCI 32bit/33MHz</td><td>—</td><td>—</td><td>Y</td><td>via ITE IT8892</td></tr></table>

Table 2: NuPRO-E47 I/O Connectivity

# 4.2 Rear IO Connectors

# 4.2.1 USB 3.0 Connectors

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>USB3.0_P5VA</td></tr><tr><td>2</td><td>USB2_CMAN</td></tr><tr><td>3</td><td>USB2_CMAP</td></tr><tr><td>4</td><td>GND</td></tr><tr><td>5</td><td>USB3A_CMRXN</td></tr><tr><td>6</td><td>USB3A_CMRXP</td></tr><tr><td>7</td><td>GND</td></tr><tr><td>8</td><td>USB3A_CMTXN</td></tr><tr><td>9</td><td>USB3A_CMTXP</td></tr></table>

![9 8 7 6 5\n1 2 3 4](.iap-e47-4u-50m-12901-1000-01-240708/238aa358e95217ec53642d835bb709c53e458a901e450fe5e3a7022989706731.jpg)

# 4.2.2 HDMI

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>HDMI0_P2</td><td>11</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>12</td><td>HDMI0_CKN</td></tr><tr><td>3</td><td>HDMI0_N2</td><td>13</td><td>TP_HDMI0_CEC</td></tr><tr><td>4</td><td>DMI0_P1</td><td>14</td><td>NC</td></tr><tr><td>5</td><td>GND</td><td>15</td><td>HDMI0_SCL_SNK</td></tr><tr><td>6</td><td>HDMI0_N1</td><td>16</td><td>HDMI0_SDA_SNK</td></tr><tr><td>7</td><td>HDMI0_P0</td><td>17</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>18</td><td>P_+5V_S0_HDMI0</td></tr><tr><td>9</td><td>HDMI0_N0</td><td>19</td><td>HDMI0_HPD_SNK</td></tr><tr><td>10</td><td>HDMI0_CKP</td><td colspan="2"></td></tr></table>

![This is a black-and-white line drawing of an HDMI connector plug, showing its rectangular front face with rounded corners and a central row of electrical contacts. Several numbers label specific points along the perimeter: '19' is at the top left, '1' is at the top right, '13' is on the left side, '2' is on the right side, and '12' is at the bottom left.](.iap-e47-4u-50m-12901-1000-01-240708/93d1feccf800e1ced22d45641b92c2cde2989652a874cbdf5f5944f59304d122.jpg)

# 4.2.3 Ethernet Connectors

# LAN (RJ-45) Ports

<table><tr><td>Pin</td><td>10BASE-T/100BASE-TX</td><td>1000BASE-T</td></tr><tr><td>1</td><td>TX+</td><td>BI_DA+</td></tr><tr><td>2</td><td>TX-</td><td>BI_DA-</td></tr><tr><td>3</td><td>RX+</td><td>BI_DB+</td></tr><tr><td>4</td><td>--</td><td>BI_DC+</td></tr><tr><td>5</td><td>--</td><td>BI_DC-</td></tr><tr><td>6</td><td>RX-</td><td>BI_DB-</td></tr><tr><td>7</td><td>--</td><td>BI_DD+</td></tr><tr><td>8</td><td>--</td><td>BI_DD-</td></tr></table>

![The image is a simple line drawing, likely a schematic representation of a connector or port (resembling an Ethernet jack). It features a square outer border. Inside the upper portion, there are two small, horizontal rectangles. Below these is a large, central shape shaded in grey, which has a stepped, crown-like top edge. Two diagonal lines connect the bottom corners of this central shape to the bottom corners of the outer square frame.](.iap-e47-4u-50m-12901-1000-01-240708/4835b66c94f4c5e9fd226fbff619ca28dccd71ade2e7f37be91573674262f764.jpg)

# LAN Behavior

<table><tr><td colspan="2">LED 1</td><td colspan="2">LED 2</td></tr><tr><td>Status</td><td>Description</td><td>Status</td><td>Description</td></tr><tr><td>Off</td><td>No Link</td><td>Off</td><td>10/100 Mb connection</td></tr><tr><td>Yellow</td><td>Linked</td><td>Green</td><td>1 Gb connection</td></tr><tr><td>Blinking</td><td>Data Activity</td><td>Orange</td><td>2.5 Gb connection</td></tr></table>

# 4.3 Onboard Connectors

# 4.3.1 COM1 to COM4 Connectors

(RS-232) (CN7/8/9/10)

<table><tr><td>Pin</td><td>RS-232</td></tr><tr><td>1</td><td>DCD</td></tr><tr><td>2</td><td>DSR</td></tr><tr><td>3</td><td>RXD</td></tr><tr><td>4</td><td>RTS</td></tr><tr><td>5</td><td>TXD</td></tr><tr><td>6</td><td>CTS</td></tr><tr><td>7</td><td>DTR</td></tr><tr><td>8</td><td>RI</td></tr><tr><td>9</td><td>GND</td></tr><tr><td>10</td><td>NC</td></tr></table>

![This is a schematic diagram of a 10-pin integrated circuit package. It features a large rectangular outline with a vertical notch on the upper left side. Inside the rectangle, there are ten small squares arranged in two vertical columns of five squares each. The corners are labeled with numbers: '1' at the top left, '2' at the top right, '9' at the bottom left, and '10' at the bottom right.](.iap-e47-4u-50m-12901-1000-01-240708/c05e97d87eddd03ac712937a8e5cebc69b01e19e8351e10b412ef6ab161cd452.jpg)

# 4.3.2 COM 1-2 Connectors

(RS-422/485) (CN7/8)

<table><tr><td rowspan="2">Pin</td><td colspan="2">Signal</td></tr><tr><td>RS-422</td><td>RS-485</td></tr><tr><td>1</td><td>TXD-</td><td>Data-</td></tr><tr><td>2</td><td>NC</td><td>NC</td></tr><tr><td>3</td><td>TXD+</td><td>Data+</td></tr><tr><td>4</td><td>NC</td><td>NC</td></tr><tr><td>5</td><td>RXD+</td><td>NC</td></tr><tr><td>6</td><td>NC</td><td>NC</td></tr><tr><td>7</td><td>RXD-</td><td>NC</td></tr><tr><td>8</td><td>NC</td><td>NC</td></tr><tr><td>9</td><td>GND</td><td>GND</td></tr></table>

![The image displays a schematic diagram of a rectangular connector or socket. The object is outlined by a thick black line forming a tall rectangle. Inside the rectangle, there is a grid of twelve small, hollow squares arranged in two columns of six rows.\n\nThe numbers '1' and '2' are positioned at the top left and top right corners respectively, outside the rectangle. The numbers '9' and '10' are positioned at the bottom left and bottom right corners respectively, outside the rectangle. The left side of the rectangular outline is interrupted by two large vertical gaps—one near the top adjacent to the number '1' and one near the bottom adjacent to the number '9'—leaving a central vertical segment intact.](.iap-e47-4u-50m-12901-1000-01-240708/0ec8edd4a7a197a35985f00ec61da7efe645e57bc2a54f688573cfa5e3ac2cee.jpg)

# 4.3.3 Etrhernet Connectors (LAN1, LAN2, LAN3)

Three 10/100/1000/2500 Mbps LAN Ethernet controllers based on Intel® i226LM, supporting PXE and WOL. LAN2 supports vPro.

<table><tr><td>Pin</td><td>10BASE-T/100BASE-TX</td><td>1000BASE-T</td></tr><tr><td>1</td><td>TX+</td><td>LAN_MDI0+</td></tr><tr><td>2</td><td>TX-</td><td>LAN_MDI0-</td></tr><tr><td>3</td><td>RX+</td><td>LAN_MDI1+</td></tr><tr><td>4</td><td>--</td><td>LAN_MDI2+</td></tr><tr><td>5</td><td>--</td><td>LAN_MDI2-</td></tr><tr><td>6</td><td>RX-</td><td>LAN_MDI1-</td></tr><tr><td>7</td><td>--</td><td>LAN_MDI3+</td></tr><tr><td>8</td><td>--</td><td>LAN_MDI3-</td></tr></table>

![The image displays a schematic diagram of an RJ45 connector. At the top, the text 'LED1' appears on the left and 'LED2' on the right. Below each label is a small grey rectangle representing an LED. The main body of the connector is outlined below, with a central grey section. At the bottom, two black lines point to the connector housing: the left line points to the far-left pin and is labeled '8', while the right line points to the far-right pin and is labeled '1'.](.iap-e47-4u-50m-12901-1000-01-240708/0d4b3ae3ff16e1849ae3e1e9cc7eb3507f063485cf53209b6a79754dff3e32ed.jpg)

<table><tr><td colspan="2">LED1 (Speed)</td><td colspan="2">LED2 (Link/Activity)</td></tr><tr><td>Status</td><td>Description</td><td>Status</td><td>Description</td></tr><tr><td></td><td>10/100 Mbps connection</td><td>Off</td><td>No Link</td></tr><tr><td>Orange</td><td>1 Gbps connection</td><td>On</td><td>Linked</td></tr><tr><td>Green</td><td>2.5 Gbps connection</td><td>Blinking</td><td>Data Activity</td></tr></table>

# 4.3.4 USB 3.0 Connectors

(CN26/27/28)

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>P5V_USB3B</td><td>20</td><td>NC</td></tr><tr><td>2</td><td>S_USB3_RN3_R</td><td>19</td><td>P5V_USB3B</td></tr><tr><td>3</td><td>S_USB3_RP3_R</td><td>18</td><td>S_USB3_RN4_R</td></tr><tr><td>4</td><td>GND</td><td>17</td><td>S_USB3_RP4_R</td></tr><tr><td>5</td><td>S_USB3_TN3_R</td><td>16</td><td>GND</td></tr><tr><td>6</td><td>S_USB3_TP3_R</td><td>15</td><td>S_USB3_TN4_R</td></tr><tr><td>7</td><td>GND</td><td>14</td><td>S_USB3_TP4_R</td></tr><tr><td>8</td><td>S_USB2_N2_R</td><td>13</td><td>GND</td></tr><tr><td>9</td><td>S_USB2_P2_R</td><td>12</td><td>S_USB2_N3_R</td></tr><tr><td>10</td><td>S_USB_OC1#</td><td>11</td><td>S_USB2_P3_R</td></tr></table>

![Pure electrical circuit lines without any symbols](.iap-e47-4u-50m-12901-1000-01-240708/9a9b5203e29ff98f4395ffccf236576b71a085838221582a66af14abf7d2ac32.jpg)

# 4.3.5 DVI-D Header (CN34)

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td><td>2</td><td>GND</td></tr><tr><td>3</td><td>TMD_CKP</td><td>4</td><td>TMD_N2</td></tr><tr><td>5</td><td>TMD_CKN</td><td>6</td><td>TMD_P2</td></tr><tr><td>7</td><td>GND</td><td>8</td><td>GND</td></tr><tr><td>9</td><td>TMD_SCL</td><td>10</td><td>TMD_N1</td></tr><tr><td>11</td><td>TMD_SDA</td><td>12</td><td>TMD_P1</td></tr><tr><td>13</td><td>GND</td><td>14</td><td>GND</td></tr><tr><td>15</td><td>TMD_HPD</td><td>16</td><td>TMD_NO</td></tr><tr><td>17</td><td>+5V_PSU_DVI</td><td>18</td><td>TMD_P0</td></tr><tr><td>19</td><td>GND</td><td>20</td><td>GND</td></tr></table>

![2\n1\n20\n19](.iap-e47-4u-50m-12901-1000-01-240708/2b088e6acdbccc030306546021e3688e87c353db59b6b374aab615685043ae78.jpg)

# 4.3.6 VGA Header (VGA1)

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>+5V</td><td>8</td><td>Green</td></tr><tr><td>2</td><td>DDC_DAT</td><td>9</td><td>GND</td></tr><tr><td>3</td><td>NC</td><td>10</td><td>Blue</td></tr><tr><td>4</td><td>DDC_CLK</td><td>11</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>12</td><td>HSYNC</td></tr><tr><td>6</td><td>Red</td><td>13</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>14</td><td>VSYNC</td></tr></table>

![2\n1\n14\n13](.iap-e47-4u-50m-12901-1000-01-240708/b3f20055a9faba52800933ca5433d098c1bae9432a38d48fd5644c6e5ceb46f5.jpg)

# 4.3.7 ATX 12V Power Connector

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>GND</td></tr><tr><td>3</td><td>+12V DC</td></tr><tr><td>4</td><td>+12V DC</td></tr></table>

![The image displays a technical line drawing of a connector plug. It features a rectangular housing with a small rectangular base at the bottom. Inside the housing, four contacts are arranged in a 2x2 grid. Each contact is depicted as a central circle enclosed by a larger shape.\n\n- **Top Left:** A square shape containing a circle. The number **2** is positioned to its left, next to a curly brace.\n- **Top Right:** A hexagonal shape containing a circle. The number **1** is positioned to its right.\n- **Bottom Left:** A hexagonal shape containing a circle. The number **4** is positioned to its left.\n- **Bottom Right:** A square shape containing a circle. The number **3** is positioned to its right.](.iap-e47-4u-50m-12901-1000-01-240708/ec4330b5a155aff50b73ef810045830bf70611b352657732b1864b96a6d6286f.jpg)

# 4.3.8 Serial SATA Connectors

(CN30 to 33, CN43, CN44)

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>TXP</td></tr><tr><td>3</td><td>TXN</td></tr><tr><td>4</td><td>GND</td></tr><tr><td>5</td><td>RXN</td></tr><tr><td>6</td><td>RXP</td></tr><tr><td>7</td><td>GND</td></tr></table>

![The image displays a black-and-white technical line drawing of a rectangular frame. Inside the frame is a large central cutout containing a long, narrow rectangular element. This inner element features a vertical strip of alternating black and white squares down its center. Small notches are visible at the top and bottom corners of the outer frame. The numbers '1' and '7' are positioned vertically along the right side of the drawing.](.iap-e47-4u-50m-12901-1000-01-240708/78d13a5b690d57754d7ef9133692600df4f8a917e6702332cea55d2a0c0f67ad.jpg)

# 4.3.9 Audio Header

(CN5)

This connector is designed for use with the ADLINK DB-Audio2 daughter board.

<table><tr><td>Pin</td><td>Signal</td><td>Function</td></tr><tr><td>1</td><td>GND</td><td>Ground</td></tr><tr><td>2</td><td>AUD_BCLK</td><td>Audio Clock</td></tr><tr><td>3</td><td>GND</td><td>Ground</td></tr><tr><td>4</td><td>ICH_AUD_SDIN1</td><td>Audio Data Input</td></tr><tr><td>5</td><td>P5V</td><td>+ 5V</td></tr><tr><td>6</td><td>ICH_AUD_SDOUT</td><td>Audio Data Output</td></tr><tr><td>7</td><td>P5V_AUD</td><td>+ 5V</td></tr><tr><td>8</td><td>P3V3_DVDD</td><td>3.3V</td></tr><tr><td>9</td><td>AUD_SYNC</td><td>Audio Synchronous</td></tr><tr><td>10</td><td>AUD_RSTJ</td><td>Audio Reset</td></tr></table>

![The image displays a schematic diagram featuring a large black rectangular outline with a vertical gap on the left side.\n\n**Text:**\n- The number **1** is located at the top left corner.\n- The number **2** is located at the top right corner.\n- The number **9** is located at the bottom left corner.\n- The number **10** is located at the bottom right corner.\n\n**Visual Elements:**\n- Inside the rectangle, there is a grid of ten small, empty squares arranged in two columns of five rows.](.iap-e47-4u-50m-12901-1000-01-240708/15b2699360b2e42af0507d3ea0bdadcf9f9bc545e983b7572a33180011c74cd5.jpg)

# 4.3.10 System Panel Header (CN35)

Connects to chassis-mounted buttons, speakers, and LEDs.

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td><td>2</td><td>SPKR</td></tr><tr><td>3</td><td>RSTBTN</td><td>4</td><td>NC</td></tr><tr><td>5</td><td>NC</td><td>6</td><td>NC</td></tr><tr><td>7</td><td>GND</td><td>8</td><td>+5V_PSU</td></tr><tr><td>9</td><td>PWRBTN</td><td>10</td><td>NC</td></tr><tr><td>11</td><td>NC</td><td>12</td><td>GND</td></tr><tr><td>13</td><td>NC</td><td>14</td><td>KEYLOCK</td></tr><tr><td>15</td><td>HLED</td><td>16</td><td>PLED</td></tr><tr><td>17</td><td>HLED_POWER</td><td>18</td><td>NC</td></tr><tr><td>19</td><td>NC</td><td>20</td><td>+5V_PSU</td></tr></table>

![2\n1\n20\n19](.iap-e47-4u-50m-12901-1000-01-240708/959c300be7a54df7b758b8ac3ed4bf49efff17b2a358abb017c826fe56873c77.jpg)

# 4.3.11 FAN Header

(FAN1, FAN2)

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td></tr><tr><td>2</td><td>Fan power (+12V)</td></tr><tr><td>3</td><td>Fan Tachometer</td></tr><tr><td>4</td><td>Fan Speed Control</td></tr></table>

![The image displays a technical schematic. On the far left, the number '4' is shown in white text within a black rectangular box. On the far right, the number '1' is shown in white text within a black rectangular box. In the center, between these boxes, is a line drawing of a rectangular component. This component is divided into two main sections: the upper section shows a rectangle containing a smaller, offset rectangle on the left side, and the lower section shows a rectangle containing four small squares arranged in a horizontal row.](.iap-e47-4u-50m-12901-1000-01-240708/387506d5c1dd5d4f311a106385b50545a6f5bdd0def61a7d115d2c6fe1fe0e42.jpg)

# 4.3.12 LTP Header

(CN22)

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>STB-L</td><td>14</td><td>GND</td></tr><tr><td>2</td><td>AFD-L</td><td>15</td><td>PD6</td></tr><tr><td>3</td><td>PD0</td><td>16</td><td>GND</td></tr><tr><td>4</td><td>ERR-L</td><td>17</td><td>PD7</td></tr><tr><td>5</td><td>PD1</td><td>18</td><td>GND</td></tr><tr><td>6</td><td>INIT-L</td><td>19</td><td>ACK-L</td></tr><tr><td>7</td><td>PD2</td><td>20</td><td>GND</td></tr><tr><td>8</td><td>SLIN-L</td><td>21</td><td>BUSY</td></tr><tr><td>9</td><td>PD3</td><td>22</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>23</td><td>PE</td></tr><tr><td>11</td><td>PD4</td><td>24</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>25</td><td>SLCT</td></tr></table>

![25 1\n26 2](.iap-e47-4u-50m-12901-1000-01-240708/8875f3ba9ae20ecf6c0e06de0b2d567cc42280de563915d239a79745eb8f37b0.jpg)

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>13</td><td>PD5</td><td>26</td><td>NC</td></tr></table>

# 4.3.13 8-Bit GPIO Header

(DIO)

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>DO0</td></tr><tr><td>2</td><td>DO4</td></tr><tr><td>3</td><td>DO1</td></tr><tr><td>4</td><td>DO5</td></tr><tr><td>5</td><td>DO2</td></tr><tr><td>6</td><td>DO6</td></tr><tr><td>7</td><td>DO3</td></tr><tr><td>8</td><td>DO7</td></tr><tr><td>9</td><td>DI0</td></tr><tr><td>10</td><td>DI4</td></tr><tr><td>11</td><td>DI1</td></tr><tr><td>12</td><td>DI5</td></tr><tr><td>13</td><td>DI2</td></tr><tr><td>14</td><td>DI6</td></tr><tr><td>15</td><td>DI3</td></tr><tr><td>16</td><td>DI7</td></tr><tr><td>17</td><td>GND</td></tr><tr><td>18</td><td>GND</td></tr></table>

![19 20\n1 2](.iap-e47-4u-50m-12901-1000-01-240708/2a5137cade6565ee2786f6661c0ebd04e41838599a3571a91d58b959a9047165.jpg)

# 4.4 Jumpers and Switches

# 4.4.1 Clear CMOS Jumper

(CN41)

To clear the BIOS settings (RTC RST#):

1. Power down and disconnect the power from the system.
2. Short pins 2-3 on CN41.
3. Reconnect the power and power up the system.
4. Wait 3 for seconds or more.
5. Power down and disconnect the power from the system.
6. Re-short pins 1-2 and power up the system.

<table><tr><td>CMOS Status</td><td>Connection</td><td>CN41</td></tr><tr><td>Normal</td><td>1 – 2</td><td></td></tr><tr><td>Clear CMOS</td><td>2 – 3</td><td></td></tr></table>

# 4.4.2 Clear RTC Jumper

(CN42)

To clear the BIOS settings and data/time (SRTCRST#):

1. Power down and disconnect power from the system.
2. Short pins 2-3 on CN42.
3. Reconnect power and power up the system.

After power up, remove the jumper cap from pins 2-3 and reinstall it to pins 1-2.

<table><tr><td>CMOS Status</td><td>Connection</td><td>CN41</td></tr><tr><td>Normal</td><td>1 – 2</td><td>&lt;img src="images/adc5e2faf291157aefb94c08c9537eefbe53d640f4ca780ec9cc3f5a34d55468.jpg"/&gt;</td></tr><tr><td>Clear CMOS</td><td>2 – 3</td><td>&lt;img src="images/818ce8384201c8533836864b898e1566a6c8ac7b340654b52724620b6896f5e7.jpg"/&gt;</td></tr></table>

Note: To reset the CMOS, clear both CMOS and RTC jumpers at the same time.

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# 5 BIOS Setup

# 5.1 Menu Structure

This section presents the primary menus of the BIOS (UEFI) Setup Utility. Use the following table as a quick reference forthe contents of the UEFI Setup Utility. The subsections describe the submenus and options for each menu item.

Options to enter UEFI Setup Utility:

• Press [F2] or [Del] during POST (Power-On-Self-Test)
• Press [Ctl] + [Alt] + [Del] after POST

<table><tr><td>Main</td><td>Advanced</td><td>Chipset</td></tr><tr><td>- System Date- System Time</td><td>► CPU Configuration► Power Management► Serial Console Redirection► USB Configuration► TPM 2.0 Configuration► Onboard Devices Configuration► NCT6106D HW Monitor► BIOS Watchdog Timer► PCIe Express Configuration► Miscellaneous► Network Stake Configuration► Intel® Ethernet Controller (3) I225-V► Intel® Ethernet Controller (3) I225-LM</td><td>► System Agent (SA)Configuration► PCH-I/OConfiguration- PCH digital I/O device</td></tr><tr><td>Security</td><td>Boot</td><td>Save &amp; Exit</td></tr><tr><td>- Administrator Password- User Password► Secure Boot menu► Security Configuration</td><td>- Setup Prompt Timout- Bootup NumLock State- Quiet Boot- Fast Boot- Boot Option#1- Boot Option#2- Boot Option#3- Boot Option#4- Boot Option#5- Boot Option#6- Boot Option#7- Boot Option#8- Boot Option#9- Boot Option#10- Boot Option#11</td><td>- Save Changes and Exit- Discard Changes and Exit- Save Changes and Reset- Discard Changes and Reset- Save Changes- Discard Changes- Restore Defaults- Save as User Defaults- Restore User Defaults- Launch EFI Shell from the filesystem device</td></tr><tr><td>MEBx</td><td rowspan="2" colspan="2"></td></tr><tr><td>Intel(R) ME Password</td></tr></table>

# 5.2 Main Menu

Upon entering the UEFI Setup Utility, the Main Menu is displayed, providing read-only information about your system and also allows you to set the System Date and Time.

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>System Date</td><td>xxx mm/dd/yyyy</td><td rowspan="2">Sets the date and time. Use the tab to switch between elements.</td></tr><tr><td>System Time</td><td>hh:mm:ss</td></tr></table>

# 5.3 Advanced Menu

This section contains the settings for most of the user interfaces in the system.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>CPU Configuration</td><td>CPU Configuration</td></tr><tr><td>Power Management</td><td>System ACPI Parameters</td></tr><tr><td>Serial Console Redirection</td><td>Serial Console Redirection</td></tr><tr><td>USB Configuration</td><td>USB Configuration Parameters</td></tr><tr><td>TPM 2.0 Configuration</td><td>TPM 2.0 Configuration</td></tr><tr><td>Onboard Devices Configuration</td><td>Onboard Device Parameters</td></tr><tr><td>NCT6106D HW Monitor</td><td>Monitor Hardware Status</td></tr><tr><td>BIOS Watchdog Timer</td><td>BIOS Watch Dog Configuration</td></tr><tr><td>PCI Express Configuration</td><td>PCI Express Configuration Settings</td></tr><tr><td>Miscellaneous</td><td>Miscellaneous</td></tr><tr><td>Network Stake</td><td>Network Stack Settings</td></tr><tr><td>Intel® Ethernet Controller I225-V</td><td rowspan="2">Configure Gigabit Ethernet Device Parameters</td></tr><tr><td>Intel® Ethernet Controller I225-LM</td></tr></table>

# 5.3.1 Advanced Menu > CPU Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Hyper-Threading</td><td>EnabledDisabled</td><td>Enable or disable the Hyper-Threading technology</td></tr><tr><td>Active Performance-cores</td><td>All321</td><td>Number of P-cores to enable in each processor package. Note: Number of Cores and E-cores are considered together. When both are {0,0}, Pcode will enable all cores.</td></tr><tr><td>Intel (VMX)Virtualization Technology</td><td>EnabledDisabled</td><td>When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.</td></tr><tr><td>Intel(R)SpeedStep(TM)</td><td>EnabledDisabled</td><td>Allow more than two frequency ranges to be supported.</td></tr><tr><td>Intel(R) Speed Shift Technology</td><td>EnabledDisabled</td><td>Enable/disable Intel(R) Speed Shift Technology Support. Enabling will expose the CPPC v2 interface to allow for hardware-controlled P-states.</td></tr><tr><td>Turbo Mode</td><td>EnabledDisabled</td><td>Enable/disable processor TurboMode (required EMTTM enabled too). AUTO means enabled.</td></tr><tr><td>C states</td><td>DisabledEnabled</td><td>Enable/Disable CPU PowerManagement. Allows CPU to go to C states when it's not 100% utilized.</td></tr><tr><td>TCC Activation Offset</td><td>0</td><td>Offset from factory set Tcc activation temperature at which the Thermal Control Circuit must be activated.Tcc will be activated at: Tcc activationTemp – Tcc Activation Offset. Tcc Activation Offset range is 0 to 63.</td></tr></table>

# 5.3.2 Advanced > Power Management

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Power Supply Unit</td><td>ATX ModeEmulate AT Mode</td><td>Select Emulation AT or ATX function. If this option is set to [Emulation AT], BIOS will report no suspend functions (S3 &amp; S4) to ACPI OS. In windows XP, it will make the OS show shutdown message during system shutdown. ATX: OS will turn off system power when shutdown.</td></tr><tr><td>State After G3</td><td>Last StatePower Off Last State</td><td>Specify what state to go to when the power is re-applied after a power failure (G3 states).</td></tr><tr><td>RTC Wake system from S5</td><td>Disabled Fixed Time Dynamic Time</td><td>Enable or disable System wake on alarm event. Select FixedTime, system will wake on the hr::min::sec specified. Select DynamicTime, system will wake on the current time + Increase minutes(S).</td></tr><tr><td>PCIe Wake</td><td>EnabledDisabled</td><td>Enable or disable PCI Express wake capability.</td></tr></table>

# 5.3.3 Advanced > Serial Console Redirection

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Console Redirection</td><td>DisabledEnabled</td><td>Console Redirection Enable or Disable</td></tr><tr><td>Terminal Type</td><td>ANSIVT100VT100PlusVT-UTF9</td><td>Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set.VT100Plus: Extends VT100 to support color, function keys, etc.VT- UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes.</td></tr><tr><td>Bites per second</td><td>1152009600192003840057600</td><td>Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds.</td></tr><tr><td>Data Bits</td><td>87</td><td>Data Bites</td></tr><tr><td>Parity</td><td>None Even OddMark Space</td><td>A parity bit can be sent with the data bits to detect some transmission errors. Even: parity bit is 0 if the num of 1's in the data bits is even. Odd: parity bit is 0 if num of 1's in the data bits is odd. Mark: parity bit is always 1. Space: Parity bit is always 0. Mark and Space Parity do not allow for error detection.</td></tr><tr><td>Stop Bits</td><td>12</td><td>Stop bits indicate the end of a serial data packet. (A stat bit indicates the beginning). The standard setting is 1 stop bit. Communication with slow devices may require more than 1 stop bit.</td></tr></table>

5.3.4 Advanced > USB Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>USB Mass Storage Driver Support</td><td>EnabledDisabled</td><td>Enable/Disable USB Mass Storage Driver Support</td></tr><tr><td>USB transfer time-out</td><td>20 sec1 sec5 sec10 sec</td><td>The time-out value for Control, Bulk, and Interrupt transfers.</td></tr><tr><td>Device reset time-out</td><td>20 sec10 sec30 sec40 sec</td><td>USB mass storage device Start Unit command time-out.</td></tr><tr><td>Device power-up delay</td><td>AutoManual</td><td>Maximum time the device will take before it properly reports itself to the Host Controller. &#x27;Auto&#x27; uses default value: for a Root port it is 100 ms, for a Hub port the delay is taken from Hub descriptor.</td></tr></table>

5.3.5 Advanced > TPM 2.0 Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Security Device Support</td><td>Enable Disable</td><td>Enables or disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available</td></tr><tr><td>SHA256 PCR Bank</td><td>Enabled Disabled</td><td>Enable or Disable SHA256 PCR Bank</td></tr><tr><td>SHA384 PCR Bank</td><td>Disabled Enabled</td><td>Enable or Disable SHA384 PCR Bank</td></tr><tr><td>Pending operation</td><td>None TPM Clear</td><td>Schedule an Operation for the Security Device. NOTE: Your computer will reboot during a restart to change the state of the Security Device.</td></tr><tr><td>Platform Hierarchy</td><td>Enabled Disabled</td><td>Enable or Disable Platform Hierarchy</td></tr><tr><td>Storage Hierarchy</td><td>Enabled Disabled</td><td>Enable or Disable Storage Hierarchy</td></tr><tr><td>Endorsement Hierarchy</td><td>Enabled Disabled</td><td>Enable or Disable Endorsement Hierarchy</td></tr><tr><td>Physical Presence Spec Version</td><td>1.3 1.2</td><td>Select to Tell O.S. to support PPI Spec Version 1.2 or 1.3. Note some HCK tests might not support 1.3.</td></tr><tr><td>PH Randomization</td><td>Enabled Disabled</td><td>Enables or Disables Platform Hierarchy Randomization. DO NOT ENABLE THIS QUESTION IN</td></tr></table>

5.3.6 Advanced > Onboard Device Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>COM1</td><td>EnabledDisabled</td><td>Enable or Disable Serial Port (COM)</td></tr><tr><td>COM1 Mode Control</td><td>RS232RS422RS485</td><td>Select COM1 mode. RS232, RS422, RS485</td></tr><tr><td>COM2</td><td>EnabledDisabled</td><td>Enable or Disable Serial Port (COM)</td></tr><tr><td>COM2 Mode Control</td><td>RS232RS422RS485</td><td>Select COM1 mode. RS232, RS422, RS485</td></tr><tr><td>COM3</td><td>EnabledDisabled</td><td>Enable or Disable Serial Port (COM)</td></tr><tr><td>COM4</td><td>EnabledDisabled</td><td>Enable or Disable Serial Port (COM)</td></tr><tr><td>Parallel Port</td><td>EnabledDisabled</td><td>Enable or Disable Parallel Port (LPT/LPTE)</td></tr><tr><td>Change Settings</td><td>AutoIO=378h; IRQ=5; IO=378h;IRQ=5,6,7,9,10,11,12; IO=278h;IRQ=5,6,7,9,10,11,12; IO=3BCh;IRQ=5,6,7,9,10,11,12;</td><td>Select an optimal setting for Super IO Device</td></tr><tr><td>Device Mode</td><td>STD Printer ModeSPP ModeEPP-1.9 and SPP ModeEPP-1.7 and SPP ModeECP ModeECP and EPP-1.9 ModeECP and EPP-1.7 Mode</td><td>Change the Printer Port Mode</td></tr><tr><td>LAN #1</td><td>EnabledDisabled</td><td>Enable/Disable</td></tr><tr><td>LAN #2</td><td>EnabledDisabled</td><td>Enable/Disable</td></tr></table>

5.3.7 Advanced > NCT6126H Hardware Monitor

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>CPU Fan Control Mode(Fan 1)</td><td>SMART FAN IV Manual mode</td><td>Configure Fan Control Mode. Select Manual Mode, user can configure a fix fan duty. Select SMART FAN IV, user can configure 4 temperatures and 4 fan duties. Select Auto Mode, FAN will run at automatic speed with thermal.</td></tr><tr><td>Temperature 1</td><td>25</td><td>The value of temperature1.</td></tr><tr><td>FD/PRM 1</td><td>140</td><td>The value of Fan Duty/RPM when temperature is T1.</td></tr><tr><td>Temperature 2</td><td>35</td><td>The value of temperature2.</td></tr><tr><td>FD/PRM 2</td><td>170</td><td>The value of Fan Duty/RPM when temperature is T2.</td></tr><tr><td>Temperature 3</td><td>45</td><td>The value of temperature3.</td></tr><tr><td>FD/PRM 3</td><td>200</td><td>The value of Fan Duty/RPM when temperature is T3.</td></tr><tr><td>Temperature 4</td><td>55</td><td>The value of temperature4.</td></tr><tr><td>FD/PRM 4</td><td>230</td><td>The value of Fan Duty/RPM when temperature is T4.</td></tr><tr><td>Critical Temperature</td><td>60</td><td>Fan temperature critical value.</td></tr><tr><td>CPU Fan Control Mode(Fan 2)</td><td>SMART FAN IV Manual mode</td><td>Configure Fan Control Mode. Select Manual Mode, user can configure a fix fan duty. Select SMART FAN IV, user can configure 4 temperatures and 4 fan duties. Select Auto Mode, FAN will run at automatic speed with thermal.</td></tr><tr><td>Temperature 1</td><td>25</td><td>The value of temperature1.</td></tr><tr><td>FD/PRM 1</td><td>140</td><td>The value of Fan Duty/RPM when temperature is T1.</td></tr><tr><td>Temperature 2</td><td>35</td><td>The value of temperature2.</td></tr><tr><td>FD/PRM 2</td><td>170</td><td>The value of Fan Duty/RPM when temperature is T2.</td></tr><tr><td>Temperature 3</td><td>45</td><td>The value of temperature3.</td></tr><tr><td>FD/PRM 3</td><td>200</td><td>The value of Fan Duty/RPM when temperature is T3.</td></tr><tr><td>Temperature 4</td><td>55</td><td>The value of temperature4.</td></tr><tr><td>FD/PRM 4</td><td>230</td><td>The value of Fan Duty/RPM when temperature is T4.</td></tr><tr><td>Critical Temperature</td><td>60</td><td>Fan temperature critical value.</td></tr></table>

# 5.3.8 Advanced > Watchdog Timer

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>BIOS POST Watchdog</td><td>DisabledSecond ModeMinute Mode</td><td>1. Disable: Disable WatchDog Timer;2. Second Mode: Enable Watchdog Timer in second mode; 3. Minute Mode: Enable Watchdog Timer in minute mode.</td></tr></table>

# 5.3.9 Advanced > PCI Express Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>PEG Port Configuration</td><td></td><td>PEG Port Options</td></tr><tr><td>PCI Express Root Port B0</td><td></td><td>PCI Express Root Port B0 Settings.</td></tr><tr><td>Pcie PII SCC</td><td>Auto0.0% - 2.0%Disable</td><td>Pcie PII SSC percentage. AUTO - Keep hw default, no BIOS override. Range is 0.0%-2.0%.PEG Port Options</td></tr><tr><td>Clock B0 Assignment (REFCLK0)</td><td>EnabledPlatform-PORDisabled</td><td rowspan="3">Platform-POR = clock is assigned to PCIe port or LAN according to board layout. Enabled = keep clock enabled even if unused. Disabled = Disable clock.</td></tr><tr><td>Clock B0 Assignment (REFCLK1)</td><td>EnabledPlatform-PORDisabled</td></tr><tr><td>Clock B0 Assignment (REFCLK2)</td><td>Enabled Platform-POR Disabled</td></tr><tr><td>Clock B0Assignment (REFCLK3)</td><td>EnabledPlatform-PORDisabled</td><td></td></tr></table>

5.3.9.1 Advanced > PCI Express Configuration > PEG Port Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>PCI Express Root Port 1</td><td>EnabledDisabled</td><td>Control the PCI Express Root Port</td></tr><tr><td>PCIe Speed</td><td>AutoGen1Gen2Gen3Gen4Gen5</td><td>Configure PCIe Speed</td></tr><tr><td>PEG1 Max Payload Size</td><td>256128</td><td>Select PEG Max Payload Size; Choose Auto(Default Device Capability) or force to 128/256 Bytes</td></tr><tr><td>PCI Express Root Port 2</td><td>EnabledDisabled</td><td>Control the PCI Express Root Port</td></tr><tr><td>PCIe Speed</td><td>AutoGen1Gen2Gen3Gen4Gen5</td><td>Configure PCIe Speed</td></tr><tr><td>PEG2 Max Payload Size</td><td>256128</td><td>Select PEG Max Payload Size; Choose Auto(Default Device Capability) or force to 128/256 Bytes</td></tr><tr><td>PCI Express Root Port 3</td><td>EnabledDisabled</td><td>Control the PCI Express Root Port</td></tr><tr><td>PCIe Speed</td><td>AutoGen1Gen2Gen3Gen4Gen5</td><td>Configure PCIe Speed</td></tr><tr><td>PCIe Speed</td><td>AutoGen1Gen2Gen3Gen4Gen5</td><td>Configure PCIe Speed</td></tr></table>

5.3.9.2 Advanced > PCI Express Configuration > PCI Express Root Port B0

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>PCI Express Root Port B0</td><td>EnabledDisabled</td><td>Control the PCI Express Root Port</td></tr><tr><td>PCIe Speed</td><td>AutoGen1Gen2Gen3Gen4Gen5</td><td>Configure PCIe Speed</td></tr><tr><td>Detect Non-Compliance Device</td><td>DisabledEnabled</td><td>Detect Non-Compliance PCI Express Device. If enable, it will take more time at POST time.</td></tr><tr><td>Advanced Error Reporting</td><td>EnabledDisabled</td><td>Advanced Error Reporting Enable/ Disable.</td></tr><tr><td>Max Payload</td><td>256128512</td><td>Max Payload settings</td></tr></table>

5.3.10 Advanced > Miscellaneous

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Control Iommu Pre-boot Behavior</td><td>Disable IOMMUEnable IOMMU during boot</td><td>Enable IOMMU in Pre-boot environment (If DMAR table is installed in DXE and If VTD_INFFO_PPI is installed in PEI.)</td></tr><tr><td>DMA Control Guarantee</td><td>DisabledEnabled</td><td>Enable/Disable DMA_CONTROL_GUARANTEE bit</td></tr><tr><td>Above 4GB MMIO BIOS assignment</td><td>EnabledDisabled</td><td>Enable/Disable above 4GB Memory MappedIO BIOS assignment. This is enabled automatically when Aperture Size is set to 2048MB.</td></tr></table>

5.3.11 Advanced > Network Stack Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Network Stack</td><td>DisabledEnabled</td><td>Enable/Disable UEFI Network Stack</td></tr><tr><td>IPv4 PXE Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv4 PXE boot support. If disabled, IPv4 PXE boot support will not be available.</td></tr><tr><td>IPv4 HTTP Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv4 HTTP boot support. If disabled, IPv4 HTTP boot support will not be available.</td></tr><tr><td>IPv6 PXE Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv6 PXE boot support. If disabled, IPv6 PXE boot support will not be available.</td></tr><tr><td>IPv6 HTTP Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv6 HTTP boot support. If disabled, IPv6 HTTP boot support will not be available.</td></tr><tr><td>PXE boot wait time</td><td>0</td><td>Wait time in seconds to press ESC key to abort the PXE boot. Use either +/- or numeric keys to set the value.</td></tr><tr><td>Media detect count</td><td>1</td><td>Number of times the presence of media will be checked. Use either +/- or numeric keys to set the value.</td></tr></table>

5.4 Chipset

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>► System (SA)Configuration</td><td></td><td>System Agent (SA) Parameters</td></tr><tr><td>► PCH-IOConfiguration</td><td></td><td>PCH Parameters</td></tr><tr><td>PCH digital I/O device</td><td>DisabledEnabled</td><td>Disable/Enable ACPI GPIO Device support for PCH digital I/O and user LED</td></tr></table>

5.4.1 Chipset > System Agent (SA) Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Memory Configuration</td><td></td><td>Memory Configuration Parameters</td></tr><tr><td>Graphics Configuration</td><td></td><td>Graphics Configuration</td></tr><tr><td>VMD setup menu</td><td></td><td>VMD Configuration Settings</td></tr><tr><td>NVMe Configuration</td><td></td><td>NVMe Device Options Settings</td></tr><tr><td>NVMe Controller</td><td>EnabledDisabled</td><td>Control the PCI Express Root Port</td></tr><tr><td>VT-d</td><td>EnabledDisabled</td><td>VT-d capability</td></tr></table>

5.4.1.1 Chipset > System Agent (SA) Configuration > Graphic Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Primary Display</td><td>IGFXAutoPEG Slot PCHPCI</td><td>Select which of IGFX/PEG/PCI Graphics device should be Primary Display or select HG for Hybrid Gfx.</td></tr><tr><td>Internal Graphics</td><td>EnabledAuto Disabled</td><td>Keep IGFX enabled based on the setup options.</td></tr><tr><td>GTT Size</td><td>8MB2MB4MB</td><td>Select the GTT Size</td></tr><tr><td>Aperture Size</td><td>256MB128MB512MB1024MB2048MB</td><td>Select the Aperture SizeNote: Above 4GB MMIO BIOS assignment is automatically enabled when selecting &gt;2048MB aperture. To use this feature, please disable CSM Support.</td></tr><tr><td>DVMT Pre-Allocated</td><td>32M4M8M16M64M</td><td>Select DVMT 5.0 Pre-Allocated (Fixed) Graphics Memory size used by the Internal Graphics Device</td></tr></table>

5.4.1.2 Chipset > System Agent (SA) Configuration > VMD Setup Menu

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Enable VMD controller</td><td>DisabledEnabled</td><td>Enable/Disable to VMD controller</td></tr><tr><td>Enable VMD Global Mapping</td><td>EnabledDisabled</td><td>Enable/Disable to VMD Global Mapping</td></tr><tr><td>RAID0</td><td>EnabledDisabled</td><td>Enable/Disable RAID0 support</td></tr><tr><td>RAID1</td><td>EnabledDisabled</td><td>Enable/Disable RAID1 support</td></tr><tr><td>RAID5</td><td>EnabledDisabled</td><td>Enable/Disable RAID5 support</td></tr><tr><td>RAID10</td><td>EnabledDisabled</td><td>Enable/Disable RAID10 support</td></tr><tr><td>Intel Rapid Recovery Technology</td><td>EnabledDisabled</td><td>Enable/Disable Intel Rapid Recovery Technology.</td></tr><tr><td>RRT volumes can span internal and eSATA device</td><td>EnabledDisabled</td><td>Enable/Disable RRT volumes can span internal and eSATA drives</td></tr><tr><td>Intel(R) Optane(TM) Memory</td><td>EnabledDisabled</td><td>Enable/Disable System Acceleration with Intel(R) Optane(TM) Memory feature.</td></tr></table>

5.4.2 Chipset > PCH-IO Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>▶ SATA Configuration</td><td></td><td>SATA Device Options Settings</td></tr><tr><td>▶ USB Configuration</td><td></td><td>USB Configuration Settings</td></tr></table>

5.4.2.1 Chipset > PCH-IO Configuration > SATA Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>SATA Mode Selection</td><td>AHCI</td><td>Determines how SATA controller(s) operate.</td></tr><tr><td>SATA Controller Speed</td><td>Gen3DefaultGen1Gen2</td><td>Indicates the maximum speed the SATA controller can support.</td></tr><tr><td>SATA HDD 0</td><td>EnabledDisabled</td><td rowspan="6">Enable or Disable SATA Port</td></tr><tr><td>SATA HDD 1</td><td>EnabledDisabled</td></tr><tr><td>SATA HDD 2</td><td>EnabledDisabled</td></tr><tr><td>SATA HDD 3</td><td>EnabledDisabled</td></tr><tr><td>SATA HDD 4</td><td>EnabledDisabled</td></tr><tr><td>SATA HDD 5</td><td>EnabledDisabled</td></tr></table>

5.4.2.2 Chipset > PCH-IO Configuration > USB Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>USB Port Disable Override</td><td>Disable LinkSelect Per-Pin</td><td>Selectively enable/disable the corresponding USB port from reporting a Device Connection to the controller.</td></tr><tr><td>USB SS Physical Connector #0</td><td>EnabledDisabled</td><td rowspan="10">Enable/disable this USB Physical Connector (physical port). Once disabled, any USB devices plug into the connector will not be detected by BIOS or OS.</td></tr><tr><td>USB SS Physical Connector #1</td><td>EnabledDisabled</td></tr><tr><td>USB SS Physical Connector #2</td><td>EnabledDisabled</td></tr><tr><td>USB SS Physical Connector #3</td><td>EnabledDisabled</td></tr><tr><td>USB SS Physical Connector #4</td><td>EnabledDisabled</td></tr><tr><td>USB SS Physical Connector #5</td><td>EnabledDisabled</td></tr><tr><td>USB SS Physical Connector #6</td><td>EnabledDisabled</td></tr><tr><td>USB SS Physical Connector #7</td><td>EnabledDisabled</td></tr><tr><td>USB SS Physical Connector #8</td><td>EnabledDisabled</td></tr><tr><td>USB SS Physical Connector #9</td><td>EnabledDisabled</td></tr><tr><td>USB HS Physical Connector #0</td><td>EnabledDisabled</td><td rowspan="4">Enable/disable this USB Physical Connector (physical port). Once disabled, any USB devices plug into the connector will not be detected by BIOS or OS.</td></tr><tr><td>USB HS Physical Connector #1</td><td>EnabledDisabled</td></tr><tr><td>USB HS Physical Connector #2</td><td>EnabledDisabled</td></tr><tr><td>USB HS Physical Connector #3</td><td>EnabledDisabled</td></tr><tr><td>USB HS Physical Connector #4</td><td>EnabledDisabled</td><td rowspan="6"></td></tr><tr><td>USB HS Physical Connector #5</td><td>EnabledDisabled</td></tr><tr><td>USB HS Physical Connector #6</td><td>EnabledDisabled</td></tr><tr><td>USB HS Physical Connector #7</td><td>EnabledDisabled</td></tr><tr><td>USB HS Physical Connector #8</td><td>EnabledDisabled</td></tr><tr><td>USB HS Physical Connector #9</td><td>EnabledDisabled</td></tr></table>

# 5.5 Security

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Administrator Password</td><td></td><td>Set Administrator Password</td></tr><tr><td>User Password</td><td></td><td>Set User Password</td></tr><tr><td>Secure Boot menu</td><td></td><td>Secure Boot configuration</td></tr><tr><td>Security Configuration</td><td></td><td>Security Configuration settings</td></tr></table>

# 5.5.1 Security > Secure Boot Menu

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Secure Boot Control</td><td>DisabledEnabled</td><td>Secure Boot feature is active if the Secure Boot is enabled, Platform key (PK) is enrolled and the system is in User mode. The mode change requires platform reset.</td></tr><tr><td>Secure Boot Mode</td><td>StandardCustom</td><td>Secure Boot mode options: Standard or Custom. In Custom mode, Secure Boot Policy variables can be configured by a physically present user without full authentication.</td></tr></table>

# 5.5.2 Security > Security Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>BIOS Lock</td><td>EnabledDisabled</td><td>Enable/disable the PCH BIOS Lock Enable feature. Required to be enabled to ensure SMM protect of flash.</td></tr></table>

5.6 Boot

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Setup Prompt Timeout</td><td>1</td><td>Number of seconds to wait for setup activation key. The maximum value is 8.</td></tr><tr><td>Bootup NumLock State</td><td>OffOn</td><td>Select the keyboard NumLock state</td></tr><tr><td>Quiet Boot</td><td>EnabledDisabled</td><td>Enables or disables Quiet Bootoption</td></tr><tr><td>Fast Boot</td><td>Disable LinkEnabled</td><td>Enables or disables boot with initialization of a minimal set of devices required to launch active boot option. Has no effect for BBS boot options.</td></tr><tr><td>Boot Option #1</td><td>Hard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #2</td><td>NVMEHard DiskUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #3</td><td>UEFI APHard DiskNVMECD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #4</td><td>CD/DVDHard DiskNVMEUEFI APSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #5</td><td>SDHard DiskNVMEUEFI APCD/DVDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #6</td><td>USB Hard DiskHard DiskNVMEUEFI APCD/DVDSDUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #7</td><td>USB CD/DVDHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #8</td><td>USB KeyHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #9</td><td>USB FloppyHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #10</td><td>USB LanHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #11</td><td>NetworkHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanDisabled</td><td>Sets the system boot order</td></tr></table>

5.7 Save & Exit

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Save Changes and Exit</td><td>Exit system setup after saving the changes.</td></tr><tr><td>Discard Changes and Exit</td><td>Exit system setup without saving any changes.</td></tr><tr><td>Save Changes and Reset</td><td>Reset the system after saving the changes.</td></tr><tr><td>Discard Changes and Reset</td><td>Reset the system without saving any changes.</td></tr><tr><td>Save Changes</td><td>Save Changes done so far to any of the setup options.</td></tr><tr><td>Discard Changes</td><td>Discard Changes done so far to any of the setup options.</td></tr><tr><td>Restore Defaults</td><td>Restore/Load Default values for all the setup options.</td></tr><tr><td>Save as User Defaults</td><td>Save the changes done so far as User Defaults.</td></tr><tr><td>Restore User Defaults</td><td>Restore the User Defaults to all the setup options</td></tr><tr><td>Launch EFI Shell from file system device</td><td>Attempts to Launch EFI Shell application (Shell.efi) from one of the available file system devices</td></tr></table>

5.8 MEBx

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Intel(R) ME Password</td><td>MEBx Login</td></tr></table>

# Safety Instructions

Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use.

• Please read these safety instructions carefully.
• Please keep this User‘s Manual for later reference.
• Read the specifications section of this manual for detailed information on the operating environment of this equipment.
• When installing/mounting or uninstalling/removing equipment, turn off the power and unplug any power cords/cables.
• To avoid electrical shock and/or damage to equipment:

 Keep equipment away from water or liquid sources.
 Keep equipment away from high heat or high humidity.
 Keep equipment properly ventilated (do not block or cover ventilation openings).
 Make sure to use recommended voltage and power source settings.
 Always install and operate equipment near an easily accessible electrical socket-outlet.
 Secure the power cord (do not place any object on/over the power cord).
 Only install/attach and operate equipment on stable surfaces and/or recommended mountings.
 If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source.

• Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.

# Getting Service

Ask an Expert: https://www.adlinktech.com/en/Askanexpert

# ADLINK Technology, Inc.

<table><tr><td>Address:</td><td>No. 66, Huaya 1st Road, Guishan DistrictTaoyuan City 333, Taiwan</td></tr><tr><td>Tel:</td><td>+886-3-216-5088</td></tr><tr><td>Fax:</td><td>+886-3-328-5723</td></tr><tr><td>Email:</td><td>service@adlinktech.com</td></tr></table>

# Ampro ADLINK Technology, Inc.

Address: 6450 Via Del Oro, San Jose, CA 95119-1208, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-600-1189

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

<table><tr><td>Address:</td><td>300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area Shanghai, 201203 China</td></tr><tr><td>Tel:</td><td>+86-21-5132-8988</td></tr><tr><td>Fax:</td><td>+86-21-5132-3588</td></tr><tr><td>Email:</td><td>market@adlinktech.com</td></tr></table>

# ADLINK Technology GmbH

<table><tr><td>Address:</td><td>Hans-Thoma-Strasse 11, D-68163, Mannheim, Germany</td></tr><tr><td>Tel:</td><td>+49-621-43214-0</td></tr><tr><td>Fax:</td><td>+49-621 43214-30</td></tr><tr><td>Email:</td><td>emea@adlinktech.com</td></tr></table>

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you.
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