# IMB-M43H User’s Manual ATX Motherboard with 6th /7th Gen Intel® Core™ i7/i5/i3 Processors and Intel® H110 Chipset ![Green printed circuit board with various electronic components and connectors (no readable text or symbols)](.imb-m43h-50-1z241-1000-10/a93c06de3b9e85c2479c223547ec07294caa832713c3392bf1271d02eefcd2f5.jpg) Manual Rev.: 1.0 Revision Date: October 16, 2018 Part Number: 50-1Z241-1000 # Preface # Copyright Copyright 2018 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. # Disclaimer The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages. # Environmental Responsibility ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company. ![Symbol of a trash bin crossed with two crossed lines and a solid rectangle below (no text or labels)](.imb-m43h-50-1z241-1000-10/4056e369cf2c657b7fb56653aefe09997a5804121f1382e06d4dce05150847ed.jpg) Battery Labels (for products with battery) ![Simple line drawing of a trash bin with two crossed lines indicating no waste or prohibition (no text or symbols)](.imb-m43h-50-1z241-1000-10/2df3e2fcbd2bf12e7ff8f257c6a37e1eb1a2112dc02733c52f613e4d057783e0.jpg) ![Li-ion](.imb-m43h-50-1z241-1000-10/e844927c79ec436d76e23be212b3284df36ff3a7a094036ba521741be37b9b78.jpg) ![RECYCLE\nRBRC\nLi-ion\n7.800.822.8837](.imb-m43h-50-1z241-1000-10/85d15d32857bb70d1bc9856a4eb7165142378931fec406f64e95deefd414e9a9.jpg) ![廢電池請回收](.imb-m43h-50-1z241-1000-10/98435b5020e1aa41c395012523fe6a7e1c125cb107896cfe17132e3110b7f946.jpg) # California Proposition 65 Warning ![The image displays a standard warning sign featuring a yellow equilateral triangle with a thick black border. Centered inside the triangle is a black exclamation point.](.imb-m43h-50-1z241-1000-10/f71a19dc504436ac7acf806606b8b05a296918fd7b7dd003170472425881bee2.jpg) WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov. # Trademarks Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies. # Revision History

Revision	Description	Date	By
1.0	Initial release	2018-10-16	DA

# Table of Contents Preface... List of Figures ........ List of Tables.... .vi 1. Introduction................. 1.1. Packing List .. 1.2. Optional Accessories . 2. Specifications .............. 2.1. Core System . .3 2.2. I/O Interface .. .3 2.3. Video .. ..3 2.4. Audio . .4 2.5. LAN.. .4 2.6. Temperatures . 4 2.7. Humidity... .4 2.8. Certificate (EMC) .. 4 2.9. Form Factor .. 4 2.10. Operating Systems .. 4 2.11. Functional Block Diagram ..... .5 3. Mechanical Layout .... 3.1. Connector Locations ... 7 3.2. Mechanical Dimensions . ..10 4. Connector Pinouts .... .11 4.1. Rear IO Connectors . .11 4.2. Internal Connectors.. ..13 4.3. Jumper and Switch Settings.. ..20 5. Driver Installation .......... .25 6. System Resources ... .27 6.1. System Memory Map . .27 6.2. I/O Map ... ..27 6.3. Interrupt Request (IRQ) Lines .. ..29 6.4. PCI Features.. ..30 6.5. SMBus Slave Addresses.. ..31 # 7. BIOS Setup.............. .33 7.1. Menu Structure . .33 7.2. Main Menu . .34 7.3. Advanced Menu.. ..34 7.4. Chipset Menu.. ..43 7.5. Security Menu.. ..49 7.6. Boot Menu . ..50 7.7. Save & Exit Menu . ..50 # Safety Instructions... .52 # Getting Service..... .54 # List of Figures Figure 1: Functional Block Diagram . .5 Figure 2: IO Panel Connector Locations . Figure 3: Connector Locations .. .8 Figure 4: Mechanical Dimensions .. ...10 Figure 5: Mechanical Dimensions - IO Panel.. ...10 # List of Tables Table 1: Connector Definitions . .8 Table 2: Jumper and Switch Definitions .. ..20 Table 3: System Memory Map .. ..27 Table 4: IO Map.. ...27 Table 5: IRQ Lines PIC Mode ... ..29 Table 6 IRQ Lines APIC Mode . ..29 Table 8 PCI Configuration Space Map... ...30 Table 8 PCI Interrupt Routing Map.. ...31 Table 9 SMBus Slave Addresses... ...31 # 1. Introduction IMB-M43H is an ATX motherboard supporting the Desktop 6th and 7th Generation Intel® Core™ i7/i5/i3 Processors with Intel® H110 Chipset, providing the most cost-competitive solution anywhere in embedded computing and fulfilling the specific needs of all users requiring 5 PCI add-on cards. With high-speed data transfer interfaces such as PCIe 3.0/2.0, USB 3.0, and SATA 6 Gb/s (SATA III), dual-channel DDR4 memory up to 32 GB in two DIMM slots for industrial automation applications, the ADLINK IMB-M43H carries significant competitive advantage in the market. This leading, rugged I/O design enhances user experience with robust device compatibility, durable connectivity, and extreme environment readiness. # 1.1. Packing List IMB-M43H ATX motherboard Rear I/O shield # 1.2. Optional Accessories • 2-port USB 2.0 port cable with bracket • 1-port LPT port cable with bracket • 2-port COM port cable with bracket • LGA1156 2U Thermal Module This page intentionally left blank. # 2. Specifications # 2.1. Core System  CPU: Desktop 6th/7th Generation Intel® Core™ i7/i5/i3 Processor, LGA1151 socket • Intel® Core™ i7-6700, 3.4 GHz, 8M Cache, 14nm, 65W TDP, LGA1151 (4C/8T) • Intel® Core™ i7-6700TE, 2.4 GHz 8M Cache, 14nm, 35W TDP, LGA1151 (4C/8T) • Intel® Core™ i5-6500, 3.2 GHz, 6M Cache, 14nm, 65W TDP, LGA1151 (4C/4T) • Intel® Core™ i5-6500TE, 2.3 GHz, 6M Cache, 14nm, 35W TDP, LGA1151 (4C/4T) • Intel® Core™ i3-6100, 3.7 GHz, 3M Cache, 14nm,51W TDP, LGA1151 (2C/4T) • Intel® Core™ i3-6100TE, 2.7 GHz, 4M Cache, 14nm, 35W TDP, LGA1151 (2C/4T) • Intel® Pentium® G4400, 3.3GHz, 3M Cache, 14nm, 54W TDP, LGA1151 (2C/2T) • Intel® Pentium® G4400TE, 2.4GHz, 3M Cache,14nm, 35W TDP, LGA1151 (2C/2T) • Intel® Celeron® G3900, 2.8GHz, 2M Cache, 14nm, 51W TDP, LGA1151 (2C/2T) • Intel® Celeron® G3900TE, 2.3GHz, 2M Cache,14nm, 35W TDP, LGA1151 (2C/2T) • Intel® Core™ i7-7700, 3.6GHz, 8M Cache, 14nm, 65W TDP, LGA1151 (4C/8T) • Intel® Core™ i7-7700T, 2.9GHz 8M Cache, 14nm, 35W TDP, LGA1151 (4C/8T) • Intel® Core™ i5-7500, 3.4GHz, 6M Cache, 14nm, 65W TDP, LGA1151 (4C/4T) • Intel® Core™ i5-7500T, 2.7GHz, 6M Cache, 14nm, 35W TDP, LGA1151 (4C/4T) • Intel® Core™ i3-7101E, 3.9GHz, 3M Cache, 14nm, 54W TDP, LGA1151 (2C/4T) • Intel® Core™ i3-7101TE, 3.4GHz, 3M Cache, 14nm, 35W TDP, LGA1151 (2C/4T) Chipset: Intel® H110 Chipset  Memory: Two 288 PIN DDR4 Sockets (vertical type), Dual channel DDR4 2133MHz, up to 32 GB BIOS: AMI® UEFI BIOS, 128 Mb SPI Flash Memory # 2.2. I/O Interface Expansion slots: 1xPCIe x16 Gen3,1xPCIe x4 Gen2, 5x PCI 2.2 . LAN: Dual GbE RJ-45 (rear) SATA: 4x SATA 6.0 Gb/s connectors USB: 4x USB 3.0 connectors (rear), 2x USB 2.0 connectors (rear), 2x USB 2.0 pin headers, 2x USB 2.0 (vertical type A connector)  COM: 2x RS-232/422/485 with auto flow control connector (rear), 4x RS-232 pin headers Parallel Port: 1x LPT pin header  PS2 Combo Port: 1x PS/2 keyboard & Mouse connector (rear) DIO: 2x 20-pin/2.0mm GPIO pin header: 16 in and 16 out, one ground pin and one power pin # 2.3. Video Graphics Engine: Integrated Intel® HD Graphics series (based on CPU) Interfaces: 1x VGA connector (rear), resolution up to 1920 x 1200 @ 60 Hz, 1x HDMI connector (rear) resolution up to 4096 x 2160 @ 24 Hz # 2.4. Audio  Audio Codec: Realtek® ALC892-CG Interfaces: 1x Mic-in, 1x Line-out and 1x Line-in connector (rear) # 2.5. LAN  LAN1: Intel® I219-LM via RJ45 connector (rear)  LAN2: Intel® I211-AT via RJ45 connector (rear) # 2.6. Temperatures Operating Temperature: $0 \%$ to $6 0 ^ { \circ } \mathsf { C }$ Storage Temperature: -40°C to 85°C # 2.7. Humidity ${ \bf 4 0 ^ { \circ } C }$ @ 95% RH Non-condensing # 2.8. Certificate (EMC) CE/FCC Class B # 2.9. Form Factor ATX: 305 mm x 244 mm (W x L) # 2.10. Operating Systems  Microsoft® Windows® 7 32/64-bit (only for 6th Gen Intel® Core™ processors) Microsoft® Windows® 8.1 64-bit Microsoft® Windows® 10 64-bit OpenSUSE Leap 42.1 64-bit Fedora 25 64-bit Ubuntu 16.04 LTS 64 bit # 2.11. Functional Block Diagram ![Based on the provided flowchart, here are the labeled blocks and their connections:\n\n**Labeled Blocks:**\n* 6th 7th Gen Intel Core\n* PTN3355BS\n* H110\n* I219LM\n* I211AT\n* ALC892\n* IT8892E\n* IT8209R\n* SPI ROM\n* 32bit GPIO\n* NCT6106D\n\n**Connections:**\n\n* **6th 7th Gen Intel Core** connects to:\n * **PCIe Gen3 x16** (connected via a grey square)\n * **HDMI**\n * **PTN3355BS** (which connects to **VGA** via a blue square)\n * **Dual Channel** (connected via a grey square)\n * **DDR4-2133/2400** (connected via a grey square)\n * **H110** (via connection labeled **DMI**)\n\n* **H110** connects to:\n * **I219LM** (labeled **LAN**), which connects to **RJ-45** (via a blue square)\n * **I211AT** (labeled **PCIe x1**), which connects to **RJ-45** (via a blue square)\n * **SATA Gen3 x4** (connected to 4 grey squares)\n * **PCIe x4** (connected to 1 grey square)\n * **USB3.0 x4** (connected to 4 blue squares)\n * **USB2.0 x2** (connected to 2 blue squares)\n * **USB2.0 x4** (connected to 4 grey squares)\n * **ALC892** (which connects to **Line out/in, Mic in** via a blue square)\n * **IT8892E** (via connection labeled **PCIe x1**)\n * **SPI ROM** (via connection labeled **SPI**)\n * **32bit GPIO**\n * **NCT6106D** (via connection labeled **LPC**)\n\n* **IT8892E** connects to:\n * **PCI 3~5** (connected to 3 grey squares)\n * **IT8209R**\n\n* **IT8209R** connects to:\n * **PCI 1~2** (connected to 2 grey squares)\n\n* **NCT6106D** connects to:\n * **PS2 KB/MS combo** (via a blue square)\n * **RS232/422/485 x2** (connected to 2 blue squares)\n * **RS232 x4** (connected to 4 grey squares)\n * **SYS FAN x2** (connected to 2 grey squares)\n * **CPU FAN** (connected to 1 grey square)\n * **Printer Port** (connected to 1 grey square)\n\n**Legend:**\n* Blue square: Connectors on IO panel\n* Grey square: On-board connectors/pin headers](.imb-m43h-50-1z241-1000-10/bd93c21da7e399289cbd7aba33a9bdaba6d3b1af881fa7d6d35ab6e4398f3eb9.jpg) Figure 1: Functional Block Diagram This page intentionally left blank. # 3. Mechanical Layout # 3.1. C ![Connector Locations\nA\nC\nE\nG\nH\nI\nFOXCONN\nF\nD](.imb-m43h-50-1z241-1000-10/016a449de6007d7cdf386394f75ab159af3ddfa902a018fc4e9bb36bd6be386a.jpg) Figure 2: IO Panel Connector Locations

IO Panel Connectors
Item	Description	Remarks
A	KBMS	PS2
B	USB2.0	USB 7-8
C	VGA	VGA1
D	HDMI	HDMI1
E	COM	COM5
F	COM	COM6
G	LAN+USB3.0	LAN1_USB12
H	LAN+USB3.0	LAN2_USB34
I	Line-In Port / Line-Out Port / MIC-In Port	AUDIO1

![M L N O P K\nCE\nRC\nJ\nH\nI\nA B C D E F G\nA10\nA9\nA7\nA13\nA12\nA18\nA8\nA19\nQ\nR\nS\nT\nU\nV\nW\nX\nY\nZ\nA2\nA3\nA14 A15\nA16 A17\nA4 A5\nA6](.imb-m43h-50-1z241-1000-10/6eb8e7e647d00ca39cc0deabf3c9bd5c2530adff696d581676f04a643dae85d9.jpg) Figure 3: IO Panel and On-Board Connector Locations Table 1: IO Panel and On-Board Connector Definitions

IO Panel and On-Board Connectors
Item	Description	Remarks
A	KBMS+USB	PS2_USB78
B	VGA	VGA1
C	HDMI	HDMI1
D	COM 5-6	COM 5-6
E	LAN1+USB3.0	LAN1_USB12
F	LAN2+USB3.0	LAN2_USB34
G	Audio	AUDIO1
H	ATX POWER 8PIN	ATX12V1
I	CHA_FAN	CHA_FAN1
J	CPU_FAN	CPU_FAN1
K	SYS_FAN	SYS_FAN1
L	ATX POWER 24PIN	EATXPWR1
M	AT/ATX mode header	JPSON1
N	SATA1- SATA4	SATA1
O	USB 5-6	USB 5-6
P	Front Panel	F_PANEL1
Q	USB9	USB9
R	USB10	USB10
S	GPIO	JDIO1
T	COM4	COM4
U	COM3	COM3
V	COM2	COM2
W	COM1	COM1
X	PRINT PORT	LPT1
Y	PCIEX16	PCIEX16_1
Z	PCI1	PCI1
A1	PCIEX4	PCIEX4_1
A2	PCI2	PCI2
A3	PCI3	PCI3
A4	PCI4	PCI4
A5	PCI5	PCI5
A6	FRONT AUDIO	FP_AUDIO1
A7	Clear CMOS	JCMOS1
A8	DIO no power/+5V/+12V select	JPW1
A9	SMBUS no power/+3.3V/+5V select	JPW2
A10	I2C no power/+3.3V/+5V select	JPW3
A11	Case open alarm	JCASE1
A12	SMBUS header	CN2
A13	I2C header	CN4
A14	COM5 RS232/422/485 select	JSETCOM5
A15	COM6 RS232/422/485 select	JSETCOM6
A16	COM5 master/slave and terminal select	COM5_S1~4
A17	COM6 master/slave and terminal select	COM6_S1~4
A18	LPC Port 80	JLPC1
A19	SPI	SPI1

# 3.2. Mechanical Dimensions Top View ![R4\nØ3.99\nCE\nRC\n243.84\n237.49\n165.1\n33.02\n12\n38\n73.01\n101.38\n124.88\n146\n163.83\n288.29\n45.72\n304.8\n10.16](.imb-m43h-50-1z241-1000-10/c023a0467a72936f67911e0b6a86c6b5ef84805a2f5e01cceb14ffde791414b9.jpg) Dimensions: mm Figure 4: Mechanical Dimensions Side View ![37.7](.imb-m43h-50-1z241-1000-10/ecb88a644de2dc57bb39db6c5e5b6165db288b3969d0fbae5386186f71aa4dcc.jpg) Dimensions: mm Figure 5: Mechanical Dimensions - IO Panel # 4. Connector Pinouts See 3.1 Connector Locations on page 7 for connector locations. # 4.1. Rear IO Connectors # 4.1.1. HDMI

Pin	Signal Name	Pin	Signal Name
1	HDMI1_CON_DP2	2	GND
3	HDMI1_CON_DN2	4	HDMI1_CON_DP1
5	GND	6	HDMI1_CON_DN1
7	HDMI1_CON_DP0	8	GND
9	HDMI1_CON_DN0	10	HDMI1_CON_CKP
11	GND	12	HDMI1_CON_CKN
13	NC	14	NC
15	HDMI1_DDC_CLK	16	HDMI1_DDC_DATA
17	GND	18	+5V_HDMI
19	HDMI1_CON_HPD

![This is a black and white schematic line drawing of a rectangular connector housing with rounded corners. Inside, two horizontal rows of small square pins are depicted. Text labels indicate specific pin numbers: '19 17' and '3 1' appear above the top row of pins, while '18' and '4 2' appear below the bottom row.](.imb-m43h-50-1z241-1000-10/4453af86b59e5d5dd99a1b0578c53f1297b898dca3478841a1a5f1b2e186078c.jpg) # 4.1.2. VGA Connector

Pin	Signal Name	Pin	Signal Name
1	VGA_CON_RED	2	VGA_CON_GREEN
3	VGA_CON_BLUE	4	NC
5	GND	6	GND
7	GND	8	GND
9	+5V_HDMI	10	GND
11	NC	12	VGA_DDCDAT
13	VGA_CON_HS	14	VGA_CON_VS
15	VGA_DDCCLK

![This is a black-and-white line drawing of a rectangular connector housing. It features two hexagonal mounting holes on the far left and right sides. In the center is a recessed rectangular area containing a 5x5 grid of circular pin holes. Numbers label the corners of this central grid: '5' is at the top left, '1' is at the top right, '15' is at the bottom left, and '11' is at the bottom right.](.imb-m43h-50-1z241-1000-10/4769e616faeaebde9deb00ea9d3ceebab8637ae98caf1b9efd44521bf090ab3c.jpg) # 4.1.3. USB Connectors USB 3.0, USB 2.0

Pin #	Signal
1	+5 VDC
2	USB D-
3	USB D+
4	GND

![The image displays a black and white line drawing of a connector, resembling a D-Subminiature connector. The top section shows a rectangular housing containing two rows of vertical lines representing pins. Below the housing, the numbers 1, 2, 3, and 4 are arranged horizontally from left to right. A small rectangular notch is positioned centrally below the connector housing.](.imb-m43h-50-1z241-1000-10/8eb194898a7ca404365e2444b22c963264a021d9e5f3a27bc8a39a50fa8dddd1.jpg) USB2.0

Pin #	Signal
1	+5V_USB12
2	USB_CM_N1
3	USB_CM_P1
4	GND
5	USB3_RX_CM_N1
6	USB3_RX_CM_P1
7	GND
8	USB3_TX_CM_N1
9	USB3_TX_CM_P1

![The image displays a diagram featuring the number sequence '9 8 7 6 5' at the top and '1 2 3 4' at the bottom. Between these numbers are nested rectangular outlines, with a horizontal line inside the innermost rectangle.](.imb-m43h-50-1z241-1000-10/a5e3870ae681852365dda50854b3f7bb1b337803bf1756b99e929d9cc263fddd.jpg) USB3.0 # 4.1.4. PS2 Combo connector

Pin #	Signal
1	KB_DAT
2	MS_DAT
3	GND
4	+5V_DUAL
5	KB_CLK
6	MS_CLK

![6\n4\n2 1\n3\n5](.imb-m43h-50-1z241-1000-10/75015992f670a264c206eed0127a1a26087797d0ca0256b14a590b36b453730c.jpg) # 4.1.5. COM 5-6 connector stack (Top connector COM5, Bottom connector COM6)

Pin	Signal Name	Pin	Signal Name
1	COM_CN_DCD#	2	COM_CN_RX
3	COM_CN_TX	4	COM_CN_DTR#
5	GND	6	COM_DSR#
7	COM_RTS#	8	COM_CTS#
9	COM_RI#	N/A	Not Applicable

![The image displays a schematic line drawing of a 9-pin D-sub connector. It features a rectangular outline enclosing a central rounded rectangular shape and two hexagonal mounting nuts with circular centers on the far left and right sides. Inside the central shape, there are two rows of circular pin holes. The top row contains five holes, with the number '1' positioned above the leftmost hole and '5' above the rightmost hole. The bottom row contains four holes, with the number '6' positioned below the leftmost hole and '9' below the rightmost hole.](.imb-m43h-50-1z241-1000-10/0b195fa7215f4bc9ca900c448e6bbfeb1d1f853ad9dbae43cbaa9422d3b115c3.jpg) # 4.1.6. Ethernet Connectors (LAN1, LAN2) Dual 10/100/1000Mbit/s LAN Ethernet controllers based on Intel® i219LM/i211AT, support PXE and WOL over both LANs.

Pin #	10BASE-T/100BASE-TX	1000BASE-T
1	TX+	LAN_MDI0+
2	TX-	LAN_MDI0-
3	RX+	LAN_MDI1+
4	--	LAN_MDI2+
5	--	LAN_MDI2-
6	RX-	LAN_MDI1-
7	--	LAN_MDI3+
8	--	LAN_MDI3-

![The image displays a schematic diagram of an RJ45 connector face. At the top, 'LED1' is written on the left and 'LED2' on the right. Below the text is a line drawing of the connector with two small rectangular shapes at the top representing LEDs. At the bottom of the connector outline, the number '8' is on the left and the number '1' is on the right.](.imb-m43h-50-1z241-1000-10/65f91b13a1600456f57621dc7e7ddee3c7502daf6caae9da96f79ee71d3f9c30.jpg)

LED1 (Speed)		LED2 (Link/Activity)
Status	Description	Status	Description
Off	10 Mb connection	Off	No Link
Green	100 Mb connection	Green	Linked
Orange	1 Gb connection	Blinking	Data Activity

# 4.2. Internal Connectors # 4.2.1. USB 5-6

Pin	Signal Name	Pin	Signal Name
1	VDC	2	VDC
3	D5 -	4	D6 -
5	D5 +	6	D6 +
7	Ground	8	Ground
9	KEY (no pin)	10	No Connect/ OC

![The image displays a schematic diagram of an electrical connector. Inside a rectangular outline, there are two columns of contacts. The left column features a square at the top, labeled '1' with a small 'p' next to it, followed by a vertical column of eight circles. The right column consists of a vertical column of nine circles. The text '2' is positioned to the right of the top circle in the right column, and '10' is positioned to the right of the bottom circle in the right column.](.imb-m43h-50-1z241-1000-10/7a77ef760c906bd7b19711303eaadc60ba84f9dd62da78f712f5cf3f39f17718.jpg) The +5 VDC power on the USB headers is fused. # 4.2.2. SATA1, SATA2, SATA3, SATA4

Pin	Signal Name	Description
1	GND	Ground
2	TXP	Transmit diff data – positive
3	TXN	Transmit diff data – negative
4	GND	Ground
5	RXN	Receive diff data – negative
6	RXP	Receive diff data – positive
7	GND	Ground

![This is a black and white technical line drawing showing a vertical rectangular slot or connector housing. Inside the housing is a smaller rectangular channel containing a vertical column of contacts, depicted as alternating dashed lines and solid black rectangles. On the right side of the diagram, outside the housing, the number '1' appears near the top and the number '7' appears near the bottom.](.imb-m43h-50-1z241-1000-10/1b5fba37f33da9c35a91a7b5b669ae83b87a38558a514c445c9b0f304d5eacca.jpg) # 4.2.3. COM1, COM2, COM3, COM4 Serial Port is over-current protected.

Pin	Signal Name	Description	Pin	Signal Name	Description
1	DCD#	Data Carrier Detect	2	DSR#	Data Set Ready
3	RXD	Receive Data	4	RTS#	Request To Send
5	TXD#	Transmit Data	6	CTS#	Clear To Send
7	DTR#	Data Terminal Ready	8	RI#	Ring Indicator
9	GND	GND	10	KEY	No Pin

![1\n2\n9](.imb-m43h-50-1z241-1000-10/799b13e9a83a2c87ed0401a82b39381b1e5aee83cf9dc7e3cc5e37b512a7aba7.jpg) # 4.2.4. LPT1

Pin	Signal Name	Pin	Signal Name
1	STB#	2	AFD#
3	DATA0	4	ERR#
5	DATA1	6	INIT#
7	DATA2	8	SLIN#
9	DATA3	10	GND
11	DATA4	12	GND
13	DATA5	14	GND
15	DATA6	16	GND
17	DATA7	18	GND
19	ACK#	20	GND
21	BUSY	22	GND
23	PE	24	GND
25	SLCT	26	NC

![1\n2\n25\n26](.imb-m43h-50-1z241-1000-10/02aa426b86f423e2936afff0fb03cbd7a055aa8f1e816eff5840452384c41aab.jpg) # 4.2.5. FP\_AUDIO1

Pin	Signal Name	Pin	Signal Name
1	[Port 1] Left channel	2	Ground
3	[Port 1] Right channel	4	PRESENCE# (Dongle present)
5	[Port 2] Right channel	6	[Port 1] SENSE_RETURN
7	SENSE_SEND (Jack detection)	8	Key (no pin)
9	[Port 2] Left channel	10	[Port 2] SENSE_RETURN

![The image displays a schematic diagram of a rectangular electrical connector. It features ten circular pins arranged in two vertical columns of five. To the left of the connector is the number '2', and to the right is the number '1'. At the bottom center, below the connector, is a small triangle pointing downwards.](.imb-m43h-50-1z241-1000-10/8e3cad883e4af3261a61ef46c8cc7a4000483853a86e0c08b61a3fdd318b7d1e.jpg) # 4.2.6. JCASE1

Pin	Signal Name	Description
1	SIO_CASEOPEN#	Case open signal
2	GND	Ground

![The image displays a black and white line drawing featuring a vertical rectangle. Inside the rectangle, three small shapes are arranged vertically: a circle at the top, a circle in the middle, and a square at the bottom. On the left side of the rectangle, there is a small rectangular protrusion or indentation. To the right of the rectangle, a small arrow points to the right, followed by the number '1'. A thick vertical line runs along the far right edge of the image.](.imb-m43h-50-1z241-1000-10/46ab3755217f21d9f52060405fa3ba915c193798a3644b95b0e43b0447b2d3de.jpg) # 4.2.7. CPU\_FAN1, CHA\_FAN1, SYS\_FAN1

Pin	Signal Name	Description
1	GND	Ground
2	+12 V	FAN Power
3	Tach	FAN Tachometer
4	PWM	FAN PWM

![The image displays a cropped section of a diagram featuring two adjacent rectangular shapes. On the left, a square contains the number '1' in its upper-left corner. To its right, a taller, narrower rectangle contains five circles: four are arranged in a vertical column, and a fifth circle is positioned at the bottom right corner. On the far right edge of the image, the number '4' is partially visible.](.imb-m43h-50-1z241-1000-10/00420229652d86053618a21839ff727f34f90f87d716ad1c19ca5a2491062d19.jpg) The fan header supports +12 V at 1 A maximum # 4.2.8. F\_PANEL1

Pin	Signal	In/ Out	Description	Pin		Signal	In/ Out	Description
HDD Activity LED				Power LED
1	HDD_LED+	Out	Hard disk LED pull-up to +3.3 V	2	PLED_PWR		Out	Power LED pull-up to +3.3_DUAL
3	HDD_LED#	Out	Hard disk active LED	4	SUPLED		Out	Front panel active LED

5	Ground		Ground	6	PANSWIN#		In	Power switch
7	FP_RESET#	In	Reset switch	8	Ground			Ground

9	NC			10	NC

![The image displays a schematic diagram featuring the number '2' at the top left and the number '1' directly below it. To the right of these numbers is a rectangular box. A triangle pointing to the right is attached to the left edge of the box. Inside the box are two rows of circles, with five circles in the top row and five circles in the bottom row.](.imb-m43h-50-1z241-1000-10/31243f1f6bc838753c3e1ed36c33ea786d1cc779ea948f2bbd022c10caac93c7.jpg) # 4.2.9. EATXPWR1

Pin	Signal Name	Pin	Signal Name
1	+3.3 V	13	+3.3 V
2	+3.3 V	14	-12 V
3	Ground	15	Ground
4	+5 V	16	PS-ON# (power supply remote on/off)
5	Ground	17	Ground
6	+5 V	18	Ground
7	Ground	19	Ground
8	PWRGD (Power Good)	20	No connect
9	+5 V (Standby)	21	+5 V
10	+12 V	22	+5 V
11	+12 V	23	+5 V
12	3.3V	24	Ground

![12\n24\n1 ▶\n13](.imb-m43h-50-1z241-1000-10/ba03427527a1abd598ca3d0472e12ed796e74dbd238849632f1d8dcaf744fdc9.jpg) # 4.2.10. ATX12V1

Pin	Signal Name	Pin	Signal Name
1	Ground	5	+12V
2	Ground	6	+12V
3	Ground	7	+12V
4	Ground	8	+12V

![The image displays a technical schematic of a connector featuring a 2x5 grid of ten circular terminals. The bottom-left terminal contains a small square, indicating pin 1. To the left of the grid, the numbers '2' and '1' are vertically aligned with the bottom two rows. To the right of the grid, the number '5' is visible.](.imb-m43h-50-1z241-1000-10/92365e2352f93a8971b40e2de899ac99a503ec073d5ddbfd9e80e6a6e85df97c.jpg) # 4.2.11. JLPC1

Pin	Signal Name	Pin	Signal Name
1	NC	2	VCC3
3	LPC_AD3	4	PLTRST
5	LPC_AD1	6	LPC_AD2
7	LPC_FRAME#	8	LPC_AD0
9	KEY	10	GND
11	CLK33M	12	GND

![The image displays a black and white graphic featuring a vertical column of stacked horizontal bars, resembling a barcode or a digital counter, positioned centrally. To the left of the column's base is the digit '2', and to the right is the digit '1'.](.imb-m43h-50-1z241-1000-10/360a5014d90a583302bdac44cfa3aed9848ee38401a4cfc7fe03db52100e6bd4.jpg) # 4.2.12. SPI1

Pin	Signal Name	Pin	Signal Name
1	VCC3	2	GND
3	SPI_CS#	4	SPI_CLK
5	SPI_MISO	6	SPI_MOSI
7	HOLD#	8	Key

![A vertical white domino tile featuring a single black dot on the left side and six black dots on the right side. The number 2 is visible to the left of the tile, and the numbers 4 and 1 are visible to the right.](.imb-m43h-50-1z241-1000-10/8acd63a654362ccb2a71b493ad8ea615a0881edff628dd2a1b44186c30ff8da6.jpg) # 4.2.13. JPSON1 (Default 2-3)

Pin	Signal Name	Description
1	PANSWIN#	Power switch signal
2	PSON_AT	AT mode signal
3	GND

![The image displays a black-and-white graphic at the top featuring a right-pointing triangle (play symbol) next to a rectangle containing a square and two circles. Below this graphic is the number '1'.](.imb-m43h-50-1z241-1000-10/6fb633dea5b6b0268453d7fb3a3da8d8e95594e07ef804ba62567f9baa50f422.jpg) 4.2.14. JDIO1 (TTL High:3.3V / TTL Low:0V)

Pin	Signal Name	Pin	Signal Name
1	DIO1	2	DIO17
3	DIO2	4	DIO18
5	DIO3	6	DIO19
7	DIO4	8	DIO20
9	DIO5	10	DIO21
11	DIO6	12	DIO22
13	DIO7	14	DIO23
15	DIO8	16	DIO24
17	DIO9	18	DIO25
19	DIO10	20	DIO26
21	DIO11	22	DIO27
23	DIO12	24	DIO28
25	DIO13	26	DIO29
27	DIO14	28	DIO30
29	DIO15	30	DIO31
31	DIO16	32	DIO32
33	NC	34	NC
35	NC	36	NC
37	NC	38	NC
39	GND	40	POWER

![1\n2\n39\n40](.imb-m43h-50-1z241-1000-10/c3818e18a56822f158872a77e7f5cbfb118e9d62d4679f8b6b76ab5b0792e6d7.jpg) 4.2.15. JSETCOM5, JSETCOM6

Pin	Signal Name	Pin	Signal Name
1	UART5_RXD	2	COM5_RXD485
3	UART5_RXD	4	COM5_RXD422
5	UART5_RXD	6	COM5_RXD232
7	COM5_DCD#	8	COM5_TX
9	COM5_CN_DCD#	10	COM5_CN_TX
11	TXD485#1	12	RXD485P1
13	COM5_RX	14	COM5_DTR#
15	COM5_CN_RX	16	COM5_CN_DTR#
17	TXD485P1	18	RXD485#1

![The image shows a schematic symbol for a resistor in the center, depicted as a black zig-zag line with vertical loops. In the corners are the numbers '2' (top left), '18' (top right), '1' (bottom left), and '17' (bottom right). A small triangle pointing downward is located near the bottom left terminal.](.imb-m43h-50-1z241-1000-10/12e016568e1ee3b235481127351931f1f11070a0d6b50fb95bb22a8f16e7a450.jpg) # 4.2.16. JCMOS1 (Default 1-2)

Pin	Signal Name	Description
1	NC
2	RTCRST#	Reset CMOS
3	GND

![The image displays a black and white line drawing. On the left is the number '1'. To the right is a tall, narrow vertical rectangle. Inside this rectangle are three circles stacked vertically. Each circle contains a smaller square in its center. Above the top of the rectangle is a small triangle pointing downward.](.imb-m43h-50-1z241-1000-10/665be2dc1397d428763a376b0491515af689b9684f6e3d486d95de1168fd1eb5.jpg) # 4.2.17. A8 (Default: NC)

Pin	Signal Name	Pin	Signal Name
1	+5V	2	JDIO1. Pin40
3	NC	4	JDIO1. Pin40
5	+12V	6	JDIO1. Pin40

![The image displays a black background with white graphical elements arranged in three sections. On the left is the number **1**. In the center is a rectangular area containing six white dots (pips) arranged in two vertical columns of three. Directly above the top center of this rectangle is a small black cross or 'x' mark. On the right is the number **2**.](.imb-m43h-50-1z241-1000-10/ce8029631c165612e49cace8941e54606e0d3e40b9fb7b6ca32c1ddaabdedf8e.jpg) # 4.2.18. A9 (Default: NC)

Pin	Signal Name	Pin	Signal Name
1	+5V	2	CN2 Pin1
3	NC	4	CN2 Pin1
5	+3.3V	6	CN2 Pin1

![The image displays the number '1' on the left, a rectangular object in the center, and the number '2' on the right. The central object resembles a remote control or keypad with a 3x3 grid of buttons. Each button is a black circle containing a white square.](.imb-m43h-50-1z241-1000-10/6ce61872308c93ae9f29fcf6433e861157894dcc7983a473a57209e3e97068d9.jpg) # 4.2.19. A10 (Default: NC)

Pin	Signal Name	Pin	Signal Name
1	+5V_DUAL	2	CN4 Pin1
3	NC	4	CN4 Pin1
5	+3.3V_DUAL	6	CN4 Pin1

![The image shows the number 1 on the left, a vertical rectangular outline in the center containing six black dots arranged in two columns of three, and the number 2 on the right.](.imb-m43h-50-1z241-1000-10/7f36ff22b952697b0d81a53d4ed9e9794b3aaf6abf0a207ea6ffb8ea03133743.jpg) # 4.2.20. CN2

Pin	Signal Name	Description
1	NC	NC/+3.3V/+5V select
2	SMB_DATA	SMBUS data
3	SMB_CLK	SMBUS clock
4	GND	Ground

![The image displays the number '1' above a rectangular box containing five geometric shapes arranged horizontally: a square followed by four circles. A small triangle points to the right from the left edge of the box.](.imb-m43h-50-1z241-1000-10/6cb73471b942c46a74236f2d668a1a8f413589c8c42b5b8efb16ccd9861a0737.jpg) # 4.2.21. CN4

Pin	Signal Name	Description
1	NC	NC/+3.3V/+5V select
2	I2C_DATA	I2C data
3	I2C_CLK	I2C clock
4	GND	Ground

![The image displays a simple black-and-white diagram. At the top left, the number '1' is shown. Below it is a horizontal rectangle containing four circles arranged in a row. The leftmost circle contains a smaller square inside it. To the left of the rectangle is a small triangle pointing to the right.](.imb-m43h-50-1z241-1000-10/0bbc7a04f873bc7924244668bcb9cd3716742e408210a770d8e3de1d25e46c7a.jpg) # 4.3. Jumper and Switch Settings Table 2: Jumper and Switch Definitions

Jumper Block
Item	Description	Remarks
JCMOS1	One 1x3 2.54mm pin header1-2 (default) = Normal, 2-3 = Clear CMOS	Normal (Default)<img src="images/6b37c6a8ee2295f2dfb55889c2afe7c00d454fdf92632eba9e6f7b6f95ff5443.jpg"/>1Clear CMOS<img src="images/0a14f70962cddd8401d5e9f4e59ef9ef8507879cbdc29a033098a029c8940b62.jpg"/>1
JPSON1	One 1x3 2.54mm pin header1-2 = AT Mode; 2-3 (default) = ATX mode	AT mode<img src="images/8b443160beee84677268b194f2e699249074c01f5d83d4daffdd6e8be1181f4f.jpg"/>1ATX mode(Default)<img src="images/54e97970bdff1e3b602b0b0877457da4f00168455428721a214d44da8f00caf0.jpg"/>
JSETCOM5JSETCOM6	One 2x9 2.0mm pin headerRS232: 5-6, 7-9, 8-10, 13-15, 14-16 (default)RS422: 3-4, 9-11, 10-12, 15-17, 16-18RS485: 1-2, 9-11, 10-12, 15-17, 16-18	<img src="images/a4cd1a93b78f1ea0400547b9642bad7a85f10c0e7f820eeca49e1f27edbb9391.jpg"/> <img src="images/2f3dd5fd569f6fc4099a6e409fdafac15b56e4cab5eb0ce1f8f7dd6221f7387d.jpg"/> <img src="images/439f2d5cf3bd65a27c668392b7f6130f1b20bfb5c6de07f58853c6e32e3d86dd.jpg"/>

Jumper Block
COM5_S1~S4 master/slave and terminal selection
	COM5	S1	S2	S3	S4
	RS-232	2-3	2-3	2-3	2-3
	RS-485	1-2	1-2	2-3	2-3
	RS-422	1-2	1-2	1-2	1-2
COM6_S1~S4 master/slave and terminal selection
	COM6	S1	S2	S3	S4
	RS-232	2-3	2-3	2-3	2-3
	RS-485	1-2	1-2	2-3	2-3
	RS-422	1-2	1-2	1-2	1-2

Jumper Block
JPW1	One 2x3 2.0mm pin headerNC (default)/+5V/+12V	NC (Default)1 2<img src="images/6fbf0db432f9aea91040ab11a6ed2230ab44152ce2fe12ea0063dc90e274a531.jpg"/>+5V1 2<img src="images/a024fa40a7c7798290f2483f5b9e06cafebdb310fe5ac7ca5252adc9fbcc9e29.jpg"/>+12V1 2<img src="images/bd8f2bf2b133f62a6a7b14cd79a1bb7a8c31948e02c425c625eb1634813808e7.jpg"/>
JPW2	One 2X3 2.0mm pin headerNC (default)/+5V/+12V	NC (Default)1 2<img src="images/baffe8fd297a96c14926ebe4457db1e535ab6f202674b6cfb2d02fc617d90375.jpg"/>+5V1 2<img src="images/2d2640c0e77d8744b7da87d071390fbd86e3267e927aad7c4d74fe1192aa0808.jpg"/>+3.3V1 2<img src="images/39b799a9078c1046cf8c023e98bb1e493eb32565ac96d754cb4b204a42e2be97.jpg"/>
JPW3	One 2x3 2.0mm pin headerNC (default)/+5V/+12V	NC (Default)1 <img src="images/2dcc200ebbf3369dc41e2aa66a7589b8fb384a3e01f1a8aa94c1378ac3325ac0.jpg"/>2+5V1 <img src="images/64cced45f10107bdcbae2f44100d46d355a6f385c0670fe5593d69fc8e7d3a99.jpg"/>2+3.3V1 <img src="images/4aff0a2ca35180f72bdf2a663fa0f96b7923466c82346578680f636d185b1ac4.jpg"/>2

This page intentionally left blank. # 5. Driver Installation Download the requisite drivers for your system from the IMB-M43H product page at: https://www.adlinktech.com/Products/Industrial\_Motherboards\_SBCs/ATXMotherboards/IMB-M43H?lang=en This page intentionally left blank. # 6. System Resources # 6.1. System Memory Map Table 3: System Memory Map

Address Range	Address Range	Size	Description
(4GB-2MB)	FFE00000 – FFFFFFFF	2 MB	High BIOS Area
(4GB-18MB) – (4GB-17MB-1)	FEE00000 – FEEFFFFFF	1 MB	MSI Interrupts
(4GB-20MB) – (4GB-19MB-1)	FEC00000 – FECFFFFFF	1 MB	APIC Configuration Space
15MB – 16MB	F00000 – FFFFFFF	1 MB	ISA Hole
1MB -15MB	100000 - EFFFFF	14MB	Main Memory
0K –1MB	00000 – FFFFFFF	1MB	DOS Compatibility Memory

# 6.2. I/O Map Table 4: IO Map

Hex Range	Device
0000-0C7F	PCI Express Root Complex
0D00-FFFF	PCI Express Root Complex
0020-0021	Programmable interrupt controller
0024-0025	Programmable interrupt controller
0028-0029	Programmable interrupt controller
002C-002D	Programmable interrupt controller
0030-0031	Programmable interrupt controller
0034-0035	Programmable interrupt controller
0038-0039	Programmable interrupt controller
003C-003D	Programmable interrupt controller
00A0-00A1	Programmable interrupt controller
00A4-00A5	Programmable interrupt controller
00A8-00A9	Programmable interrupt controller
00AC-00AD	Programmable interrupt controller
00B0-00B1	Programmable interrupt controller
00B4-00B5	Programmable interrupt controller
00B8-00B9	Programmable interrupt controller
00BC-00BD	Programmable interrupt controller
04D0-04D1	Programmable interrupt controller
04D0-04D1	Programmable interrupt controller
002E-002F	Motherboard resources
004E-004F	Motherboard resources
0061-0061	Motherboard resources
0063-0063	Motherboard resources
0065-0065	Motherboard resources
0067-0067	Motherboard resources
0070-0070	Motherboard resources
0080-0080	Motherboard resources
0092-0092	Motherboard resources
00B2-00B3	Motherboard resources
0680-069F	Motherboard resources
FFFF-FFFF	Motherboard resources
1800-18FE	Motherboard resources
164E-164F	Motherboard resources
0040-0043	System timer
0050-0053	System timer
0070-0077	System CMOS/real time clock
00F0-00F0	Numeric data processor
02E0-02E7	COM5
02E8-02EF	COM4
02F8-02FF	COM2
0378-037F	Printer Port
03E0-03E7	COM6
03E8-03EF	COM3
03F8-03FF	COM1
E000-EFFF	Chipset PCI Express Root Port#10
E000-EFFF	PCI-to-PCI Bridge
F000-F03F	Intel HD Graphic 630
F040-F05F	SMBUS
F090-F097	Standard SATA AHCI Controller
F080-F083	Standard SATA AHCI Controller
F060-F07F	Standard SATA AHCI Controller

# 6.3. Interrupt Request (IRQ) Lines # 6.3.1. IRQ Lines PIC Mode Table 5: IRQ Lines PIC Mode

IRQ#	Device
0	System timer
3	COM2
4	COM1
5	COM3
6	COM4
8	System CMOS/real time clock
10	COM5
11	COM6
13	Numeric data processor
14	Intel Serial IO GPIO Host Controller
15	Intel Chipset Smbus
16	HD Audio Controller

Note: These IRQs can be used for PCI devices when onboard device is disabled. # 6.3.2. IRQ Lines APIC Mode Note: These IRQs can be used for PCI devices when onboard device is disabled. Table 6 IRQ Lines APIC Mode

IRQ#	Typical Interrupt Resource	Connected to Pin	Available
0	System Counter	N/A	No
1	N/A	N/A
2	N/A	N/A
3	Serial Port 2 (COM2)	IRQ3 via SERIRQ / PIRQ	Note (1)
4	Serial Port 1 (COM1)	IRQ4 via SERIRQ / PIRQ	Note (1)
5	Serial Port3 (COM3)	IRQ5 via SERIRQ / PIRQ	Note (1)
6	Serial Port4 (COM4)	IRQ6 via SERIRQ / PIRQ	Note (1)
7	N/A	N/A
8	Real-time clock	N/A	No
9	N/A	N/A
10	Serial Port5 (COM5)	IRQ10 via SERIRQ / PIRQ	Note (1)
11	Serial Port6 (COM6)	IRQ11 via SERIRQ / PIRQ	Note (1)
12	N/A	N/A
13	Math Processor	N/A	Note (1)
14	Intel IO GPIO Host Controller	N/A	Note (1)
15	Intel 100 Series Chipset	N/A	Note (1)
16	High Definition Audio Controller	N/A
54-511	Microsoft ACPI-Compliant System	N/A	Note (1)

# 6.4. PCI Features # 6.4.1. PCI Configuration Space Map Table 7 PCI Configuration Space Map

Bus Number	Device Number	Function Number	Routing	Description
00h	00h	00h	N/A	Intel Host Bridge
00h	02h	00h	Internal	Intel VGA Controller
00h	14h	00h	Internal	Intel USB 3.0 XHCI
00h	14h	02h	Internal	Intel Data acquisition/signal process
00h	16h	00h	Internal	Intel Communication device
00h	17h	00h	Internal	Intel AHCI 1.0 controller
00h	1Dh	00h	Internal	Intel PCI-to-PCI bridge PCIe
00h	1Dh	01h	Internal	Intel PCI-to-PCI bridge PCIe
00h	1Fh	00h	Internal	Intel ISA bridge
00h	1Fh	02h	Internal	Intel Memory
00h	1Fh	03h	Internal	Intel Multimedia
00h	1Fh	04h	Internal	Intel SMBU
00h	1Fh	06h	Internal	Intel Ethernet Controller
01h	00h	00h	Internal	Subtractive Decode PCI-toPCI bridge
03h	00h	00h	Internal	Intel Ethernet Controller PCIe

Note: The bus number change if the PEG/PCIE port has a device. # 6.4.2. PCI Interrupt Routing Map Table 8 PCI Interrupt Routing Map

INT Line	LpcBridge	High Definition Audio	SMBus	PCIE Root Port #4 (LAN1)	PCIE Root Port #5 (PCIE x4)	PCIE Root Port #9 (ITE8892)
Int0	INTA:16	INTA:16	INTA:16	INTA:19	INTA:16	INTA:16
Int1	INTB:17			INTB:16	INTB:17	INTB:17
Int2	INTC:18			INTC:17	INTC:18	INTC:18
Int3	INTD:19			INTD:18	INTD:19	INTD:19

INT Line	PCI Slot 1	PCI Slot 2	PCI Slot 3	PCI Slot 4	PCI Slot 5	PCIE Root Port #10 (LAN2)
Int0	INTA:17	INTA:18	INTA:19	INTA:16	INTA:17	INTA:17
Int1	INTB:18	INTB:19	INTB:16	INTB:17	INTB:18	INTB:18
Int2	INTC:19	INTC:16	INTC:17	INTC:18	INTC:19	INTC:19
Int3	INTD:16	INTD:17	INTD:18	INTD:19	INTD:16	INTD:16

# 6.5. SMBus Slave Addresses Table 9 SMBus Slave Addresses

Device	Address
DIMM A	A0h
DIMM B	A4h

This page intentionally left blank. # 7. BIOS Setup # 7.1. Menu Structure This section presents the six primary menus of the BIOS Setup Utility. Use the following table as a quick reference for the contents of the BIOS Setup Utility. The subsections in this section describe the submenus and setting options for each menu item. The default setting options are presented in bold, and the function of each setting is described in the right hand column of the respective table.

Main	Advanced	Chipset	Security	Boot	Save & Exit
- BIOS Information Information- System Date- System Time	- CPU Configuration▶- PCH-FW Configuration▶- ACPI Settings▶- NCT6106D Super IO Configuration ▶- NCT6106D HW Monitor▶- S5 RTC Wake Settings▶- Serial Port Console Redirection▶- Intel TXT Information▶- Network Stack Configuration▶- CSM Configuration▶- NVMe Configuration▶- USB Configuration▶	- System Agent (SA) Configuration▶- PCH-IO Configuration▶	- Administrator or Password Description- User Password	- Boot Configuration▶- Driver Option Priorities▶- Fixed Boot Oder Priorities▶	- Save & Exit ▶- Default Options ▶- Boot Override▶

# Notes: ► indicates a submenu Gray text indicates info only # 7.2. Main Menu The Main Menu provides read-only information about your system and also allows you to set the System Date and Time. Refer to the tables below the screen shot of this menu for details of the submenus and settings. # 7.2.1. Main > BIOS Information

Feature	Options	Description
BIOS Vendor	American Megatrends
Core Version	x.xx
Compliancy	UEFI x.x; PI x.x
Project Version	IMB-M43H x.xx.xx
Build Date and Time	mm/dd/yyyy hh:mm:ss
AT/ATX Mode	[x Mode]

System Date	mm/dd/yyyy	Set the Data. Use Tab to switch between Data elements.
System Time	hh:mm:ss	Set the Time. Use Tab to switch between Time elements.

# 7.3. Advanced Menu This menu contains the settings for most of the user interfaces in the system. # 7.3.1. Advanced > CPU Configuration

Feature	Options	Description
Type	Info Only	CPU type
ID	Info Only	CPU ID
Speed	Info Only	CPU Speed (xxxx MHz)
L1 Data Cache	Info Only	CPU L1 Data Cache
L1 Instruction Cache	Info Only	CPU L1 Instruction Cache
L2 Cache	Info Only	CPU L2 Cache
L3 Cache	Info Only	CPU L3 Cache
L4 Cache	Info Only	CPU L4 Cache
VMX	Info Only	CPU Virtual Machine Extension
SMX/TXT	Info Only	CPU Safer Mode Extension / Trusted Execution Technology
SW Guard Extensions (SGX)	Software Controlled/Enabled/Disabled	Enabled/Disabled Software Guard Extensions (SGX)
Select Owner EPOCH input type	No Change in Owner ECOPHs/Change to NewRandom Owner ECOPHs/Manual User Defined Owner OPCHs	There are three Owner EPOCH modes (Each EPOCH is 64bit):
PRMRR Size	Info Only
Intel (VMX) Virtualization Technology	Enabled/Disabled	When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.
Active Processor Cores	All/1/2/3	Number of cores to enable in each processor package.
Hyper-Threading	Enabled/Disabled	Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology)
Intel Trusted Execution Technology	Enabled/Disabled	Enable utilization of additional hardware capabilities provided by Intel Trusted Execution Technology.
Intel(R) SpeedStep(tm)	Enabled/Disabled	Allows more than two frequency ranges to be supported.
C states	Enabled/Disabled	Enable/Disable CPU Power Management. Allows CPU to go to C States when it's not 100% utilized.
Enhanced C-state	Enabled/Disabled	Enable/Disable C1E. When enabled, CPU will switch to minimum speed when all cores enter C-State.
Package C state limit	Auto/CPU Default/C10/C9/C8/C7s/C7/C6/C3/C2/C0 or C1	Maximum Package C State Limit Setting. CPU Default: Leaves to Factory default value. Auto: Initializes to deepest available Package C State Limit.

7.3.2. Advanced > PCH-FW Configuration

Feature	Options	Description
ME Firmware Version	Info Only	PCH Firmware Version
ME Firmware Mode	Info Only	PCH Firmware Mode
ME Firmware SKU	Info Only	PCH Firmware SKU
ME File System Integrity Value	Info Only	PCH Firmware Integrity
ME Firmware Status 1	Info Only	PCH Firmware Status
ME Firmware Status 2	Info Only	PCH Firmware Status
NFC Support	Info Only	Near Field Communication Support

ME State	Enable/Disable	When Disabled ME will be put into ME Temporarily Disabled Mode.

7.3.3. Advanced > ACPI Settings

Feature	Options	Description
S3 Video Repost	Disabled/Enabled	Enable or Disable S3 Video Repost
PCIE# Wake from S5	Disabled/Enabled	Enable or disable PCIE to wake the system from S5.
Wake on Ring	Disabled/Enabled	Enable / Disable wake on ring function under ACPI S3/S4/S5.

7.3.4. Advanced > NCT6106D SuperIO Configuration

Feature	Options	Description
Serial Port 1 Configuration▶	Submenu	Set Parameters of Serial Port 1 (COMA)
Serial Port 2 Configuration▶	Submenu	Set Parameters of Serial Port 2 (COMB)
Serial Port 3 Configuration▶	Submenu	Set Parameters of Serial Port 3 (COMC)
Serial Port 4 Configuration▶	Submenu	Set Parameters of Serial Port 4 (COMD)
Serial Port 5 Configuration▶	Submenu	Set Parameters of Serial Port 5 (COME)
Serial Port 6 Configuration▶	Submenu	Set Parameters of Serial Port 6 (COMF)
Parallel Port Configuration▶	Submenu	Set Parameters of Parallel Port (LPT/LPTE)

WatchDog Count Mode	Second/Minute	WatchDog Count Mode Selection
WatchDog TimeOut Value	0	Fill WatchDog Timeout Value, 0 means disabled.
Chassis Opened Warning	Disabled/Enabled	Enable/Disable chassis intrusion detection. Note: If chassis tamper occurs, you can only enter setup to clear this error.
Deep S5 Support	Disabled/Enabled	Enable/Disable Deep S5 Support.
Keyboard & Mouse Support	Disabled/Enabled	Enable/Disable Keyboard & Mouse Support

# 7.3.5. Advanced > NCT6106D SuperIO Configuration > Serial Port 1 Configuration

Feature	Options	Description
Serial Port	Disabled/Enabled	Enable or Disable Serial Port (COM)
Device Settings	IO=3F8h; IRQ=4	Serial Port device settings

Change Settings	Auto	Select an optimal setting for Super IO Device

# 7.3.6. Advanced > NCT6106D SuperIO Configuration > Serial Port 2 Configuration

Feature	Options	Description
Serial Port	Disabled/Enabled	Enable or Disable Serial Port (COM)
Device Settings	IO=2F8h; IRQ=3	Serial Port device settings

Change Settings	Auto	Select an optimal settings for Super IO Device

7.3.7. Advanced > NCT6106D SuperIO Configuration > Serial Port 3 Configuration

Feature	Options	Description
Serial Port	Disabled/Enabled	Enable or Disable Serial Port (COM)
Device Settings	IO=3E8h; IRQ=5	Serial Port device settings

Change Settings	Auto	Select an optimal settings for Super IO Device

7.3.8. Advanced > NCT6106D SuperIO Configuration > Serial Port 4 Configuration

Feature	Options	Description
Serial Port	Disabled/Enabled	Enable or Disable Serial Port (COM)
Device Settings	IO=2E8h; IRQ=6	Serial Port device settings

Change Settings	Auto	Select an optimal settings for Super IO Device

7.3.9. Advanced > NCT6106D SuperIO Configuration > Serial Port 5 Configuration

Feature	Options	Description
Serial Port	Disabled/Enabled	Enable or Disable Serial Port (COM)
Device Settings	IO=2E0h; IRQ=10	Serial Port device settings

Change Settings	Auto	Select an optimal settings for Super IO Device
RS485 Auto Flow	Disabled/Enabled	Disable or Enable RS485 Auto Flow Control Function (Make sure to set RS485 on the COM5 jumper header if this setting is enabled.)

7.3.10. Advanced > NCT6106D SuperIO Configuration > Serial Port 6 Configuration

Feature	Options	Description
Serial Port	Disabled/Enabled	Enable or Disable Serial Port(COM)
Device Settings	IO=3E0h; IRQ=11	Serial Port device settings

Change Settings	Auto	Select an optimal settings for Super IO Device
RS485 Auto Flow	Disabled/Enabled	Disable or Enable RS485 Auto Flow Control Function (Make sure to set RS485 on the COM6 jumper header if this setting is enabled.)

7.3.11. Advanced > NCT6106D SuperIO Configuration > Parallel Port Configuration

Parallel Port	Options	Note
Parallel Port	Disabled/Enabled	Enable or Disable Parallel Port (LPT/LPTE)
Device Settings	Info Only	Serial Port device settings

Change Settings	Auto	Select an optimal settings for Super IO Device
Device Mode	STD Printer Mode /SPP Mode/EPP-1.9 and SPP Mode/EPP-1.7 and SPP Mode	Change the Printer Port mode.

7.3.12. Advanced > NCT6106D HW Monitor

Feature	Options	Description
Smart Fan	Info Only	Smart Fan Function Page

System temperature	Info Only	xx C
CPU temperature (PECI)	Info Only	xx C
SYS_Fan1 Speed	Info Only	xx RPM
CPU_Fan1 Speed	Info Only	xx RPM
CHA_Fan1 Speed	Info Only	xx RPM
VCORE	Info Only	x.xxxV
+12V	Info Only	x.xxxV
+5V	Info Only	x.xxxV
5V_Dual	Info Only	x.xxxV
AVCC	Info Only	x.xxxV
3VSB	Info Only	x.xxxV
3VCC	Info Only	x.xxxV
VBAT	Info Only	x.xxxV

7.3.13. Advanced > Smart Fan

Feature	Options	Description
Smart Fan Function	Disabled/Enabled	Smart Fan Function Enable/Disable
Smart Fan Mode Configuration▶	Submenu	Smart Fan Mode Configuration

7.3.14. Advanced > Smart Fan > Smart Fan Mode Configuration – Manual Mode

Feature	Options	Description
SYS Smart Fan1 Mode	Manual Mode/Thermal Cruise Mode	SYS Smart Fan1 Mode
SYS expect PWM Output/DC Voltage	255	System FAN1 expect PWM Output/DC Voltage

CPU Smart Fan Mode	Manual Mode/Thermal Cruise Mode	CPU Smart Fan Mode
CPU expect PWM Output/DC Voltage	255	CPU FAN expect PWM Output/DC Voltage

CHA Smart Fan1 Mode	Manual Mode/Thermal Cruise Mode	CHA Smart Fan1 Mode
CHA expect PWM Output/DC Voltage	255	CHA FAN1 expect PWM Output/DC Voltage

7.3.15. Advanced > Smart Fan > Smart Fan Mode Configuration – Thermal Cruise Mode

Feature	Options	Description
xxxFAN Target Temperature	50	FAN Target Temperature
xxxFAN Tolerance of Target Temp	5	FAN Tolerance of Target Temperature
xxxFAN Step Up Time	10	FAN step up time, 1 step means 0.1 second
xxxFAN Step Down Time	10	FAN step down time, 1 step means 0.1 second
xxxFAN Start-Up Value	127	FAN Start-Up Value
xxxFAN Stop Value	127	FAN Stop Value

7.3.16. Advanced > S5 RTC Wake Setting

Feature	Options	Description
Wake System From S5	Disabled/Enabled	Enable or disable System wake on alarm event.

7.3.17. Advanced > Serial Port Console Redirection

Feature	Options	Description
Console Redirection	Disabled/Enabled	Console Redirection Enable or Disable.
Console Redirection Settings▶	Submenu	Show when Console Redirection is enabled

7.3.18. Advanced > Serial Port Console Redirection > Console Redirection Settings

Feature	Options	Description
Terminal Type	VY100/VT100+/VT-UTF8/ANSI	Type Select
Bits per second	9600/19200/38400/57600/115200	Select serial port transmission speed.
Data Bits	7/8	Data Bits
Parity	None/Even/Odd/Mark/Space	A parity bit can be sent with the data bits to detect some transmission error.
Stop Bits	1/2	Stop bits indicate the end of a serial data packet.
Flow Control	None/Hardware RTS/CTS	Flow control can prevent data loss from buffer overflow.
VT-UTF8 Combo Key Support	Disabled/Enabled	Enable/Disable VT-UTF8 Combo Key
Recorder Mode	Disabled/Enabled	With this mode enabled only test will be sent.
Resolution 100x31	Disabled/Enabled	Enable/Disable extended terminal resolution.
Legacy OS Redirection Resolution	80x24/80x25	On Legacy OS, the number of Row and Columns supported redirection.
Putty KeyPad	VT100/LINUX/XTERMR6/SCO/ESCN/VT400	Select FunctionKey and KeyPad on Putty.
Redirection After BIOS POST	Always Enable/BootLoader	Enable/Disable Legacy console redirection.

7.3.19. Advanced > Intel TXT Information

Feature	Options	Description
Chipset	Info Only
BIOS Acm	Info Only
Chipset Txt	Info Only
CPU Txt	Info Only
Error Code	Info Only
Class Code	Info Only
Major Code	Info Only
Minor Code	Info Only

7.3.20. Advanced > Network Stack Configuration

Feature	Options	Note
Network Stack	Enabled/Disabled	Enable/Disable UEFI Network Stack.

7.3.21. Advanced > CSM Configuration

Feature	Options	Description
CSM Support	Disabled/Enabled	Enable/Disable CSM Support
CSM16 Module Version
Boot Option Filter	UEFI and Legacy/Legacy only/UEFI only	Legacy/UEFI ROMs priority
Option ROM execution
Network	Do not launch/UEFI/Legacy	Controls the execution of UEFI and Legacy PXE OpROM.
Storage	Do not launch/UEFI/Legacy	Controls the execution of UEFI and Legacy Storage OpROM.
Video	Do not launch/UEFI/Legacy	Controls the execution of UEFI and Legacy Video OpROM.
Other PCI device	Do not launch/UEFI/Legacy	Controls the execution of UEFI and Legacy other device OpROM.

7.3.22. Advanced > NVMe Configuration

Feature	Options	Description
NVMe controller and Drive information	Info Only	NVMe Device Options Settings
Show device	Info Only

7.3.23. Advanced > USB Configuration

Feature	Options	Description
USB Devices	Show current usb devices

Legacy USB Support	Enabled/Disabled/Auto	Enable/Disable Legacy USB support.
XHCI Hand-Off	Enabled/Disabled	This is a workaround for OSes without XHCI hand-off support.
USB Mass Storage Driver Support	Disabled/Enabled	Enable/Disable USB Mass Storage Driver Support
USB Beep Support	Disabled/Enabled	Enables/Disables sounds on USB device connection or removal.

# 7.4. Chipset Menu This menu contains settings for other user interfaces in the system. 7.4.1. Chipset > System Agent (SA) Configuration

Feature	Options	Description
SA PCIe Code Version	Info Only
VT-d Capability	Info Only

Memory Configuration▶	Submenu	Memory Configuration Parameters
Graphics Configuration▶	Submenu	Graphics Configuration
PEG Port Configuration▶	Submenu	PEG Port Options

VT-d	Enable/Disable	VT-d capability

7.4.2. Chipset > System Agent (SA) Configuration > Memory Configuration

Feature	Options	Description
Memory RC Version	Info Only
Memory Frequency	Info Only
Memory Timings	Info Only

DIMM_A1	Info Only
DIMM_B1	Info Only
Max TOULUD	Dynamic/1GB/1.25GB/1.5GB/1.75GB/2GB/2.25GB/2.5GB/2.75GB/3GB/3.25GB/3.5GB	Maximum value of TOULUD

7.4.3. Chipset > System Agent (SA) Configuration > Graphics Configuration

Feature	Options	Description

Primary Display	Auto/IGFX/PEG/PCIE	Select which of IGFX/PEG/PCIE Graphics device should be Primary Display
Internal Graphics	Auto/Disable/Enable	Keep IGFX enabled based on the setup options.
DVMT Pre-Allocated	0/32/64/4/8/12/16/20/24/28/32_F7/36/40/44/48/52/56/60 M	Select DVMT 5.0 Pre-Allocated (Fixed) Graphics Memory size used by the Internal Graphics Device.
DVMT Total Gfx Mem	256M/128M/MAX	Select DVMT 5.0 Total Graphic Memory size used by the Internal Graphics Device.
Primary IGFX Boot Display	VBIOS Default/VGA/HDMI	Show if Video to Legacy

7.4.4. Chipset > System Agent (SA) Configuration > PEG port Configuration

Feature	Options	Description
PEG 0:1:0
Enable Root port	Disabled/Enabled/Auto	Enable or Disable the Root Port
Max Link Speed	Auto/Gen1/Gen2/Gen3	Configure PEG 0:1:0 Max Speed

Detect Non-Compliance Device	Disabled/Enabled	Detect Non-Compliance PCI Express Device in PEG

7.4.5. Chipset > PCH-IO Configuration

Feature	Options	Description
PCI Express Configuration▶	Submenu	PCI Express Configuration settings
SATA And RST Configuration▶	Submenu	SATA Device Options Setting
USB Configuration▶	Submenu	USB Configuration settings
HD Audio Configuration▶	Submenu	HD Audio Subsystem Configuration Settings
Serial IO Configuration▶	Submenu	Serial IO Configuration Settings

LAN1 Controller	Enabled/Disabled	Enable/Disable onboard NIC.
LAN Option-ROM	Enabled/Disabled	Show if Network to Legacy
Wake on Lan Enable	Enabled/Disabled	Enable/Disable integrated LAN to wake the system.
LAN2 Controller	Enabled/Disabled	Enable/Disable onboard Lan2
LAN Option-ROM	Enabled/Disabled	Show if Network to Legacy
Restore AC Power Loss	Power On/Power off/Last State	Specify what state to go to when power is re-applied after a power failure (G3 state)

GPIO Group Control	Enabled/Disabled	Configure the digital GPIO pins
GPIO 1 Control	Input/Output High/Output Low	Configure Digital I/O Pin.

GPIO 32 Control	Input/Output High/Output Low	Configure Digital I/O Pin.

7.4.6. Chipset > PCH-IO Configuration > PCI Express Configuration

Feature	Options	Description
Link Training Retry	Disabled/2/3/5	Defines number of Retry Attempts software will take to retrain the link if previous training attempt was unsuccessful.
Link Training Timeout (uS)	1000	Defines number of Microseconds software will wait before polling ‘Link Training’ bit in Link Status register. Value range from 10 to 10000 uS.
PCIE Port 4 is assigned to LAN	N/A
PCI Express Root Port 5(PCIEx4_1)▶	Submenu	PCI Express Root Port 5 Settings.
PCIE Port 10 is assigned to LAN	N/A

7.4.7. Chipset > PCH-IO Configuration > PCI Express Configuration > PCI Express Root Port 5

Feature	Options	Description
PCI Express Root Port 5	Disabled/Enabled	Control the PCI Express Root Port.
ASPM Support	Auto\L0sL1\L1\L0s\Disable	Set the ASPM Level: Force L0s – Force all link to L0s StateAUTO – BIOS auto configure DISABLE – Disables ASPM
PCIe Speed	Auto\Gen1\Gen2	Configure PCIe Speed
Detect Non-Compliance Device	Disabled/Enabled	Detect Non-Compliance PCI Express Device. If enabled, it will take more time at POST time.

7.4.8. Chipset > PCH-IO Configuration > SATA Configuration

SATA Configuration	Options	Note
SATA Controller(s)	Enabled/Disabled	Enable/Disable SATA Device.
SATA Mode	AHCI/Intel RST Premium	Determines how SATA controllers operate.
SATA Controller Speed	Default/Gen1/Gen2/Gen3	Indicates the maximum speed the SATA controller can support.

Serial ATA Port 1	Show device
Software Preserve
Port 1	Enabled/Disabled	Enable or Disable SATA Port
Serial ATA Port 2	Show device
Software Preserve
Port 2	Enabled/Disabled	Enable or Disable SATA Port
Serial ATA Port 3	Show device
Software Preserve
Port 3	Enabled/Disabled	Enable or Disable SATA Port
Serial ATA Port 4	Show device
Software Preserve
Port 4	Enabled/Disabled	Enable or Disable SATA Port

7.4.9. Chipset > PCH-IO Configuration > USB Configuration

Feature	Options	Description
XHCI Disable Compliance Mode	FALSE/TRUE	Options to disable Compliance Mode. Default is FALSE to not disable Compliance Mode. Set TRUE to disable Compliance Mode.
xDCI Support	Disabled/Enabled	Enable/Disable xDCI (USB OTG Device)
USB Port Disable Override	Disable/Select Per-Pin	Selectively Enable/Disable the corresponding USB port from reporting a Device Connection to the controller.

7.4.10. Chipset > PCH-IO Configuration > USB SS Physical Connector

Feature	Options	Description
USB SS Physical Connector #1	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB SS Physical Connector #2	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB SS Physical Connector #3	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB SS Physical Connector #4	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.

7.4.11. Chipset > PCH-IO Configuration > USB HS Physical Connector

Feature	Options	Description
USB HS Physical Connector #1	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB HS Physical Connector #2	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB HS Physical Connector #3	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB HS Physical Connector #4	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB HS Physical Connector #5	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB HS Physical Connector #6	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB HS Physical Connector #7	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB HS Physical Connector #8	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB HS Physical Connector #9	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.
USB HS Physical Connector #10	Disable/Enable	Enable/Disable this USB Physical Connector (physical port). Once disabled, any USB device plugged into the connector will not be detected by BIOS or OS.

# 7.4.12. Chipset $> P C H - 1 0$ Configuration > HD Audio Configuration

Feature	Options	Description
HD Audio	Disable/Enable/Auto	Control Detection of the HD-Audio device.

# 7.4.13. Chipset $> P C H - 1 0$ Configuration > Serial IO Configuration

Feature	Options	Description
I2C0 Controller	Disabled/Enabled	Enables/Disables Serial IO Controller
GPIO Controller	Disabled/Enabled	Enables/Disables the GPIO Controller

# 7.4.14. Chipset $> P C H - 1 0$ Configuration > Serial IO I2C0 Settings

Feature	Options	Description
I2C IO Voltage Select	3.3V/1.8V	Selects 1.8v or 3.3v for the controller.

Connected device	Disabled/Synaptics precision Touchpad/Synaptics Forcepad/Custom device	Indicates what type of device is connected to this Serial IO controller
Interrupt mode	GPIO Interrupt/APIC Interrupt	Show if Connected device to Custom device
Device's bus address	0	Show if Connected device to Custom device
Device's HID address	0	Show if Connected device to Custom device
Device's bus speed	100kHz/400kHz/1MHz	Show if Connected device to Custom device

# 7.5. Security Menu

Feature	Options	Description
Administrator Password	Enter password	Set Administrator Password
User Password	Enter password	Set User Password

7.6. Boot Menu

Feature	Options	Description
Boot Configuration	Info Only
Setup Prompt Timeout	1(seconds)	Number of seconds to wait for setup activation key. 65535(0xFFFF) means indefinite waiting.
Bootup NumLock State	On/Off	Select the keyboard NumLock state.
Quiet Boot	Disabled/Enabled	EVT2 change default. Enable or disables Quiet Boot option
Con Out Beep Support	Disabled/Enabled	Enable/Disable Output-Device item.
Con In Beep Support	Disabled/Enabled	Enable/Disable Input-Device item.

Driver Option Priorities	Info Only
Boot mode select	LEGACY/UEFI	Select boot mode LEGACY/UEFI

FIXED BOOT ORDER Priorities	Info Only
$1^{st}$ Boot	Hard Disk	Set the system boot order.
2nd Boot	CD/DVD	Set the system boot order.
3rd Boot	USB Hard Disk	Set the system boot order.
4th Boot	USB CD/DVD	Set the system boot order.
5th Boot	USB Key	Set the system boot order.
6th Boot	USB Floppy	Set the system boot order.
7th Boot	USB Lan	Set the system boot order.
8th Boot	Network	Set the system boot order.

7.7. Save & Exit Menu

Save & Exit	Options	Note
Save Changes and Exit	Yes/No	Exit system setup after saving the changes.
Discard Changes and Exit	Yes/No	Exit system setup without saving any changes.

Save Changes and Reset	Yes/No	Reset the system after saving the changes.
Default Options	Yes/No
Restore Defaults	Yes/No	Restore/Load Default values for all the setup options.

Boot Override
Launch EFI Shell from filesystem device		Attempts to Launch EFI Shell application (Shell.efi) from one of the available filesystem devices

# Safety Instructions Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use. Please read these safety instructions carefully. • Please keep this User‘s Manual for later reference. Read the specifications section of this manual for detailed information on the operating environment of this equipment. • When installing/mounting or uninstalling/removing equipment, turn off the power and unplug any power cords/cables. • To avoid electrical shock and/or damage to equipment: Keep equipment away from water or liquid sources. Keep equipment away from high heat or high humidity.  Keep equipment properly ventilated (do not block or cover ventilation openings).  Make sure to use recommended voltage and power source settings.  Always install and operate equipment near an easily accessible electrical socket-outlet. Secure the power cord (do not place any object on/over the power cord).  Only install/attach and operate equipment on stable surfaces and/or recommended mountings.  If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source. • Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel. This page intentionally left blank. # Getting Service Ask an Expert: http://askanexpert.adlinktech.com # ADLINK Technology, Inc.

Address:	9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan
Tel:	+886-2-8226-5877
Fax:	+886-2-8226-5717
Email:	service@adlinktech.com

# Ampro ADLINK Technology, Inc. Address: 5215 Hellyer Avenue, #110, San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) +1-408-360-0222 Email: info@adlinktech.com # ADLINK Technology (China) Co., Ltd. Address: 300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area Shanghai, 201203 China Tel: +86-21-5132-8988 Fax: +86-21-5132-3588 Email: market@adlinktech.com # ADLINK Technology GmbH Address: Hans-Thoma-Strasse 11, D-68163, Mannheim, Germany Tel: +49-621-43214-0 Fax: +49-621 43214-30 Email: emea@adlinktech.com Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you. [🔗 Link to the original document](.imb-m43h-50-1z241-1000-10/imb-m43h-50-1z241-1000-10.pdf)