# IMB-M46

# User’s Manual

ATX Motherboard with 10th Gen Intel® Core™ i9/i7/i5/i3 Processors and Intel® Q470E Chipset

![Green computer motherboard with various slots, chips, and connectors (no visible text or labels)](.imb-m46-50m-13015-1010/f8ea264ff34fd17c611b5286825687b597cff826c1581aac561cdb3880ede71a.jpg)

Manual Rev.: 1.1

Revision Date: November 13, 2025

Part Number: 50M-13015-1010

# Preface

# Copyright

Copyright 2025 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

![Symbol of a trash bin crossed with two crossed lines and a solid rectangle below (no text or labels)](.imb-m46-50m-13015-1010/7cee481812760c3d02dfc71121943cf7e06f0fc8f4d5600652ca815f238d26c0.jpg)

Battery Labels (for products with battery)

![Simple line drawing of a trash bin crossed out by two diagonal lines (no text or symbols)](.imb-m46-50m-13015-1010/fa8fae40c6ab7200ed7041b81c7578e6111009b447ccfd00377abaca9f2c04ff.jpg)

![The image features a black square outline containing the universal recycling symbol, consisting of three arrows chasing each other in a triangular formation. Directly below the square is the text 'Li-ion' in a bold, black, sans-serif font.](.imb-m46-50m-13015-1010/fb1911aeff12f5e05aa0945cc30902863bc530a660357acc374159786561a9ff.jpg)

![RECYCLF\nRBRC\nLi-ion\n1.800.822.8837](.imb-m46-50m-13015-1010/a7432f9eb4b052b59f74ecf0b53d07b8c7c2f8374cfbd4df3b07f1e411bf8f8c.jpg)

![廢電池請回收](.imb-m46-50m-13015-1010/2dc6b13598565e9da9794cc864014f8379d152dc2c4fd6020a24b9bc7cc728ae.jpg)

# California Proposition 65 Warning

![The image displays a standard warning sign consisting of a yellow equilateral triangle with a thick black border. Inside the triangle, a black exclamation point is centered.](.imb-m46-50m-13015-1010/6d93c792dff97ae8156e83574e8649e069bfda526beb9e430ef572b4a3d2d24a.jpg)

WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP,

DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

Revision History

<table><tr><td>Revision</td><td>Description</td><td>Date</td><td>By</td></tr><tr><td>1.0</td><td>Initial release</td><td>2022-06-22</td><td>CC</td></tr><tr><td>1.1</td><td>Connector pinouts updated</td><td>2025-11-13</td><td>AL</td></tr></table>

# Table of Contents

# Preface...

# List of Figures .... ..vi

# List of Tables...... ..vii

# 1 Introduction....

1.1 Packing List ..
1.2 Optional Accessories .

# 2 Specifications ....

2.1 Core System . .3
2.2 I/O Interface .. .3
2.3 Video .4
2.4 Audio .4
2.5 LAN.. .4
2.6 Temperatures . .4
2.7 Humidity... .4
2.8 Certificate (EMC) .. .4
2.9 Form Factor .. 4
2.10 Operating Systems . .4
2.11 Functional Block Diagram .5

# 3 Mechanical Layout ..

3.1 Connector Locations ....
3.2 Mechanical Dimensions . ..10

# 4 Connector Pinouts .. .11

4.1 Rear IO Connectors . .11
4.2 Onboard Headers / Connectors . .14
4.3 Jumper and Swtich Settings. ..18
4.4 Expansion Slots .. ..19

# 5 Driver Installation .... .23

# 6 System Resources ............... .25

6.1 System Memory Map . .25
6.2 I/O Map .. .25
6.3 Interrupt Request (IRQ) Lines .... ..27
6.4 PCI Features.. ..28
6.5 SMBus Slave Addresses.. ..29

# 7 UEFI Setup ..... ..31

7.1 Menu Structure .. ..31
7.2 Main Menu. .32
7.3 Advanced Menu.. ..33
7.4 Hardware Health Event Monitoring Screen . ...42
7.5 Security Screen.. ..43
7.6 Boot Screen.. ..44

# Safety Instructions.... ..45

# Getting Service............ ..46

# List of Figures

Figure 1: Functional Block Diagram. 5
Figure 2: IO Panel Connector Locations..
Figure 3: Onboard Connector Locations. .8
Figure 4: Mechanical Dimensions. ..10
Figure 5: Mechanical Dimensions - IO Panel.. ..10

# List of Tables

Table 1: IO Panel Connector Definitions

Table 2: Onboard Connector Definitions .8

Table 3: System Memory Map.. .25

Table 4: IO Map... ..25

Table 5: IRQ Lines PIC Mode.. .27

Table 6 IRQ Lines APIC Mode . ..27

Table 7 PCI Configuration Space Map .. .28

Table 8 PCI Interrupt Routing Map.. ..29

Table 9 SMBus Slave Addresses . .29

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# 1 Introduction

ADLINK IMB-M46 ATX is an industrial motherboard supporting 10th Generation Intel® Core™ i9/i7/i5/i3 desktop processors, an Intel® Q470E Chipset, and 5 PCIe expansion slots to provide a cost-competitive embedded computing solution. It includes high-speed data transfer interfaces such as PCIe 3.0, USB 3.2 Gen2, and SATA 6 Gb/s (SATA III), and dual-channel DDR4 2400/2666/2933 MHz RAM for industrial automation applications. With industrial-grade I/O port design, the IMB-M46 offers a significant competitive advantage for embedded computing applications in terms of device compatibility, durable connectivity, and extreme environment readiness.

# 1.1 Packing List

IMB-M46 ATX motherboard
Rear I/O shield

# 1.2 Optional Accessories

2-port USB 2.0 cable with bracket (Part Number: 30-25010-3010)
4-port USB 3.0 cable with bracket (Part Number: 30-25305-0010-A0)
2-port USB 3.0 cable with bracket (Part Number: 30-25046-0100)
1-port LPT cable with bracket (Part Number: 30-25019-2000)
• 2-port COM cable with bracket (Part Number: 30-25116-0000-A0)
• Low-profile CPU cooler for &lt;=65W, 35W CPU (Part Number: 32-20530-0010)
High-profile CPU cooler for &gt;= 65W CPU (Part Number: 32-20495-0000)

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# 2 Specifications

# 2.1 Core System

#  CPU:

• Intel® Core™ i9-10900E, 4.7GHz, 10 Core, 20M Cache, DDR4 2933MHz support, 65W
• Intel® Core™ i9-10900TE, 4.5GHz, 10 Core, 20M Cache, DDR4 2933MHz support, 35W
• Intel® Core™ i7-10700E, 4.5GHz, 8 Core, 16M Cache, DDR4 2933MHz support, 65W
• Intel® Core™ i7-10700TE, 4.4GHz, 8 Core, 16M Cache, DDR4 2933MHz support, 35W
• Intel® Core™ i5-10500E, 4.2GHz, 6 Core, 12M Cache, DDR4 2666MHz support, 65W
• Intel® Core™ i5-10500TE, 3.7GHz, 6 Core, 12M Cache, DDR4 2666MHz support, 35W
• Intel® Core™ i3-10100E, 3.8GHz, 4 Core, 6M Cache, DDR4 2666MHz support, 65W
• Intel® Core™ i3-10100TE, 3.6GHz, 4 Core, 6M Cache, DDR4 2666MHz support, 35W
• Intel® Pentium® Gold G6400, 3.2GHz, 2 Core, 4M Cache, DDR4 2400MHz support, 35W
• Intel® Pentium® Gold G6400, 3.8GHz, 2 Core, 4M Cache, DDR4 2400MHz support, 58W
• Intel® Celeron® Processor G5900TE, 3.0GHz, 2M Cache, DDR4 2666MHz support, 35W
• Intel® Celeron® Processor G5900E, 3.2GHz, 2M Cache, DDR4 2666MHz support, 58W

Chipset: Intel® Q470E Express Chipset

 Memory: 4x 288-pin DDR4 NON ECC socket, dual-channel DDR4 2400/2666/2933 MHz, up to 128 GB (based on CPU)

 BIOS: AMI® UEFI BIOS, 256 Mb SPI Flash Memory

 Hardware Monitor: CPU voltage

+3.3V voltage
+5V voltage
+12V voltage
CPU temperature
System temperature
CPU fan speed
System fan speed

# 2.2 I/O Interface

# Expansion slots:

1x PCIe x16 Gen3
1x PCIe x8 Gen3
• 3x PCIe x4 Gen3
2xPCI

 SATA: 6x SATA 6.0 Gb/s connectors, Intel® software RAID 0/1/5/10 support
USB: 4x USB 3.2 Gen2 connectors (rear), 2x USB 2.0 connectors (rear), 4x USB 3.2 Gen1 pin headers,2x USB 2.0 pin headers
· COM: 2x RS-232/422/485 (rear), 4x RS-232 pin headers

 Parallel Port: 1x LPT pin header
 PS/2 Combo Port: 1x PS/2 keyboard/mouse pin header
DIO: 8-bit GPIO (shared with LPT header)
TPM: TPM 2.0
M.2 connectors:

• 1x M.2 (Key E, 2230) with PCIe x1, USB 2.0 and CNVi for Wireless
• 1x M.2 (Key B, 3042/3052) with PCIe x1 / USB 3.2 Gen1 / USB 2.0 and SIM socket for 4G/5G
1x M.2 (Key M, 2242/2260/2280)

# 2.3 Video

 Interfaces: 1x VGA connector (rear), resolution up to 1920 x 1200 at 60 Hz, 1x HDMI 2.0a connector (rear) resolution up to 3840 x 2160 at 30 Hz, 1x DP 1.2 connector (rear), resolution up to 3840 x 2160 at 60 Hz

# 2.4 Audio

Audio Codec: Realtek® ALC887 or ALC897
Interfaces: 1x Mic-in, 1x Line-in, and 1x Line-out connectors (rear)

# 2.5 LAN

 LAN1: Intel® I219-LM via RJ45 connector
 LAN2: Intel® I225-LM via RJ45 connector

# 2.6 Temperatures

Operating Temperature: 0°C to $6 0 ^ { \circ } \mathsf { C }$
Storage Temperature: -40°C to 85°C

# 2.7 Humidity

60° C at 95% RH, non-condensing

# 2.8 Certificate (EMC)

CE/FCC Class B

# 2.9 Form Factor

 ATX: 305 mm x 244 mm (W x L)

# 2.10 Operating Systems

Microsoft® Windows® 10, 64-bit

# 2.11 Functional Block Diagram

![This block diagram depicts a computer motherboard architecture centered around an Intel processor and chipset.\n\n**Top Block: INTEL Processor (LGA-1200 Pin Socket)**\n*   **Memory Connections:**\n    *   **Channel A** connects to **DDR4 up to 2933**.\n    *   **Channel B** connects to **DDR4 up to 2933**.\n    *   *(Note: Text above reads '128-bit Dual-Channel Memory x 4 Slots')*\n*   **Display Connections:**\n    *   **DIGITAL PORT DD1** connects to **IT6563**, which connects to **HDMI 2.0**.\n    *   **DIGITAL PORT DD2** connects to **Display Port 1**, which connects to **DP++**.\n    *   **DIGITAL PORT DD3** connects to **eDP to VGA RTD2168**, which connects to **VGA**.\n*   **PCIe Connections:**\n    *   **PCIE Gen 3 BUS** connects to three slots labeled **Share**:\n        *   **PCIe X8(or X4) SLOT**\n        *   **PCIe X16(or x8) SLOT** (Text note: 'Support PCIEX16 or PCIEX8, PCIEX8 or PCIEX8, PCIEX4, PCIEX4')\n        *   **PCIe X4 SLOT**\n\n**Center Connection:**\n*   **DMI** connects the Processor to the PCH below.\n\n**Bottom Block: INTEL Q470E PCH-H**\n*   **Left Side (Audio, PCIe, LAN, USB):**\n    *   **Realtek Audio Codec ALC887** (with **24MHz**) connects to **Line In**, **Line Out**, and **Mic In**.\n    *   **PCIe x4 slot** connects via **PCIe #9-12**.\n    *   **PCIe x4 slot** connects via **PCIe #21-24**.\n    *   **PCI slot** connects via **PCIe #7** to **ASM1083**.\n    *   **PCI slot** connects directly.\n    *   **INTEL I225** connects via **PCIe #6**.\n    *   **INTEL I219LM** connects via **PHY (PCIe #5)**.\n    *   **M.2 Key B** connects via **PCIe #3-4/USB3.0#1#3**.\n    *   **USB3.1 gen2 SuperSpeed USB** connects via **USB3.1/USB2.0** through a **Re-driver**.\n    *   **USB3.1 gen1 HighSpeed USB** connects via **USB3.1/USB2.0**.\n    *   **USB2.0 HighSpeed USB** connects via **USB2.0**.\n    *   **SPI FLASH** connects via **SPI**.\n*   **Right Side (Storage, WiFi, TPM, Super I/O):**\n    *   **SATAIII #0** connects to **SATA3_1**.\n    *   **SATAIII #1** connects to **SATA3_2**.\n    *   **SATAIII #2** connects to **SATA3_3**.\n    *   **SATAIII #3** connects to **SATA3_4**.\n    *   **PCIE #17/SATA4** connects to **PCIe/SATA Switch**, which connects to **SATAIII #4** and **SATA3_5**.\n    *   **PCIE #17 SATA4** connects to **M.2 (2242,2260,2280) SATA/PCIe PCIEX4 or SATA**.\n    *   **PCIE #18 SATA5** connects to **PCIe/SATA Switch**, which connects to **SATAIII #5** and **SATA3_6**.\n    *   **CNV1/ PCIE1x8/ USB2.0#14** connects to **M.2 2230 for WiFi**.\n    *   **TPM Infineon SLB9670** connects via **SPI**.\n    *   **SIO Fintek F81966A** connects via **LPC or eSPI** to:\n        *   **H/W Monitor CPU FAN&SYS FAN**\n        *   **Serial Port *6** (Text note: 'Rear I/O: COM C D support RS232/422/485 Internal : COM A, B, E, F support RS232')\n        *   **LPT/DGPIO shared**\n    *   **LPC or eSPI Header** connects to the SIO block.](.imb-m46-50m-13015-1010/cd664d18d4e3b0ef97f9c2e1bae0ccb8ae8ef8303b598b53ff10192e04ebffb3.jpg)

Figure 1: Functional Block Diagram

• M.2 (Key M, 2242 / 2260 / 2280) with PCIe x4 and SATA3 shares the same source with SATA3\_5 and SATA3\_6 Ports
• When using M.2 PCIe x4 SSD, both SATA3\_5 and SATA\_6 Ports are disabled.
• When using M.2 SATA SSD, only SATA3\_5 Port is disabled, and SATA3\_6 Port is available.

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# 3 Mechanical Layout

# 3.1 Connector Locations

![A\nB\nC\nF\nH\nJ\nL\nM\nD E G I K N](.imb-m46-50m-13015-1010/01d0de32618641956c1b289a30fbd3f47205e9d775fbf0b633cc8c444cd206e6.jpg)

Figure 2: IO Panel Connector Locations

Table 1: IO Panel Connector Definitions

<table><tr><td colspan="2">IO Panel Connectors</td></tr><tr><td>Item</td><td>Description</td></tr><tr><td>A</td><td>2x USB2.0 port</td></tr><tr><td>B</td><td>PS/2 Keyboard/Mouse port</td></tr><tr><td>C</td><td>COM1 RS-232/422/485</td></tr><tr><td>D</td><td>HDMI port</td></tr><tr><td>E</td><td>DisplayPort</td></tr><tr><td>F</td><td>COM2 RS-232/422/485</td></tr><tr><td>G</td><td>VGA port</td></tr><tr><td>H</td><td>LAN1</td></tr><tr><td>I</td><td>2x USB 3.2 Gen 2</td></tr><tr><td>J</td><td>LAN2</td></tr><tr><td>K</td><td>2x USB 3.2 Gen 2</td></tr><tr><td>L</td><td>Line in (light blue)</td></tr><tr><td>M</td><td>Line out (lime)</td></tr><tr><td>N</td><td>Mic in (pink)</td></tr></table>

![B C D E G H I e\na\nJ\nK\nL\nM\nN\nO\nP\nA\nT\nA\nQ\nR\nf\nS\ng\nU\nAB AA\nAA\nAC\nAD\nAE\nAF\nAH\nZ\nY\nh\nAJ\nAG\nAI\nAL\nA\nh\nAK\nh\nAL](.imb-m46-50m-13015-1010/4d49a7f87ed86ee1772d1cc55d3deff649f9ff2208ded3c10b5c605059a0ddd2.jpg)

Figure 3: Onboard Connector Locations

Table 2: Onboard Connector Definitions

<table><tr><td colspan="3">Onboard Connectors</td></tr><tr><td>Item</td><td>Description</td><td>Remarks</td></tr><tr><td>A</td><td>ATX 12V Power connector</td><td>ATX12V1</td></tr><tr><td>B</td><td>ATX Power 24-pin</td><td></td></tr><tr><td>C</td><td>SATA3 connectors</td><td>SATA3_5, SATA3_6</td></tr><tr><td>D</td><td>SATA3 connectors</td><td>SATA3_3, SATA3_4</td></tr><tr><td>E</td><td>SATA3 connectors</td><td>SATA3_1, SATA3_2</td></tr><tr><td>F</td><td>M.2 Key-M socket</td><td>M2_1</td></tr><tr><td>G</td><td>M.2 Key-B socket</td><td>M2_B1</td></tr><tr><td>H</td><td>M.2 Key-E socket</td><td>M2_2</td></tr><tr><td>I</td><td>USB 3.2 Gen1 headers</td><td>USB3_5, USB3_6</td></tr><tr><td>J</td><td>USB 32 Gen1 headers</td><td>USB3_7, USB3_8</td></tr><tr><td>K</td><td>Chassis Intrusion headers</td><td>CI1, CI2</td></tr><tr><td>L</td><td>COM port headers</td><td>COM6</td></tr><tr><td>M</td><td>COM port headers</td><td>COM5</td></tr><tr><td>N</td><td>COM port headers</td><td>COM4</td></tr><tr><td>O</td><td>COM port headers</td><td>COM3</td></tr><tr><td>P</td><td>Printer port / GPIO header</td><td>LPT_GPIO1</td></tr><tr><td>Q</td><td>LPC header</td><td>LPT1</td></tr><tr><td>R</td><td>USB 2.0 header</td><td>USB2_9, USB2_10</td></tr><tr><td>S</td><td>System Panel header</td><td>PANEL1</td></tr><tr><td>T</td><td>Buzzer</td><td>BUZZ1</td></tr><tr><td>U</td><td>SMBUS</td><td>SMBUS_TEST1</td></tr><tr><td>V</td><td>SPDIF header</td><td></td></tr><tr><td>W</td><td>Front Panel Audio header</td><td>HDAUDIO_1</td></tr><tr><td>X</td><td>MCU connector</td><td>MCU_CON1</td></tr><tr><td>Y</td><td>Clear CMOS header</td><td>CLRMOS1</td></tr><tr><td>Z</td><td>PWR_BAT1</td><td>PCIEx4_3</td></tr><tr><td>AA</td><td>PCI2</td><td>PCI2</td></tr><tr><td>AB</td><td>PCI1</td><td>PCI1</td></tr><tr><td>AC</td><td>PCI Express x4</td><td>PCIE5</td></tr><tr><td>AD</td><td>PCI Express x4</td><td>PCIE4</td></tr><tr><td>AE</td><td>PCI Express x8</td><td>PCIE3</td></tr><tr><td>AF</td><td>PCI Express x4</td><td>PCIE2</td></tr><tr><td>AG</td><td>PCI Express x16</td><td>PCIE1</td></tr><tr><td>AH</td><td>Chassis Fan connectors (+12V)</td><td>CHA_FAN3</td></tr><tr><td>AI</td><td>Chassis Fan connectors (+12V)</td><td>CHA_FAN2</td></tr><tr><td>AJ</td><td>LAN LED headers</td><td>LAN_LED2 (for LAN2 Port)</td></tr><tr><td>AK</td><td>LAN LED headers</td><td>LAN_LED1 (for LAN1 Port)</td></tr><tr><td>AL</td><td>Chassis Fan connectors (+12V)</td><td>CHA_FAN1</td></tr><tr><td colspan="3">Jumpers</td></tr><tr><td>Item</td><td>Description</td><td>Remarks</td></tr><tr><td>a</td><td>PWR Loss jumper</td><td>PWR_LOSS1</td></tr><tr><td>b</td><td>PCIe Isolation jumper</td><td>PCIE_ISOLATION</td></tr><tr><td>c</td><td>DACC1</td><td></td></tr><tr><td>d</td><td>ATX/AT Mode jumper</td><td>SIO_AT1</td></tr><tr><td>e</td><td>COM Port Pin9 PWR Setting jumpers</td><td>PWR_COM3 (for COM Port3)PWR_COM4 (for COM Port4)PWR_COM5 (for COM Port5)PWR_COM6 (for COM Port6)</td></tr><tr><td>f</td><td>Digital Input / Output Power Select</td><td>JGPIO_PWR1</td></tr><tr><td>g</td><td>Digital Input / Output Default Value Setting</td><td>JGPIO_SET1</td></tr><tr><td>h</td><td>COM Port Pin9 PWR Setting jumpers</td><td>PWR_COM1 (for COM Port1)PWR_COM2 (for COM Port2)</td></tr></table>

# 3.2 Mechanical Dimensions

Top View
![243.84\n237.49\n165.1\n33.02\n10.6\n29,09\n42,59\n51,09\n79,59\n107,09\n129,03\n147,83\n163,83\n209,55\n288,29\n304.8\nDimensions: mm\n10.16](.imb-m46-50m-13015-1010/bae743652d6d81dcaae91b23db041d45edec4960886bdfe41d21768621c3293f.jpg)

Figure 4: Mechanical Dimensions

Side View
![35.52\nDimensions: mm](.imb-m46-50m-13015-1010/bd29751badbda78cbbbd0dddb916ecfb09dc3600902f51f140d22f545fc5c391.jpg)

Figure 5: Mechanical Dimensions - IO Panel

# 4 Connector Pinouts

See 3.1 Connector Locations on page 7 for connector locations.

# 4.1 Rear IO Connectors

# 4.1.1 HDMI

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>HDMI1_CON_DP2</td><td>2</td><td>GND</td></tr><tr><td>3</td><td>HDMI1_CON_DN2</td><td>4</td><td>HDMI1_CON_DP1</td></tr><tr><td>5</td><td>GND</td><td>6</td><td>HDMI1_CON_DN1</td></tr><tr><td>7</td><td>HDMI1_CON_DP0</td><td>8</td><td>GND</td></tr><tr><td>9</td><td>HDMI1_CON_DN0</td><td>10</td><td>HDMI1_CON_CKP</td></tr><tr><td>11</td><td>GND</td><td>12</td><td>HDMI1_CON_CKN</td></tr><tr><td>13</td><td>NC</td><td>14</td><td>NC</td></tr><tr><td>15</td><td>HDMI1_DDC_CLK</td><td>16</td><td>HDMI1_DDC_DATA</td></tr><tr><td>17</td><td>GND</td><td>18</td><td>+5V_HDMI</td></tr><tr><td>19</td><td>HDMI1_CON_HPD</td><td></td><td></td></tr></table>

![The image displays a schematic line drawing of a connector housing. Inside the rectangular outline, there are two rows of small, rectangular slots representing terminal positions. Numbers are printed near the ends of the rows to indicate pin numbering. The visible text is:\n\n**19 17** (at the top left)\n**3 1** (at the top right)\n**18** (at the bottom left)\n**4 2** (at the bottom right)](.imb-m46-50m-13015-1010/c262e5564192c791e8119e113906341f9f73e8bbc75cdbcb83fee8ed73a2de5c.jpg)

# 4.1.2 DisplayPort

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>CN_DDPx0+</td><td>2</td><td>GND</td></tr><tr><td>3</td><td>CN_DDPx0-</td><td>4</td><td>CN_DDPx1+</td></tr><tr><td>5</td><td>GND</td><td>6</td><td>CN_DDPx1-</td></tr><tr><td>7</td><td>CN_DDPx2+</td><td>8</td><td>GND</td></tr><tr><td>9</td><td>CN_DDPx2-</td><td>10</td><td>CN_DDPx3+</td></tr><tr><td>11</td><td>GND</td><td>12</td><td>CN_DDPx3-</td></tr><tr><td>13</td><td>CN_DDPx_AUX_SEL</td><td>14</td><td>CN_DDPx_CONFIG2</td></tr><tr><td>15</td><td>CN_DDPx_AUX+</td><td>16</td><td>GND</td></tr><tr><td>17</td><td>CN_DDPx_AUX-</td><td>18</td><td>CN_DDPx_HPD</td></tr><tr><td>19</td><td>GND</td><td>20</td><td>+V3.3_DDPx_PWR_CN</td></tr></table>

![The image is a technical line drawing of a 25-pin D-subminiature connector. It features a rectangular housing with mounting holes on the left and right sides. Inside the housing, 25 pins are arranged with two rows of 12 pins flanking a single central pin.\n\nThe text labels the corners of the pin arrangement:\n- The number **19** is positioned above the leftmost pin of the top row.\n- The number **1** is positioned above the rightmost pin of the top row.\n- The number **20** is positioned below the leftmost pin of the bottom row.\n- The number **2** is positioned below the rightmost pin of the bottom row.](.imb-m46-50m-13015-1010/f45c6f03e629a11642fc36eba76083750b1f48add1c05ee2cafd180175213b32.jpg)

# 4.1.3 VGA Connector

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>VGA_CON_RED</td><td>2</td><td>VGA_CON_GREEN</td></tr><tr><td>3</td><td>VGA_CON_BLUE</td><td>4</td><td>NC</td></tr><tr><td>5</td><td>GND</td><td>6</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>8</td><td>GND</td></tr><tr><td>9</td><td>+5V_HDMI</td><td>10</td><td>GND</td></tr><tr><td>11</td><td>NC</td><td>12</td><td>VGA_DDCDAT</td></tr><tr><td>13</td><td>VGA_CON_HS</td><td>14</td><td>VGA_CON_VS</td></tr><tr><td>15</td><td>VGA_DDCCLK</td><td></td><td></td></tr></table>

![This is a technical line drawing of a 15-pin D-sub connector. It features a rectangular outer housing with a hexagonal screw head on the left and right sides. In the center is an oval insert containing 15 circular pins arranged in three rows of five. Above the connector, the number '5' is on the left and '1' is on the right. Below the connector, the number '15' is on the left and '11' is on the right.](.imb-m46-50m-13015-1010/b9258f4381d839a792cdf6ad9dabc1d08a0d4e392574df889f34191a84f7fff0.jpg)

# 4.1.4 COM 1-2 Connector Stack (Top connector COM1, Bottom connector COM2)

<table><tr><td rowspan="2">Pin</td><td colspan="3">Signal</td></tr><tr><td>RS-232</td><td>RS-422</td><td>RS-485</td></tr><tr><td>1</td><td>DCD#</td><td>Tx-</td><td>Tx/Rx-</td></tr><tr><td>2</td><td>RxD</td><td>Tx+</td><td>N/A</td></tr><tr><td>3</td><td>TxD</td><td>Rx+</td><td>Tx/Rx+</td></tr><tr><td>4</td><td>DTR#</td><td>Rx-</td><td>N/A</td></tr><tr><td>5</td><td>GND</td><td>GND</td><td>GND</td></tr><tr><td>6</td><td>DSR#</td><td>N/A</td><td>N/A</td></tr><tr><td>7</td><td>RTS#</td><td>N/A</td><td>N/A</td></tr><tr><td>8</td><td>CTS#</td><td>N/A</td><td>N/A</td></tr><tr><td>9</td><td>No Power/5V/12V</td><td>N/A</td><td>N/A</td></tr></table>

![The image displays a schematic line drawing of a DE-9 connector (commonly known as a DB9). It features a rectangular border with two hexagonal nuts on the left and right sides. In the center is the connector housing, outlined in a trapezoid shape, containing nine circles representing pin holes arranged in two rows: a top row of five pins and a bottom row of four pins.\n\nThe text within the image consists of the numbers '1', '5', '6', and '9':\n- **1** is positioned above the leftmost pin of the top row.\n- **5** is positioned above the rightmost pin of the top row.\n- **6** is positioned below the leftmost pin of the bottom row.\n- **9** is positioned below the rightmost pin of the bottom row.](.imb-m46-50m-13015-1010/519c6af1c5037949f46ead769cf280d830462cf49203fa3327d1e1476ec7a7d1.jpg)

# 4.1.5 Ethernet Connectors (LAN1, LAN2)

Dual 10/100/1000Mbit/s LAN Ethernet controllers based on Intel® i219LM/i225LM, support PXE and WOL over both LANs.In BIOS menu only LAN 1 have wake on LAN option

<table><tr><td>Pin</td><td>10BASE-T/100BASE-TX</td><td>1000BASE-T</td></tr><tr><td>1</td><td>TX+</td><td>LAN_MDI0+</td></tr><tr><td>2</td><td>TX-</td><td>LAN_MDI0-</td></tr><tr><td>3</td><td>RX+</td><td>LAN_MDI1+</td></tr><tr><td>4</td><td>--</td><td>LAN_MDI2+</td></tr><tr><td>5</td><td>--</td><td>LAN_MDI2-</td></tr><tr><td>6</td><td>RX-</td><td>LAN_MDI1-</td></tr><tr><td>7</td><td>--</td><td>LAN_MDI3+</td></tr><tr><td>8</td><td>--</td><td>LAN_MDI3-</td></tr></table>

![The image displays a schematic diagram of an RJ45 Ethernet connector. At the top, the text 'LED1' appears on the left and 'LED2' on the right. Below these labels is a square outline representing the port. Inside the square, there are two small rectangles near the top and a larger, dark grey shape in the center. At the bottom, the number '8' is on the left and '1' is on the right. Thin black lines connect the number '8' to the left side of the central shape and the number '1' to the right side.](.imb-m46-50m-13015-1010/d5201d3466835053bde3a8011b3608074be00b0a6fb2fde920b9342c66934ceb.jpg)

<table><tr><td colspan="2">LED1 (Speed)</td><td colspan="2">LED2 (Link/Activity)</td></tr><tr><td>Status</td><td>Description</td><td>Status</td><td>Description</td></tr><tr><td>Off</td><td>10 Mb connection</td><td>Off</td><td>No Link</td></tr><tr><td>Orange</td><td>100 Mb connection</td><td>Green</td><td>Linked</td></tr><tr><td>Green</td><td>1 Gb connection</td><td>Blinking</td><td>Data Activity</td></tr></table>

# 4.2 Onboard Headers / Connectors

# 4.2.1 CPU\_FAN1, SYS\_FAN1, SYS\_FAN2

<table><tr><td>Pin</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>GND</td><td>Ground</td></tr><tr><td>2</td><td>+12 V</td><td>FAN Power</td></tr><tr><td>3</td><td>Tach</td><td>FAN Tachometer</td></tr><tr><td>4</td><td>PWM</td><td>FAN PWM</td></tr></table>

![The image displays a black-and-white diagram. At the top left, the number '1' appears twice with a space between them ('1 1'). Below this, there is a vertical rectangle containing four circles stacked vertically in a column. To the right of the rectangle, the number '4' is positioned near the top, and the number '0' is positioned near the bottom.](.imb-m46-50m-13015-1010/1c16e44f302b209f7e18ac51ef9f7ae80a49f75b868f6b42a36e9d4cc058342c.jpg)

The fan header supports +12 V at 1 A maximum

# 4.2.2 Chassis Fan Connectors (+12V)

![4 3 2 1\nFAN_SPEED_CONTROL\nCHA_FAN_SPEED\n+12V\nGND](.imb-m46-50m-13015-1010/4b8a1ff0bebb3330af7b7fa2edc60a57f0d38945eecbb90ad90546a89b6c192f.jpg)

# 4.2.3 System Panel Header

![PLED+\nPLED-\nPWRBTN#\nGND\nGND\nRESET#\nGND\nHDLED-\nHLED+](.imb-m46-50m-13015-1010/42447b24887e96796d34cf89ef9b081e4b64142f73863817316f88374ed26133.jpg)

# 4.2.4 COM3, COM4, COM5, COM6

![CCTS#1\nDDSR#1\nDDTR#1\nRRXD1\nRRI#1\nRRTS#1\nGND\nTTXD1\nDDCD#1](.imb-m46-50m-13015-1010/29c6310295579fc1798fe5430f6a6a8c3d9b703884a66cc81f716aef0e0f09e4.jpg)

# 4.2.5 SATA1, SATA2, SATA3, SATA4, SATA5, SATA6

<table><tr><td>Pin</td><td>Signal</td><td>Description</td><td></td><td></td><td></td></tr><tr><td>1</td><td>GND</td><td>Ground</td><td>5</td><td>RXN</td><td>Receive diff data – negative</td></tr><tr><td>2</td><td>TXP</td><td>Transmit diff data – positive</td><td>6</td><td>RXP</td><td>Receive diff data – positive</td></tr><tr><td>3</td><td>TXN</td><td>Transmit diff data – negative</td><td>7</td><td>GND</td><td>Ground</td></tr><tr><td>4</td><td>GND</td><td>Ground</td><td></td><td></td><td></td></tr></table>

![The image is a technical line drawing showing a side view of a connector. It features a large outer rectangular frame labeled with the number **1** to its right. Inside this frame is a smaller, nested rectangular structure labeled with the number **7** to its right. Within this inner rectangle is a vertical column consisting of alternating black and white rectangular blocks. Small horizontal lines are visible near the top and bottom edges of the inner structure.](.imb-m46-50m-13015-1010/ec5a495670c14a0a7f18b293aba409fcf6a4efa2b137741fa50eb2ee4e8be0bd.jpg)

# 4.2.6 USB Connectors

USB 2.0 Header
![USB_PWR\nP-\nP+\nGND\nDUMMY\n1\nP-\nP+\nGND\nUSB_PWR](.imb-m46-50m-13015-1010/90c4b1e323315037d5e297f30978f73e0702af30008b0310bb36b5135ae0fccf.jpg)

USB 3.2 Gen 1 Headers
![Vbus\nIntA_P1_SSRX-\nIntA_P0_SSRX-\nIntA_P0_SSRX+\nGND\nIntA_P1_SSTX-\nIntA_P0_SSTX-\nIntA_P0_SSTX+\nGND\nIntA_P1_D-\nIntA_P0_D-\nIntA_P0_D+\nID\n1](.imb-m46-50m-13015-1010/f4b268b985d53a455ee93912121ae0e2156df03c6c630ec23658a04f3940622e.jpg)

![Dummy\nIntA_PB_D+\nIntA_PB_D-\nGND\nIntA_PB_SSTX+\nIntA_PB_SSTX-\nGND\nIntA_PB_SSRX+\nIntA_PB_SSRX-\nVbus\nINTA_PA_D+\nINTA_PA_D-\nGND\nINTA_PA_SSTX+\nINTA_PA_SSTX-\nGND\nINTA_PA_SSRX+\nINTA_PA_SSRX-\nVbus](.imb-m46-50m-13015-1010/c2cba1bb9be553fa79efbadbcdce122916211693cfcc7747d67163bfa25d4441.jpg)

4.2.7 Front Panel Audio Header
![GND\nMIC_RET\nOUT_RET\n1\nJ_SFNSF\nOUT2_L\nJ_SF\nR\nMIC2_R\nMIC2_L](.imb-m46-50m-13015-1010/35941555ff3b9c692dc27db7f8ec0749f2996a2da685e2d5b40ab4595606a872.jpg)

4.2.8 ATXPWR1

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>+3.3 V</td><td>13</td><td>+3.3 V</td></tr><tr><td>2</td><td>+3.3 V</td><td>14</td><td>-12 V</td></tr><tr><td>3</td><td>Ground</td><td>15</td><td>Ground</td></tr><tr><td>4</td><td>+5 V</td><td>16</td><td>PS-ON# (power supply remote on/off)</td></tr><tr><td>5</td><td>Ground</td><td>17</td><td>Ground</td></tr><tr><td>6</td><td>+5 V</td><td>18</td><td>Ground</td></tr><tr><td>7</td><td>Ground</td><td>19</td><td>Ground</td></tr><tr><td>8</td><td>PWRGD (Power Good)</td><td>20</td><td>No connect</td></tr><tr><td>9</td><td>+5 V (Standby)</td><td>21</td><td>+5 V</td></tr></table>

![12\n24\n1 ▷\n13](.imb-m46-50m-13015-1010/64b349a34a054d1d3ee9efd465b8fe76932a4a867a9700ea4a3a26e0e4fc83f4.jpg)

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>10</td><td>+12 V</td><td>22</td><td>+5 V</td></tr><tr><td>11</td><td>+12 V</td><td>23</td><td>+5 V</td></tr><tr><td>12</td><td>3.3V</td><td>24</td><td>Ground</td></tr></table>

# 4.2.9 ATX12V1

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>Ground</td><td>5</td><td>+12V</td></tr><tr><td>2</td><td>Ground</td><td>6</td><td>+12V</td></tr><tr><td>3</td><td>Ground</td><td>7</td><td>+12V</td></tr><tr><td>4</td><td>Ground</td><td>8</td><td>+12V</td></tr></table>

![The image displays a schematic diagram of a connector pinout. It features a vertical rectangular housing containing eight circular holes arranged in a grid of two columns and four rows. The bottom-left hole is enclosed within a square outline.\n\nSurrounding text and symbols include:\n*   The number **2** is positioned to the left, aligned with the second row.\n*   The number **1** is positioned below the 2, aligned with the bottom row. Next to it is a small letter **b** and a left-pointing arrow.\n*   The number **5** is positioned to the right, aligned with the bottom row.](.imb-m46-50m-13015-1010/7a0cce963c8d2f4718fd606d910ae80833649a47ecec16f9fafc2243b50b99b7.jpg)

# 4.2.10 Printer Port / GPIO Header

Printer Port
![1\nAFD#\nERROR#\nPINIT#\nSLIN#\nGND\nGND\nGND\nGND\nGND\nGND\nGND\nGND\nGND\nGND\nGND\nGND\nGND\nGND\nSPD0\nSPD1\nSPD2\nSPD3\nSPD4\nSPD5\nSPD6\nSPD7\nSPD8\nSPD9\nSPD10\nSPD11\nSPD12\nSPD13\nSPD14\nSPD15\nSPD16\nSPD17\nSPD18\nSPD19\nSPD20\nSPD21\nSPD22\nSPD23\nSPD24\nSPD25\nSPD26\nSPD27\nSPD28\nSPD29\nSPD30\nSPD31\nSPD32\nSPD33\nSPD34\nSPD35\nSPD36\nSPD37\nSPD38\nSPD39\nSPD40\nSPD41\nSPD42\nSPD43\nSPD44\nSPD45\nSPD46\nSPD47\nSPD48\nSPD49\nSPD50\nSPD51\nSPD52\nSPD53\nSPD54\nSPD55\nSPD56\nSPD57\nSPD58\nSPD59\nSPD60\nSPD61\nSPD62\nSPD63\nSPD64\nSPD65\nSPD66\nSPD67\nSPD68\nSPD69\nSPD70\nSPD71\nSPD72\nSPD73\nSPD74\nSPD75\nSPD76\nSPD77\nSPD78\nSPD79\nSPD80\nSPD81\nSPD82\nSPD83\nSPD84\nSPD85\nSPD86\nSPD87\nSPD88\nSPD89\nSPD90\nSPD91\nSPD92\nSPD93\nSPD94\nSPD95\nSPD96\nSPD97\nSPD98\nSPD99\nSPD100](.imb-m46-50m-13015-1010/d4b26eba30ef211e4b3efff916f5a871972f899a5eaa44c9ab12a81fdf2d4a80.jpg)

GPIO

<table><tr><td>PIN</td><td>Signal Name</td><td>PIN</td><td>Signal Name</td></tr><tr><td>26</td><td>NC</td><td>25</td><td>NA</td></tr><tr><td>24</td><td>GND</td><td>23</td><td>SIO_GP70</td></tr><tr><td>22</td><td>GND</td><td>21</td><td>SIO_GP71</td></tr><tr><td>20</td><td>GND</td><td>19</td><td>SIO_GP72</td></tr><tr><td>18</td><td>GND</td><td>17</td><td>SIO_GP87</td></tr><tr><td>16</td><td>GND</td><td>15</td><td>SIO_GP86</td></tr><tr><td>14</td><td>GND</td><td>13</td><td>SIO_GP85</td></tr><tr><td>12</td><td>JGPIOPWR</td><td>11</td><td>SIO_GP84</td></tr><tr><td>10</td><td>JGPIOPWR</td><td>9</td><td>SIO_GP83</td></tr><tr><td>8</td><td>SIO_GP73</td><td>7</td><td>SIO_GP82</td></tr><tr><td>6</td><td>SIO_GP74</td><td>5</td><td>SIO_GP81</td></tr><tr><td>4</td><td>SIO_GP75</td><td>3</td><td>SIO_GP80</td></tr><tr><td>2</td><td>SIO_GP76</td><td>1</td><td>SIO_GP77</td></tr></table>

# 4.2.11 LPC Header

![1\nPCICLK\nFRAME\nPCIRST#\nLAD3\n+3.3V\nLAD0\n+3.3V STANDBY\nGND\n+5V\nGND\nSMB_CLK_MAIN\nSMB_DATA_MAIN\nLAD2\nLAD1\nGND\nS_PWRDWN#\nSERIRQ#\nGND\n48MHz](.imb-m46-50m-13015-1010/45540b680042186816f9b7fa5e90ebbaa509063b5be9ae10ef6176ca901afd7c.jpg)

This connector supports a Trusted Platform Module (TPM) system, which can securely store keys, digital certificates, passwords, and data. A TPM system can effectively enhance network security, protect digital identities while ensuring platform integrity.

# 4.2.12 SPDIF Header

![The image displays a schematic symbol for an electronic connector, specifically a 4-pin header.\n\n*   **Pads:** There is a horizontal row of four pads. From left to right, they are a circle, a square, a circle, and a circle.\n*   **Labels:**\n    *   Above the leftmost circular pad is the text **'+5V'**.\n    *   Above the third circular pad is the text **'GND'**.\n*   **Function:** Below the row of pads is the text **'SPDIF OUT'**.\n*   **Pin Number:** To the left of the first pad is the number **'1'**.](.imb-m46-50m-13015-1010/bcb6608ce54ccd102a130c12259abc242de733e691025563b7f4b9858ff7fff5.jpg)

SPDIF header provides SPDIF audio output to HDMI VGA card and allows the system to connect with HDMI Digital TV / projector / LCD devices.

Connect the SPDIF connector of an HDMI VGA card to this header.

# 4.2.13 LAN LED Header

![The image shows the number '1' to the left of a rectangular box divided into four smaller squares. Inside each square is an empty circle.](.imb-m46-50m-13015-1010/37cf12b6fbc58e1b5589df895a98cd5f0a5a2e3b81d9f6b6d0ef284fd0ea4603.jpg)

# 4.2.14 SMBUS\_TEST1

![The image shows the number 1 followed by a rectangular box. Inside the box, from left to right, is a circle containing a square, followed by three empty circles.](.imb-m46-50m-13015-1010/e5387ab17c39c6836b5f1f4e2ceb2acf42025a36481c263628c2d774bb757f8e.jpg)

<table><tr><td>PIN</td><td>Signal Name</td><td>PIN</td><td>Signal Name</td><td>PIN</td><td>Signal Name</td><td>PIN</td><td>Signal Name</td></tr><tr><td>1</td><td>+3V</td><td>2</td><td>SMB_CLK</td><td>3</td><td>SMB_DATA</td><td>4</td><td>GND</td></tr></table>

# 4.2.15 Buzzer

![The image displays the number '1' on the left. To its right is a square divided vertically into two equal sections, each containing a centered circle.](.imb-m46-50m-13015-1010/5d04cc351fa6ff77a60b46038822e70564d79d8209598ad153a73c53028acb99.jpg)

# 4.3 Jumper and Swtich Settings

# 4.3.1 Clear CMOS Jumpers

(3-pin CLRMOS1)

![The image features the text '1_2' centered at the top. Below it are three square icons arranged horizontally. The first two icons are dark gray squares with white circles inside. The third icon is a white square with a black border and a white circle inside. Below the icons is the text 'Default'.](.imb-m46-50m-13015-1010/3bfdeb25462f828deeec5d04c2f1fcfe6aa51bc010642471582341b09638629f.jpg)

![The image displays a section of a digital interface. At the top, the number '2_3' is shown. Below this is a row of three square icons: the leftmost icon is white with a black outline and a black circle inside, while the middle and rightmost icons are dark gray squares, each containing a white circle. Underneath these icons, the text 'Clear CMOS' appears in black font.](.imb-m46-50m-13015-1010/86abafd9573f8dfc863e927513df5a3db306f3813ff8655b58390932a8f91e5f.jpg)

1-2 : Normal
2-3 : Clear CMOS

CLRMOS1 allows you to clear the data in CMOS. To clear and reset the system parameters back to factory default, turn off and unplug your system from power, wait for 15 seconds, and use a jumper cap to short pin2 and pin3 on CLRMOS1 for 5 seconds.

Please be reminded not to clear the CMOS right after a BIOS update. If you need to clear the CMOS after updating the BIOS, you must boot up and then shut down the system before proceeding with clearing CMOS.

Note: The date, time, and user default profile will only be cleared if the CMOS battery is removed.

(2-pin CLRMOS2)

![The image displays the number '1' followed by a rectangular box divided into two smaller square sections. Inside each of these sections is a circle.](.imb-m46-50m-13015-1010/ab631606cde586e4cf83841aeb8bbcc98402bc03ed488b77e85f2cb78ba1fcd5.jpg)

CLRMOS2 :

Open : Normal

Short : Auto Clear CMOS

(Power Off)

CLRMOS2 allows you to clear the data in CMOS automatically upon AC startup. The data in CMOS includes system setup information, such as system password, date, time, and other system parameters.

To clear and reset the system parameters back to factory default, turn off and unplug your system from power, and then use a jumper cap to short the pins on CLRMOS2.

# 4.3.2 Digital Input / Output Power Select (JGPIOPWR)

![1-2 : +12V\n2-3 : +5V\n3-4 : +5V\n4-5: GND](.imb-m46-50m-13015-1010/9cb98870de497563d23f875b4e4ae666d03153019f8462dac73547b27e3fbaf5.jpg)

# 4.3.3 COM Port Pin9 PWR Setting Jumpers

![The image displays a horizontal row of three squares. Inside each square is a small circle positioned in the upper-left corner. Below the squares are the numbers 1, 2, and 3 respectively.](.imb-m46-50m-13015-1010/4ddd3770d37e685bf8f8213eb59240cde0a57a4159ee5a867f75df341f14d8a5.jpg)

1-2 : +5V
2-3 : +12V

# 4.3.4 PWR LOSS Header

![A schematic symbol showing a connector pin labeled '1' to the left of a rectangular box containing two circles. Above the right circle is the text 'GND'. Below the left circle is '+5VSB' and below the right circle is 'ATX'.](.imb-m46-50m-13015-1010/54f364c7359e1b3211d77727bbfb22090adde5a2928f27b977f413bff1a57bb9.jpg)

Short : Power Loss
Open : no Power Loss

# 4.3.5 ATX/AT Mode Jumper

![The image displays a horizontal sequence of black and white graphics. From left to right, there is a thick vertical black bar, the number '1', and two adjacent squares, each containing a centered circle.](.imb-m46-50m-13015-1010/370cf66ad978863c78af70fa80d4852973eb85f2052a993532eac00bf1425612.jpg)

Open : ATX Mode

Short :AT Mode

# 4.3.6 Chassis Intrusion Headers

![The image displays a schematic symbol. To the left is the number '1'. Next to it is a black rectangular outline containing two white circles side-by-side. A vertical line extends downward from the bottom of the left circle to the text 'Signal'. Another vertical line extends upward from the bottom of the right circle to the text 'GND'.](.imb-m46-50m-13015-1010/3de02db5543d88b586ec2245e73ec1965862624b5f140c848a0d35344b135a72.jpg)

CI1 :

Short : Active Case Open

Open : Normal

Cl2 :

Short : Normal

Open : Active Case Open

# 4.3.7 Digital Input / Output Default Value Setting

![A horizontal rectangular box contains three shapes. The leftmost shape is a circle inside a square. The middle and rightmost shapes are simple circles. Below the box are the numbers 1, 2, and 3, aligned with the shapes from left to right.](.imb-m46-50m-13015-1010/6ead252ee1682d37e500bbe040c2cca2bb003f6d4f58f91146e13e32dd57787d.jpg)

1-2 : Pull-High

2-3 : Pull-Low

# 4.3.8 PWR\_BAT1

![The image displays a black vertical rectangle on the left containing the white number '1'. To its right are two white squares arranged horizontally, each containing a black circle in the center.](.imb-m46-50m-13015-1010/a85ec1c5c432bc8e1caffa35a5d41bb6a86bef3fe161c0e40f2418234ca2d04a.jpg)

Open : Normal

Short : Charge Battery

# 4.3.9 PCIe Isolation Jumper

![The image displays a black and white line drawing featuring the number '1' on the left side. To the right of the number is a square divided vertically into two equal sections, with a circle contained within each section.](.imb-m46-50m-13015-1010/e6314eb6edecef06775bfe4ae42f280a53739ba7db0fc5837b6835643e59bef7.jpg)

# 4.3.10 DACC1

![The image shows the number '1' on the far left. Adjacent to it is a black square frame containing two white squares side-by-side. Inside each white square is a black circle.](.imb-m46-50m-13015-1010/a50659c98f6222ec1515b63fcca437abad5068f1b5e1dbdb0c6f8e786bab700d.jpg)

Short : ACC

Open : no ACC

Note: ACC function is used to auto clear CMOS when the system boots improperly..

# 4.4 Expansion Slots

There are 5 PCI Express slots, 2 PCI slots, 3 M.2 sockets and 1 SIM socket on this motherboard.

PCIe and PCI slots:

<table><tr><td></td><td>Slot 1 (PCIe1)</td><td>Slot 2 (PCIe2)</td><td>Slot 3 (PCIe3)</td><td>Slot 4 (PCIe4)</td><td>Slot 5 (PCIe5)</td><td>Slot 6 (PCI1)</td><td>Slot 7 (PCI2)</td></tr><tr><td>Source</td><td>CPU</td><td>PCI bridge</td><td>CPU</td><td>PCH</td><td>PCH</td><td>PCH</td><td>PCI bridge</td></tr><tr><td>Bandwidth</td><td>PCIe 3.0</td><td>PCIe 3.0</td><td>PCIe 3.0</td><td>PCIe 3.0</td><td>PCIe 3.0</td><td>PCI</td><td>PCI</td></tr><tr><td>Lane Config 1</td><td>x16</td><td>N/A</td><td>N/A</td><td rowspan="3">x4</td><td rowspan="3">x4</td><td rowspan="3">PCI</td><td rowspan="3">PCI</td></tr><tr><td>Lane Config 2</td><td>x8</td><td>N/A</td><td>x8</td></tr><tr><td>Lane Config 3</td><td>x8</td><td>x4</td><td>x4</td></tr></table>

SIM socket: 1 x SIM socket connected to M.2 key B

# M.2 sockets:

• M.2 Key-M (M2\_1)

<table><tr><td>Pin</td><td>Signal</td><td>Signal</td><td>Pin</td></tr><tr><td>1</td><td>GND</td><td>+3.3V</td><td>2</td></tr><tr><td>3</td><td>GND</td><td>+3.3V</td><td>4</td></tr><tr><td>5</td><td>PERn3</td><td>NA</td><td>6</td></tr><tr><td>7</td><td>PERp3</td><td>NA</td><td>8</td></tr><tr><td>9</td><td>GND</td><td>SATA_LED</td><td>10</td></tr><tr><td>11</td><td>PETn3</td><td>+3.3V</td><td>12</td></tr><tr><td>13</td><td>PETp3</td><td>+3.3V</td><td>14</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>16</td></tr><tr><td>17</td><td>PERn2</td><td>+3.3V</td><td>18</td></tr><tr><td>19</td><td>PERp2</td><td>NA</td><td>20</td></tr><tr><td>21</td><td>GND</td><td>NA</td><td>22</td></tr><tr><td>23</td><td>PETn2</td><td>NA</td><td>24</td></tr><tr><td>25</td><td>PETp2</td><td>NA</td><td>26</td></tr><tr><td>27</td><td>GND</td><td>NA</td><td>28</td></tr><tr><td>29</td><td>PERn1</td><td>NA</td><td>30</td></tr><tr><td>31</td><td>PERp1</td><td>NA</td><td>32</td></tr><tr><td>33</td><td>GND</td><td>NA</td><td>34</td></tr><tr><td>35</td><td>PETn1</td><td>NA</td><td>36</td></tr><tr><td>37</td><td>PETp1</td><td>DEVSLP</td><td>38</td></tr><tr><td>39</td><td>GND</td><td>SMB_CLK</td><td>40</td></tr><tr><td>41</td><td>PERn0/SATA-B+</td><td>SMB_DATA</td><td>42</td></tr><tr><td>43</td><td>PERp0/SATA-B-</td><td>NA</td><td>44</td></tr><tr><td>45</td><td>GND</td><td>NA</td><td>46</td></tr><tr><td>47</td><td>PETn0/SATA-A-</td><td>NA</td><td>48</td></tr><tr><td>49</td><td>PETPO/SATA-A+</td><td>PERST#</td><td>50</td></tr><tr><td>51</td><td>GND</td><td>CLKREQ#</td><td>52</td></tr><tr><td>53</td><td>PEFCLKn</td><td>WAKE#</td><td>54</td></tr><tr><td>55</td><td>PEFCLKp</td><td>NA</td><td>56</td></tr><tr><td>57</td><td>GND</td><td>NA</td><td>58</td></tr><tr><td colspan="4"></td></tr><tr><td>67</td><td>NA</td><td>NA</td><td>68</td></tr><tr><td>69</td><td>PEDET</td><td>+3.3V</td><td>70</td></tr><tr><td>71</td><td>GND</td><td>+3.3V</td><td>72</td></tr><tr><td>73</td><td>GND</td><td>+3.3V</td><td>74</td></tr><tr><td>75</td><td>GND</td><td></td><td></td></tr></table>

• M.2 Key-E (M2\_2)

<table><tr><td>Pin</td><td>Signal</td><td>Signal</td><td>Pin</td></tr><tr><td>1</td><td>GND</td><td>+3.3V</td><td>2</td></tr><tr><td>3</td><td>USB_D+</td><td>+3.3V</td><td>4</td></tr><tr><td>5</td><td>USB_D-</td><td>NA</td><td>6</td></tr><tr><td>7</td><td>GND</td><td>NA</td><td>8</td></tr><tr><td>9</td><td>CNV_WGR_D1-</td><td>CNV_RF_RESET</td><td>10</td></tr><tr><td>11</td><td>CNV_WGR_D1+</td><td>NA</td><td>12</td></tr><tr><td>13</td><td>GND</td><td>MODEM_CLKREQ</td><td>14</td></tr><tr><td>15</td><td>CNV_WGR_D0-</td><td>NA</td><td>16</td></tr><tr><td>17</td><td>CNV_WGR_D0+</td><td>GND</td><td>18</td></tr><tr><td>19</td><td>GND</td><td>NA</td><td>20</td></tr><tr><td>21</td><td>CNV_WGR_CLK-</td><td>CNV_BRI_RSP</td><td>22</td></tr><tr><td>23</td><td>CNV_WGR_CLK+</td><td colspan="2"></td></tr><tr><td colspan="4"></td></tr><tr><td>33</td><td>GND</td><td>CNV_BGI_DT</td><td>32</td></tr><tr><td>35</td><td>PETp</td><td>CNV_RGI_RSP</td><td>34</td></tr><tr><td>37</td><td>PETn</td><td>CNV_BRI_DT</td><td>36</td></tr><tr><td>39</td><td>GND</td><td>NA</td><td>38</td></tr><tr><td>41</td><td>PERp</td><td>NA</td><td>40</td></tr><tr><td>43</td><td>PERn</td><td>NA</td><td>42</td></tr><tr><td>45</td><td>GND</td><td>NA</td><td>44</td></tr><tr><td>47</td><td>PEFCLKp</td><td>NA</td><td>46</td></tr><tr><td>49</td><td>PEFCLKn</td><td>NA</td><td>48</td></tr><tr><td>51</td><td>GND</td><td>SUSCLK</td><td>50</td></tr><tr><td>53</td><td>CLKREQ#</td><td>PERSTO#</td><td>52</td></tr><tr><td>55</td><td>WAKE#</td><td>W_DISABLE1#</td><td>54</td></tr><tr><td>57</td><td>GND</td><td>W_DISABLE2#</td><td>56</td></tr><tr><td>59</td><td>CNV_WT_D1-</td><td>SMB_DATA</td><td>58</td></tr><tr><td>61</td><td>CNV_WT_D1+</td><td>SMB_CLK</td><td>60</td></tr><tr><td>63</td><td>GND</td><td>NA</td><td>62</td></tr><tr><td>65</td><td>CNV_WT_D0-</td><td>CLKIN_XTAL_LCP</td><td>64</td></tr><tr><td>67</td><td>CNV_WT_D0+</td><td>NA</td><td>66</td></tr><tr><td>69</td><td>GND</td><td>NA</td><td>68</td></tr><tr><td>71</td><td>CNV_WT_CLK-</td><td>NA</td><td>70</td></tr><tr><td>73</td><td>CNV_WT_CLK+</td><td>+3.3V</td><td>72</td></tr><tr><td>75</td><td>GND</td><td>+3.3V</td><td>74</td></tr></table>

• M.2 Key-B (M2\_B1)

<table><tr><td>Pin</td><td>Signal</td><td>Signal</td><td>Pin</td></tr><tr><td>1</td><td>NA</td><td>+3.3V</td><td>2</td></tr><tr><td>3</td><td>GND</td><td>+3.3V</td><td>4</td></tr><tr><td>5</td><td>GND</td><td>FuLL_Card_Power_off</td><td>6</td></tr><tr><td>7</td><td>USB_D+</td><td>W_DISABLE</td><td>8</td></tr><tr><td>9</td><td>USB_D-</td><td>WWAN_LED#</td><td>10</td></tr><tr><td>11</td><td>GND</td><td></td><td></td></tr><tr><td colspan="4"></td></tr><tr><td>21</td><td>GND</td><td>NA</td><td>20</td></tr><tr><td>23</td><td>NA</td><td>NA</td><td>22</td></tr><tr><td>25</td><td>NA</td><td>NA</td><td>24</td></tr><tr><td>27</td><td>GND</td><td>NA</td><td>26</td></tr><tr><td>29</td><td>USB3_RX-</td><td>NA</td><td>28</td></tr><tr><td>31</td><td>USB3_RX+</td><td>UIM_RESET</td><td>30</td></tr><tr><td>33</td><td>GND</td><td>UIM_CLK</td><td>32</td></tr><tr><td>35</td><td>USB3_TX-</td><td>UIM_DATA</td><td>34</td></tr><tr><td>37</td><td>USB3_TX+</td><td>UIM_PWR</td><td>36</td></tr><tr><td>39</td><td>GND</td><td>NA</td><td>38</td></tr><tr><td>41</td><td>PERn0</td><td>NA</td><td>40</td></tr><tr><td>43</td><td>PERp0</td><td>NA</td><td>42</td></tr><tr><td>45</td><td>GND</td><td>NA</td><td>44</td></tr><tr><td>47</td><td>PETn0</td><td>NA</td><td>46</td></tr><tr><td>49</td><td>PETp0</td><td>NA</td><td>48</td></tr><tr><td>51</td><td>GND</td><td>PERST#</td><td>50</td></tr><tr><td>53</td><td>PEFCLKn</td><td>CLKREQ#</td><td>52</td></tr><tr><td>55</td><td>PEFCLKp</td><td>WAKE#</td><td>54</td></tr><tr><td>57</td><td>GND</td><td>NA</td><td>56</td></tr><tr><td>59</td><td>NA</td><td>NA</td><td>58</td></tr><tr><td>61</td><td>NA</td><td>NA</td><td>60</td></tr><tr><td>63</td><td>NA</td><td>NA</td><td>62</td></tr><tr><td>65</td><td>NA</td><td>NA</td><td>64</td></tr><tr><td>67</td><td>NA</td><td>NA</td><td>66</td></tr><tr><td>69</td><td>NA</td><td>NA</td><td>68</td></tr><tr><td>71</td><td>GND</td><td>+3.3V</td><td>70</td></tr><tr><td>73</td><td>GND</td><td>+3.3V</td><td>72</td></tr><tr><td>75</td><td>NA</td><td>+3.3V</td><td>74</td></tr></table>

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# 5 Driver Installation

Download the requisite drivers for your system from the IMB-M46 product page at:

https://www.adlinktech.com/Products/Industrial\_Motherboards\_SBCs/ATXMotherboards/IMB-M46

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# 6 System Resources

# 6.1 System Memory Map

Table 3: System Memory Map

<table><tr><td>Address Range</td><td>Address Range</td><td>Size</td><td>Description</td></tr><tr><td>(4GB-2MB)</td><td>FFE00000 – FFFFFFFF</td><td>2 MB</td><td>High BIOS Area</td></tr><tr><td>(4GB-18MB) – (4GB-17MB-1)</td><td>FEE00000 – FEEFFFFF</td><td>1 MB</td><td>MSI Interrupts</td></tr><tr><td>(4GB-20MB) – (4GB-19MB-1)</td><td>FEC00000 – FECFFFFFF</td><td>1 MB</td><td>APIC Configuration Space</td></tr><tr><td>15MB – 16MB</td><td>F00000 – FFFFFFF</td><td>1 MB</td><td>ISA Hole</td></tr><tr><td>1MB -15MB</td><td>100000 - EFFFFF</td><td>14MB</td><td>Main Memory</td></tr><tr><td>0K –1MB</td><td>00000 – FFFFFFF</td><td>1MB</td><td>DOS Compatibility Memory</td></tr></table>

# 6.2 I/O Map

Table 4: IO Map

<table><tr><td>Hex Range</td><td>Device</td></tr><tr><td>0000-0CF7</td><td>PCI Express Root Complex</td></tr><tr><td>0D00-FFFF</td><td>PCI Express Root Complex</td></tr><tr><td>0020-0021</td><td>Programmable interrupt controller</td></tr><tr><td>0024-0025</td><td>Programmable interrupt controller</td></tr><tr><td>0028-0029</td><td>Programmable interrupt controller</td></tr><tr><td>002C-002D</td><td>Programmable interrupt controller</td></tr><tr><td>0030-0031</td><td>Programmable interrupt controller</td></tr><tr><td>0034-0035</td><td>Programmable interrupt controller</td></tr><tr><td>0038-0039</td><td>Programmable interrupt controller</td></tr><tr><td>003C-003D</td><td>Programmable interrupt controller</td></tr><tr><td>00A0-00A1</td><td>Programmable interrupt controller</td></tr><tr><td>00A4-00A5</td><td>Programmable interrupt controller</td></tr><tr><td>00A8-00A9</td><td>Programmable interrupt controller</td></tr><tr><td>00AC-00AD</td><td>Programmable interrupt controller</td></tr><tr><td>00B0-00B1</td><td>Programmable interrupt controller</td></tr><tr><td>00B4-00B5</td><td>Programmable interrupt controller</td></tr><tr><td>00B8-00B9</td><td>Programmable interrupt controller</td></tr><tr><td>00BC-00BD</td><td>Programmable interrupt controller</td></tr><tr><td>04D0-04D1</td><td>Programmable interrupt controller</td></tr><tr><td>04D0-04D1</td><td>Programmable interrupt controller</td></tr><tr><td>002E-002F</td><td>Motherboard resources</td></tr><tr><td>004E-004F</td><td>Motherboard resources</td></tr><tr><td>0061-0061</td><td>Motherboard resources</td></tr><tr><td>0063-0063</td><td>Motherboard resources</td></tr><tr><td>0065-0065</td><td>Motherboard resources</td></tr><tr><td>0067-0067</td><td>Motherboard resources</td></tr><tr><td>0070-0070</td><td>Motherboard resources</td></tr><tr><td>0080-0080</td><td>Motherboard resources</td></tr><tr><td>0092-0092</td><td>Motherboard resources</td></tr><tr><td>00B2-00B3</td><td>Motherboard resources</td></tr><tr><td>0680-069F</td><td>Motherboard resources</td></tr><tr><td>FFFF-FFFF</td><td>Motherboard resources</td></tr><tr><td>1800-18FE</td><td>Motherboard resources</td></tr><tr><td>164E-164F</td><td>Motherboard resources</td></tr><tr><td>0040-0043</td><td>System timer</td></tr><tr><td>0050-0053</td><td>System timer</td></tr><tr><td>0070-0077</td><td>System CMOS/real time clock</td></tr><tr><td>00F0-00F0</td><td>Numeric data processor</td></tr><tr><td>02E0-02E7</td><td>COM5</td></tr><tr><td>02E8-02EF</td><td>COM4</td></tr><tr><td>02F8-02FF</td><td>COM2</td></tr><tr><td>0378-037F</td><td>Printer Port</td></tr><tr><td>03E0-03E7</td><td>COM6</td></tr><tr><td>03E8-03EF</td><td>COM3</td></tr><tr><td>03F8-03FF</td><td>COM1</td></tr><tr><td>E000-EFFF</td><td>Chipset PCI Express Root Port</td></tr><tr><td>E000-EFFF</td><td>PCI-to-PCI Bridge</td></tr><tr><td>F000-F03F</td><td>Intel HD Graphic 630</td></tr><tr><td>F040-F05F</td><td>SMBUS</td></tr><tr><td>F090-F097</td><td>Standard SATA AHCI Controller</td></tr><tr><td>F080-F083</td><td>Standard SATA AHCI Controller</td></tr><tr><td>F060-F07F</td><td>Standard SATA AHCI Controller</td></tr></table>

# 6.3 Interrupt Request (IRQ) Lines

# 6.3.1 IRQ Lines PIC Mode

Table 5: IRQ Lines PIC Mode

<table><tr><td>IRQ#</td><td>Device</td></tr><tr><td>0</td><td>System timer</td></tr><tr><td>3</td><td>COM2</td></tr><tr><td>4</td><td>COM1</td></tr><tr><td>5</td><td>COM3, COM4</td></tr><tr><td>8</td><td>System CMOS/real time clock</td></tr><tr><td>10</td><td>COM5, COM6</td></tr><tr><td>13</td><td>Numeric data processor</td></tr><tr><td>14</td><td>Intel Serial IO GPIO Host Controller</td></tr><tr><td>15</td><td>Intel Chipset Smbus</td></tr><tr><td>16</td><td>HD Audio Controller</td></tr></table>

Note: These IRQs can be used for PCI devices when onboard device is disabled.

# 6.3.2 IRQ Lines APIC Mode

Table 6 IRQ Lines APIC Mode

<table><tr><td>IRQ#</td><td>Typical Interrupt Resource</td><td>Connected to Pin</td><td>Available</td></tr><tr><td>0</td><td>System Counter</td><td>N/A</td><td>No</td></tr><tr><td>1</td><td>N/A</td><td>N/A</td><td></td></tr><tr><td>2</td><td>N/A</td><td>N/A</td><td></td></tr><tr><td>3</td><td>Serial Port 2 (COM2)</td><td>IRQ3 via SERIRQ / PIRQ</td><td>Note (1)</td></tr><tr><td>4</td><td>Serial Port 1 (COM1)</td><td>IRQ4 via SERIRQ / PIRQ</td><td>Note (1)</td></tr><tr><td>5</td><td>Serial Port3 (COM3)</td><td>IRQ5 via SERIRQ / PIRQ</td><td>Note (1)</td></tr><tr><td>5</td><td>Serial Port4 (COM4)</td><td>IRQ5 via SERIRQ / PIRQ</td><td>Note (1)</td></tr><tr><td>7</td><td>N/A</td><td>N/A</td><td></td></tr><tr><td>8</td><td>Real-time clock</td><td>N/A</td><td>No</td></tr><tr><td>9</td><td>N/A</td><td>N/A</td><td></td></tr><tr><td>10</td><td>Serial Port5 (COM5)</td><td>IRQ10 via SERIRQ / PIRQ</td><td>Note (1)</td></tr><tr><td>10</td><td>Serial Port6 (COM6)</td><td>IRQ10 via SERIRQ / PIRQ</td><td>Note (1)</td></tr><tr><td>12</td><td>N/A</td><td>N/A</td><td></td></tr><tr><td>13</td><td>Math Processor</td><td>N/A</td><td>Note (1)</td></tr><tr><td>14</td><td>Intel IO GPIO Host Controller</td><td>N/A</td><td>Note (1)</td></tr><tr><td>16</td><td>High Definition Audio Controller</td><td>N/A</td><td></td></tr><tr><td>54-511</td><td>Microsoft ACPI-Compliant System</td><td>N/A</td><td>Note (1)</td></tr></table>

Note: These IRQs can be used for PCI devices when onboard device is disabled.

# 6.4 PCI Features

# 6.4.1 PCI Configuration Space Map

Table 7 PCI Configuration Space Map

<table><tr><td>Bus Number</td><td>Device Number</td><td>Function Number</td><td>Routing</td><td>Description</td></tr><tr><td>00h</td><td>00h</td><td>00h</td><td>N/A</td><td>Intel Host Bridge</td></tr><tr><td>00h</td><td>02h</td><td>00h</td><td>Internal</td><td>Intel VGA Controller</td></tr><tr><td>00h</td><td>14h</td><td>00h</td><td>Internal</td><td>Intel USB 3.0 XHCI</td></tr><tr><td>00h</td><td>14h</td><td>02h</td><td>Internal</td><td>Intel Data acquisition/signal process</td></tr><tr><td>00h</td><td>16h</td><td>00h</td><td>Internal</td><td>Intel Communication device</td></tr><tr><td>00h</td><td>17h</td><td>00h</td><td>Internal</td><td>Intel AHCI 1.0 controller</td></tr><tr><td>00h</td><td>1Ch</td><td>00h</td><td>Internal</td><td>Intel PCI-to-PCI bridge PCIe</td></tr><tr><td>00h</td><td>1Ch</td><td>01h</td><td>Internal</td><td>Intel PCI-to-PCI bridge PCIe</td></tr><tr><td>00h</td><td>1Ch</td><td>02h</td><td>Internal</td><td>Intel PCI-to-PCI bridge PCIe</td></tr><tr><td>00h</td><td>1Ch</td><td>03h</td><td>Internal</td><td>Intel PCI-to-PCI bridge PCIe</td></tr><tr><td>00h</td><td>1Dh</td><td>00h</td><td>Internal</td><td>Intel PCI-to-PCI bridge PCIe</td></tr><tr><td>00h</td><td>1Dh</td><td>05h</td><td>Internal</td><td>Intel PCI-to-PCI bridge PCIe</td></tr><tr><td>00h</td><td>1Fh</td><td>00h</td><td>Internal</td><td>Intel ISA bridge</td></tr><tr><td>00h</td><td>1Fh</td><td>03h</td><td>Internal</td><td>Intel Multimedia</td></tr><tr><td>00h</td><td>1Fh</td><td>04h</td><td>Internal</td><td>Intel SMBU</td></tr><tr><td>00h</td><td>1Fh</td><td>05h</td><td>Internal</td><td>Intel Controller</td></tr><tr><td>00h</td><td>1Fh</td><td>06h</td><td>Internal</td><td>Intel Ethernet Controller</td></tr><tr><td>02h</td><td>00h</td><td>00h</td><td>Internal</td><td>ITE PCI toPCI Bridge</td></tr><tr><td>04h</td><td>00h</td><td>00h</td><td>Internal</td><td>Intel Ethernet Controller PCIe</td></tr><tr><td>05h</td><td>00h</td><td>00h</td><td>Internal</td><td>Intel Ethernet Controller PCIe</td></tr><tr><td>07h</td><td>00h</td><td>00h</td><td>Internal</td><td>Intel Ethernet Controller PCIe</td></tr></table>

Note: The bus number change if the PEG/PCIE port has a device.

Table 8 PCI Interrupt Routing Map

<table><tr><td>INT Line</td><td>LpcBridge</td><td>High Definition Audio</td><td>SMBus</td><td>PCIE Root Port #2 (IT8892)</td><td>PCIE Root Port #3 (LAN3)</td><td>PCIE Root Port #4 (LAN4)</td></tr><tr><td>Int0</td><td>INTA:16</td><td>INTA:16</td><td>INTA:16</td><td>INTB:17</td><td>INTC:18</td><td>INTD:19</td></tr><tr><td>Int1</td><td>INTB:17</td><td></td><td></td><td>INTC:18</td><td>INTD:19</td><td>INTA:16</td></tr><tr><td>Int2</td><td>INTC:18</td><td></td><td></td><td>INTD:19</td><td>INTA:16</td><td>INTB:17</td></tr><tr><td>Int3</td><td>INTD:19</td><td></td><td></td><td>INTA:16</td><td>INTB:17</td><td>INTC:18</td></tr></table>

<table><tr><td>INT Line</td><td>PCI Slot 1</td><td>PCI Slot 2</td><td>PCIE Root Port #5 (PClex4)</td><td>PCIE Root Port #9 (PClex4)</td><td>PCIE Root Port #13 (LAN1)</td><td>PCIE Root Port #14 (LAN2)</td></tr><tr><td>Int0</td><td>INTA:17</td><td>INTA:18</td><td>INTA:16</td><td>INTA:16</td><td>INTA:16</td><td>INTB:17</td></tr><tr><td>Int1</td><td>INTB:18</td><td>INTB:19</td><td>INTB:17</td><td>INTB:17</td><td>INTB:17</td><td>INTC:18</td></tr><tr><td>Int2</td><td>INTC:19</td><td>INTC:16</td><td>INTC:18</td><td>INTC:18</td><td>INTC:18</td><td>INTD:19</td></tr><tr><td>Int3</td><td>INTD:16</td><td>INTD:17</td><td>INTD:19</td><td>INTD:19</td><td>INTD:19</td><td>INTA:16</td></tr></table>

<table><tr><td>INT Line</td><td>PCIE Root Port #21 (PCIex4)</td></tr><tr><td>Int0</td><td>INTA:16</td></tr><tr><td>Int1</td><td>INTB:17</td></tr><tr><td>Int2</td><td>INTC:18</td></tr><tr><td>Int3</td><td>INTD:19</td></tr></table>

# 6.5 SMBus Slave Addresses

Table 9 SMBus Slave Addresses

<table><tr><td>Device</td><td>Address</td></tr><tr><td>DIMM_A1</td><td>A0h</td></tr><tr><td>DIMM_A2</td><td>A2h</td></tr><tr><td>DIMM_B1</td><td>A4h</td></tr><tr><td>DIMM_B2</td><td>A6h</td></tr></table>

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# 7 UEFI Setup

# 7.1 Menu Structure

This section presents the primary menus of the UEFI Setup Utility. Use the following table as a quick reference for the contents of the UEFI Setup Utility. The subsections describe the submenus and options for each menu item.

2 Options to enter UEFI Setup Utility:

• Press [F2] or [Del] during POST (Power-On-Self-Test)
• Press [Ctl] + [Alt] + [Del] after POST

<table><tr><td>Main</td><td>Advanced</td><td>H/W Monitor</td></tr><tr><td>- Sets up the system time/date and displays the system information:- System Information- System Date- System Time</td><td>- Contains advanced system configurations, including:- CPU- Chipset- Storage- Super IO- AMT Technology- ACPI- USB- Trusted Computing- Advanced Screen- H/W Health Monitoring Screen- Security Screen- Boot Screen</td><td>- Displays Hardware Status info, including:- CPU Temperature- Motherboard Temperature- CPU Fan Speed- Voltages</td></tr><tr><td>Security</td><td>Boot</td><td>Exit</td></tr><tr><td>- Changes or clears the supervisor/user password for the system</td><td>- Configures the boot settings and boot priority for available devices</td><td>- Exits the UEFI Setup Utility while saving or discard the changes made- Also allows you to load the UEFI default settings</td></tr></table>

# 7.2 Main Menu

Upon entering the UEFI Setup Utility, the Main Menu is displayed, providing read-only information about your system and also allows you to set the System Date and Time. Refer to the screenshots and tables below for details of the submenus and settings.

<table><tr><td colspan="2">System Date [Wed 06/15/2022] System Time [07:29:48] UEFI Version : IMB-M46 L0.02B Processor Type : Intel(R) Core(TM) i9-10900E CPU @ 2.80GHz Processor Speed : 2800MHz Cache Size : 20MB Total Memory : 16GB with 512MB Shared Memory Single-Channel Memory Mode DDR4_A1 : 16GB (DDR4-2666) DDR4_A2 : None DDR4_B1 : None DDR4_B2 : None</td><td>Set the Date. Use Tab to switch between Date elements. Default Ranges: Year: 1998-9999 Months: 1-12 Days: Dependent on month Range of Years may vary. ↔: Select Screen ↑↓: Select Item Enter: Select +/-: Change Option F1: General Help F7: Discard Changes F9: Load UEFI Defaults F10: Save and Exit ESC: Exit</td></tr></table>

Ver. 2.21.1277 Copyright (C) 2022 American Megatrends International， LLC.

# 7.3 Advanced Menu

Contains the configurations for the following: CPU Configuration, Chipset Configuration, Storage Configuration, Super IO Configuration, AMT Configuration, ACPI Configuration, USB Configuration, and Trusted Computing.

<table><tr><td colspan="2">Aptio Setup - American Megatrends International, LLC.Main Advanced H/W Monitor Security Boot Exit</td></tr><tr><td rowspan="2">CPU ConfigurationChipset ConfigurationStorage ConfigurationSuper IO ConfigurationAMT ConfigurationACPI ConfigurationUSB ConfigurationTrusted ComputingUEFI Update UtilityInstant Flash</td><td>CPU Configuration Parameters</td></tr><tr><td>←→: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver. 2.21.1277 Copyright (C) 2022 American Megatrends International， LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Instant Flash</td><td>Updates system UEFI without requiring to enter operation systems.</td></tr></table>

# 7.3.1 Advanced > CPU Configuration

Aptio Setup - American Megatrends International, LLC.
Advanced

<table><tr><td colspan="2">Intel(R) Core(TM) i9-10900E CPU @ 2.80GHz</td><td rowspan="12">Intel Hyper ThreadingTechnology allows multiple threads to run on each core, so that the overall performance on threaded software is improved.</td></tr><tr><td>Processor ID</td><td>A0655</td></tr><tr><td>Microcode Revision</td><td>CA</td></tr><tr><td>Processor Max Speed</td><td>2800 MHz</td></tr><tr><td>Processor Min Speed</td><td>800 MHz</td></tr><tr><td>Processor Cores</td><td>10Core(s) / 20Thread(s)</td></tr><tr><td>Intel Hyper Threading Technology</td><td>[Enabled]</td></tr><tr><td>Active Processor Cores</td><td>[All]</td></tr><tr><td>CPU C States Support</td><td>[Disabled]</td></tr><tr><td>Intel Virtualization Technology</td><td>[Enabled]</td></tr><tr><td>Intel SpeedStep Technology</td><td>[Enabled]</td></tr><tr><td>Turbo Mode</td><td>[Enabled]</td></tr><tr><td>CPU Thermal Throttling</td><td>[Enabled]</td><td>←: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver. 2.21.1277 Copyright (C) 2022 American Megatrends International， LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Intel Hyper Threading Technology</td><td>Allows multiple threads to run on each core, thereby improving the overall performance on threaded software</td></tr><tr><td>Active Processor Cores</td><td>Selects the number of cores to enable in each processor package</td></tr><tr><td>CPU C States Support</td><td>Optimizes power saving. It is recommended to keep C3, C6 and C7 all enabled for better power saving.</td></tr><tr><td>Intel Virtualization Technology</td><td>Enables support for VMM (Virtual Machine Architecture) to utilize the additional hardware capabilities provided by Vanderpool Technology. This option will be hidden if the installed CPU does not support Intel Virtualization Technology.</td></tr><tr><td>Intel SpeedStep Technology</td><td>Intel&#x27;s new power saving technology, allowing processors to switch between multiple frequencies and voltage points for better power saving. This item will be hidden if the current CPU does not support Intel SpeedStep technology</td></tr><tr><td>Turbo Mode</td><td>Allows processor cores to run faster than marked frequency</td></tr><tr><td>CPU Thermal Throttling</td><td>Enables CPU internal thermal control mechanism to keep the CPU from overheating</td></tr></table>

# 7.3.2 Advanced > Chipset Configuration

<table><tr><td colspan="3">Aptio Setup - American Megatrends International, LLC.</td></tr><tr><td colspan="3">Advanced</td></tr><tr><td>ME Firmware VersionVT-d Capability</td><td>14.0.33.1125Supported</td><td rowspan="3">Select a primary VGA.</td></tr><tr><td>Primary Graphics AdapterAbove 4G DecodingVT-d</td><td>[PCI Express][Disabled][Enabled]</td></tr><tr><td>PCIE1 Link SpeedPCIE2 Link SpeedPCIE3 Link SpeedPCIE4 Link SpeedPCIE5 Link Speed</td><td>[Auto][Auto][Auto][Auto]</td></tr><tr><td>Share MemoryIGPU Multi-Monitor</td><td>[Auto][Disabled]</td><td rowspan="4">↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr><tr><td>Onboard LAN1Onboard LAN2</td><td>[Enabled][Enabled]</td></tr><tr><td>Onboard HD Audio</td><td>[Enabled]</td></tr><tr><td>Deep SleepRestore on AC/Power Loss</td><td>[Disabled][Power Off]</td></tr></table>

Ver. 2.21.1277 Copyright (C) 2022 American Megatrends International, LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Primary Graphics Adapter</td><td>Switches the boot priority of your graphic adapter between PCI Express and Onboard</td></tr><tr><td>Above 4G Decoding</td><td>Enables 64-bit capable devices to be decoded in Above 4G Address Space</td></tr><tr><td>VT-d</td><td>Enables Intel® VT-d technology (virtualization for directed I/O)</td></tr><tr><td>PCIE Link Speed (1-5)</td><td>Selects the link speed for PCIE 1-5</td></tr><tr><td>Share Memory</td><td>Configures the size of memory that is allocated to the integrated processor upon bootup</td></tr><tr><td>IGPU Multi-Monitor</td><td>Disables the integrated graphics when an external graphics card is installed</td></tr><tr><td>Onboard LAN (1,2)</td><td>Enables the Onboard LAN1,2 features</td></tr><tr><td>Onboard HD Audio</td><td>Enables the Onboard HD Audio feature</td></tr><tr><td>Deep Sleep</td><td>Enables mobile platforms (DC only) or desktop platforms (AC only) to support Deep S4/S5</td></tr><tr><td>Restore on AC/Power Loss</td><td>Selects the power state after a power failure</td></tr></table>

# 7.3.3 Advanced > Storage Configuration

<table><tr><td colspan="3">Aptio Setup - American Megatrends International, LLC.</td></tr><tr><td colspan="3">Advanced</td></tr><tr><td>SATA Controller(s)</td><td>[Enabled]</td><td rowspan="10">Enable/disable the SATA controllers.</td></tr><tr><td>SATA Mode Selection</td><td>[AHCI]</td></tr><tr><td>SATA Aggressive Link Power Management</td><td>[Disabled]</td></tr><tr><td>Hard Disk S.M.A.R.T</td><td>[Enabled]</td></tr><tr><td>▶ SATA3_1: Not Detected</td><td></td></tr><tr><td>▶ SATA3_2: Not Detected</td><td></td></tr><tr><td>▶ SATA3_3: Not Detected</td><td></td></tr><tr><td>▶ SATA3_4: Not Detected</td><td></td></tr><tr><td>▶ SATA3_5/M2_1: Not Detected</td><td></td></tr><tr><td>▶ SATA3_6: Not Detected</td><td></td></tr><tr><td></td><td></td><td>↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver. 2.21.1277 Copyright (C) 2022 American Megatrends International, LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>SATA Controller(s)</td><td>Enables the SATA Controller feature</td></tr><tr><td>SATA Mode Selection</td><td>Selects SATA mode</td></tr><tr><td>SATA Aggressive Link Power Management</td><td>Configures SATA Aggressive Link Power Management</td></tr><tr><td>Hard Disk S.M.A.R.T.</td><td>Enables the Self-Monitoring, Analysis, and Reporting Technology feature</td></tr></table>

# 7.3.4 Advanced > Super IO Configuration

<table><tr><td colspan="3">Aptio Setup - American Megatrends International, LLC.</td></tr><tr><td colspan="3">Advanced</td></tr><tr><td>COM1</td><td>[Enabled]</td><td rowspan="11">Enable or Disable COM1IO=3F8h; IRQ=4;</td></tr><tr><td>Type Select</td><td>[RS232]</td></tr><tr><td>COM2</td><td>[Enabled]</td></tr><tr><td>Type Select</td><td>[RS232]</td></tr><tr><td>COM3</td><td>[Enabled]</td></tr><tr><td>COM4</td><td>[Enabled]</td></tr><tr><td>COM5</td><td>[Enabled]</td></tr><tr><td>COM6</td><td>[Enabled]</td></tr><tr><td>Parallel Port</td><td>[Enabled]</td></tr><tr><td>Device Mode</td><td>[ECP and EPP 1.9 Mode]</td></tr><tr><td>Change Settings</td><td>[Auto]</td></tr><tr><td>WDT Timeout Reset</td><td>[Disabled]</td><td>↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>COM (1-6)</td><td>Sets the parameters of COM 1-6</td></tr><tr><td>Type Select</td><td>Selects the port type: RS232, RS422, or RS485 (for COM 1,2)</td></tr><tr><td>Parallel Port</td><td>Enables the Parallel port</td></tr><tr><td>Device Mode</td><td>Selects the device mode according to your connected device</td></tr><tr><td>Change Settings</td><td>Selects the address of the Parallel port</td></tr><tr><td>WDT Timeout Reset</td><td>Sets the Watch Dog Timer</td></tr></table>

# 7.3.5 Advanced > AMT Technology

Aptio Setup - American Megatrends International,LLC.
Advanced

<table><tr><td>AMT BIOS Features</td><td>[Enabled]</td><td rowspan="7">When disabled AMT BIOSFeatures are no longer supported and user is no longer able to access MEBx Setup.Note:This option does not disable Manageability Features in FW.</td></tr><tr><td>USB Provisioning of AMT</td><td>[Disabled]</td></tr><tr><td>►CIRA Configuration</td><td></td></tr><tr><td>►ASF Configuration</td><td></td></tr><tr><td>►Secure Erase Configuration</td><td></td></tr><tr><td>►OEM Flags Settings</td><td></td></tr><tr><td>►MEBx Resolution Settings</td><td></td></tr><tr><td></td><td></td><td>↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver.2.21.1277 Copyright (C) 2022 American Megatrends International,LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>AMT BIOS Features</td><td>Enables Intel® Active Management Technology BIOS Extension</td></tr><tr><td>ASF support</td><td>Enables Alert Specification Format</td></tr><tr><td>USB Provisioning of AMT</td><td>Enables AMT USB Provisioning</td></tr><tr><td>Secure Erase mode</td><td>Changes Secure Erase module behavior: as explained below● Simulated: Performs SE flow without erasing SSD● Real: Erases SSD</td></tr><tr><td>Force Secure Erase</td><td>Enables Force Secure Erase on next boot</td></tr><tr><td>MEBx hotkey Pressed</td><td>Enables MEBx hotkey press</td></tr><tr><td>MEBx Selection Screen</td><td>Enables MEBx Selection Screen</td></tr><tr><td>Hide Un-configure ME Confirmation Prompt</td><td>Enables Hide Un-Configure ME without password confirmation prompt.</td></tr><tr><td>Un-Configure ME</td><td>Enables Un-Configure ME without password</td></tr><tr><td>WatchDog</td><td>Enables AMT WatchDog Timer</td></tr><tr><td>Activate Remote Assistance Process</td><td>Enables CIRA boot trigger</td></tr><tr><td>PET Progress</td><td>Enables PET Events progress to receive PET events</td></tr><tr><td>ASF Sensors Table</td><td>Enables ASF Sensor Table</td></tr><tr><td>Non-UI Mode Resolution</td><td>Sets resolution for non-UI text mode</td></tr><tr><td>UI Mode Resolution</td><td>Sets resolution for UI text mode</td></tr><tr><td>Graphics Mode Resolution</td><td>Sets resolution for graphics mode</td></tr></table>

# 7.3.6 Advanced > ACPI Configuration

<table><tr><td colspan="3">Aptio Setup - American Megatrends International, LLC.</td></tr><tr><td colspan="3">Advanced</td></tr><tr><td>Suspend to RAM</td><td>[Auto]</td><td rowspan="3">It is recommended to select auto for ACPI S3 power saving.</td></tr><tr><td>PCIE Devices Power On</td><td>[Disabled]</td></tr><tr><td>RTC Alarm Power On</td><td>[By OS]</td></tr><tr><td></td><td></td><td>↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver. 2.21.1277 Copyright (C) 2022 American Megatrends International, LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Suspend to RAM</td><td>Sets to auto detect or disable the Suspend-to-RAM feature</td></tr><tr><td>PCIE Devices Power On</td><td>Enables PCIE devices to turn on the system from the power-soft-off mode</td></tr><tr><td>RTC Alarm Power On</td><td>Enables RTC (Real Time Lock) to power on the system</td></tr></table>

# 7.3.7 Advanced > USB Configuration

<table><tr><td colspan="3">Aptio Setup - American Megatrends International, LLC.</td></tr><tr><td colspan="3">Advanced</td></tr><tr><td rowspan="2">Legacy USB SupportUSB Power Control</td><td rowspan="2">[Enabled][Default Setting]</td><td>Enables Legacy USB support.AUTO option disables legacy support if no USB devices are connected.</td></tr><tr><td>↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver.2.21.1277 Copyright (C) 2022 American Megatrends International, LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Legacy USB Support</td><td>Enables support for legacy USB devices:Enabled: Enables support for legacy USBUEFI Setup Only: USB devices can only be used under UEFI setup and Windows / Linux OS</td></tr><tr><td>USB Power Control</td><td>Controls USB power</td></tr></table>

# 7.3.8 Advanced > Trusted Computing

Aptio Setup - American Megatrends Internat ional, LLC.
Advanced

<table><tr><td>TPM 2.0 Device FoundFirmware Version: 7.85Vendor: IFXSecurity Device Support [Enable]Active PCR banks SHA256Available PCR banks SHA-1,SHA256SHA-1 PCR Bank [Disabled]SHA256 PCR Bank [Enabled]Pending operation [None]Platform Hierarchy [Enabled]Storage Hierarchy [Enabled]Endorsement Hierarchy [Enabled]TPM 2.0 UEFI Spec Version [TCG_2]Physical Presence Spec Version [1.3]TPM 2.0 InterfaceType [TIS]Device Select [Auto]Onboard TPM [Enabled]</td><td>Enables or Disables BIOS support for security device.O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available.↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver. 2.21.1277 Copyright (C) 2022 American Megatrends Internationa1, LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Security Device Support</td><td>Enables BIOS support for security devices</td></tr></table>

# 7.4 Hardware Health Event Monitoring Screen

This screen allows you to monitor the status of your system and installed devices, such as CPU temperature, mothboard temeprature, CPU fan speed, chassis fan speed, and the ctritical voltage.

<table><tr><td colspan="2">Aptio Setup - American Megatrends International, LLC.</td></tr><tr><td colspan="2">Main Advanced H/W Monitor Security Boot Exit</td></tr><tr><td>Hardware Health Event MonitoringCPU Temperature : +35 °CM/B Temperature : +32 °CCPU_FAN1 Speed : 3370 RPMCHA_FAN1 Speed : N/ACHA_FAN2 Speed : N/ACHA_FAN3 Speed : N/A+3V : +3.312 V+3VSB : +3.456 VVCORE : +0.896 VVCCM : +1.200 VVBAT : +3.008 V+12V : +12.160 VCPU_FAN1 Setting [Full On]CHA_FAN1 Setting [Full On]CHA_FAN2 Setting [Full On]CHA_FAN3 Setting [Full On]Case Open Feature [Disabled]</td><td>Quiet Fan Function Control↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver.2.21.1277 Copyright (C) 2022 American Megatrends International, LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>FAN Setting (CPU, CHA1,2,3)</td><td>Sets the speed for CPU Fan1, Chassis Fan1, Chassis Fan2, Chassis Fan 3</td></tr><tr><td>Case Open Feature</td><td>Enables case open detection feature</td></tr><tr><td>Clear Status</td><td>Clears case open logs (only appears when the case open feature is enabled and triggered)</td></tr></table>

# 7.5 Security Screen

The Security Screen lets you change or clear the supervisor / user passwords for the system.

<table><tr><td colspan="2">Aptio Setup - American Megatrends International, LLC.Main Advanced H/W Monitor Security Boot Exit</td></tr><tr><td>Supervisor Password Not InstalledUser Password Not InstalledSupervisor PasswordUser Password▶ Secure Boot</td><td>Set or change the password for the administrator account.Only the administrator has authority to change the settings in the UEFI Setup Utility. Leave it blank and press enter to remove the password.↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver. 2.21.1277 Copyright (C) 2022 American Megatrends International， LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Administrator Password</td><td>Sets Administrator Password</td></tr><tr><td>User Password</td><td>Sets User Password</td></tr><tr><td>Secure Boot</td><td>Enables support for Secure Boot</td></tr></table>

# 7.6 Boot Screen

This section displays the avaialbe devices on your system for you to configure the boot priority and settings.

<table><tr><td colspan="3">Aptio Setup - American Megatrends International, LLC.Main Advanced H/W Monitor Security Boot Exit</td></tr><tr><td rowspan="2" colspan="2">Boot Option PrioritiesBoot Option #1 [UEFI: JetFlashTranscend 8GB 8.07, Partition 1]Boot From Onboard LAN [Disabled]Setup Prompt Timeout 1Bootup Num-Lock [On]Full Screen Logo [Enabled]</td><td>Sets the system boot order</td></tr><tr><td>↔: Select Screen↑↓: Select ItemEnter: Select+/-: Change OptionF1: General HelpF7: Discard ChangesF9: Load UEFI DefaultsF10: Save and ExitESC: Exit</td></tr></table>

Ver.2.21.1277 Copyright (C) 2022 American Megatrends International, LLC.

<table><tr><td>Feature</td><td>Description</td></tr><tr><td>Boot From Onboard LAN</td><td>Enables Boot From Onboard LAN feature</td></tr><tr><td>Setup Prompt Timeout</td><td>Displays the number of seconds to wait for setup activation key</td></tr><tr><td>Bootup Num-Lock</td><td>Enables automatically activation of the Numeric Lock upon boot-up</td></tr><tr><td>Full Screen Logo</td><td>Enables OEM logo</td></tr></table>

# Safety Instructions

Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use.

Please read these safety instructions carefully.
• Please keep this User‘s Manual for later reference.
• Read the specifications section of this manual for detailed information on the operating environment of this equipment.
• When installing/mounting or uninstalling/removing equipment, turn off the power and unplug any power cords/cables.
• To avoid electrical shock and/or damage to equipment:

Keep equipment away from water or liquid sources.
Keep equipment away from high heat or high humidity.
 Keep equipment properly ventilated (do not block or cover ventilation openings).
 Make sure to use recommended voltage and power source settings.
 Always install and operate equipment near an easily accessible electrical socket-outlet.
Secure the power cord (do not place any object on/over the power cord).
 Only install/attach and operate equipment on stable surfaces and/or recommended mountings.
 If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source.

• Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.

# Getting Service

Ask an Expert: https://www.adlinktech.com/en/askanexpert

# ADLINK Technology, Inc.

Address: No. 66, Huaya 1st Road, Guishan District Taoyuan City 333, Taiwan

Tel: +886-3-216-5088

Fax: +886-3-328-5723

Email: service@adlinktech.com

# Ampro ADLINK Technology, Inc.

Address: 6450 Via Del Oro, San Jose, CA 95119-1208, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-600-1189

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

Address: 300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area Shanghai, 201203 China

Tel: +86-21-5132-8988

Fax: +86-21-5132-3588

Email: market@adlinktech.com

# ADLINK Technology GmbH

Address: Hans-Thoma-Strasse 8-10, 68163 Mannheim, Germany

Tel: +49-621-43214-0

Fax: +49-621 43214-30

Email: emea@adlinktech.com

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you.
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