# IMB-M47H # User’s Manual Industrial ATX Motherboard with 12th Gen Intel® Core™ i9/i7/i5/i3 Processors and Intel® H610E Chipset ![Green computer motherboard with various ports and slots, no visible text or symbols](.imb-m47h-50m-00106-1000-10/d6e4c4efd14b58ea071f64d8b25e58d936a980692cc1ced4552b0f66d5731043.jpg) Manual Rev.: 1.0 Revision Date: January 13, 2023 Part Number: 50M-00106-1000 # Preface # Copyright Copyright 2023 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. # Disclaimer The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages. # Environmental Responsibility ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company. ![Symbol of a trash bin crossed with two crossed lines and a solid rectangle below (no text or labels)](.imb-m47h-50m-00106-1000-10/ae900616ca079789e225dbdbff14fd420ed5537df2c37b6bf198c14a5a6e9216.jpg) Battery Labels (for products with battery) ![Simple line drawing of a trash bin with two crossed lines indicating no waste or prohibition (no text or symbols)](.imb-m47h-50m-00106-1000-10/b743fe386c56136002991228a42735eff9e571e63017becb7f222be37d31c957.jpg) ![Li-ion](.imb-m47h-50m-00106-1000-10/79bf2667da0ffcbaebd39fd6b8c28d3ff76e3a2a0653a76e82cf906a1e4a441e.jpg) ![RECYCLE\nRBRC\nLi-ion\n7.800.822.8837](.imb-m47h-50m-00106-1000-10/7dc466d7954bad320e3a122faa3589f457ee7b7d7d73bfa5cf81c4c4ff48a6a1.jpg) ![廢電池請回收](.imb-m47h-50m-00106-1000-10/71fad0106f4d1e33c11176049e1513bf0da40ea718a5da27727b700de51bda7b.jpg) # California Proposition 65 Warning ![A yellow triangular warning sign with a black border and a central black exclamation point.](.imb-m47h-50m-00106-1000-10/e2a054b00cfd7dbee54249f72c6996c31d88e461d327fe275cf07e072a829d1f.jpg) WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov. # Trademarks Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies. Revision History

Revision	Description	Date	By
1.0	Initial release	2023-01-13	RA

# Table of Contents Preface ... List of Figures ......... ..vi List of Tables .... ...vii 1 Introduction................. 1.1 Packing List ... 1.2 Optional Accessories .. 2 Specifications .............. 2.1 Core System.. .3 2.2 I/O Interface .. .3 2.3 Graphics .. .4 2.4 Audio... .4 2.5 Mechanical and Environmental.. 4 2.6 Certification.. .4 2.7 Operating Systems .. 4 2.8 Functional Block Diagram.. .5 3 Mechanical Layout .. 3.1 IO Panel Connector Locations.. 3.2 Onboard Connectors, Jumpers and Switch Locations.... .. 8 3.3 Mechanical Dimensions.. .. 10 4 Connector Pinouts .............. ..11 4.1 IO Panel Connectors .. .11 4.2 Onboard Connectors .. .14 4.3 Jumper and Switch Settings .. ..20 5 Driver Installation .... .25 6 System Resources ............. .27 6.1 System Memory Map. .27 6.2 I/O Map ... .27 6.3 Interrupt Request (IRQ) Lines... ..29 6.4 PCI Features.. .30 6.5 SMBus Slave Addresses .. .31 # 7 BIOS Setup.......... .33 7.1 Menu Structure . .. 33 7.2 Main Menu . .34 7.3 Advanced Menu. .35 7.4 Chipset Menu ...... ..43 7.5 Security Menu .. .. 49 7.6 Boot Menu .. .. 50 7.7 Save & Exit Menu.. .. 51 # Safety Instructions.... .52 # Getting Service.... .53 # List of Figures Figure 1: Functional Block Diagram . .5 Figure 2: IO Panel Connector Locations . Figure 3: Onboard Connector Locations . .8 Figure 4: Mechanical Dimensions - Board . ..10 Figure 5: Mechanical Dimensions - IO Panel.. ..10 # List of Tables Table 1: IO Panel Connector Definitions. Table 2: Onboard Connector Definitions.. 9 Table 3: Onboard Jumper and Switch Definitions.. .9 Table 4: Jumper and Switch Definitions .. ..20 Table 5: System Memory Map ..... .27 Table 6: IO Map.. ..27 Table 7: IRQ Lines PIC Mode.. ..29 Table 8 IRQ Lines APIC Mode .. ..29 Table 9 PCI Configuration Space Map. ..30 Table 10 PCI Interrupt Routing Map.. ..31 Table 11 SMBus Slave Addresses. ..31 This page intentionally left blank. # 1 Introduction The IMB-M47H is an ATX motherboard supporting 12th Generation Intel® Core™ i9/i7/i5/i3 processors, an Intel® H610E chipset with 7 PCIe/ PCI slots to provide a cost-competitive embedded computing solution. With high-speed data transfer interfaces up to PCIe Gen 5, USB 3.2 Gen 1 x1 (5 Gbps), and SATA 6 Gb/s, dual-channel DDR5 memory up to 64 GB in two DIMM slots for industrial automation applications, the IMB-M47H offers a significant competitive advantage for embedded computing applications. The rugged I/O design enhances system flexibility with robust device compatibility, durable connectivity, and extreme environment readiness. # 1.1 Packing List IMB-M47H ATX motherboard • Rear I/O shield M.2 screw kit # 1.2 Optional Accessories • CPU cooler for 65W CPU (Part Number: 32-20976-0000-A0) • CPU cooler for 125W CPU (available by request only) • SATA port cable (7-pin) (Part Number: 30-10057-7000) • 2-port USB 2.0 port cable with bracket (Part Number: 30-25010-3010) • 1-port LPT port cable with bracket (Part Number: 30-25019-2000) • 2-port COM port cable with bracket (Part Number: 30-25003-3000) • Y cable for PS/2 KB & mouse (Part Number: 30-01016-2000) This page intentionally left blank. # 2 Specifications # 2.1 Core System  CPU: 12th Generation Intel® Core™ i9/i7/i5/i3 Desktop Processor • Intel® Core™ i9-12900E, up to 5.00 GHz, 16 Core, 30M Cache, DDR5 4800 MT/s support, 65W • Intel® Core™ i9-12900TE, up to 4.80 GHz, 16 Core, 30M Cache, DDR5 4800 MT/s support, 35W • Intel® Core™ i7-12700E, up to 4.80 GHz, 12 Core, 25M Cache, DDR5 4800 MT/s support, 65W • Intel® Core™ i7-12700TE, up to 4.60 GHz, 12 Core, 25M Cache, DDR5 4800 MT/s support, 35W • Intel® Core™ i5-12500E, up to 4.50 GHz, 6 Core, 18M Cache, DDR5 4800 MT/s support, 65W • Intel® Core™ i5-12500TE, up to 4.30 GHz, 6 Core, 18M Cache, DDR5 4800 MT/s support, 35W • Intel® Core™ i3-12100E, up to 4.20 GHz, 4 Core, 12M Cache, DDR5 4800 MT/s support, 60W • Intel® Core™ i3-12100TE, up to 4.00 GHz, 4 Core, 12M Cache, DDR5 4800 MT/s support, 35W • Intel® Pentium® Gold G7400E, up to 3.60 GHz, 2 Core, 6M Cache, DDR5 4800 MT/s support, 46W • Intel® Pentium® Gold G7400TE, up to 3.00 GHz, 2 Core, 6M Cache, DDR5 4800 MT/s support, 35W • Intel® Celeron® G6900E, up to 3.00 GHz, 2 Core, 4M Cache, DDR5 4800 MT/s support, 46W • Intel® Celeron® G6900TE, up to 2.40 GHz, 2 Core, 4M Cache, DDR5 4800 MT/s support, 35W Chipset: Intel® H610E Chipset Memory: 2x 288-pin DDR5 non-ECC sockets, dual-channel DDR5 4800 MHz, up to 64 GB  BIOS: AMI® UEFI BIOS, 256 Mb SPI Flash Memory  Hardware Monitor +3.3 V voltage +5 V voltage +12 V voltage CPU temperature System temperature CPU fan speed System fan speed # 2.2 I/O Interface Expansion Slots 1x PCIe x16 Gen5 1x PCIe x4 Gen3 1x PCIe x1 Gen3 . 4x PCI . LAN LAN1: I219-LM supports 1Gbps / 100Mbps / 10Mbps • LAN2: I225-V supports 2.5Gps / 1Gbps / 100Mbps / 10Mbps . SATA: 3x SATA 6.0 Gb/s connectors #  USB 4x USB 3.2 Gen 1 x1 ports (5Gbps, rear I/O) • 2x USB 2.0 ports (rear I/O) • 1x USB 2.0 vertical Type A port for internal dongles • 2x USB 2.0 via header  COM: 2x RS-232/422/485 (rear I/O), 4x RS-232 pin headers  Parallel Port: 1x LPT pin header  PS/2 Combo Port: 1x PS/2 keyboard and mouse connector (rear I/O) DIO: 32-bit GPIO  M.2 Connector: 1x M.2 M-key, 2280 (supports PCIe x4 Gen3 (signal set by SW1), SATA) TPM: TPM 2.0 # 2.3 Graphics  VGA: 1x VGA connector (rear I/O), resolution up to 1920 x 1200 @ 60Hz  DP1.4a: 1x DP connector (rear I/O), resolution up to 3840 x 2160 @ 60Hz  HDMI 2.0b: 1x HDMI connector (rear I/O) resolution up to 3840 x 2160 @ 30Hz # 2.4 Audio Audio Codec: Realtek® ALC888S  Interfaces: 1x Mic-in and 1x Line-out connector (rear I/O) # 2.5 Mechanical and Environmental  Form Factor: ATX 305 mm x 244 mm (W x L) Operating Temperature: 0°C to $6 0 ^ { \circ } \mathsf { C }$ Storage Temperature: -40°C to 85°C Humidity: 60 °C @ 95% RH, non-condensing # 2.6 Certification CE & FCC Class B # 2.7 Operating Systems Microsoft® Windows® 10, 64-bit Ubuntu LTS 20.04 (32/64-bit) # 2.8 Functional Block Diagram ![Based on the provided flowchart, here is the accurate and concise description of the labeled blocks and their connections:\n\n**1. Intel® Alder Lake-S Core™ i Processor**\n* **Left Connections:**\n * Connects via 'PCIe Gen5 x16' to a 'PCIe x16 slot'.\n * Connects via 'PTN3355BS' to 'VGA'.\n* **Right Connections:**\n * Connects to two 'DDR5 4800MHz UDIMM'.\n * Connects to 'DP'.\n * Connects to 'HDMI'.\n* **Down Connection:**\n * Connects via 'DMI' to the Chipset block.\n\n**2. Intel® ADL-S Chipset H610E**\n* **Up Connection:** Receives 'DMI' from the Processor.\n* **Left Connections (Inputs/Outputs):**\n * Connects via 'I219-V & I225-V' to '2* RJ45'.\n * Connects via '3* SATA III' to '3* SATA ports'.\n * Connects via 'PCIe Gen3' to a 'PCIe x4 slot'.\n * Connects via 'SATA III' to 'M.2 M-key 2280'.\n * Connects via 'PCIe Gen3' to a 'PCIe x1 slot'.\n * Connects via '4* USB 3.2 Gen 1x1' to '4* USB 3.2 ports (5Gb)'.\n * Connects via '2* USB 2.0' to '2* USB 2.0 ports'.\n* **Right Connections:**\n * Connects via 'ALC888S' to 'Line out' and 'Mic in'.\n * Connects via 'PCIe' to 'IT8892E', which connects via 'PCI' to '4* PCI slots'.\n * Outputs '3* USB 2.0'.\n * Outputs '32 bit GPIO'.\n * Connects to 'BIOS'.\n * Outputs 'I2C' (connects down to SIO).\n * Outputs 'SMBUS' to 'BMC (optional)'.\n* **Down Connection:** Connects down to the SIO block.\n\n**3. SIO**\n* **Left Connections:**\n * Connects to 'PS2 KB/MS combo'.\n * Connects via '2* RS232/422/485' to '2* COM ports'.\n * Connects to '4* RS232'.\n* **Right Connections:**\n * Connects to '2* SYS Fans'.\n * Connects to 'CPU FAN'.\n * Connects to 'Printer Port'.\n * Connects to 'Case Open'.](.imb-m47h-50m-00106-1000-10/39eb56ee28eeec26b0c961832a0ebe59a8064c165ab27547621591006a1e0f6a.jpg) Figure 1: Functional Block Diagram This page intentionally left blank. # 3 Mechanical Layout # 3.1 IO Panel Connector Locations ![FOXCONN\n1\n2\n3\n4\n5\n6\n7\n8\n9\n10\n11](.imb-m47h-50m-00106-1000-10/46a41ddea604ba4187dd5bef3a1288c7133d5abf16cf43f9cc34d46932b8e7c2.jpg) Figure 2: IO Panel Connector Locations Table 1: IO Panel Connector Definitions

IO Panel Connectors
Item	Description
1	VGA Connector
2	HDMI Port
3	DisplayPort
4	KB/MS PS/2 Port
5	USB 2.0 Port #7
6	USB 2.0 Port #8
7	COM1 RS-232/422/485
8	COM2 RS-232/422/485
9	LAN1 + USB 3.2 Gen.1 Port #1, #2
10	LAN2 + USB 3.2 Gen.1 Port #3, #4
11	Line-Out / MIC-In Port

3.2 Onboard Connectors, Jumpers and Switch Locations ![J3\nJ4 J11\nK\nJ5 C C\nJ10 N\nA\nJ\nH\nI\nO\nH\nS\nP\nG\nJ6\nD\nJ12\nH\nB Q R B B B\nQ\nSW1\nL L\nP J2 P/J9\nJ7 J8\nF\nADLINK](.imb-m47h-50m-00106-1000-10/871c12edcab637d664e86de7e4a211122c39017e3f618cd2453aa1fb20acb9df.jpg) Figure 3: Onboard Connector Locations Table 2: Onboard Connector Definitions

Onboard Connectors
Item	Description	Remarks
A	USB 2.0 Box Header	USB56
B	PCI Slot	PCI1-4
C	SATA Connectors	SATA1-3
D	Serial Port Header	COM3-6
E	Parallel Port Header	LPT1
F	Front Panel Audio Header	FP_AUDIO1
G	Chassis Intrusion Header	JCASE1
H	CPU FAN Header (4-pin)	CPU_FAN1, SYS_FAN1, SYS_FAN2
I	Front Panel Header	F_PANEL1
J	Vertical USB2.0 Connector	USB9
K	Main Power Supply Connector	ATX1
L	Processor Power Supply Connector	ATX12V1, ATX12V2
M	Debug Header	ESPI1
N	SPI Headers	SPI1
O	GPIO	JDIO1
P	M.2 2280 Slot	M2M1
Q	PCIe x4 Slot	PCIEX4_1
R	PCIe x1 Slot	PCIEX1_1
S	PCIe x16 Slot	PCIEX16_1

Table 3: Onboard Jumper and Switch Definitions

Onboard Jumpers and Switch
Item	Description	Remarks
J1	Clear CMOS	CLCMOS1
J2	COM Port 1 voltage	JCOMPWR1
J3	AT/ATX mode	JPSON1
J4	JI2C1 header power	JPW1
J5	JSMB2 header power	JPW2
J6	JDIO1 header power	JPW3
J7	COM1 master/slave and terminal selection
J8	COM2 master/slave and terminal selection
J9	JSETCOM1/2	JSETCOM1/2
J10	JSMB2	JSMB2
J11	JI2C1	JI2C1
J12	JSMB1	JSMB1
SW1	SW1	SW1

# 3.3 Mechanical Dimensions Top View ![| Dimension (mm) |\n| -------------- |\n| 243.84 |\n| 237.49 |\n| 165.1 |\n| 33.02 |\n| 22 |\n| 52 |\n| 77.54 |\n| 105 |\n| 127.5 |\n| 146 |\n| 163.83 |\n| 209.55 |\n| 288.29 |\n| 304.8 |](.imb-m47h-50m-00106-1000-10/d7205e483013ef56f9ab18e5377956ea02703a43900ed42a14fdd723c7cb8fb1.jpg) Figure 4: Mechanical Dimensions - Board Side View ![31.54\nDimensions: mm](.imb-m47h-50m-00106-1000-10/092fcc051888e89d5a5df1ef55d50904b64e7b085badfa59ab1c7f65f15072db.jpg) Figure 5: Mechanical Dimensions - IO Panel # 4 Connector Pinouts See 3.1 Connector Locations on page 7 for connector locations. # 4.1 IO Panel Connectors # 4.1.1 HDMI Connector

Pin	Signal	Pin	Signal
1	HDMI1_CON_DP2	2	GND
3	HDMI1_CON_DN2	4	HDMI1_CON_DP1
5	GND	6	HDMI1_CON_DN1
7	HDMI1_CON_DP0	8	GND
9	HDMI1_CON_DN0	10	HDMI1_CON_CKP
11	GND	12	HDMI1_CON_CKN
13	NC	14	NC
15	HDMI1_DDC_CLK	16	HDMI1_DDC_DATA
17	GND	18	+5V_HDMI
19	HDMI1_CON_HPD

![This image displays a close-up view of a white, rectangular electrical connector housing containing two parallel rows of metal contact pins. The housing is marked with numbers indicating the pin layout: the numbers '19 17' and '3 1' are printed along the top edge, while '18' and '4 2' are printed along the bottom edge.](.imb-m47h-50m-00106-1000-10/080150fe0d2e02c4a325393d89cc78fd291a0da82d304595036e50af95937003.jpg) # 4.1.2 VGA Connector

Pin	Signal	Pin	Signal
1	VGA_CON_RED	2	VGA_CON_GREEN
3	VGA_CON_BLUE	4	NC
5	GND	6	GND
7	GND	8	GND
9	+5V_VGA	10	GND
11	NC	12	VGA_DDCDAT
13	VGA_CON_HS	14	VGA_CON_VS
15	VGA_DDCCLK

![The image displays a line drawing of a DB-15 connector. It features a central rectangular housing with rounded corners containing a 3x5 grid of 15 circular pinholes. Flanking the housing on the left and right are two hexagonal shapes representing mounting screws. The number '5' is positioned at the top left, '1' at the top right, '15' at the bottom left, and '11' at the bottom right.](.imb-m47h-50m-00106-1000-10/94d543c536b975ca113683eefbecff33082b658946fa84ea78f5c553012fcb81.jpg) # 4.1.3 USB Connectors USB 3.0, USB 2.0

Pin	Signal
1	+5 VDC
2	USB D-
3	USB D+
4	GND

![A black and white line drawing of a 4-pin connector housing. The housing is rectangular with four internal rectangular sections. Below the housing, the numbers 1, 2, 3, and 4 are printed horizontally. Directly beneath the number 3 is a small lowercase letter 'j'.](.imb-m47h-50m-00106-1000-10/e52a063646b23f5aa2ec940dd6b98401fb3b5d2b0026bc510ae7237a378942f1.jpg) USB2.0

Pin	Signal
1	+5V_USB12
2	USB_CM_N1
3	USB_CM_P1
4	GND
5	USB3_RX_CM_N1
6	USB3_RX_CM_P1
7	GND
8	USB3_TX_CM_N1
9	USB3_TX_CM_P1

![The image displays the numbers 9 8 7 6 5 in a row at the top. Below this is a large rectangular box. Inside the box, there is a smaller inner rectangle near the top and the numbers 1 2 3 4 arranged in a row at the bottom.](.imb-m47h-50m-00106-1000-10/60a564a60e8d5b1eb9f81f3ab15f268b6b4227dade375e04c65baad1ef50b07b.jpg) USB3.0 # 4.1.4 PS/2 Combo Connector

Pin	Signal
1	KB_DAT
2	MS_DAT
3	GND
4	+5V_DUAL
5	KB_CLK
6	MS_CLK

![6\n4\n2 1\n3\n5](.imb-m47h-50m-00106-1000-10/36b96c6be55b3bfbf52e23eb88173577ecc645a5c1b46d10cd59db0f4db7b536.jpg) # 4.1.5 COM 1-2 Stacked Connector Top connector COM1, bottom connector COM2

Pin	Signal
Pin	RS-232	RS-422	RS-485
1	DCD#	Tx-	Tx/Rx-
2	RxD	Tx+	Tx/Rx+
3	TxD	Rx+	N/A
4	DTR#	Rx-	N/A
5	GND	N/A	N/A
6	DSR#	N/A	N/A
7	RTS#	N/A	N/A
8	CTS#	N/A	N/A
9	RI#	N/A	N/A

![The image displays a technical line drawing of a connector housing. Inside a rectangular outline, there are two hexagonal shapes on the far left and right sides, representing screws or nuts. In the center is a rounded rectangle containing two horizontal rows of five small circles each, representing pins. The numbers '1', '5', '6', and '9' are positioned at the corners of the pin grid: '1' is at the top left, '5' is at the top right, '6' is at the bottom left, and '9' is at the bottom right.](.imb-m47h-50m-00106-1000-10/4bb2d8024c80aef115800bcdfe8a3572876b174e96d60e514bdf5de75adb42e5.jpg) # 4.1.6 Ethernet Connectors (LAN1, LAN2) Dual Ethernet controllers based on Intel® i219LM/i225V, support PXE and WOL over both LANs.

LED Indication of RJ45 Connector (LAN1 I219)
LED	Position	Color	LED State	NIC State
Link/Activity	Left of connector	Yellow	On	Active Connection
			Blinking	Transmit/Receive Activity
			Off	LAN link is not established
Link Speed	Right of connector	Green/Orange	Orange	1000 Mbps
			Green	100 Mbps
			Off	10 Mbps

![The image displays a diagram featuring a thick black square border. Inside the border:\n* In the top left corner, there is a yellow square.\n* In the top right corner, there is a green square next to an orange square.\n* In the bottom center, there is a large rectangle filled with diagonal hatching lines.](.imb-m47h-50m-00106-1000-10/70010d8cb9db4218793133d074a8c55fb30eba601fa4491c06b467f2c932a108.jpg)

LED Indication of RJ45 Connector (LAN2 i225)
LED	Position	Color	LED State	NIC State
Link/Activity	Left of connector	Yellow	On	Active Connection
			Blinking	Transmit/Receive Activity
			Off	LAN link is not established
Link Speed	Right of connector	Green/Orange	Green	1000 Mbps
			Orange	2500 Mbps
			Off	10/100 Mbps

![The image displays a schematic diagram featuring a large rectangle in the lower section filled with diagonal hatching lines running from top-left to bottom-right. In the upper section, there is a yellow square on the left and a green square on the right. All shapes are outlined in black against a white background.](.imb-m47h-50m-00106-1000-10/d9e20ce2881ffc50ec8f31d2515e99961bf37477a2835199b60805083eebd6e7.jpg) # 4.2 Onboard Connectors See 3.2 Onboard Connectors, Jumpers and Switch Locations on page 8 for connector locations. # 4.2.1 USB2.0 Box Header (USB56)

Pin	Signal	Pin	Signal
1	+5V DC	2	+5V DC
3	D -	4	D -
5	D +	6	D +
7	Ground	8	Ground
9	KEY (no pin)	10	No Connect/OC

![The image displays a technical line drawing of a connector. Inside a rectangular outline, there are ten contact points arranged as follows:\n* A solid square is at the top left.\n* Below the square is a vertical column of eight circular contacts.\n* To the right of the bottom circular contact in the column is a single circular contact.\n\nText labels are present around the rectangle:\n* '1' and a small 'b' are on the left side.\n* '2' is at the top right.\n* '10' is at the bottom right.](.imb-m47h-50m-00106-1000-10/ea4d1ccb37f893f2cb25041fe8edb3f3c172b0bce8e3639ccab142a784538005.jpg) # 4.2.2 PCI Connector (PCI1-PCI4) The PCI connector on Expansion Slot #2, #5\~#7 supports single-slot and a bus master PCI expansion cards. # 4.2.3 SATA Connectors (SATA1-SATA3)

Pin	Signal	Description
1	GND	Ground
2	TXP	Transmit diff data - positive
3	TXN	Transmit diff data - negative
4	GND	Ground
5	RXN	Receive diff data - negative
6	RXP	Receive diff data - positive
7	GND	Ground

![This image displays a black-and-white technical line drawing of a rectangular component. On the right side, the number **1** is positioned above the number **7**. The central structure is a large vertical rectangle containing a long, narrow inner rectangular slot. Inside this slot runs a vertical dashed line populated by small, solid black squares spaced evenly apart. To the left of the dashed line within the slot is a small horizontal rectangular protrusion. The top and bottom of the outer rectangle feature small, L-shaped notches or indentations.](.imb-m47h-50m-00106-1000-10/6165e1092bcf2690b69fd0941a3ecb8e88c21f0347fae1175679c0309a8dc075.jpg) # 4.2.4 Serial Port Header (COM3-COM6) Serial Port RS-232

Pin	Signal	Description	Pin	Signal	Description
1	DCD#	Data Carrier Detect	2	DSR#	Data Set Ready
3	RXD	Receive Data	4	RTS#	Request To Send
5	TXD#	Transmit Data	6	CTS#	Clear To Send
7	DTR#	Data Terminal Ready	8	RI#	Ring Indicator
9	GND	GND	10	KEY	No Pin

![1\n2\n9](.imb-m47h-50m-00106-1000-10/98bf8d4b8ba42ec1d7a539078fd812ae265d6cf47108e965580eb55dc31d0768.jpg) # 4.2.5 Parallel Port Header (LPT1)

Pin	Signal	Pin	Signal
1	STB#	2	AFD#
3	DATA0	4	ERR#
5	DATA1	6	INIT#
7	DATA2	8	SLIN#
9	DATA3	10	GND
11	DATA4	12	GND
13	DATA5	14	GND
15	DATA6	16	GND
17	DATA7	18	GND
19	ACK#	20	GND
21	BUSY	22	GND
23	PE	24	GND
25	SLCT	26	NC

![1\n2\n25\n26](.imb-m47h-50m-00106-1000-10/b8c1149eb307e3461e13ff83c46ed20252a96526241782821293a3244a6001a7.jpg) # 4.2.6 Front Panel Audio Header (FP\_AUDIO1)

Pin	Signal	Pin	Signal
1	[Port 2] SENSE_RETURN_B	2	NC
3	Line-In Port2 Left	4	NC
5	Line-In Port2 Right	6	GND_A
7	MIC-In Port2 Left	8	SIDE OUT Right
9	MIC-In Port2 Right	10	SIDE OUT Left

![The image displays a vertical column of eight square boxes. Inside each box is a smaller, solid black square. To the left of the column is the number '2', and to the right is the number '1'.](.imb-m47h-50m-00106-1000-10/1e75d838559378dea9bd57552cc91b16219a94dfd40724db66ef7d81705d5c2b.jpg) # 4.2.7 Chassis Intrusion Header (JCASE1)

Pin	Signal	Description
1	CASEOP#	Case open signal
2	GND	Ground

![The image displays a schematic line drawing of a rectangular object, resembling a light switch plate, which contains two stacked circles and a small square. To the right of the drawing is the text 'a 1', where 'a' is a small superscript.](.imb-m47h-50m-00106-1000-10/7da56f1e46af8cea1ac7368c6e84595897ba72820e03262aeb375d169a35cffb.jpg) # 4.2.8 CPU FAN Header (4-pin) (CPU\_FAN1, SYS\_FAN1, SYS\_FAN2)

Pin	Signal	Description
1	GND	Ground
2	+12 V	FAN Power
3	Tach	FAN Tachometer
4	PWM	FAN PWM

![The image displays a vertical black bar on the far left, followed by the number '1'. In the center is a tall, thin vertical rectangle containing four solid black circles arranged in a column. Above the top circle is a small rectangular mark. On the right side, the number '1' is visible. Faint, partial shapes appear at the bottom right.](.imb-m47h-50m-00106-1000-10/1fc2f45aa3c8be78c5562ea8cfae62413130e6aae0bdc56b614ae4e9c69011c0.jpg) The fan header supports +12 V at 1 A maximum. # 4.2.9 Front Panel Header (F\_PANEL1)

Pin	Signal	In/Out	Description	Pin	Signal	In/Out	Description
HDD Activity LED				Power LED
1	HDD_LED+	Out	Hard disk LED pull-up to +3.3 V	2	PLED_PWR	Out	Power LED pull-up to +3.3_DUAL
3	HDD_LED#	Out	Hard disk active LED	4	SUPLED	Out	Front panel active LED
5	Ground		Ground	6	PANSWIN#	In	Power switch
7	FP_RESET#	In	Reset switch	8	Ground		Ground
9	NC			10	NC

# 4.2.10 Vertical USB 2.0 Connector (USB9)

Pin	Signal
1	+5V_DUAL
2	D -
3	D +
4	GND

![The image displays a schematic diagram of a connector, likely a DB9 connector, enclosed in a rectangular outline. Inside, there are two rows of rectangular contacts. The top row contains five contacts, and the bottom row contains four contacts. Below the contacts, the numbers '1' and '2' are positioned under the leftmost two contacts of the top row. Below that, the numbers '3' and '4' are positioned under the leftmost two contacts of the bottom row.](.imb-m47h-50m-00106-1000-10/b2b43df1e811e2adac1ebac81cc4b6e03ca74d0f25a6902ac78ec336f8fb804d.jpg) USB2.0 # 4.2.11 Main Power Supply Connector (ATX1)

Pin	Signal	Pin	Signal
1	+3.3 V	13	+3.3 V
2	+3.3 V	14	-12 V
3	Ground	15	Ground
4	+5 V	16	PS-ON# (power supply remote on/off)
5	Ground	17	Ground
6	+5 V	18	Ground
7	Ground	19	Ground
8	PWRGD (Power Good)	20	No connect
9	+5 V (Standby)	21	+5 V
10	+12 V	22	+5 V
11	+12 V	23	+5 V
12	No connect	24	Ground

![12\n24\n1 ▶\n13](.imb-m47h-50m-00106-1000-10/b0e8ae05310440851169562ea2d104631ace84e88cc6ad4224348b0ce24eb689.jpg) # 4.2.12 Processor Power Supply Connector (ATX12V1) (ATX12V2)

Pin	Signal	Pin	Signal
1	Ground	5	+12V
2	Ground	6	+12V
3	Ground	7	+12V
4	Ground	8	+12V

![The image displays a diagram of a connector pinout. It features a rectangular outline with rounded top corners and a small notch on the right side. Inside the rectangle, eight black circles with white centers are arranged in two columns of four rows. The bottom-left circle contains a small square.\n\nOutside the rectangle, there are text annotations:\n- To the left, the number **2** is positioned near the second row from the top.\n- Below that, the number **1** is positioned near the bottom row. Next to it is a small **p** inside a triangle pointing to the right.\n- To the right, the number **5** is positioned near the bottom row.](.imb-m47h-50m-00106-1000-10/36a314d795da23834809c23e736562e62b21113dc26c31ecd3c915df11b83d38.jpg)

Pin	Signal	Pin	Signal
1	Ground	3	+12V
2	Ground	4	+12V

![The image displays a schematic floor plan section featuring the number '1' on the left. To its right is a rectangular outline representing a room. Inside the room, four symbols are arranged in two rows. The top row contains two ceiling fan symbols (circles with blades), and the bottom row contains two light switch symbols (squares with diagonal lines).](.imb-m47h-50m-00106-1000-10/016f601fd0200dc9cae19be3cb73cdd84153a5c2eeb9faa33e05549364cb9739.jpg) # 4.2.13 Debug Header (ESPI1)

Pin	Signal	Pin	Signal
1	ESPI_DEG_CLK_R	2	ESPI_DEG_IO1
3	ESPI_RESET#_R	4	ESPI_DEG_IO0
5	ESPI_CS#	6	+3.3V
7	ESPI_DEG_IO3	8	GND
9	ESPI_DEG_IO2	10	+3.3V_DUAL

![The image displays a vertical white rectangular object, resembling a component from a toy set like Lego. It features a central black vertical band containing a column of nine white icons. The icons appear to be geometric shapes, alternating between squares with nested inner squares and squares with diagonal lines. To the left of the object is the number '2' and to the right is the number '1', both printed in black.](.imb-m47h-50m-00106-1000-10/dc17cd804ee1e33bf413b6eff53caf16ef0ab9ecfea17e7d869d6d83bfa31f0b.jpg) # 4.2.14 SPI Headers (SPI1)

Pin	Signal	Pin	Signal
1	VCC3	2	GND
3	SPI_CS#	4	SPI_CLK
5	SPI_MISO	6	SPI_MOSI
7	HOLD#	8	Key

![The image displays a vertical rectangular graphic resembling a domino tile. The top half contains six black pips arranged in two columns of three. The bottom half contains a single black pip centered within a square grid pattern. To the left of the bottom half is the number 2, and to the right is the number 1.](.imb-m47h-50m-00106-1000-10/20c84dcafa5946ff983f305c0f0c5425190a5677acac1b37ca37540699a2106e.jpg) 4.2.15 GPIO (JDIO1)

Pin	Signal	Pin	Signal
1	DIO1	2	DIO17
3	DIO2	4	DIO18
5	DIO3	6	DIO19
7	DIO4	8	DIO20
9	DIO5	10	DIO21
11	DIO6	12	DIO22
13	DIO7	14	DIO23
15	DIO8	16	DIO24
17	DIO9	18	DIO25
19	DIO10	20	DIO26
21	DIO11	22	DIO27
23	DIO12	24	DIO28
25	DIO13	26	DIO29
27	DIO14	28	DIO30
29	DIO15	30	DIO31
31	DIO16	32	DIO32
33	NC	34	NC
35	NC	36	NC
37	NC	38	NC
39	GND	40	POWER

![1\n2\n39\n40](.imb-m47h-50m-00106-1000-10/5c93b21f6f19b96c49a25003fe0ad50fbca9bcfe10d0a5ea6217c2ebeaf0b16b.jpg) 4.2.16 JSETCOM1/JSETCOM2

Pin	Signal	Pin	Signal
1	UART1_RXD	2	COM1_RXD485
3	UART1_RXD	4	COM1_RXD422
5	UART1_RXD	6	COM1_RXD232
7	COM1_DCD#	8	COM1_TXD
9	COM1_CN_DCD#	10	COM1_CN_TX
11	TDX485N1	12	RXD485P1
13	COM1_RXD	14	COM1_DTR#
15	COM1_CN_RX	16	COM1_CN_DTR#
17	TDX485P1	18	RXD485N1

![The image displays a black-and-white line drawing of a component that resembles a wire-wound resistor or inductor.\n\n* **Central Element:** A rectangular structure filled with a series of vertical loops, representing the coil windings.\n* **Leads:** Horizontal lines extend from the left and right ends of the coil. The left lead has a small loop at its tip.\n* **Labels:** Four numbers are positioned around the corners of the component:\n * **2** is at the top left.\n * **1** is at the bottom left.\n * **18** is at the top right.\n * **17** is at the bottom right.](.imb-m47h-50m-00106-1000-10/e3e62c7d5329de19b47257d07e86fb812dfe4a68c0c572d368759e4160856573.jpg) 4.2.17 M.2 2280 Slot (M2M1)

Pin	Signal	Pin	Signal
1	GND	2	+3.3V_DUAL
3	GND	4	+3.3V_DUAL
5	M2_PCIE3_RX_N8	6	x
7	M2_PCIE3_RX_P8	8	x
9	GND	10	M2_PCH_SSD_LED#
11	M2_PCIE3_TX_C_N8	12	+3.3V_DUAL
13	M2_PCIE3_TX_C_P8	14	+3.3V_DUAL
15	GND	16	+3.3V_DUAL
17	M2_PCIE3_RX_N7	18	+3.3V_DUAL
19	M2_PCIE3_RX_P7	20	X
21	GND	22	X
23	M2_PCIE3_TX_C_N7	24	X
25	M2_PCIE3_TX_C_P7	26	X
27	GND	28	X
29	M2_PCIE3_RX_N6	30	X
31	M2_PCIE3_RX_P6	32	X
33	GND	34	X
35	M2_PCIE3_TX_C_N6	36	X
37	M2_PCIE3_TX_C_P6	38	SSD_SATA_DEVSLP_R
39	GND	40	X
41	SATA_PE_RX_NO	42	X
43	SATA_PE_RX_P0	44	X
45	GND	46	X
47	SATA_PE_TX_NO	48	X
49	SATA_PE_TX_P0	50	PCIE_M2M_RST#
51	GND	52	M2M_CLKREQ#_R
53	CK_100M_N11	54	M2_PCH_WAKE#
55	CK_100M_P11	56	x
57	GND	58	x
Mechanical Key (M-Key)
67	X	68	SUSCLK_R
69	M2_SSD_PEDET	70	+3.3V_DUAL
71	GND	72	+3.3V_DUAL
73	GND	74	+3.3V_DUAL
75	GND

![Pure electrical circuit lines without any symbols](.imb-m47h-50m-00106-1000-10/eae0cc1323414fa9c91ed12f76f90d21c7ea3af7c148b122eb51a2346dcc5abc.jpg) # 4.3 Jumper and Switch Settings See 3.2 Onboard Connectors, Jumpers and Switch Locations on page 8 for jumper and switch locations. Table 4: Jumper and Switch Definitions

Jumper Block
Item	Description	Remarks
JCMOS1	Clear CMOS.One 1x3 2.0mm pin header1-2 (default) = Normal, 2-3 = Clear CMOS	Normal (Default)<img src="images/ad780e33000c6ac167875512c5d7c57c1ce112e8c9738205ec0ca081fab3be1d.jpg"/>1Clear CMOS<img src="images/feea95fa18b879d0424ef79297714b2f87c549d0d2163503594618127b5e6b83.jpg"/>1
JCOMPWR1	COM Power selection.One 2x3 2.0mm pin header1-2 = +12V, 3-4 (default) = Ring, 5-6 = +5V	Ring1 <img src="images/c359f9b120da40675c9f7f4e20ca96ab096f8d41864554c7e7eead2e0b07b4c7.jpg"/> 2+12V1 <img src="images/04e82a097276ea19be520d21a2eabc69b217ec772cbc1a2e5b3ee9f4ace3115e.jpg"/> 2+5V1 <img src="images/72aa19b9ca428aeec2eff765a5bcb35d2f53db84023b9fa80b6cd4da239f5449.jpg"/> 2
JPSON1	AT/ATX mode selection.One 1x3 2.0mm pin header1-2 = AT Mode; 2-3 (default) = ATX mode	AT mode<img src="images/900b9cfa54d2b08340962d8ecaa8b870b85458407788e0a59f7964dcd9bae193.jpg"/>1ATX mode(Default)<img src="images/b120f61c58989c91109d1e5a2263b3475a3c39fbd0060272cfd6022425e5bc13.jpg"/>1

Jumper Block
JSETCOM1JSETCOM2	One 2x9 2.0mm pin headerRS232: 5-6, 7-9, 8-10, 13-15, 14-16 (default)RS422: 3-4, 9-11, 10-12, 15-17, 16-18RS485: 1-2, 9-11, 10-12, 15-17, 16-18					<img src="images/b55f40f2f459e1b6a0729cfc2ac0625af23f34afc7b450ee474ad9e76792f07d.jpg"/>
COM1_S1-S4 master/slave and terminal selection	COM1	S1	S2	S3	S4	(Default)<img src="images/09d2357fece2c9c921bb67c9c2c534b36ee2d4baa714e69c49176cab15692a61.jpg"/>
	RS-232	2-3	2-3	2-3	2-3
	RS-485	1-2	1-2	2-3	2-3
	RS-422	1-2	1-2	1-2	1-2
COM2_S1-S4 master/slave and terminal selection	COM2	S1	S2	S3	S4	(Default)<img src="images/98af54d343b239c39cc7868b504919250d331a7812bf884254d8b5893465d6b8.jpg"/>
	RS-232	2-3	2-3	2-3	2-3
	RS-485	1-2	1-2	2-3	2-3
	RS-422	1-2	1-2	1-2	1-2
JPW1	JI2C1 header power.One 2X3 2.0mm pin headerNC (default)/+5V_DUAL/+3.3V_DUAL					NC (Default)2<img src="images/b8dd8cef61a2c6ffad5b9ffb85640e550fea135481b1b2adc6cb603ea8d86d22.jpg"/>+5V_DUAL2<img src="images/e702578741edeedc3f6036726f78840702e97e90eb16b7d34cd0a5462090dfaf.jpg"/>+3.3V_DUAL2<img src="images/01b9a360e1f9f3d76816641f783d61466dc392f6cc35fda1133743445f8e0bd6.jpg"/>

Jumper Block
JPW2	Power selection for JSMB1 power pin.One 2x3 2.0mm pin headerNC (default)/+5V/+3.3V	NC (Default)1 2<img src="images/1a84cb94f7d7329d5442fc9f3dff716b1a120973aae2883f7f2c2b557c828735.jpg"/>____+5V1 <img src="images/3974b4c80640f004fe3f32559d21de6c114b1176a1ad2e79f5ecf03d47eea325.jpg"/>____+3.3V1 <img src="images/6ba140756d09022038fc06ed1c6cbd21dc380f849b6d0b7b70f0d9c0c2a3b008.jpg"/>____
JPW3	Power selection for JDIO1 power pin.One 2x3 2.0mm pin headerNC (default)/+5V/+12V	NC (Default)1 2<img src="images/2cf634784f9be4883ae408c8193f10660797eb789e77ae138414052824d73e88.jpg"/>____+5V1 <img src="images/9baa9e8261a3d5a5e7cc2d16c279a189c770accc2dfc4233eb9db8ca06b086c6.jpg"/>____+12V1 <img src="images/c025a90c71804f21db116ff69b193b353bf19c9be2d2871e3a9bbbe37e260cb3.jpg"/>____
JSMB2	One 1x4 2.0mm pin header.Pin 1: Power with JPW1Pin 2: SMB_DAT_MAINPin 3: SMB_CLK_MAINPin 4: GND	1<img src="images/d53a187ed3a9c3d0db153c2f4b9d3121371de2392a71cbc19a4cdd348c9f9262.jpg"/>
JI2C1	One 1x4 2.0mm pin header.Pin 1: Power with JPW2Pin 2: I2C_DATAPin 3: I2C_CLKPin 4: GND	1<img src="images/45bb95d5f08127cd60c9d02ba7f9fea7dcf678f5d88ba479be60abd505db4f7f.jpg"/>

Jumper Block
JSMB1	One 1x3 2.54mm pin header for CPU PWM firmware burn-in. Use debug only.Pin 1: VR_+VCORE_SCLPin 2: GNDPin 3: VR_+VCORE_SDAL
SW1	PCIEX4 Slot & M.2 Config. SW1.
		SW1 (1)	SW1 (2)
	SW1	M.2 (default)(SWITCH ON)	PCIEX4(SWITCH OFF)

# 5 Driver Installation Download the requisite drivers for your system from the IMB-M47H product page at: https://www.adlinktech.com/Products/Industrial\_Motherboards\_SBCs/ATXMotherboards/IMB-M47H This page intentionally left blank. # 6 System Resources # 6.1 System Memory Map Table 5: System Memory Map

Address Range	Address Range	Size	Description
(4GB-2MB)	FFE00000 – FFFFFFFF	2 MB	High BIOS Area
(4GB-18MB) – (4GB-17MB-1)	FEE00000 – FEEFFFFFF	1 MB	MSI Interrupts
(4GB-20MB) – (4GB-19MB-1)	FEC00000 – FECFFFFFF	1 MB	APIC Configuration Space
15MB – 16MB	F00000 – FFFFFFF	1 MB	ISA Hole
1MB -15MB	100000 - EFFFFFF	14MB	Main Memory
0K –1MB	00000 – FFFFFFF	1MB	DOS Compatibility Memory

# 6.2 I/O Map Table 6: IO Map

Hex Range	Device
0000-0CF7	PCI Express Root Complex
0D00-FFFF	PCI Express Root Complex
0020-0021	Programmable interrupt controller
0024-0025	Programmable interrupt controller
0028-0029	Programmable interrupt controller
002C-002D	Programmable interrupt controller
0030-0031	Programmable interrupt controller
0034-0035	Programmable interrupt controller
0038-0039	Programmable interrupt controller
003C-003D	Programmable interrupt controller
00A0-00A1	Programmable interrupt controller
00A4-00A5	Programmable interrupt controller
00A8-00A9	Programmable interrupt controller
00AC-00AD	Programmable interrupt controller
00B0-00B1	Programmable interrupt controller
00B4-00B5	Programmable interrupt controller
00B8-00B9	Programmable interrupt controller
00BC-00BD	Programmable interrupt controller
04D0-04D1	Programmable interrupt controller
04D0-04D1	Programmable interrupt controller
002E-002F	Motherboard resources
004E-004F	Motherboard resources
0061-0061	Motherboard resources
0063-0063	Motherboard resources
0065-0065	Motherboard resources
0067-0067	Motherboard resources
0070-0070	Motherboard resources
0080-0080	Motherboard resources
0092-0092	Motherboard resources
00B2-00B3	Motherboard resources
0680-069F	Motherboard resources
FFFF-FFFF	Motherboard resources
1800-18FE	Motherboard resources
164E-164F	Motherboard resources
0040-0043	System timer
0050-0053	System timer
0070-0077	System CMOS/real time clock
00F0-00F0	Numeric data processor
02E0-02E7	COM5
02E8-02EF	COM4
02F8-02FF	COM2
0378-037F	Printer Port
03E0-03E7	COM6
03E8-03EF	COM3
03F8-03FF	COM1
E000-EFFF	Chipset PCI Express Root Port
E000-EFFF	PCI-to-PCI Bridge
F000-F03F	Intel HD Graphic 630
F040-F05F	SMBUS
F090-F097	Standard SATA AHCI Controller
F080-F083	Standard SATA AHCI Controller
F060-F07F	Standard SATA AHCI Controller

# 6.3 Interrupt Request (IRQ) Lines # 6.3.1 IRQ Lines PIC Mode Table 7: IRQ Lines PIC Mode

IRQ#	Device
0	System timer
3	COM2
4	COM1
5	COM3, COM4
8	System CMOS/real time clock
10	COM5, COM6
13	Numeric data processor
14	Intel Serial IO GPIO Host Controller
15	Intel Chipset Smbus
16	HD Audio Controller

Note: These IRQs can be used for PCI devices when onboard device is disabled. # 6.3.2 IRQ Lines APIC Mode Table 8 IRQ Lines APIC Mode

IRQ#	Typical Interrupt Resource	Connected to Pin	Available
0	System Counter	N/A	No
1	N/A	N/A
2	N/A	N/A
3	Serial Port 2 (COM2)	IRQ3 via SERIRQ / PIRQ	Note (1)
4	Serial Port 1 (COM1)	IRQ4 via SERIRQ / PIRQ	Note (1)
5	Serial Port3 (COM3)	IRQ5 via SERIRQ / PIRQ	Note (1)
5	Serial Port4 (COM4)	IRQ5 via SERIRQ / PIRQ	Note (1)
7	N/A	N/A
8	Real-time clock	N/A	No
9	N/A	N/A
10	Serial Port5 (COM5)	IRQ10 via SERIRQ / PIRQ	Note (1)
10	Serial Port6 (COM6)	IRQ10 via SERIRQ / PIRQ	Note (1)
12	N/A	N/A
13	Math Processor	N/A	Note (1)
14	Intel IO GPIO Host Controller	N/A	Note (1)
16	High Definition Audio Controller	N/A
54-511	Microsoft ACPI-Compliant System	N/A	Note (1)

Note: These IRQs can be used for PCI devices when onboard device is disabled. # 6.4 PCI Features # 6.4.1 PCI Configuration Space Map Table 9 PCI Configuration Space Map

Bus Number	Device Number	Function Number	Routing	Description
00h	00h	00h	N/A	Intel Host Bridge
00h	02h	00h	Internal	Intel VGA Controller
00h	14h	00h	Internal	Intel USB 3.0 XHCI
00h	14h	02h	Internal	Intel Data acquisition/signal process
00h	16h	00h	Internal	Intel Communication device
00h	17h	00h	Internal	Intel AHCI 1.0 controller
00h	1Dh	00h	Internal	Intel PCI-to-PCI bridge PCIe
00h	1Dh	03h	Internal	Intel PCI-to-PCI bridge PCIe
00h	1Fh	00h	Internal	Intel ISA bridge
00h	1Fh	03h	Internal	Intel HD Audio Device
00h	1Fh	04h	Internal	Intel SMBU
00h	1Fh	05h	Internal	Intel Controller
00h	1Fh	06h	Internal	Intel Ethernet Controller
01h	00h	00h	Internal	Intel Ethernet Controller PCIe
02h	00h	00h	Internal	ITE PCI to-PCI Bridge

Note: The bus number change if the PEG/PCIE port has a device. # 6.4.2 PCI Interrupt Routing Map Table 10 PCI Interrupt Routing Map

INT Line	LpcBridge	High Definition Audio	SMBus	PCIE Root Port #9 (LAN1)	PCIE Root Port #5 (PCIE x4)	PCIE Root Port #12 (ITE8892)
Int0	INTA:16	INTA:16	INTA:16	INTA:16	INTA:16	INTD:19
Int1	INTB:17			INTB:17	INTB:17	INTA:16
Int2	INTC:18			INTC:18	INTC:18	INTB:17
Int3	INTD:19			INTD:19	INTD:19	INTC:18

INT Line	PCI Slot 1	PCI Slot 2	PCI Slot 3	PCI Slot 4	PCI Slot 5	PCIE Root Port #11 (LAN2)
Int0	INTA:17	INTA:18	INTA:19	INTA:16	INTA:17	INTC:18
Int1	INTB:18	INTB:19	INTB:16	INTB:17	INTB:18	INTD:19
Int2	INTC:19	INTC:16	INTC:17	INTC:18	INTC:19	INTA:16
Int3	INTD:16	INTD:17	INTD:18	INTD:19	INTD:16	INTB:17

# 6.5 SMBus Slave Addresses Table 11 SMBus Slave Addresses

Device	Address
DIMM A	A0h
DIMM B	A4h

This page intentionally left blank. # 7 BIOS Setup # 7.1 Menu Structure This section presents the primary menus of the BIOS Setup Utility. Use the following table as a quick reference for the contents of the BIOS Setup Utility. The subsections describe the submenus and options foreach menu item. The default options are presented in bold, and the function of each setting is described in the right hand column of the table.

Main	Advanced	Chipset
- BIOS Information- System Date- System Time	- CPU Configuration ▶- Power & Performance ▶- PCH-FW Configuration ▶- Trusted Computing ▶- ACPI Settings ▶- NCT6126D Super IO Configuration ▶- Hardware Monitor ▶- S5 RTC Wake Settings ▶- Serial Port Console Redirection ▶- USB Configuration ▶- Network Stack Configuration ▶- NVME Configuration ▶	- System Agent (SA) Configuration ▶- PCH-IO Configuration ▶
Security	Boot	Save & Exit
- Administrator Password- User Password	- Boot Configuration ▶- Fixed Boot Oder Priorities ▶	- Save Options ▶- Default Options ▶- Boot Override ▶

# Notes: ► indicates a submenu Gray text indicates info only # 7.2 Main Menu The Main Menu provides read-only information about your system and also allows you to set the System Date andTime. Refer to the tables below the screen shot of this menu for details of the submenus and settings. 7.2.1 Main > BIOS Information

Feature	Options	Description
BIOS Vendor	American Megatrends
Core Version	x.xx x.xx x64
Compliancy	UEFI x.x; PI x.x
Project Version	IMB-M47H_xxxxx
Build Date and Time	mm/dd/yyyy hh:mm:ss
Access Level	Administrator
Memory Information
Total Memory	xxxxx MB
Memory Frequency	xxxx MT/s
Power Type	[ATX Mode]
System Date	mm/dd/yyyy	Sets the system date. Useto switch between elements.
System Time	hh:mm:ss	Sets the system time. Useto switch between elements.

# 7.3 Advanced Menu This menu contains the settings for most of the user interfaces in the system. 7.3.1 Advanced > CPU Configuration

Feature	Options	Description
Performance-core Information	Info Only	Displays the P-core Information
Frequency	Info Only	xxxx MHz
L1 Data Cache	Info Only	CPU L1 Data Cache
L1 Instruction Cache	Info Only	CPU L1 Instruction Cache
L2 Cache	Info Only	CPU L2 Cache
L3 Cache	Info Only	CPU L3 Cache
L4 Cache	Info Only	CPU L4 Cache
ID	Info Only	CPU ID
Brand String	Info Only	CPU Info
VMX	Info Only	CPU Virtual Machine Extension
SMX/TXT	Info Only	CPU Safer Mode Extension / Trusted Execution Technology
TXT Crash Code	Info Only
TXT SPAD	Info Only
Boot Guard Status	Info Only
Boot Guard ACM Policy Status	Info Only
Boot Guard SACM Information	Info Only
Intel (VMX) Virtualization Technology	Disabled Enabled	When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.
Active Performance-cores	All/1/2/3/4/5 depend on CPU sku	Number of P-cores to enable in each processor package. Note: Number of Cores and E-cores are looked at together. When both are {0,0}, Pcode will enable all cores.
Hyper-Threading	Disabled Enabled	Enables or Disables Hyper-Threading

7.3.2 Advanced > Power & Performance > CPU – Power Management Control

Feature	Options	Description
Intel SpeedStep	Disabled Enabled	Allows more than two frequency ranges to be supported.
Turbo Mode	Disabled Enabled	Enable/Disable processor Turbo Mode.
C states	Disabled Enabled	Enables/Disables CPU Power Management. Allows CPU to go to C States when it's not 100% utilized.
Enhanced C-state	Disabled Enabled	Enables or Disables C1E. When enabled, CPU will switch to minimum speed when all cores enter C- State.
Package C state limit	C0/C1C2C3Auto	Maximum Package C State Limit Setting. CPU Default: Leaves to Factory default value. Auto: Initializes to deepest available Package C State Limit.

7.3.3 Advanced > PCH-FW Configuration

Feature	Options	Description
ME Firmware Version	Info Only	PCH Firmware Version
ME Firmware Mode	Info Only	PCH Firmware Mode
ME Firmware SKU	Info Only	PCH Firmware SKU
ME Firmware Status 1	Info Only	PCH Firmware Status
ME Firmware Status 2	Info Only	PCH Firmware Status
ME Firmware Status 3	Info Only	PCH Firmware Status
ME Firmware Status 4	Info Only	PCH Firmware Status
ME Firmware Status 5	Info Only	PCH Firmware Status
ME Firmware Status 6	Info Only	PCH Firmware Status
ME State	Disabled Enabled	When Disabled ME will be put into ME Temporarily Disabled Mode.
ME UnLock Control	Lock Unlock	ME Unlock control function.Set UnLock will system shutdown for active function.

7.3.4 Advanced > Trusted Computing

Feature	Options	Description
Security Device Support	Disable Enable	Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available.
SHA256 PCR Bank	Disabled Enabled	Enable or Disable SHA256 PCR Bank
Pending operation	None TPM Clear	Schedule an Operation for the Security Device.

7.3.5 Advanced > ACPI Settings

Feature	Options	Description
Enable Hibernation	DisabledEnabled	Enables or Disables System ability to Hibernate. (OS/S4 Sleep State)
ACPI Sleep State	Suspend DisabledS3 (Suspend to RAM)	Select the highest ACPI sleep state the system will enter when the SUSPEND button is pressed.
S3 Video Repost	DisabledEnabled	Enables or Disables S3 Video Repost
PCIE# Wake from S5	DisabledEnabled	Enables or Disables PCIE to wake the system from S5.
Wake on Ring	DisabledEnabled	Enables or Disables wake on ring function under ACPI S3/S4/S5.

7.3.6 Advanced > NCT6126D Super IO Configuration

Feature	Options	Description
Serial Port 1 Configuration▶	Submenu	Sets Parameters of Serial Port 1
Serial Port 2 Configuration▶	Submenu	Sets Parameters of Serial Port 2
Serial Port 3 Configuration▶	Submenu	Sets Parameters of Serial Port 3
Serial Port 4 Configuration▶	Submenu	Sets Parameters of Serial Port 4
Serial Port 5 Configuration▶	Submenu	Sets Parameters of Serial Port 5
Serial Port 6 Configuration▶	Submenu	Sets Parameters of Serial Port 6
Parallel Port Configuration▶	Submenu	Sets Parameters of Parallel Port (LPT/LPTE)
WatchDog Count Mode	SecondMinute	WatchDog Count Mode Selection
WatchDog TimeOut Value	0	WatchDog Timeout Value, 0 = disabled.
Chassis Opened Warning	DisabledEnabled	Enables or Disables chassis intrusion detection. Note: If chassis tamper occurs, you can only enter setup to clear this error.
ErP/EuP S5 Support	DisabledEnabled	Enables or Disables ErP/EuP S5 support

7.3.7 Advanced > NCT6126D Super IO Configuration > Serial Port 1 Configuration

Feature	Options	Description
Serial Port	DisabledEnabled	Enable or Disable Serial Port (COM)
Device Settings	IO=3F8hIRQ=4	Serial Port device settings
Change Settings	Auto	Selects optimal setting for Super IO Device
RS485 Auto Flow	DisabledEnabled	Enables or Disables RS485 Auto Flow Control Function (Make sure to set RS485 on the COM1 jumper header if this setting is enabled.)

7.3.8 Advanced > NCT6126D Super IO Configuration > Serial Port 2 Configuration

Feature	Options	Description
Serial Port	DisabledEnabled	Enables or Disables Serial Port (COM)
Device Settings	IO=2F8hIRQ=3	Serial Port device settings
Change Settings	Auto	Selects optimal settings for Super IO Device
RS485 Auto Flow	DisabledEnabled	Enables or Disables RS485 Auto Flow Control Function (Make sure to set RS485 on the COM2 jumper header if this setting is enabled.)

7.3.9 Advanced > NCT6126D Super IO Configuration > Serial Port 3 Configuration

Feature	Options	Description
Serial Port	DisabledEnabled	Enables or Disables Serial Port (COM)
Device Settings	IO=3E8hIRQ=5	Serial Port device settings
Change Settings	Auto	Selects optimal settings for Super IO Device

7.3.10 Advanced > NCT6126D Super IO Configuration > Serial Port 4 Configuration

Feature	Options	Description
Serial Port	DisabledEnabled	Enables or Disables Serial Port (COM)
Device Settings	IO=2E8h; IRQ=10	Serial Port device settings
Change Settings	Auto	Selects optimal settings for Super IO Device

7.3.11 Advanced > NCT6126D SUPER IO Configuration > Serial Port 5 Configuration

Feature	Options	Description
Serial Port	DisabledEnabled	Enables or Disables Serial Port (COM)
Device Settings	IO=220h; IRQ=6	Serial Port device settings
Change Settings	Auto	Selects optimal settings for Super IO Device

7.3.12 Advanced > NCT6126D SUPER IO Configuration > Serial Port 6 Configuration

Feature	Options	Description
Serial Port	DisabledEnabled	Enables or Disables Serial Port(COM)
Device Settings	IO=228h; IRQ=15	Serial Port device settings
Change Settings	Auto	Selects optimal settings for Super IO Device

7.3.13 Advanced > NCT6126D SUPER IO Configuration > Parallel Port Configuration

Feature	Options	Description
Parallel Port	DisabledEnabled	Enables or Disables Parallel Port (LPT/LPTE)
Device Settings	IO=378h; IRQ=7	Parallel Port device settings
Change Settings	Auto	Selects optimal settings for Super IO Device
Device Mode	STD Printer ModeSPP ModeEPP-1.9 and SPP ModeEPP-1.7 and SPP ModeECP modeECP and EPP 1.9 ModeECP and EPP 1.7 Mode	Changes the Printer Port mode.

7.3.14 Advanced > NCT6126D SUPER IO Configuration

Feature	Options	Description
WatchDog Count Mode	Second Minute	WatchDog Count Mode Selection
WatchDog TimeOut Value	0	Fill WatchDof TimeOut value, 0 mean disabled
Chassis Opened Warning	Disabled Enabled	Select whether to enable Chassis Intrusion Detection.
ErP/EuP S5 Support	Disabled Enabled	Enable/Disable ErP/EuP S 5 Support.

7.3.15 Advanced > Hardware Monitor

Feature	Options	Description
Smart Fan Function	DisabledEnabled	Enables or Disables Smart Fan Function
Smart Fan Mode Configuration▶	Submenu	Smart Fan Mode Configuration

7.3.16 Advanced > Hardware Monitor > Smart Fan > Smart Fan Mode Configuration – SMART FAN IV Mode

Feature	Options	Description
xxxFAN Temperature 1	30	Input the Smart Fan IV Temperature 1
xxxFAN PWM 1	1	Input the Smart FAN IV PWM 1 Value
xxxFAN Temperature 2	40	Input the Smart Fan IV Temperature 2
xxxFAN PWM 2	84	Input the Smart FAN IV PWM 2 Value
xxxFAN Temperature 3	50	Input the Smart Fan IV Temperature 3
xxxFAN PWM 3	168	Input the Smart FAN IV PWM 3 Value
xxxFAN Temperature 4	60	Input the Smart Fan IV Temperature 3
xxxFAN PWM 4	255	Input the Smart FAN IV PWM 3 Value
xxxFAN Tolerance of Target Temp	5	FAN Tolerance of Target Temperature
xxxFAN Critical Temperature	90	Input the Smart IV Critical Temperature
xxxFAN Critical Temp Tolerance	1	Input Tolerance of Critical Temperature (Range: 0~7)

7.3.17 Advanced > Hardware Monitor > Smart Fan > Smart Fan Mode Configuration – Manual Mode

Feature	Options	Description
SYS Smart Fan1 Mode	Manual ModeThermal Cruise ModeSmart FAN IV Mode	SYS Smart Fan1 Mode
SYS expect PWM Output/DC Voltage	255	System FAN1 expect PWM Output/DC Voltage
CPU Smart Fan Mode	Manual ModeThermal Cruise ModeSmart FAN IV Mode	CPU Smart Fan Mode
CPU expect PWM Output/DC Voltage	255	CPU FAN expect PWM Output/DC Voltage
SYS Smart Fan2 Mode	Manual ModeThermal Cruise ModeSmart FAN IV Mode	SYS Smart Fan2 Mode
SYS expect PWM Output/DC Voltage	255	CHA FAN2 expect PWM Output/DC Voltage

7.3.18 Advanced > S5 RTC Wake Settings

Feature	Options	Description
Wake System From S5	Disabled Enabled	Enables or Disables System wake on alarm event.

7.3.19 Advanced > Serial Port Console Redirection

Feature	Options	Description
COM1
Console Redirection	Disabled Enabled	Enables or Disables Console Redirection
Console Redirection Settings	Submenu	Show when Console Redirection is enabled

7.3.20 Advanced > Serial Port Console Redirection > Console Redirection Settings

Feature	Options	Description
Terminal Type	VY100VT100+VT-UTF8ANSI	Type Select
Bits per second	9600192003840057600115200	Select serial port transmission speed.
Data Bits	78	Data Bits
Parity	NoneEvenOddMarkSpace	A parity bit can be sent with the data bits to detect some transmission error.
Stop Bits	12	Stop bits indicate the end of a serial data packet.
Flow Control	NoneHardware RTS/CTS	Flow control can prevent data loss from buffer overflow.
VT-UTF8 Combo Key Support	DisabledEnabled	Enables or Disables VT-UTF8 Combo Key
Recorder Mode	DisabledEnabled	With this mode enabled, only a test will be sent.
Resolution 100x31	DisabledEnabled	Enables or Disables extended terminal resolution.
Putty KeyPad	VT100LINUXXTERMR6SCOESCNVT400	Selects FunctionKey and KeyPad on Putty.

7.3.21 Advanced > USB Configuration

Feature	Options	Description
USB Devices	Show current USB devices
USB Mass Storage Driver Support	EnabledDisabled	Enable/Disable USB Mass Storage Driver Support

7.3.22 Advanced > Network Stack Configuration

Feature	Options	Note
Network Stack	DisabledEnabled	Enables or Disables UEFI Network Stack.

7.3.23 Advanced > NVMe Configuration

Feature	Options	Description
NVMe controller and Drive information	Info Only	NVMe Device Options Settings
Show device	Info Only

# 7.4 Chipset Menu This menu contains settings for other user interfaces in the system. 7.4.1 Chipset > System Agent (SA) Configuration

Feature	Options	Description
VT-d Capability	Info Only
Memory Configuration	Submenu	Memory Configuration Parameters
Graphics Configuration	Submenu	Graphics Configuration
PCI Express Configuration	Submenu	PCI Express Options
VT-d	DisabledEnabled	VT-d capability

7.4.2 Chipset > System Agent (SA) Configuration > Memory Configuration

Feature	Options	Description
Memory RC Version	Info Only
Memory Frequency	Info Only
tCL-tRCD-tRP-tRAS	Info Only	Memory Timings
Total Memory	Info Only
DIMM_A1	Info Only
DIMM_B1	Info Only
Max TOULUD	Dynamic / 1 GB / 1.25 GB / 1.5 GB / 1.75 GB / 2 GB / 2.25 GB / 2.5 GB / 2.75 GB / 3 GB / 3.25 GB / 3.5 GB	Maximum value of TOULUD

7.4.3 Chipset > System Agent (SA) Configuration > Graphics Configuration

Feature	Options	Description
Primary Display	AutoIGFXPEG SlotPCIE	Selects which of IGFX/PEG/PCIE Graphics device should be Primary Display
Internal Graphics	AutoDisabledEnabled	Keeps IGFX enabled based on the setup options.
PSMI Support	DisabledEnabled	PSMI Enable/Disable.
DVMT Pre-Allocated	0M32M64M96M128M160M4M8M12M16M20M24M28M32M/F736M40M44M48M52M56M60M	Selects DVMT 5.0 Pre-Allocated (Fixed) Graphics Memory size used by the Internal Graphics Device.

7.4.4 Chipset > System Agent (SA) Configuration > PCI Express Configuration

Feature	Options	Description
PCI Express Root Port 2(x16 Slot)	Submenu	PCI Express Root Port Setting
PCI Express Root port 2	DisabledEnabled	Control the PCI Express Root Port
ASPM	DisabledL0SL1L0sL1	Set the ASPM Level:Force L0s – Force all links to L0s State
PCIe Speed	AutoGen1Gen2Gen3Gen4Gen5	Configure PCIe Speed
Detect Non-Compliance Device	DisabledEnabled	Detects Non-Compliance PCI Express Device in PEG

7.4.5 Chipset > PCH-IO Configuration

Feature	Options	Description
PCI Express Configuration	Submenu	PCI Express Configuration settings
SATA Configuration	Submenu	SATA Device Options Setting
USB Configuration	Submenu	USB Configuration settings
HD Audio Configuration	Submenu	HD Audio Subsystem Configuration Settings
Serial IO Configuration	Submenu	Serial IO Configuration Settings
LAN1 Controller	DisabledEnabled	Enables or Disables onboard NIC.
LAN1 PXE OpROM	DisabledEnabled	Shows if Network to Legacy
Wake on Lan Enable	DisabledEnabled	Enables or Disables integrated LAN to wake the system.
LAN2 Controller	DisabledEnabled	Enables or Disables onboard Lan2
LAN2 PXE OpROM	DisabledEnabled	Shows if Network to Legacy
Restore AC Power Loss	Power onPower OffLast State	Specifies what state to go to when power is re-applied after a power failure (G3 state).
Flash Protection Range Registers (FPRR)	DisabledEnabled	Enable Flash Protection Range Registers
GPIO Group Control	DisabledEnabled	Configures the digital GPIO pins

7.4.6 Chipset > PCH-IO Configuration > PCI Express Configuration

Feature	Options	Description
PCI Express Configuration	Info only
PCI Express Root Port 2(LAN2)	Info only
PCI Express Root Port 3(ITE8892E)	Submenu	PCI Express Root Port Settings.
PCI Express Root Port 4(x1 Slot)	Submenu	PCI Express Root Port Settings.
PCI Express Root Port 5(x4 Slot) (Key M)	Submenu	PCI Express Root Port Settings.
PCI Express Root Port 15(LAN1)	Info only

7.4.7 Chipset > PCH-IO Configuration > PCI Express Configuration > PCI Express Root Port 3

Feature	Options	Description
PCI Express Root Port 3	DisabledEnabled	Control the PCI Express Root Port.
ASPM 3	AutoL1Disabled	Sets the ASPM Level:Force L1 – Force all link to L1 StateAUTO – BIOS auto configureDISABLE – Disables ASPM
PCIe Speed	AutoGen1Gen2Gen3Gen4	Configures PCIe Speed
Detect Non-Compliance Device	DisabledEnabled	Detects Non-Compliance PCI Express Device. If enabled, it will take more time at POST time.

7.4.8 Chipset > PCH-IO Configuration > PCI Express Configuration > PCI Express Root Port 4

Feature	Options	Description
PCI Express Root Port 4	DisabledEnabled	Control the PCI Express Root Port.
ASPM 4	AutoL1Disabled	Sets the ASPM Level:Force L1 – Force all link to L1 StateAUTO – BIOS auto configureDISABLE – Disables ASPM
PCIe Speed	AutoGen1Gen2Gen3Gen4	Configures PCIe Speed
Detect Non-Compliance Device	DisabledEnabled	Detects Non-Compliance PCI Express Device. If enabled, it will take more time at POST time.

7.4.9 Chipset > PCH-IO Configuration > PCI Express Configuration > PCI Express Root Port 5

Feature	Options	Description
PCI Express Root Port 5	DisabledEnabled	Control the PCI Express Root Port.
ASPM 5	AutoL1Disabled	Sets the ASPM Level:Force L1 – Force all link to L1 StateAUTO – BIOS auto configureDISABLE – Disables ASPM
PCIe Speed	AutoGen1Gen2Gen3Gen4	Configures PCIe Speed
Detect Non-Compliance Device	DisabledEnabled	Detects Non-Compliance PCI Express Device. If enabled, it will take more time at POST time.

7.4.10 Chipset > PCH-IO Configuration > SATA Configuration

SATA Configuration	Options	Note
SATA Controller(s)	DisabledEnabled	Enable/Disable SATA Device
SATA Mode Selection	AHCI	Determines how SATA controllers operate.
Serial ATA Port 1	Show device
Software Preserve
Port 1	DisabledEnabled	Enables or Disables SATA Port
Serial ATA Port 2	Show device
Software Preserve
Port 2	DisabledEnabled	Enables or Disables SATA Port
Serial ATA Port 3	Show device
Software Preserve
Port 3	DisabledEnabled	Enables or Disables SATA Port
Serial ATA Port 4(M.2 KeyM)	Show device
Software Preserve
Port 4(M2 Port)	DisabledEnabled	Enables or Disables SATA Port

7.4.11 Chipset > PCH-IO Configuration > USB Configuration

Feature	Options	Description
USB12 Standby Power Support	DisabledEnabled	Enable/Disable USB standby power
USB34 Standby Power Support	DisabledEnabled	Enable/Disable USB standby power
USB56 Standby Power Support	DisabledEnabled	Enable/Disable USB standby power
USB78 Standby Power Support	DisabledEnabled	Enable/Disable USB standby power
USB910 Standby Power Support	DisabledEnabled	Enable/Disable USB standby power

7.4.12 Chipset > PCH-IO Configuration > HD Audio Configuration

Feature	Options	Description
HD Audio	DisabledEnabled	Control Detection of the HD-Audio device.

7.4.13 Chipset > PCH-IO Configuration > Serial IO Configuration

Feature	Options	Description
I2C0 Controller	DisabledEnabled	Enables/Disables Serial IO Controller
I2C3 Controller	DisabledEnabled	Enables/Disables Serial IO Controller
Serial IO I2C0 Settings	Info only
Serial IO I2C3 Settings	Info only

# 7.5 Security Menu

Feature	Options	Description
Administrator Password	Enter password	Set Administrator Password
User Password	Enter password	Set User Password

# 7.6 Boot Menu

Feature	Options	Description
Boot Configuration	Info Only
Setup Prompt Timeout	1 (seconds)	Number of seconds to wait for setup activation key. 65535(0xFFFF) means infinite waiting.
Bootup NumLock State	On Off	Select the keyboard NumLock state.
Quiet Boot	Disabled Enabled	Enables or Disables Quiet Boot option
Boot mode select	UEFI	Selects Legacy or UEFI boot mode
FIXED BOOT ORDER Priorities	Info Only
Boot Option #1	USB Key	Sets the system boot order.
Boot Option #2	CD/DVD	Sets the system boot order.
Boot Option #3	USB CD/DVD	Sets the system boot order.
Boot Option #4	USB Floppy	Sets the system boot order.
Boot Option #5	NVME	Sets the system boot order.
Boot Option #6	Hard Disk	Sets the system boot order.
Boot Option #7	Network	Sets the system boot order.

7.7 Save & Exit Menu

Save & Exit	Options	Note
Save Changes and Exit	YesNo	Exits system setup after saving the changes.
Discard Changes and Exit	YesNo	Exits system setup without saving any changes.
Save Changes and Reset	YesNo	Resets the system after saving the changes.
Default Options
Restore Defaults	YesNo	Restores or Loads Default values for all Setup options.
Boot Override
Launch EFI Shell from filesystem device	YesNo	Attempts to Launch EFI Shell application (Shell.efi) from one of the available filesystem devices

# Safety Instructions Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use. Please read these safety instructions carefully. • Please keep this User‘s Manual for later reference. • Read the specifications section of this manual for detailed information on the operating environment of this equipment. • When installing/mounting or uninstalling/removing equipment, turn off the power and unplug any power cords/cables. • To avoid electrical shock and/or damage to equipment: Keep equipment away from water or liquid sources. Keep equipment away from high heat or high humidity.  Keep equipment properly ventilated (do not block or cover ventilation openings).  Make sure to use recommended voltage and power source settings.  Always install and operate equipment near an easily accessible electrical socket-outlet. Secure the power cord (do not place any object on/over the power cord).  Only install/attach and operate equipment on stable surfaces and/or recommended mountings.  If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source. • Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel. # Getting Service Ask an Expert: http://askanexpert.adlinktech.com # ADLINK Technology, Inc. Address: No.66, Huaya 1st Rd., Guishan Dist, Taoyuan City 333411, Taiwan Tel: +886-3-216-5088 Fax: +886-3-328-5722 Email: service@adlinktech.com # Ampro ADLINK Technology, Inc. Address: 6450 Via Del Oro, San Jose, CA 95119-1208, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-600-1189 Email: info@adlinktech.com # ADLINK Technology (China) Co., Ltd. Address: 300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area, Shanghai, 201203 China Tel: +86-21-5132-8988 Fax: +86-21-5132-3588 Email: market@adlinktech.com # ADLINK Technology GmbH Address: Hans-Thoma-Straße 11, D-68163, Mannheim, Germany Tel: +49-621-43214-0 Fax: +49-621 43214-30 Email: emea@adlinktech.com Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you. [🔗 Link to the original document](.imb-m47h-50m-00106-1000-10/imb-m47h-50m-00106-1000-10.pdf)