# OSM-IMX95 User’s Guide ![The image displays a logo featuring the letters 'NXP' in a stylized, overlapping arrangement. The letter 'N' is orange, the letter 'X' is blue, and the letter 'P' is green. The blue 'X' is centrally positioned and overlaps both the orange 'N' on the left and the green 'P' on the right. The entire graphic is enclosed within a thin black rectangular border.](.osm-imx95-50m-76105-1010-11/cbb089062b47f3be2eeefb0be3e32a1eac0e5c4cd347be77cf7dc4311c1da435.jpg) ![5EB77\nD8CKR\nFXHV\n164671\nOS\n3525.0\nM8 981\n51-76105-0A10\nNXP\nPPF0900\nAMDA0ES\nCTAAYVB\nNAIC\nJ-18ASA00341D001\nNXP\nPIMX9596\nXVTXNAC\nOP21N\nSBC02519A\nKOREA\n1530\n1574\n583\nPHISON\nPTE401E-3261\n00U24NVPX\n250819070\nNOSI\nPF53XAV\nCFA4025\nVTRYBJ\nR10\nR10](.osm-imx95-50m-76105-1010-11/f7c16b776c93396e76ebfe5455b86a726869b68a3e8026ebe01d9809deccc8e5.jpg) Revision History
RevisionDescriptionDateAuthor
1.0Initial release2026-01-05AL
1.1Module feature list and specifications updated2026-02-12AL
# Preface # Disclaimer Information in this document is provided in connection with ADLINK products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in ADLINK´s Terms and Conditions of Sale for such products, ADLINK assumes no liability whatsoever, and ADLINK disclaims any express or implied warranty, relating to sale and/or use of ADLINK products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. If you intend to use ADLINK products in or as medical devices, you are solely responsible for all required regulatory compliance, including, without limitation, Title 21 of the CFR (US), Directive 2007/47/EC (EU), and ISO 13485 & 14971, if any. ADLINK may make changes to specifications and product descriptions at any time, without notice. # Environmental Responsibility ADLINK is committed to fulfil its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company. ![The image shows a standard warning sign: a yellow equilateral triangle with a thick black border containing a black exclamation mark in the center, set against a white background.](.osm-imx95-50m-76105-1010-11/b771b7a0f38d76a7d1c9ce58630c43344008b93ebe41001a4db6371abcb001b4.jpg) California Proposition 65 Warning: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3- dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov. ![The image displays a black icon on a white background. It features a wheeled waste bin with a lid, which is crossed out by a large 'X'. Below the bin is a solid black rectangular bar.](.osm-imx95-50m-76105-1010-11/1f9b1f10fdde76747be5251369a53fd92424ae7640a819b55d0ac2bd24623ba8.jpg) # Trademarks Product names mentioned herein are used for identification purposes only and may be trademarks / registered trademarks of respective companies. # Copyright © 2026 ADLINK Technology Incorporated This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. # Safety Instructions For user safety, please read and follow all Instructions, WARNINGs, CAUTIONs, and NOTEs marked in this manual and on the associated equipment before handling/operating the equipment. Read these safety instructions carefully. Keep this manual for future reference. • Read the specifications section of this manual for detailed information on the operating environment of this equipment. • Turn off power and unplug any power cords/cables when installing/mounting or un-installing/removing equipment. • To avoid electrical shock and/or damage to equipment: • Keep equipment away from water or liquid sources; • Keep equipment away from high heat or high humidity; • Keep equipment properly ventilated (do not block or cover ventilation openings); • Make sure to use recommended voltage and power source settings; • Always install and operate equipment near an easily accessible electrical socket outlet; • Secure the power cord (do not place any object on/over the power cord); • Only install/attach and operate equipment on stable surfaces and/or recommended mountings; • If the equipment will not be used for long periods of time, turn off the power source and unplug the equipment. # Conventions The following conventions may be used throughout this manual, denoting special levels of information. ![The image displays a red outline icon of a document or note with a folded bottom-right corner. Inside the outline, there are two horizontal red lines stacked vertically. The background is white.](.osm-imx95-50m-76105-1010-11/b4fed0c12ab63dd557122435f4bb41533a79a30fe475da0117c213b24c126705.jpg) Note: This information adds clarity or specifics to text and illustrations. ![The image displays a yellow triangular warning sign with a black exclamation point in the center, set against a white background.](.osm-imx95-50m-76105-1010-11/075719db0e90d4d2b82331abf9a5c2c22a4d0281fc611c0ed45f73bda2e35729.jpg) Caution: This information indicates the possibility of minor physical injury, component damage, data loss, and/or program corruption. ![The image displays a standard warning symbol consisting of a red triangle with rounded corners set against a white background. Inside the red triangle is a large, white exclamation mark centered vertically and horizontally.](.osm-imx95-50m-76105-1010-11/520b25ea949458b9d4ff76c650111a77113b510b77823b744968b7d21a4a81f4.jpg) Warning: This information warns of possible serious physical injury, component damage, data loss, and/or program corruption. # Getting Services Ask an Expert: https://www.adlinktech.com/en/Askanexpert # ADLINK Technology, Inc. No. 66, Huaya 1st Rd., Guishan District, Taoyuan City 333411, Taiwan Tel: +886-3-216-5088 Fax: +886-3-328-5706 Email: service@adlinktech.com # Ampro ADLINK Technology, Inc. 6450 Via Del Oro, San Jose, CA 95119-1208, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-600-1189 Email: info@adlinktech.com # ADLINK Technology (China) Co., Ltd. 300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area, Shanghai, 201203, China Tel: +86-21-5132-8988 Fax: +86-21-5132-3588 Email: market@adlinktech.com # ADLINK Technology GmbH Hans-Thoma-Strasse 8-10, 68163 Mannheim, Germany Tel: +49-621-43214-0 Fax: +49-621 43214-30 Email: emea@adlinktech.com Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you. # Table of Contents Revision History .. Preface .. List of Figures .. . 9 1. Introduction .. . 10 1.1. The OSM Form Factor.... .. 10 1.2. Module Feature List.. . 11 2. Specifications .. . 12 2.1. Core System ... .. 12 2.2. Video.... .... 13 2.2.1 GPU... ... 13 2.2.2 Display Interface Support.. ... 13 2.3. Camera.. ... 13 2.4. Audio ... .. 14 2.5. Dual Wired Ethernet .... .. 14 2.6. Expansion Buses... .. 14 2.7. System Storage .. ... 15 2.8. Power... ... 15 2.9. Mechanical and Environmental . .. 16 3. Block Diagram .. . 18 4. Pinout and Signal Descriptions .... . 19 4.1. Pin Summary .. .. 19 4.2. Signal Terminology Descriptions... .. 21 4.3. Signal Description by Function.. . 22 4.3.1 LVDS Display Interface.. ... 22 4.4. Secondary Display Interface... ... 23 4.4.1 HDMI Mode... . 23 4.4.2 DP++ Mode .. . 23 4.4.3 MIPI Camera Support... . 24 4.4.4 Audio Interfaces.. . 25 4.4.5 USB Ports.. . 25 4.4.6 PCIe... . 27 4.4.7 LAN Port... . 27 4.4.8 SDIO Card (4-Bit)... . 29 4.4.9 SPI Interfaces .. . 30 4.4.10 GPIO.. . 31 4.4.11 Power + Boot Select . . 32 5. Software Support ... . 35 5.1. Standard Support.. . 35 5.2. Yocto.. . 35 6. Mechanical .... .. 36 6.1. Module Dimensions ... ... 36 7. Thermal Solutions ... . 37 7.1. Heatspreader: HTS . . 37 7.2. Heatsink: THS .. . 37 # List of Figures Figure 1 – Module function diagram ... .. 18 Figure 2 – Module size grid .... .. 19 Figure 3 – Module pinout grid ............. .. 20 Figure 4 – Placement and cut-out area – Size (L) ... .. 36 # 1. Introduction # 1.1. The OSM Form Factor The OSM (“Open Standard Module”)™ specification enables the development, production, and distribution of embedded modules for the most popular MCU32, ARM, and x86 architectures. For a growing number of IoT applications, this standard helps combine the advantages of modular embedded computing with increasing requirements regarding cost, space, and interfaces. The modules are used as building blocks for portable and stationary embedded systems. They integrate the core CPU and supporting circuits, including DRAM, boot flash, power-sequencing logic, and CPU power supplies. The modules are paired with application-specific carrier boards that implement additional features such as audio CODECs, touch controllers, wireless devices, PHYs, etc. This modular approach allows scalability, fast time-to-market, and upgradability while maintaining low cost, low power consumption, and a small physical footprint. ![A red icon depicting a document or memo symbol with a folded bottom-right corner and two horizontal lines inside.](.osm-imx95-50m-76105-1010-11/16ce095ddb8145cbe66987dcf42ac5090d92fad23f474a61c569957ac045a93f.jpg) Note: This module is compliant with the SGET OSM 1.2 specification. ![The image displays a logo featuring the text 'SGeT' on a white background. The uppercase letters 'S', 'G', and 'T' are large and colored in a bright yellow-green. The lowercase letter 'e' is magenta and is positioned centrally, overlapping the bottom right portion of the 'G' and sitting just to the left of the 'T'.](.osm-imx95-50m-76105-1010-11/e0f0845663369609e5ed895180d48e3ec6e7e2259640294334d56af91a34fa8d.jpg) STANDARDIZATION GROUPFOR EMBEDDED TECHNOLOGIES OSM module and carrier specifications are available online at: https://sget.org/standards/osm/ # 1.2. Module Feature List Memory: LPDDR4 2 to 8 GB eMMC: BGA 32 to 256 GB LAN: Dual Gbe with built-in MAC and Precision Time Protocol (PTP) Graphics: Mali-G310 rendering engine USB: 1x USB 2.0 OTG, 1x USB 3.0 (all from SoC) AUDIO: I2S to carrier CAN: dual CAN-FD PCIe: single lane Gen 3 Industrial interfaces: SPI/I2C/I2S/UART/GPIO SECURITY: NXP ARM TrustZone with safety island (Cortex M33) # 2. Specifications # 2.1. Core System # CPU 4 cores or 6 cores ARM Cortex-A55 eIQ Neutron NPU The ARM Cortex-A55 processors deliver high performance while being optimized for low power consumption. # Memory LPDDR4, solder-down, single-chip, up to 8 GB 32-bit DRAM interface # Cache Per core: >32 KB I-cache, 32 KB D-cache, 64 KB L2 cache Unified: >512 KB L3 cache # Security Arm® TrustZone Cryptography engine Tamper detection Secure clock Secure boot eFuse key storage Random number generator # 2.2. Video # 2.2.1 GPU # GPU Core Mali G310 # Graphics Feature Support 3D GPU supporting 50 GFLOPs OpenGL®ES 3.2 Vulkan ®1.2 OpenCL 3.0 # VPU Feature Support •4Kp30 H.265 and H.264 encode and decode •1× JPEG encoder •1× JPEG decoder # 2.2.2 Display Interface Support # MIPI DSI 1x MIPI DSI 4 lane compliant to MIPI-DSI standard v1.2 Maximum resolution 4Kp30 # LVDS Dual-channel LVDS, maximum resolution 1080p60 # 2.3. Camera One 4-lane MIPI CSI2 camera input # 2.4. Audio I 2 S to carrier # 2.5. Dual Wired Ethernet # Primary LAN MAC 10/100/1000 TSN Ethernet controller on SoC Supports 10/100/1000 Mbps data transfer rates, both full-duplex and half-duplex # Secondary LAN MAC 10/100/1000 TSN Ethernet controller on SoC Supports 10/100/1000 Mbps data transfer rates, both full-duplex and half-duplex # 2.6. Expansion Buses # PCIe 1× single-lane, Rev 3.0 # USB 1× USB 2.0, 1× USB 3.0 (OTG on USB 2.0 interface) # UART 4 UART interfaces # CANbus CAN0, CAN1 Supports CAN 2.0B only, or mixed CAN 2.0B and CAN FD mode Data bit rate up to 8 Mbps # SPI 3× SPI interfaces # I2S 2× I2S interface with audio resolution from 16 to 32 bits and sample rate up to 192 kHz (see Audio Codec support) # I2C 2 I2C interfaces Supports 7-bit addressing mode Software-programmable clock frequency: 100 kbit/s in Standard-mode, 400 kbit/s in Fast-mode, or 1 Mbit/s in Fast-mode Plus # GPIO 14x GPIO with interrupt # 2.7. System Storage # SDIO 2x SDIO (4-bit) compatible with SD3.0 # eMMC 32 GB to 256 GB (build option) Compatible with eMMC specifications 4.41, 4.51, 5.0, and 5.1 # 2.8. Power Power Modes: ON / OFF / SUSPEND Power on / off behavior same as x86 ATX (hold off boot until PWRBTN) / AT (always boot) Voltage Input: 5.0V +/- 5% # Operating Temperatures (vs power input) Standard Operating Temperature: 0 to 60°C -commercial grade BOM (memory, eMMC, USB hub, SOC) Extreme Rugged Operating Temperature: -40 to 85°C-industrial grade BOM (memory, eMMC, USB hub, SOC) # 2.9. Mechanical and Environmental # Environmental Humidity 5-90% RH operating, non-condensing 5-95% RH storage (and operating with conformal coating) # EMI EN55022 Class B inside an enclosure # Shock and Vibration HALT Testing, including test report confirming the extended operating temperature range during and after vibration. A separate shock test report in accordance with MIL-STD-202F, Method 213B, Table 213-I, Condition A. IN ADDITION: When installed on a baseboard, the device shall operate under 18 sawtooth mechanical shocks (3 shocks in each direction) with a peak acceleration of 40g for a duration of 18 ms each, and 75g for a duration of 6 ms each. Capable of supporting random vibration: MIL-STD-202F, Method 214A, Table 214-I, Condition D. If HALT testing shows equal or better performance, a separate vibration test report is not necessary. # MTBF 300,000 hrs. (at 40 C), 100,000 hrs. (at 85°C) # 3. Block Diagram ![The diagram features a central reddish-brown block labeled **NXP IMX95**.\n\n**Top Connections:**\nA yellow label reads **build option**. Below it are two blue boxes connected to the central block:\n* **eMMC** (subtext: 32 ~ 256 GB)\n* **LPDDR4** (subtext: 2 ~ 8 GB)\n\n**Left Side Connections:**\n* **DSI 4L** connects to **DSI**\n* **LVDS 8L** connects to **LVDS**\n* **CSI_A 4L** connects to **CSI**\n* **PCIe_A** connects to **PCIe GEN3 x1**\n* **ETH_A** connects to **RGMii 0**\n* **ETH_B** connects to **RGMii 1**\n* **USB_A** connects to **USB_2**\n* **USB_C** connects to **USB_1**\n* **I2S A/B** connects to **SAI**\n* **SPI_A** connects to **QSPI**\n* **SPI_B** connects to **ECSPI_2**\n* **SPI_C** connects to **ECSPI_3**\n* **ADC** connects to **ADC**\n\n**Right Side Connections:**\n* **UART_2** connects to **Console**\n* **UART_1** connects to **UART_A 4w**\n* **UART_4** connects to **UART_B 4w**\n* **UART_3** connects to **UART_C 2w**\n* **I2C_1** connects to **I2C_A**\n* **I2C_2** connects to **I2C_B**\n* **CAN_1** connects to **CAN_A**\n* **CAN_2** connects to **CAN_B**\n* **SD_1** connects to **SDIO_A**\n* **SD_2** connects to **SDIO_B**\n* **PWM** connects to **PWM**\n* **GPIO** connects to **GPIO_A**\n\n**Bottom Connections:**\n* A yellow box labeled **JTAG Point** connects to the bottom of the central block.\n* A pink box labeled **MCU** connects to the bottom of the central block.\n* **MCU** connects to **GPIO_B**.](.osm-imx95-50m-76105-1010-11/036d45b32138a57c116733d5eb3f6e37d7a7f9aecd22ab9e0fec3590ca8bc53b.jpg) Figure 1 – Module function diagram # 4. Pinout and Signal Descriptions # 4.1. Pin Summary Size-0 -“Zero": 30 mm x 15 mm 1 Size-S- “Small: 30 mm x 30 mm Size-M-“Medium": 30 mm x 45 mm Size-L-“Large": 45 mm x 45 mm ![45 mm\n30 mm\n45 mm](.osm-imx95-50m-76105-1010-11/c79be2fb78a69bc4d10ecb1ff17981955718bdd573447e69ad13d08351b75329.jpg) Figure 2 – Module size grid ![| Position | Value |\n|---|---|\n| 1 | 2 |\n| 2 | 4 |\n| 3 | 6 |\n| 4 | 8 |\n| 5 | 10 |\n| 6 | 12 |\n| 7 | 14 |\n| 8 | 16 |\n| 9 | 18 |\n| 10 | 20 |\n| 11 | 22 |\n| 12 | 24 |\n| 13 | 26 |\n| 14 | 28 |\n| 15 | 30 |\n| 16 | 32 |\n| 17 | 34 |\n| 18 | 35 |\n| 19 | 34 |\n| 20 | 33 |\n| 21 | 32 |\n| 22 | 31 |\n| 23 | 30 |\n| 24 | 29 |\n| 25 | 28 |\n| 26 | 27 |\n| 27 | 26 |\n| 28 | 25 |\n| 29 | 24 |\n| 30 | 23 |\n| 31 | 22 |\n| 32 | 21 |\n| 33 | 20 |\n| 34 | 19 |\n| 35 | 18 |\n| A ————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————一一——————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————一\nA ————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————\nA ————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————\nB —————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————————★★—\nC —————————————————————————————————————————★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★★\nA —————————————————————————————————————————————————————————————————————————————————————————————————————————--------------\nB —————————————————————————————————--------------\nC —————————--------------\nD —————————--------------\nE —————————--------------\nF —————————--------------\nG —————————--------------\nH —————————--------------\nJ —————————--------------\nK —————————--------------\nL —————————--------------\nM —————————--------------\nN —————————--------------\nP —————————--------------\nR —————————--------------\nT —————————--------------\nU —————————--------------\nV —————————--------------\nW —————————--------------\nY —————————--------------\nAA —————————--------------\nAB —————————--------------\nAC —————————--------------\nAD —————————--------------\nAE —————————--------------\nAF —————————--------------\nAG —————————--------------\nAH —————————--------------\nAJ —————————--------------\nAK —————————--------------\nAL —————————--------------\nAM —————————--------------\nAN —————————--------------\nAP —————————--------------\nAR —————————--------------](.osm-imx95-50m-76105-1010-11/cde581f23d732981fcd369da35246d01824f84848c57129934291e9f9d44572d.jpg) Figure 3 – Module pinout grid # 4.2. Signal Terminology Descriptions The following information provides descriptions of the terms used in the signal description table:
TermDescription
IInput to the Module
OOutput from the Module
I/OBi-directional input/output
ODOpen drain
PUPU (pull-up) resistor
PDPD (pull-down) resistor
CMOSLogic input or output
GBE MDIDifferential analogue signaling for gigabit media dependent interface
DPLow voltage differential signal for DisplayPort interface
D-PHYLow voltage differential signal for MIPI CSI-2 cameras and DSI displays
M-PHYLow voltage differential signal for MIPI CSI-3 cameras
LVDSLow voltage differential signal for LCD displays
PCIELow voltage differential signal for PCIe
SATALow voltage differential signal for SATA
TMDS HDMITransition minimized differential signal for HDMI displays
USBDC coupled differential signaling for traditional (non-Superspeed) USB signals
USB SSDifferential signal for SuperSpeed USB signals
USB VBUS 5V5V tolerant input for USB VBUS detection
VDD_INMain power source from Carrier to Module
3.3V3.3V power domain: Active while CARRIER_PWRON is high and CARRIER_SBY# is NOT active (i.e. both signals are high)
1.8V1.8V power domain: Active while CARRIER_PWRON is high and CARRIER_SBY# is NOT active (i.e. both signals are high)
3.3Vsb3.3V standby power domain: Active while CARRIER_PWRON is high (regardless of CARRIER_SBY#)
1.8Vsb1.8V standby power domain: Active while CARRIER_PWRON is high (regardless of CARRIER_SBY#)
SleepModule is in its lowest power state
RuntimeModule is full on. CARRIER_PWRON is high and CARRIER_SBY# is NOT active (i.e. both signals are high)
StandbyModule is in standby state or higher
# 4.3. Signal Description by Function 4.3.1 LVDS Display Interface
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
LVDS_BL_ENAN23O CMOS1.8VLVDS0_BKLT_EN_1V8MCU(STM32L431RCI6)F7
LVDS_A_CLK_PAN13O LVDS LCDLVDS0_CLK_Pi.MX95LVDS0_CLK_P
LVDS_A_CLK_NAN12O LVDS LCDLVDS0_CLK_Ni.MX95LVDS0_CLK_N
LVDS_A_LANE0_PAP18O LVDS LCDLVDS0_D0_Pi.MX95LVDS0_D0_P
LVDS_A_LANE0_NAP17O LVDS LCDLVDS0_D0_Ni.MX95LVDS0_D0_N
LVDS_A_LANE1_PAR16O LVDS LCDLVDS0_D1_Pi.MX95LVDS0_D1_P
LVDS_A_LANE1_NAR15O LVDS LCDLVDS0_D1_Ni.MX95LVDS0_D1_N
LVDS_A_LANE2_PAP15O LVDS LCDLVDS0_D2_Pi.MX95LVDS0_D2_P
LVDS_A_LANE2_NAP14O LVDS LCDLVDS0_D2_Ni.MX95LVDS0_D2_N
LVDS_A_LANE3_PAP12O LVDS LCDLVDS0_D3_Pi.MX95LVDS0_D3_P
LVDS_A_LANE3_NAP11O LVDS LCDLVDS0_D3_Ni.MX95LVDS0_D3_N
LVDS_B_CLK_PAN17O LVDS LCDLVDS1_CLK_Pi.MX95LVDS1_CLK_P
LVDS_B_CLK_NAN16O LVDS LCDLVDS1_CLK_Ni.MX95LVDS1_CLK_N
LVDS_B_LANE0_PAM21O LVDS LCDLVDS1_D0_Pi.MX95LVDS1_D0_P
LVDS_B_LANE0_NAM20O LVDS LCDLVDS1_D0_Ni.MX95LVDS1_D0_N
LVDS_B_LANE1_PAN20O LVDS LCDLVDS1_D1_Pi.MX95LVDS1_D1_P
LVDS_B_LANE1_NAN19O LVDS LCDLVDS1_D1_Ni.MX95LVDS1_D1_N
LVDS_B_LANE2_PAM18O LVDS LCDLVDS1_D2_Pi.MX95LVDS1_D2_P
LVDS_B_LANE2_NAM17O LVDS LCDLVDS1_D2_Ni.MX95LVDS1_D2_N
LVDS_B_LANE3_PAM15O LVDS LCDLVDS1_D3_Pi.MX95LVDS1_D3_P
LVDS_B_LANE3_NAM14O LVDS LCDLVDS1_D3_Ni.MX95LVDS1_D3_N
4.3.1.1. DSI0 Mode
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
DSI_DATA0_NAB11O LVDS D-PHYDSI_D0_Ni.MX95MIPI_DSICSI1_D0_N
DSI_DATA0_PAB10O LVDS D-PHYDSI_D0_Pi.MX95MIPI_DSICSI1_D0_P
DSI_DATA1_NAC9O LVDS D-PHYDSI_D1_Ni.MX95MIPI_DSICSI1_D1_N
DSI_DATA1_PAC8O LVDS D-PHYDSI_D1_Pi.MX95MIPI_DSICSI1_D1_P
DSI_DATA2_NAC6O LVDS D-PHYDSI_D2_Ni.MX95MIPI_DSICSI1_D2_N
DSI_DATA2_PAC5O LVDS D-PHYDSI_D2_Pi.MX95MIPI_DSICSI1_D2_P
DSI_DATA3_NAB5O LVDS D-PHYDSI_D3_Ni.MX95MIPI_DSICSI1_D3_N
DSI_DATA3_PAB4O LVDS D-PHYDSI_D3_Pi.MX95MIPI_DSICSI1_D3_P
DSI_CLOCK_NAB8O LVDS D-PHYDSI_CLK_Ni.MX95MIPI_DSICSI1_CLK_N
DSI_CLOCK_PAB7O LVDS D-PHYDSI_CLK_Pi.MX95MIPI_DSICSI1_CLK_P
DSI_TEAA3I CMOS1.8VDSI_TEi.MX95GPIO_IO13
# 4.3.1.2. eDP Mode Not supported. # 4.4. Secondary Display Interface # 4.4.1 HDMI Mode Derived from the DSI signals on the carrier; see EB4 schematics for implementation. # 4.4.2 DP++ Mode Not supported. # 4.4.3 MIPI Camera Support 4.4.3.1. CSI (4 Lanes)
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
CSI_A_DATA0_NC1I LVDS D-PHY / I LVDS M-PHYCSI1_DN0i.MX95MIPI_CSI1_D0_N
CSI_A_DATA0_PB1CSI1_DP0i.MX95MIPI_CSI1_D0_P
CSI_A_DATA1_NA2CSI1_DN1i.MX95MIPI_CSI1_D1_N
CSI_A_DATA1_PA3CSI1_DP1i.MX95MIPI_CSI1_D1_P
CSI_A_DATA2_NA5CSI1_DN2i.MX95MIPI_CSI1_D2_N
CSI_A_DATA2_PA6CSI1_DP2i.MX95MIPI_CSI1_D2_P
CSI_A_DATA3_NB6CSI1_DN3i.MX95MIPI_CSI1_D3_N
CSI_A_DATA3_PB7CSI1_DP3i.MX95MIPI_CSI1_D3_P
CSI_A_CLOCK_NB3I LVDS D-PHYCSI1_CKNi.MX95MIPI_CSI1_CLK_N
CSI_A_CLOCK_PB4I LVDS D-PHYCSI1_CKPi.MX95MIPI_CSI1_CLK_P
CAM_MCKC2O CMOS1.8VCSI1_MCLK_1V8i.MX95CCM_CLKO1
CAM_A_SDA / CSI_A_TX_NC3I/O OD CMOS / O LVDS M-PHY1.8VPU 2k2I2C2_SDA_1V8i.MX95I2C2_SDA
CAM_A_SCL / CSI_A_TX_PC4I/O OD CMOS / O LVDS M-PHY1.8VPU 2k2I2C2_SCL_1V8i.MX95I2C2_SCL
CAM_A_PWR / GPIO_C_6G3O CMOS1.8VCSI1_PWR_1V8i.MX95PB12
CAM_A_RST# / GPIO_C_7G4O CMOS1.8VCSI1_RST_1V8i.MX95PB13
# 4.4.4 Audio Interfaces 4.4.4.1. I2S0
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
I2S_A_DATA_INV21I/O CMOS1.8VSAI3_RXD_1V8i.MX95GPIO_IO20
I2S_A_DATA_OUTW21SAI3_TXD_1V8i.MX95GPIO_IO21
I2S_B_DATA_INV19SAI1_RXD_1V8i.MX95SAI1_RXD0
I2S_B_DATA_OUTW19SAI1_TXD_1V8i.MX95SAI1_TXD0
I2S_MCLKV18SAI3_MCLK_1V8i.MX95GPIO_IO17
I2S_A_LRCLKW18SAI3_TXFS_1V8i.MX95GPIO_IO26
I2S_A_BITCLKW20SAI3_TXC_1V8i.MX95GPIO_IO16
I2S_B_LRCLKT18(not connect)
I2S_B_BITCLKT19(not connect)
4.4.5 USB Ports
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
USB_A_D_NAB13I/O USBUSBUSB2_DN_CPUi.MX95USB2_D_N
USB_A_D_PAC14I/O USBUSBUSB2_DP_CPUi.MX95USB2_D_P
USB_A_IDAB14I OD CMOS1.8VPU 10kUSB2_ID_1V8i.MX95USB2_ID
USB_A_OC#AC15I OD CMOS1.8VPU 10kUSB2_OC#_1V8i.MX95ENET2_MDIO
USB_A_VBUSAB16I USB VBUS 5V5V(not connect)
USB_A_ENAC16O CMOS1.8VUSB_A_EN_1V8MCU(STM32L431RCI6)PB6
USB_C_D_ND11I/O USBUSBUSB1_DN_CPUi.MX95USB1_D_N
USB_C_D_PD10I/O USBUSBUSB1_DP_CPUi.MX95USB1_D_P
USB_C_OC#C8I OD CMOS1.8VPU 10KUSB1_OC#_1V8i.MX95ENET2_MDC
USB_C_ENC10O CMOS1.8VUSB1_EN_1V8i.MX95GPIO_IO12
USB_C_SSTX_NA9O USB SSUSB SSUSB1_TX0_Ni.MX95USB1_TX0_N
OSM-IMX95 User’s Guide SGET COM R0.1
USB_C_SSTX_PA8O USB SSUSB SSUSB1_TX0_Pi.MX95USB1_TX0_P
USB_C_SSRX_NB11I USB SSUSB SSUSB1_RX0_Ni.MX95USB1_RX0_N
USB_C_SSRX_PB10I USB SSUSB SSUSB1_RX0_Pi.MX95USB1_RX0_P
![The image displays a red line-art icon of a document or file on a white background. The shape is a rectangle with the bottom-right corner folded over (a 'dog-ear'). Inside the outline, there are two horizontal parallel lines centered vertically, representing text or content.](.osm-imx95-50m-76105-1010-11/cc2661a5fc9fcfb125f893a713a2c317425d58e0347fef3bdb6850efc18e8be4.jpg) Note 1: USB A supports OTG and Host. ![The image displays a red icon representing a text document. It features a red outline of a square piece of paper with a folded bottom-right corner. Inside the outline, two horizontal lines are visible, symbolizing text.](.osm-imx95-50m-76105-1010-11/1f39a40a2f5fa1fb356f72c0b088ab2b3014348acdef435834e516419054dbab.jpg) Note: 2: USB C carries SS signals. 4.4.6 PCIe
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
PCIe_A_HSI0_PAB1I LVDS PCIEPCIEA_RX0_Pi.MX95PCIE1_RX0_P
PCIe_A_HSI0_NAB2I LVDS PCIEPCIEA_RX0_Ni.MX95PCIE1_RX0_N
PCIe_A_HSO0_PAC2O LVDS PCIEPCIEA_TX0_Pi.MX95PCIE1_TX0_P
PCIe_A_HSO0_NAC3O LVDS PCIEPCIEA_TX0_Ni.MX95PCIE1_TX0_N
PCIe_CLKREQ#W2I OD CMOS1.8VPU 10kPCIEA_CLKREQ#_1V8i.MX95GPIO_IO32
PCIe_A_PERST#V2O CMOS1.8VPCIEA_RST#_1V8MCU(STM32L431RCI6)PB5
PCIe_REFCLK_PW1O LVDS PCIEPCIEA_CLKOUT_Pi.MX95PCIE_REF_OUT_CLK_P
PCIe_REFCLK_NY1O LVDS PCIEPCIEA_CLKOUT_Ni.MX95PCIE_REF_OUT_CLK_N
PCIe_WAKE#T2I OD CMOS1.8VPU 10kPCIE_WAKE#_1V8PCAL6408AHKXP4
PCIe_SMDATU1I/O OD CMOS1.8VPU 2k2I2C2_SDA_1V8i.MX95I2C2_SDA
PCIe_SMCLKT1O OD CMOS1.8VPU 2k2I2C2_SCL_1V8i.MX95I2C2_SCL
PCIe_SM_ALERT#R2I OD CMOS1.8VPU 2k2I2C2_INT#_1V8i.MX95GPIO_IO27
4.4.7 LAN Port
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
ETH_A_(R)(G)MII_CRSE16I CMOS1.8V(not connect)
ETH_A_(R)(G)MII_COLF15I CMOS(not connect)
ETH_A_(S)(R)(G)MII_TXD0H15O CMOSENET1_TD0i.MX95ENET1_TD0
ETH_A_(S)(R)(G)MII_TXD1G15O CMOSENET1_TD1i.MX95ENET1_TD1
ETH_A_(S)(R)(G)MII_TXD2H16O CMOSENET1_TD2i.MX95ENET1_TD2
ETH_A_(S)(R)(G)MII_TXD3G16O CMOSENET1_TD3i.MX95ENET1_TD3
ETH_A_(R)(G)MII_TX_EN(ER)K16O CMOSENET1_TX_CTLi.MX95ENET1_TX_CTL
ETH_A_(R)(G)MII_TX_CLKJ15I/O CMOSENET1_TXCi.MX95ENET1_TXC
ETH_A_(S)(R)(G)MII_RXD0K15I CMOSENET1_RD0i.MX95ENET1_RD0
ETH_A_(S)(R)(G)MII_RXD1L15I CMOSENET1_RD1i.MX95ENET1_RD1
ETH_A_(R)(G)MII_RXD3P15I CMOSENET1_RD3i.MX95ENET1_RD3
ETH_A_(R)(G)MII_RX_ERL16I CMOS(not connect)
ETH_A_(R)(G)MII_RX_DV(ER)M15I CMOSENET1_RX_CTLi.MX95ENET1_RX_CTL
ETH_A_(R)(G)MII_RX_CLKR15I/O CMOSENET1_RXCi.MX95ENET1_RXC
ETH_A_SDPN16O CMOS(not connect)
ETH_MDIOT15I/O CMOSENET1_MDIO_1V8i.MX95ENET1_MDIO
ETH_MDCT16O CMOSENET1_MDC_1V8i.MX95ENET1_MDC
ETH_IOPWRM17POVDD_1V8_SPMIC
ETH_B_(R)(G)MII_CRSD2I CMOS(not connect)
ETH_B_(R)(G)MII_COLE1I CMOS(not connect)
ETH_B_(S)(R)(G)MII_TXD0G1O CMOSENET2_TD0i.MX95ENET2_TD0
ETH_B_(S)(R)(G)MII_TXD1F1O CMOSENET2_TD1i.MX95ENET2_TD1
ETH_B_(S)(R)(G)MII_TXD2G2O CMOSENET2_TD2i.MX95ENET2_TD2
ETH_B_(S)(R)(G)MII_TXD3F2O CMOSENET2_TD3i.MX95ENET2_TD3
ETH_B_(R)(G)MII_TX_EN(ER)J2O CMOSENET2_TX_CTLi.MX95ENET2_TX_CTL
ETH_B_(R)(G)MII_TX_CLKH1I/O CMOSENET2_TXCi.MX95ENET2_TXC
ETH_B_(S)(R)(G)MII_RXD0J1I CMOSENET2_RD0i.MX95ENET2_RD0
ETH_B_(S)(R)(G)MII_RXD1K1I CMOSENET2_RD1i.MX95ENET2_RD1
ETH_B_(R)(G)MII_RXD2M1I CMOSENET2_RD2i.MX95ENET2_RD2
ETH_B_(R)(G)MII_RXD3N1I CMOSENET2_RD3i.MX95ENET2_RD3
ETH_B_(R)(G)MII_RX_ERK2I CMOS(not connect)
ETH_B_(R)(G)MII_RX_DV(ER)L1I CMOSENET2_RX_CTLi.MX95ENET2_RX_CTL
ETH_B_(R)(G)MII_RX_CLKP1I/O CMOSENET2_RXCi.MX95ENET2_RXC
ETH_B_SDPM2O CMOS(not connect)
ETH_B_MDIOC7I/O CMOSENET1_MDIO_1V8ENET1_MDIO
ETH_B_MDCC6O CMOSENET1_MDC_1V8ENET1_MDC
# 4.4.8 SDIO Card (4-Bit) The carrier SDIO card may be selected as the boot device.
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleController
SDIO_A_CMDE20I/O CMOSSD2_CMDi.MX95
SDIO_A_CLKF21O CMOSSD2_CLKi.MX95
SDIO_A_D0G20I/O CMOSSD2_DATA0i.MX95
SDIO_A_D1G21I/O CMOSSD2_DATA1i.MX95
SDIO_A_D2H20I/O CMOSSD2_DATA2i.MX95
SDIO_A_D3H21I/O CMOSSD2_DATA3i.MX95
SDIO_A_CD#J21I OD CMOSPU 10KSD2_CD_B_1V8A3Vi.MX95
SDIO_A_WPD20I OD CMOSPU 10KSD2_WP_1V8i.MX95
SDIO_A_PWR_END21O CMOSSD2_RST_B_1V8A3Vi.MX95
SDIO_A_IOPWRC20POVDD_SDIO2_SPMIC
SDIO_B_CLKK20O CMOSSD3_CLKi.MX95
SDIO_B_CMDK21I/O CMOSSD3_CMDi.MX95
SDIO_B_D0L20I/O CMOSSD3_DATA0i.MX95
SDIO_B_D1L21I/O CMOSSD3_DATA1i.MX95
SDIO_B_D2M21I/O CMOSSD3_DATA2i.MX95
SDIO_B_D3N20I/O CMOSSD3_DATA3i.MX95
SDIO_B_D4N21I/O CMOS(not connect)
SDIO_B_D5P20I/O CMOS(not connect)
SDIO_B_D6P21I/O CMOS(not connect)
SDIO_B_D7R21I/O CMOS(not connect)
SDIO_B_CD#T21I OD CMOSPU 10K(not connect)
SDIO_B_WPU20I OD CMOSPU 10K(not connect)
SDIO_B_PWR_ENU21O CMOS(not connect)
SDIO_B_IOPWRT20POVDD_1V8_SPMIC
4.4.9 SPI Interfaces
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
SPI_A_SDI_(IO1)U15I/O CMOSQSPIA_DATA1i.MX95XSPI1_DATA1
SPI_A_SDO_(IO0)V15I/O CMOSQSPIA_DATA0i.MX95XSPI1_DATA0
SPI_A_/WP_(IO2)W16I/O CMOSQSPIA_DATA2i.MX95XSPI1_DATA2
SPI_A_/HOLD_(IO3)W15I/O CMOSQSPIA_DATA3i.MX95XSPI1_DATA3
SPI_A_CS0#Y15O CMOS100K PUQSPIA_nSS0i.MX95XSPI1_SS0_B
SPI_A_CS1# / GPIO_A_6K17O CMOS100K PUQSPIA_nSS1i.MX95XSPI1_SS1_B
SPI_A_SCKU16O CMOSQSPIA_SCLKi.MX95XSPI1_SCLK
SPI_B_SDIY22I CMOSSPI6_MISO_1V8i.MX95GPIO_IO01
SPI_B_SDOY23O CMOSSPI6_MOSI_1V8i.MX95GPIO_IO02
SPI_B_CS0#AA23O CMOS100K PUSPI6_SS0_1V8i.MX95GPIO_IO00
SPI_B_CS1# / GPIO_A_7L17O CMOS100K PUSPI6_SS1_1V8i.MX95GPIO_IO24
SPI_B_SCKY21O CMOSSPI6_SCLK_1V8i.MX95GPIO_IO03
SPI_C_SDIC29I CMOS1.8VSPI7_MISO_1V8i.MX95GPIO_IO05
SPI_C_SDOD30O CMOS1.8VSPI7_MOSI_1V8i.MX95GPIO_IO06
SPI_C_CS0#C30O CMOS1.8VSPI7_SS0_1V8i.MX95GPIO_IO04
SPI_C_CS1# / GPIO_D_7Y33O CMOS1.8VSPI7_SS1_1V8i.MX95GPIO_IO25
SPI_C_SCKD29O CMOS1.8VSPI7_SCLK_1V8i.MX95GPIO_IO07
4.4.10 GPIO
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
GPIO_A_0D17I/O CMOSGPIO_A0_1V8i.MX95GPIO_IO18
GPIO_A_1E17GPIO_A1_1V8i.MX95GPIO_IO19
GPIO_A_2F17GPIO_A2_1V8i.MX95GPIO_IO33
GPIO_A_3G17GPIO_A3_1V8i.MX95GPIO_IO34
GPIO_A_4H17GPIO_A4_1V8i.MX95XSPI1_DATA4
GPIO_A_5J17GPIO_A5_1V8i.MX95XSPI1_DATA5
GPIO_B_0D19GPIO_B0_1V8i.MX95XSPI1_DATA6
GPIO_B_1E19GPIO_B1_1V8i.MX95XSPI1_DATA7
GPIO_B_2F19GPIO_B2_1V8MCU(STM32L431R CI6)PA2
GPIO_B_3G19GPIO_B3_1V8MCU(STM32L431R CI6)PA3
GPIO_B_4H19GPIO_B4_1V8MCU(STM32L431R CI6)PA4
GPIO_B_5J19GPIO_B5_1V8MCU(STM32L431R CI6)PA7
GPIO_B_6K19GPIO_B6_1V8MCU(STM32L431R CI6)PA8
GPIO_B_7L19GPIO_B7_1V8MCU(STM32L431R CI6)PA9
![A red icon depicting a document or note with a folded top-right corner and two horizontal lines inside.](.osm-imx95-50m-76105-1010-11/c9bb559f9236baeb6aafce48267782c7f0f2f6f001e514d54a6014b242cd7847.jpg) Note: Fast GPIOs are directly from the i.MX95. 4.4.11 Power + Boot Select
Contact NameContact AcronymI/O TypeI/O LevelPU/PDNet Name of ModuleControllerController Pin Name
VCC_2_TESTM19PO0.61V ~ 0.955VVDD_SOCPMIC
VCC_3_TESTY16PO0.8VVDD_DDRPMIC
VCC_4_TESTY20PO0.5VVDDQ_CPU_DDR_SPMIC
VCC_IN_5VY17P5VVSYS_5VFrom carrier
VCC_IN_3V3Y19P3.3V(not connect)
V_BATAA18, AB18P(not connect)
GNDD18, E15, E21, F16, F20, J16, J20, L18, M16, M20, P18, R16, R20, V16, V20, Y18, AA14, AA17, AA19, AA22, AB15, AB21PGND
RESET_OUT#Y14O CMOS1.8V1P8_RESET_OUT-LLogic IC
RESET_IN#U17I OD CMOS1.8VPU 10KRST_IN#_1V8Logic IC
CARRIER_PWR_ENV17O CMOS1.8VCARRIER_PWR_ENLogic IC
CARRIER_STBYY13O CMOS1.8V1P8_CARRIER_STBY-LLogic IC
VCC_OUT_IOU18P1.8VVDD_1V8_SPMIC
RTC_PWRW17P(not connect)
BOOT_SEL0#U19I OD CMOS1.8VPU 10KBOOT_SEL0#_1V8MCU(STM32L431R CI6)PC6
BOOT_SEL1#R18I OD CMOS1.8VPU 10KBOOT_SEL1#_1V8MCU(STM32L431R CI6)PC7
FORCE_RECOVERY#T17I OD CMOS1.8VPU 10KFORCE_RECOVERY#_1 V8MCU(STM32L431R CI6)PC9
VCC_5_TESTY3POVDD2_CPU_DDR_SPMIC
VCC_6_TESTC5POVDD_ARMPMIC
VCC_IN_5VY8, Y9, Y10, Y11PVSYS_5VFrom carrier
GNDA4, A7, A10, B2, B5, B8, B9, C11, D1, D5, D8, E2, H2, H4, L2, L4, P2, P4, R1, U2, U4, V1, W3, Y2, AA1, AA4, AA7, AA8, AA10, AA11, AB3, AB6, AB9, AC4, AC7, AC10PGND
PWR_BTN#AA9I OD CMOSPU 10KONOFF_1V8i.MX95ONOFF
VCC_7_TESTAA33P3.3VVDD_3V3_SPMIC
VCC_8_TESTB29P1.8VVDD_1V8_SPMIC
VCC_IN_5VY25, Y26, Y27, Y28P5VVSYS_5VFrom carrier
GNDA26, A29, A32,B27, B28, B30,B33, C25, C32,C35, D28, D34,F33, F35, G34,H32, J33, J35,K34, M35, N34,T34, W34, AA25,AA26, AA27,AA28, AA32,AB28, AB31,AB34, AC27,AC30, AC33PGND
VCC_IN_5VAE4, AF4, AG4,AH3, AH4, AJ3,AJ4, AK4P5VVSYS_5VFrom carrier
GNDAE2, AE34, AF35,AG3, AH2, AH34,AJ35, AK3, AL2,AL34, AM13,AM16, AM19,AM22, AM35,AN3, AN6, AN9,AN11, AN15,AN18, AN21,AN33, AP2, AP5,AP8, AP13,AP16, AP19,AP22, AP25,AP28, AP31,AP34, AR14,AR17, AR20,AR26, AR29,AR32PGND
# 5. Software Support # 5.1. Standard Support The standard OS is Yocto # 5.2. Yocto All features are supported on the Yocto 64-bit BSP, based on the latest kernel supported by NXP. # 6. Mechanical # 6.1. Module Dimensions Module OSM L Size 45x 45mm ![28.00\n10.25\n6.75\n10.25\nR1\nR1\n6.75\n6.75\n45.00\n30.50\n16.50\n16.50\n7.75\nR1\n6.75\n31.50\n45.00](.osm-imx95-50m-76105-1010-11/eda8bc33e279f87bc882b97567230294fdf35ababed85c662d62ae981a760b36.jpg) ![27.50\n11.25\n6.25\n11.25\nR1\nR1\n6.25\n6.25\n30.00\n17.50\n17.50\n45.00\n8.75\n6.25\n32.50\nR1\n45.00](.osm-imx95-50m-76105-1010-11/ba6ca6af0ed22d304ff0cae6d8b4a43d7896b069d3e111cf33f01c6df8f4e3c8.jpg) Figure 16: Placement Area (left) and Cut-Out Area (right) - Size L (view from bottom) Figure 4 – Placement and cut-out area – Size (L) # 7. Thermal Solutions # 7.1. Heatspreader: HTS To be defined on the carrier. # 7.2. Heatsink: THS To be defined on the carrier. [🔗 Link to the original document](.osm-imx95-50m-76105-1010-11/osm-imx95-50m-76105-1010-11.pdf)