NuDAQ® PCI-9113A 32 Channels Isolated Analog Input Card User's Guide ©Copyright 2000\~2001 ADLINK Technology Inc; All Rights Reserved. Manual Rev. 1.30: April 28, 2003 Part NO: 50-11113-102 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. # Trademarks NuDAQ $^{®}$ , NuIPC $^{®}$ , NuDAM $^{®}$ , NuPRO $^{®}$ are registered trademarks of ADLINK Technology Inc. Other product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies. # Getting service from ADLINK Customer Satisfaction is the most important priority for ADLINK Tech Inc. If you need any help or service, please contact us.
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# Table of Contents # Chapter 1 Introduction ...... 1 1.1 Features....2 1.2 Applications 2 1.3 Specifications.... 3 1.4 Software Supporting 4 1.4.1 Programming Library 4 1.4.2 PCIS-LVIEW: LabVIEW $^{®}$ Driver 5 1.4.3 PCIS-VEE: HP-VEE Driver....5 1.4.4 DAQBench $^{TM}$ : ActiveX Controls 5 1.4.5 DASYLab $^{TM}$ PRO 5 1.4.6 PCIS-DDE: DDE Server and InTouch $^{TM}$ 5 1.4.7 PCIS-ISG: ISaGRAF $^{TM}$ driver 6 1.4.8 PCIS-ICL: InControl™ Driver....6 1.4.9 PCIS-OPC: OPC Server 6 # Chapter 2 Installation....7 2.1 What You Have....7 2.2 Unpacking....7 2.3 Hardware Installation 9 2.3.1 Hardware configuration 9 2.3.2 PCI slot selection 9 2.3.3 Installation Procedures 9 2.4 Device Installation.... 10 2.5 PCI-9113A's Layout 10 2.6 Jumper Settings.... 11 2.6.1 Analog Signal Input Type Selection 11 2.6.2 Polarity Selection Jumper....11 2.6.3 Full Range Jumper 11 2.6.4 Possible AD Input Range Configurations 12 2.6.5 Binary/2's Complement Coding Selection Jumper12 2.7 Connector Pin Assignments 13 2.8 Daughter Board Connection 15 2.8.1 Connect with ACLD-9881 15 2.8.2 Connect with ACLD-9137 15 2.8.3 Connect with ACLD-9188 15 # Chapter 3 Registers Format....16 3.1 I/O Port Address 17 3.2 A/D Data Registers 18 3.3 A/D Channel Control Register 18 3.4 A/D Input Signal Range Control Register 19 3.5 A/D Status Readback Register 19 3.6 A/D Trigger Mode Control and Readback Register . 20 3.7 Software Trigger Register 20 3.8 Interrupt Control and Readback Register 21 3.9 Hardware Interrupt Clear Register 21 3.10 A/D Data and Channel Number Registers 22 3.11 Timer/Counter Register 22 3.12 High Level Programming 23 # Chapter 4 Operation Theorem ......24 4.1 A/D Conversion....24 4.1.1 A/D Conversion Procedure....24 4.1.2 A/D Signal Source Control.... 25 4.1.3 A/D Trigger Source Control 27 4.1.4 A/D Data Transfer Modes 28 4.1.5 A/D Data Format....31 4.2 Interrupt Control.... 33 4.2.1 System Architecture 33 4.2.2 IRQ Level Setting 33 4.2.3 Dual Interrupt System.... 33 4.2.4 Interrupt Source Control 34 4.3 Timer/Counter Operation 35 4.3.1 Introduction.... 35 4.3.2 Pacer Trigger Source 35 # Chapter 5 C/C++ Software Library....36 5.1 Libraries Installation 36 5.2 Programming Guide.... 37 5.2.1 Naming Convention 37 5.2.2 Data Types 37 5.3 9113 Initial 38 5.4 \_9113\_Software\_Reset 38 5.5 9113 AD Read Data.... 39 5.6 9113 AD Read Data Repeat 40 5.7 9113 AD Read Data MUX....41 5.8 9113 AD Read Data Repeat MUX 42 5.9 9113 AD Set Channel 43 5.10 \_9113\_AD\_Set\_Range 44 5.11 \_9113\_AD\_Get\_Range 45 5.12 9113 AD Get Status 46 5.13 9113 AD Set Mode 47 5.14 9113\_AD\_Get\_Mode 48 5.15 \_9113\_INT\_Set\_Reg 49 5.16 9113\_AD\_Get\_Reg 50 5.17 9113 Reset FIFO 51 5.18 \_9113\_AD\_Soft\_Trigger 51 5.19 9113 Set 8254 52 5.20 9113 Get 8254 53 5.21 9113\_AD\_Timer....54 5.22 9113 Counter Start 55 5.23 9113 Counter Read 56 5.24 9113 Counter Stop 56 5.25 9113\_INT\_Source\_Control 57 5.26 9113\_CLR\_IRQ 58 5.27 9113 Get IRQ Channel 58 5.28 9113 Get IRQ Status 59 5.29 9113\_AD\_FFHF\_Polling....60 5.30 \_9113\_AD\_FFHF\_Polling\_MUX....61 5.31 \_9113\_AD\_Aquire 62 5.32 9113\_AD\_Aquire\_MUX 63 5.33 9113\_AD\_INT\_Start 64 5.34 9113\_AD\_FFHF\_INT\_Start 66 5.35 9113 AD INT Status....68 5.36 9113 AD FFHF INT Status....69 5.37 9113\_AD\_FFHF\_INT\_Restart 70 5.38 \_9113\_AD\_INT\_Stop....71 # Chapter 6 Calibration & Utilities....72 6.1 Calibration....72 6.1.1 VR Assignment....72 6.1.2 A/D Adjustment....73 6.1.3 Software A/D Offset Calibration....74 6.2 Utilities 75 6.2.1 9113UTIL....75 6.2.2 I\_EEPROM 78 # Appendix A 8254 Programmable Interval Timer .....79 A.1 The 8254 Timer / Counter Chip .... 79 A.2 The Control Byte 80 # Warranty Policy 82 # 1 # Introduction The PCI-9113A is an advanced data acquisition add-on card based on 32-bit PCI Bus architecture. High performance designs and the state-of-the-art technology make this card ideal for data logging and signal analysis applications in medical, process control, and etc. The outstanding feature of PCI-9113A is that high-speed isolated photo couplers are used between all signal lines of digital and analog converter. It can protect your PC, and peripherals from damage due to the high voltages on the analog inputs. The block diagram of PCI-9113A is shown below. ![**Blocks:**\n* (Analog Input)\n* CH 0\n* CH 1\n* CH 2\n* ...\n* CH 31\n* 32-CH Single-ended or 16-CH Differential Analog MUX\n* Isolated DC/DC Converter\n* PGA\n* 12 Bit A/D Converter (ADS774)\n* Isolation\n* Control\n* 1K A/D FIFO\n* Boot EPROM\n* PCI Bus Controller\n* 32-bit PCI Local Bus\n\n**Connections:**\n* **CH 0**, **CH 1**, **CH 2**, **...**, and **CH 31** point to **32-CH Single-ended or 16-CH Differential Analog MUX**.\n* **32-CH Single-ended or 16-CH Differential Analog MUX** connects to **PGA**.\n* **Isolated DC/DC Converter** connects via **+15** to **PGA**.\n* **PGA** connects to **12 Bit A/D Converter (ADS774)**.\n* **12 Bit A/D Converter (ADS774)** connects to **1K A/D FIFO**.\n* **Isolation** connects bidirectionally to **Control**.\n* **Control** connects bidirectionally to **PCI Bus Controller**.\n* **1K A/D FIFO** connects to **PCI Bus Controller**.\n* **Boot EPROM** connects to **PCI Bus Controller**.\n* **PCI Bus Controller** connects bidirectionally to **32-bit PCI Local Bus**.](.pci-9113a-manual-3/2a24ba1692aeca100070cd47a0765204e654c48523ccabd2ae358487384b85c4.jpg) # 1.1 Features The PCI-9113A PCI Bus Data Acquisition Card provides the following advanced features: ● 32-bit PCI-Bus, Plug and Play ● 32-CH single-ended or 16-CH differential 12-bit analog inputs ● Isolation voltage: 2500Vrms ● Programmable gain of 1, 10, 100 ● Sampling rate up to 100KHz ● Trigger mode: software trigger, timer pacer ● On-board A/D 1K WORDS FIFO memory ● Auto-scanning channel selection ● Input impedance: 10M Ω ● Analog input voltage protection: 70 voltage (peak-to-peak) - Compact size: half-size PCB - Integral 3000VDC Isolation DC to DC converters for stable power sources - DB-37 connector, pin assignment is fully compatible with ACL-8113, and PCI-9113 # 1.2 Applications - Industrial process control ● Transducer, thermocouple, RTD ● Power monitor ● Medical instrument ● Biomedical measurement ● Ground loop elimination # 1.3 Specifications # ♦ Analog Input (A/D) \- Converter: B.B. ADS774, successive approximation type ● Resolution: 12-bit ● Input channels: 32 single-ended/16 differential \- Isolated photo coupler: PC410 Isolation voltage rated continuous: 2,500Vrms Instantaneous common mode rejection: 500V/us typically \- Analog Input Range: (Software controlled, and jumper selection) Bipolar: ±10V, ±1V, ±0.1V or ±5V, ±0.5V, ±0.05V Unipolar: 0\~10V, 0\~1V, 0\~0.1V ● Throughput: 100K samples/sec. ● Over-voltage Protection: Continuous ±35V maximum ● Accuracy: 0.015% of reading ±1 bit ● Input Impedance: 10 MΩ ● Trigger Mode: Software and Pacer ● Data Transfer: Program control, Interrupt ● FIFO Buffer Size: 1024 samples # ♦ General Specifications \- Connector: 37-pin D-type connector ● Operating Temperature: 0°C \~ 55°C ● Storage Temperature: $-20^{\circ}$ C \~ $80^{\circ}$ C ● Humidity: 5 \~ 95%, non-condensing ● Power Consumption: +5 V @ 960mA (max.) ● Dimension: 173mm (L) x 102mm (W) # 1.4 Software Supporting ADLINK provides versatile software drivers and packages for users' different approach to built-up a system. We not only provide programming library such as DLL for many Windows systems, but also provide drivers for many software package such as LabVIEW $^{®}$ , HP VEE $^{TM}$ , DASYLab $^{TM}$ , InTouch $^{TM}$ , InControl $^{TM}$ , ISaGRAF $^{TM}$ , and so on. All the software options are included in the ADLINK CD. The non-free software drivers are protected with serial licensed code. Without the software serial number, you can still install them and run the demo version for two hours for demonstration purpose. Please contact with your dealer to purchase the formal license serial code. # 1.4.1 Programming Library For customers who are writing their own programs, we provide function libraries for many different operating systems, including: DOS Library: Borland C/C++ and Microsoft C++, the functions descriptions are included in this user's guide. Windows 95 DLL: For VB, VC++, Delphi, BC5, the functions descriptions are included in this user's guide. PCIS-DASK: Include device drivers and DLL for Windows 98, Windows NT and Windows 2000. DLL is binary compatible across Windows 98, Windows NT and Windows 2000. That means all applications developed with PCIS-DASK are compatible across Windows 98, Windows NT and Windows 2000. The developing environment can be VB, VC++, Delphi, BC5, or any Windows programming language that allows calls to a DLL. The user's guide and function reference manual of PCIS-DASK are in the CD. Please refer the PDF manual files under \\Manual\_PDF\Software\PCIS-DASK PCIS-DASK/X: Include device drivers and shared library for Linux. The developing environment can be Gnu C/C++ or any programming language that allows linking to a shared library. The user's guide and function reference manual of PCIS-DASK/X are in the CD. (\Manual\_PDF\Software\PCIS-DASK-X.) The above software drivers are shipped with the board. Please refer to the "Software Installation Guide" to install these drivers. # 1.4.2 PCIS-LVIEW: LabVIEW $^{®}$ Driver PCIS-LVIEW contains the VIs, which are used to interface with NI's LabVIEW $^{®}$ software package. The PCIS-LVIEW supports Windows 95/98/NT/2000. The LabVIEW $^{®}$ drivers are free shipped with the board. You can install and use them without license. For detail information about PCIS-LVIEW, please refer to the user's guide in the CD. (\Manual\_PDF\Software\PCIS-LVIEW) # 1.4.3 PCIS-VEE: HP-VEE Driver The PCIS-VEE includes the user objects, which are used to interface with HP VEE software package. PCIS-VEE supports Windows 95/98/NT. The HP-VEE drivers are free shipped with the board. You can install and use them without license. For detail information about PCIS-VEE, please refer to the user's guide in the CD. (\Manual\_PDF\Software\PCIS-VEE) # 1.4.4 DAQBench™: ActiveX Controls We suggest the customers who are familiar with ActiveX controls and VB/VC++ programming use the DAQBench $^{TM}$ ActiveX Control components library for developing applications. The DAQBench $^{TM}$ is designed under Windows NT/98. For more detailed information about DAQBench, please refer to the user's guide in the CD. (\Manual\_PDF\Software\DAQBench\DAQBench Manual.PDF) # 1.4.5 DASYLab $^{TM}$ PRO DASYLab is an easy-to-use software package, which provides easy-setup instrument functions such as FFT analysis. Please contact us to get DASYLab PRO, which include DASYLab and ADLINK hardware drivers. # 1.4.6 PCIS-DDE: DDE Server and InTouch™ DDE stands for Dynamic Data Exchange specifications. The PCIS-DDE includes the PCI cards' DDE server. The PCIS-DDE server is included in the ADLINK CD. It needs license. The DDE server can be used conjunction with any DDE client under Windows NT. # 1.4.7 PCIS-ISG: ISaGRAF™ driver The ISaGRAF WorkBench is an IEC1131-3 SoftPLC control program development environment. The PCIS-ISG includes ADLINK products' target drivers for ISaGRAF under Windows NT environment. The PCIS-ISG is included in the ADLINK CD. It needs license. # 1.4.8 PCIS-ICL: InControl™ Driver PCIS-ICL is the InControl driver which support the Windows NT. The PCIS-ICL is included in the ADLINK CD. It needs license. # 1.4.9 PCIS-OPC: OPC Server PCIS-OPC is an OPC Server, which can link with the OPC clients. There are many software packages on the market can provide the OPC clients now. The PCIS-OPC supports the Windows NT. It needs license. # 2 # Installation This chapter describes how to install the PCI-9113A. The contents in the package and unpacking information are described. # 2.1 What You Have In addition to this User's Manual, the package includes the following items: ● PCI-9113A Data Acquisition Card - ADLINK CD ● Software Installation Guide If any of these items is missing or damaged, contact the dealer from whom you purchased the product. Save the shipping materials and carton in case you want to ship or store the product in the future. # 2.2 Unpacking Your PCI-9113A card contains sensitive electronic components that can be easily damaged by static electricity. The card should be done on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat. Inspect the card module carton for obvious damage. Shipping and handling may cause damage to your module. Be sure there are no shipping and handing damages on the module before processing. After opening the card module carton, extract the system module and place it only on a grounded anti-static surface component side up. Again inspect the module for damage. Press down on all the socketed IC's to make sure that they are properly seated. Do this only with the module place on a firm flat surface. Note: DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN DAMAGED. You are now ready to install your PCI-9113A. # 2.3 Hardware Installation # 2.3.1 Hardware configuration PCI-9113A is equipped with plug and play PCI controller, the card thus can request an interrupt via a system call. The system BIOS responds with an interrupt assignment based on the configuration registers and known system parameters. The interrupt assignment is a function of the system, the system BIOS, the installed driver and the installed PCI boards. # 2.3.2 PCI slot selection Your computer will probably have both PCI and ISA slots. Do not force the card into a PC/AT slot. # 2.3.3 Installation Procedures 1. Read through this manual, and setup the jumper according to your application. 2. Turn off your computer and turn off all accessories (printer, modem, monitor, etc.) connected to computer. 3. Remove the cover from your computer. 4. Select a 32-bit PCI expansion slot. PCI slots are short than ISA or EISA slots and are usually white or ivory. 5. Before handling the card, discharge any static buildup on your body by touching the metal case of the computer. Hold the edge and do not touch the components. 6. Position the board into the PCI slot you selected. 7. Secure the card in place at the rear panel of the system unit using screw removed from the slot. # 2.4 Device Installation While you first plug PCI-9113A card and enter Windows 95/98, the system will detect this device automatically. Please refer to the "Software Installation Guide" for the steps of installing the device. # 2.5 PCI-9113A's Layout ![32-CH\nR/C Filter\nIsolation\nPCI\nController\nBoot\nROM\nJP5\nVR1 VR2 VR3 VR4\nMUX\nMUX\nPGA\nADC\nJP3 JP2\nDC/DC\nConverter\nDC/DC\nConverter\nJP4\nFIFO FIFO\nCNTR TMR\nJP1](.pci-9113a-manual-3/3441e0da0c785b35807ce3f1ad5bee36b68145402712a414e1e6315ef7a7ce6c.jpg) Figure 2.1 PCB Layout of the PCI-9113A # 2.6 Jumper Settings # 2.6.1 Analog Signal Input Type Selection JP5 is the selection jumper of analog signal input type. The following diagram shows the two possible configurations. ![JP5\nSingle-Ended Input (Default)\nJP5\nDifferential Input](.pci-9113a-manual-3/7721c013fb551acd430bed134124341e4b3afefcc397d9fa71286097ac0c323c.jpg) # 2.6.2 Polarity Selection Jumper JP2 is the polarity selection jumper. The following diagram shows the two configurations. ![JP2\nBi-polar input (Default)\nJP2\nUni-polar input](.pci-9113a-manual-3/ab631b89131e0f37936ec915cb2af6d746e594c2ba08c0943b0d7321e6dd8e45.jpg) # 2.6.3 Full Range Jumper JP3 set the full range of the analog input channels. The following diagram shows the possible configurations. ![JP3\n20V Full Range (Default)\nJP3\n10V Full Range](.pci-9113a-manual-3/095128bb67f0c60870591b6cb183d9db45a2154e1bd78b5169cb1a3ceb38de9c.jpg) # 2.6.4 Possible AD Input Range Configurations The JP2 and JP3 are used to setup the analog input signal range. There are three possible combinations, 0\~10V, -5V\~+5V and -10V \~ +10V. See the following table for reference.
JP3
1-22-3
JP21-2+/-10V+/-5V
2-3X0~10V
# 2.6.5 Binary/2's Complement Coding Selection Jumper JP4 set the coding method of the A/D converter. The following diagram shows the possible configurations. ![JP4\nBinary Conding(Default)\nJP4\n2's Complement Coding](.pci-9113a-manual-3/dfc0a7293e27e827504ae78fc1b8ba048a91d6348da2ae21bb86f2ca050c9d60.jpg) # 2.7 Connector Pin Assignments ● CN 1: Analog Input Signals ![| Category | Value |\n| -------- | ----- |\n| AI0 | 1 |\n| AI2 | 2 |\n| AI4 | 3 |\n| AI6 | 4 |\n| AI8 | 5 |\n| AI10 | 6 |\n| AI12 | 7 |\n| AI14 | 8 |\n| IGND | 9 |\n| IGND | 10 |\n| AI16 | 11 |\n| AI18 | 12 |\n| AI20 | 13 |\n| AI22 | 14 |\n| AI24 | 15 |\n| AI26 | 16 |\n| AI28 | 17 |\n| AI30 | 18 |\n| IGND | 19 |\n| 20 | 20 |\n| 21 | 21 |\n| 22 | 22 |\n| 23 | 23 |\n| 24 | 24 |\n| 25 | 25 |\n| 26 | 26 |\n| 27 | 27 |\n| 28 | 28 |\n| 29 | 29 |\n| 30 | 30 |\n| 31 | 31 |\n| 32 | 32 |\n| 33 | 33 |\n| 34 | 34 |\n| 35 | 35 |\n| 36 | 36 |\n| 37 | 37 |\n| AI1 | 1 |\n| AI3 | 2 |\n| AI5 | 3 |\n| AI7 | 4 |\n| AI9 | 5 |\n| AI11 | 6 |\n| AI13 | 7 |\n| AI15 | 8 |\n| IGND | 9 |\n| IGND | 10 |\n| AI17 | 11 |\n| AI19 | 12 |\n| AI21 | 13 |\n| AI23 | 14 |\n| AI25 | 15 |\n| AI27 | 16 |\n| AI29 | 17 |\n| AI31 | 18 |](.pci-9113a-manual-3/15000e5bf1a97ee61adb4ac2c7dbd47c8bb15cf5d5c058abec7d1588c6aa4019.jpg) ![| Category | Value |\n| -------- | ----- |\n| AI0H | 1 |\n| AI2H | 2 |\n| AI4H | 3 |\n| AI6H | 4 |\n| AI8H | 5 |\n| AI10H | 6 |\n| AI12H | 7 |\n| AI14H | 8 |\n| IGND | 9 |\n| IGND | 10 |\n| AI0L | 11 |\n| AI2L | 12 |\n| AI4L | 13 |\n| AI6L | 14 |\n| AI8L | 15 |\n| AI10L | 16 |\n| AI12L | 17 |\n| AI14L | 18 |\n| IGND | 19 |\n| 20 | 20 |\n| 21 | 21 |\n| 22 | 22 |\n| 23 | 23 |\n| 24 | 24 |\n| 25 | 25 |\n| 26 | 26 |\n| 27 | 27 |\n| 28 | 28 |\n| 29 | 29 |\n| 30 | 30 |\n| 31 | 31 |\n| 32 | 32 |\n| 33 | 33 |\n| 34 | 34 |\n| 35 | 35 |\n| 36 | 36 |\n| 37 | 37 |\n| AI1H | 21 |\n| AI3H | 22 |\n| AI5H | 23 |\n| AI7H | 24 |\n| AI9H | 25 |\n| AI11H | 26 |\n| AI13H | 27 |\n| AI15H | 28 |\n| IGND | 29 |\n| IGND | 30 |\n| AI1L | 31 |\n| AI3L | 32 |\n| AI5L | 33 |\n| AI7L | 34 |\n| AI9L | 35 |\n| AI11L | 36 |\n| AI13L | 37 |\n| AI15L | 37 |](.pci-9113a-manual-3/923c282af0ac336452fa14a9d08f279bb374fa19eb494c7fa0cd466e4e2ba2c5.jpg) Figure 2.2 Pin Assignment of CN1 Legend: AIn: Analog Input Channel #n (for single-ended, n=0\~31) AixH: Analog Input Channel #x (for differential positive input, x=0\~15) Aix: Analog Input Channel #x (for differential negative input, x=0\~15) IGND: Isolated Signal Ground JP1: Timer Signals ![JP1\nVCC\nCLK0\nG0\nGND\nOUT0](.pci-9113a-manual-3/6f7250b44ce60d0470047e9a585a76c5a406456ee5fd44ea9b3bf517bc93ed01.jpg) Figure 2.3 Pin Assignment of JP1 Legend: Vcc: +5V Power Supply CLK0: Clock Source for Counter 0 G0: Gate Input for Counter 0 OUT0: Counter/Timer Output for Counter 0 GND: Ground Plane # 2.8 Daughter Board Connection The PCI-9113A can be connected with several different daughter boards, including ACLD-9881, ACLD-9137 and ACLD-9188. The functionality and connections are specified as follows. # 2.8.1 Connect with ACLD-9881 The ACLD-9881 has a 37-pin D-sub connector, which can connect with PCI-9113A through 37-pin assemble cable. The ACLD-9881 provides low pass filter for the 32 channels, it is very flexible for wiring. # 2.8.2 Connect with ACLD-9137 The ACLD-9137 is a direct connector for the card, which is equipped with 37-pin D-sub connector. This board provides a simple way for connection. It is very suitable for the simple applications that do not need complex signal condition before the A/D conversion is performed. # 2.8.3 Connect with ACLD-9188 ACLD-9188 is general-purpose terminal boards for the entire card, which comes equipped with 37-pin D-sub connector. # 3 # Registers Format The detailed descriptions of the registers format of the PCI-9113A are specified in this chapter. This information is quite useful for the programmers who wish to handle the card by low-level programming. In addition, users can understand how to use software driver to manipulate this card after understanding the registers' structure of the PCI-9113A. The PCI-9113A functions as a 32-bit PCI target device to any master on the PCI bus. There are three types of registers on the PCI-9113A: PCI Configuration Registers (PCR), Local Configuration Registers (LCR) and PCI-9113A registers. The PCR, which compliant to the PCI-bus specifications, is initialized and controlled by the plug & play (PnP) PCI BIOS. User's can study the PCI BIOS specification to understand the operation of the PCR. Please contact with PCISIG to acquire the specifications of the PCI interface. The LCR is specified by the PCI bus controller PLX-9050, which is provided by PLX technology Inc. (www.plxtech.com). It is not necessary for users to understand the details of the LCR if you use the software library. The base address of the LCR is assigned by the PCI PnP BIOS. The assigned address is located at offset 14h of PCR. # 3.1 I/O Port Address The PCI-9113A registers are shown in the Table 3.1. The base address of the PCI-9113A registers is also assigned by the PCI p&p BIOS. The assigned base address is located at offset 18h of PCR. Note that most of the PCI-9113A registers are 16 bits. The users can access these registers by 16 bits I/O instructions. There is one 32 bits register on PCI-9113A. The 32 bits register occupied another LCR address space, that is, base address #2. The base address is allocated by PCI BIOS and is stored at offset 1Ch of PCR. Users can read the PCR to get the LCR base address and the two PCI-9113A base addresses by using the PCI BIOS function call.
I/O Base Address #1WriteRead
Base + 00hAD MUX channel no.AD FIFO value
Base + 02hAD range controlAD status read back
Base + 04hAD trigger modeAD trigger mode
Base + 06hInterrupt controlInterrupt setting Read Back
Base + 08hSoftware AD trigger--
Base + 0AhClear H/W IRQ--
Base+20h8254 Counter #08254 Counter #0
Base+22h8254 Counter #18254 Counter #1
Base+24h8254 Counter #28254 Counter #2
Base+26h8254 mode control8254 mode control
I/O Base Address #2WriteRead
Base 2 + 00h--AD data and channel number
Table 3.1 I/O Address # 3.2 A/D Data Registers The PCI-9113A A/D data is stored in the FIFO after conversion. The data can be transferred to host memory by software only. The register is 12 bits and can be read by 16 bits I/O command. Address: BASE + 0 Attribute: read only Data Format:
Bit76543210
BASE+0AD7AD6AD5AD4AD3AD2AD1AD0
BASE+1xxxxAD11AD10AD9AD8
AD11\~AD0: Analog to digital data. AD11 is the Most Significant Bit (MSB) of PCI-9113A. AD0 is the Least Significant Bit(LSB). # 3.3 A/D Channel Control Register The PCI-9113A provides 32 analog input channels. The channel control register is used to set the A/D channel to be converted. The 5 LSBs of this register control the channel number. Under non-auto scanning mode, the register sets the channel number for conversion. Under auto-scanning mode, the register set the ending channel number. Address: BASE + 0 Attribute: write only Data Format:
Bit76543210
BASE+0xxxCN4CN3CN2CN1CN0
BASE+1xxxxxxxx
CNn: multiplexer channel number. CN4 is MSB, and CN0 is LSB. # 3.4 A/D Input Signal Range Control Register The A/D range register is used to adjust the analog input ranges. This register directly controls the PGA (programmable gain amplifier). When a different gain value is set, the analog input range will be changed to its corresponding value. Address: BASE + 2 Attribute: write only Data Format:
Bit76543210
BASE+2XXXXXXGC1GC0
BASE+3XXXXXXXX
GC0\~GC1: A/D Range control setting The relationship between gain setting and its corresponding A/D range is listed in the table below.
G2G1GAINAnalog Input Range
Bi-PolarUni-Polar
001±10V±5V10 V
0110±1V±500mV1V
10100±100mV±50mV100mV
# 3.5 A/D Status Readback Register The A/D FIFO status can be read back from this register. Address: BASE + 2 Attribute: read only Data Format:
Bit76543210
BASE+2XXXXAD_BUSYFF_FFFF_HFFF_EF
BASE+3XXXXXXXX
FF\_EF: '0' means FIFO is empty FF\_HF: '0' means FIFO is half-full FF\_FF: '0' means FIFO is full, A/D data may have been loss AD\_BUSY: '0' means AD is busy, the A/D data has not been latched in FIFO yet. If AD\_BUSY changes from '0' to '1', A/D data is written into FIFO. # 3.6 A/D Trigger Mode Control and Readback Register This register is used to control or read back the A/D trigger control setting and the A/D range setting. Address: BASE + 4 Attribute: write and read Data Format:
Bit76543210
BASE+4XXXXG1G0TSSELASCAN
BASE+5XXXXXXXX
G0\~G1: A/D range setting, read back (only) TSSEL: Timer Pacer / Software Trigger 1: Timer Pacer Trigger 0: Software Trigger ASCAN: Auto Scan Control 1: Auto Scan ON 0: Auto Scan OFF # 3.7 Software Trigger Register To generate a trigger pulse to the PCI-9113A for A/D conversion, you just write any data to this register, then the A/D converter will be triggered. Address: BASE + 8 Attribute: write only Data Format:
Bit76543210
BASE+8XXXXXXXX
# 3.8 Interrupt Control and Readback Register The PCI-9113A has a dual interrupt system, thus two interrupt sources can be generated and be checked by the software. This register is used to select the interrupt sources. Address: BASE + 6 Attribute: write and read Data Format:
Bit76543210
BASE+12XXXXXFFENISC1ISC0
ISC0: IRQ0 signal select 0: IRQ on the ending of the AD conversion (EOC) 1: IRQ when FIFO is half full ISC1: IRQ1 signal select (Timer Interrupt only) FFEN: FIFO enable pin 0: FIFO Enable (Power On Default value) 1: FIFO Disable (To reset FIFO, set FFEN sequence as 0 -> 1 -> 0) # 3.9 Hardware Interrupt Clear Register Because the PCI interrupt signal is level trigger, the interrupt clear register must be written to clear the flag after processing the interrupt request event; otherwise, that another interrupt request is inserted will cause the software to hang on processing the interrupt event. Address: BASE + 0Ah Attribute: write only Data Format:
Bit76543210
BASE+0AhXXXXXXXX
# 3.10 A/D Data and Channel Number Registers The PCI-9113A A/D data and channel number is stored in the FIFO. Reading this register by a 32-bit I/O instruction can read back the data and channel number simultaneously. Address: BASE 2 + 0 Attribute: read only Data Format:
Bit76543210
BASE2+0AD7AD6AD5AD4AD3AD2AD1AD0
BASE2+1xXxxAD11AD10AD9AD8
BASE2+2xXxCN4CN3CN2CN1CN0
BASE2+3xXxxxxxx
AD11\~AD0: Analog to digital data. AD11 is the Most Significant Bit (MSB) of PCI-9113A. AD0 is the Least Significant Bit (LSB). CN4\~CN0: Channel number # 3.11 Timer/Counter Register The 82C54 chip occupies 4 I/O address locations in the PCI-9113A as shown below. Users can refer to 82C54 data sheet for the descriptions about all the features of 82C54. You can download the data sheet on the following web site: http://support.intel.com/support/controllers/peripheral/231164.htm or http://www.tundra.com/, the condensed information is specified in Appendix A. Address: BASE + 20h \~ BASE + 26h Attribute: read / write Data Format:
Base + 20hCounter 0 Register (R/W)
Base + 22hCounter 1 Register (R/W)
Base + 24hCounter 2 Register (R/W)
Base + 26h8254 CONTROL BYTE (W)
# 3.12 High Level Programming To operate the PCI-9113A, you can bypass the detailed register structures and use the high-level application programming interface (API) to control your PCI-9113A card directly. The software libraries, DOS library for Borland C++, and DLL for Windows 95 are included in the ADLINK's "Manual & Software Utility" CD. Please refer to chapter 6 for more detailed information. # 4 # Operation Theorem The operation theorem of the functions on PCI-9113A card is described in this chapter. The operation theorem can help you to understand how to manipulate or to program the PCI-9113A. # 4.1 A/D Conversion Before programming the PCI-9113A to perform the A/D conversion, you should understand the following issues: ● A/D conversion procedure ● A/D signal source control ● A/D trigger source control ● A/D data transfer mode - Interrupt System (refer to section 5.2) ● A/D data format Note: Because some of the A/D data transfer modes will use the system interrupt resource, the users have to understand the interrupt system (section 4.2) in the same time. # 4.1.1 A/D Conversion Procedure For using the A/D converter, users must know about the property of the signal to be measured at first. The users can decide which channels to be used and connect the signals to the PCI-9113A. Refer to the chapter 3 'Signal Connection'. In addition, users should define and control the A/D signal sources, including the A/D channel, A/D gain, and A/D signal types. Please refer to section 4.1.2. For A/D signal source control. After deciding the A/D signal source, the user must decide how to trigger the A/D conversion and define/control the trigger source. The A/D converter will start to convert the signal to a digital value when a trigger signal is rising. Refer to the section 4.1.3 for the two trigger sources. The A/D data should be transferred into PC's memory for further using or processing. The data can be read by I/O instruction, which is handled directly by software or transferred to memory via interrupt. Please refer to section 4.1.4 to obtain ideas about the multi-configurations for A/D data transfer. To process A/D data, programmer should know about the A/D data format. Refer to section 4.1.5 for details. # 4.1.2 A/D Signal Source Control To control the A/D signal source, the signal type, signal channel and signal range should be considered. # Signal Type The PCI-9113A provides 32 single-ended or 16 different analog input signals which can be converted to digital value by the A/D converter. To avoid ground loops and get more accurate measurement of A/D conversion, it is quite important to understand the signal source type. The single-ended mode has only one input relative to ground and is suitable for connecting with the floating signal source. The floating source means it does not have any connection to real ground. Figure 4.1 shows the single-ended connection. Note that when more than two floating sources are connected, the sources must be with common ground. ![Based on the provided diagram, here is the accurate and concise description of the blocks and connections:\n\n**Labeled Blocks and Text:**\n* **Signal Source**: A label pointing to two circles containing sine waves.\n* **V1** and **V2**: Labels inside the first two circles.\n* **...** (ellipsis): Indicates intermediate signals between V2 and the multiplexer inputs.\n* **AIn**: A label above a vertical bar representing input terminals.\n* **n = 0, ..., 31**: Text below the input bar, indicating the channel count.\n* **IGND**: A label at the bottom of the input bar.\n* **Input Multiplexer**: A label below a rectangle.\n* **Operational Amplifier**: A label above a triangle.\n* **To A/D**: Text to the right of the amplifier.\n\n**Connections:**\n* **Signal Source** connections: Lines from circles **V1** and **V2** connect to the top terminals of the vertical bar labeled **AIn**.\n* **Input Multiplexer** connections: Multiple horizontal lines connect the vertical bar (terminals) to the left side of the rectangle labeled **Input Multiplexer**. The bottom terminal labeled **IGND** connects via a line to a ground symbol (inverted triangle).\n* **Operational Amplifier** connections: A single line connects the right side of the **Input Multiplexer** to the left side of the triangle labeled **Operational Amplifier**.\n* **Output**: A line extends from the right side of the **Operational Amplifier** to the text **To A/D**.](.pci-9113a-manual-3/82dad8f258bf16643ccb239627e1aa04da960c2ae9d0cf5c34eca24beda584f0.jpg) Figure 4.1: Signal sources and single-ended connection The differential input (DI) mode means the voltage signal to be measured is by a pair of signals, for example, AI3L and AI3H is a differential pair. The AD circuits measure the voltage difference between the differential pair. The common mode noise can be reduced under this mode. Note that the differential signal pair should be still common ground to the isolation ground plane. Figure 4.2 shows the differential analog signal input connection. ![x = 0, ..., 15\nDifferential\nSignal\nSource\nAIXH\nAIXL\nIGND\nVcm = VG1 - VG2\nTo A/D\nVG1\nVG2](.pci-9113a-manual-3/6fab7d52e635daf897a6aa355e730a05dba1ef3aff887c6a6bed5dd9beb1b135.jpg) Figure 4.2: Grounded source and differential input # Signal Conditioning Three are 32 SE A/D channels on board. The R/C filters (attenuantors) are on board for every channel. The RC circuits for each channel is shown in the following diagram, where 'n' is the channel number. User can install the R, C for special purpose such as attenuating the voltage to increase the input voltage range. ![Analog Input RAn To Multiplexer\nChannel #n 0. Ohm Channel\nRBn CAn\nOPEN OPEN OPEN](.pci-9113a-manual-3/c6b9e015cbee6f308493d35d50a10f7b8a7c167b01932db10090804d495d61c4.jpg) The RC network can also be used as current sensor, which transfers the current into voltage. To get the ground reference level, user can cut-off RA and let RB = 0 Ohm, thus grounding the input signal. The users can use the ground input to calibrate the offset voltage by software. # Signal Channel Control There are two ways to control the channel number. The first one is the software programming and the second one is the auto channel scanning which is controlled by the ASCAN bit in AD trigger mode control register. As ASCAN is cleared (0), the value of AD channel Control register defines the channel to be selected. As ASCAN is set 1, the value in AD channel control register defines the ending channel number of auto-scanning operation. Under auto scan mode, the channel is scanning from channel 0 to the ending channel. Whenever a trigger signal is rising, the channel number to be selected will increase automatically. For example, if the ending channel number is 3, the auto channel scanning sequence is 0,1,2,3,0,1,2,3, ..., until the ASCAN bit is cleared. # Signal Range The proper signal range is important for data acquisition. The input signal may be saturated if the A/D gain is too large. Sometimes, the resolution may be not enough if the signal is small. The maximum A/D signal range of PCI-9113A is $\pm10$ volts when the A/D gain value is 1. The A/D gain control register controls the maximum signal input range. The signal gain is programmable with 4 levels (1,10,100,1000 $^{*}$ ). The signal range of the 32 channels will be identical all the time even if the channel number is scanning. The available signal polarity on PCI-9113A are bi-polar and uni-polar configuration. Note: Gain value of 1000 is programmable, however, the accuracy is not guaranteed. # 4.1.3 A/D Trigger Source Control The A/D conversion is started by a trigger source, and then the A/D converter will start to convert the signal to a digital value. In PCI-9113A, two internal sources can be selected: the software trigger or the timer pacer trigger. The A/D operation mode is controlled by A/D trigger mode register. Total two trigger sources are provided in the PCI-9113A. The different trigger conditions are specified as follows: # Software trigger (TSSEL=0) The trigger source is software controllable in this mode. That is, the A/D conversion is starting when any value is written into the software trigger register. This trigger mode is suitable for low speed A/D conversion. Under this mode, the timing of the A/D conversion is fully controlled by software. However, it is difficult to control the fixed A/D conversion rate unless another timer interrupt service routine is used to generate a fixed rate trigger. Refer to interrupt control section (section 4.2) for fixed rate timer interrupt operation. # Timer Pacer Trigger (TSSEL=1) An on-board timer / counter chip 8254 is used to provide a trigger source for A/D conversion at a fixed rate. Two counters of the 8254 chip are cascaded together to generate trigger pulse with precise period. Please refer to section 4.3 for 8254 architecture. This mode is ideal for high speed A/D conversion. It can be combined with the FIFO half-full interrupt or EOC interrupt to transfer data. It is also possible to use software FIFO polling to transfer data. The A/D trigger, A/D data transfer and Interrupt can be set independently. Most of the complex applications can thus be covered. It's recommended using this mode if your applications need a fixed and precise A/D sampling rate. # 4.1.4 A/D Data Transfer Modes The A/D data are buffered in the FIFO memory. The FIFO size on PCI-9113A is 1024 (1K) words. If the sampling rate is 10 KHz, the FIFO can buffer 102.4 ms analog signal. After the FIFO is full, the lasting coming data will be lost. The software must read out the FIFO data before it becomes full. The data must be transferred to host memory after the date is ready and before the FIFO is full. On the PCI-9113A, many data transfer modes can be used. The different transfer modes are specified as follows: # Software Data Polling The software data polling is the easiest way to transfer A/D data. This mode can be used with software A/D trigger mode. After the A/D conversion is triggered by software, the software should poll the FF\_EF bit of the A/D status register until it becomes low level. If the FIFO is empty before the A/D start, the FF\_EF bit will be low. After the A/D conversion is completed, the A/D data is written to FIFO immediately, thus the FF\_EF becomes high. You can consider the FF\_EF bit as a flag to indicate the converted data ready status. That is, FF\_EF is high means the data is ready. Note that, while A/D is converted, the ADBUSY bit is low. After A/D conversion, the ADBUSY becomes high to indicate not busy. Please do NOT use this bit to poll the AD data. It is possible to read A/D converted data without polling. The A/D conversion time will not exceed $8.5\mu s$ on PCI-9113A card. Hence, after software trigger, the software can wait for at least 8.5μs and then read the A/D register without polling. The data polling transfer is very suitable for the application that needs to process AD data in real time. Especially, when combining with the timer interrupt generation, the timer interrupt service routine can use the data polling method to get multi-channel A/D data in real time and with the fixed data sampling rate. # FIFO Half-Full Polling The FIFO half-full polling mode is the most powerful AD data transfer mode. The 1 K words FIFO can be stored up to 10.24 ms analog data under 100 KHz sampling rate (10.024ms = 1024 / 100 KHz). Theoretically, the software can poll the FIFO every 10 ms without taking care how to trigger A/D or transfer A/D data. It's recommend that users check your system to find out the user software's priority in the special application. If the application software is at the highest priority, polling the FIFO every 10 ms is suitable. However, the user's program must check the FIFO is full or empty every time reading data. To avoid this problem, the half-full polling method is used. If the A/D trigger rate is 100KHz, the FIFO will be half-full (512 words) in 5.12 ms. If the user's software checks the FIFO half full signal every 5 ms and the FIFO is not half-full, the software does not read data. When the FIFO is full, the AD FIFO is overrun. That means the sampling rate is higher than users' expect or the polling rate is too slow. It is also possible due to your system occupy the CPU resource thus reducing the polling rate. When the FIFO is half-full and not full, the software can read one "block" (512 words) A/D data without checking the FIFO status. This method is very convenient to read A/D in size of a "block" and it is benefit to software programming. Usually, the timer trigger is used under this mode, therefore the sampling rate is fixed. The method also utilizes the minimum CPU resources because it is not necessary to be the highest priority. The other benefit is this method will not use hardware interrupt resource. Therefore, the interrupt is reserved for system clock or emergency external interrupt request. The FIFO half-full polling method is the most powerful A/D data transfer mode. # EOC Interrupt Transfer The PCI-9113A provides traditional hardware end-of-conversion (EOC) interrupt capability. Under this mode, an interrupt signal is generated when the A/D conversion is ended and the data is ready to be read in the FIFO. It is useful to combine the EOC interrupt transfer with the timer pacer trigger mode. After A/D conversion is completed, the hardware interrupt will be inserted and its corresponding ISR (Interrupt Service Routine) will be invoked and executed. The ISR program can read the converted data. This method is most suitable for data processing applications under real-time and fixed sampling rate # FIFO Half-Full Interrupt Transfer Sometimes, the applications do not need real-time processing, but the foreground program is too busy to poll the FIFO data. The FIFO half-full interrupt transfer mode is useful for the situation mentioned above. In addition, as the external A/D trigger source is used, the sampling rate may be not easy to predict, and then the method could be applied. Because the CPU is only interrupted when the FIFO is half-full, thus reserved the CPU load. Under this mode, an interrupt signal is generated when FIFO becomes half-full. It means there are 512 words data in the FIFO already. The ISR can read a block of data every interrupt occurring. This method is very convenient to read A/D in size of a “block” (512 words) and it is benefit for software programming. # 4.1.5 A/D Data Format The range of A/D data read from the FIFO port is from 0 to 4095. As the A/D gain is 1, the A/D signal range is roughly -10V \~ +10V or -5V\~+5V (bi-polar) and 0V\~+10V (uni-polar). The relationship between the voltage and the value is shown in the following table:
A/D Data (Hex) Direct BinaryUnsigned Decimal ValueVoltage (Volts)
BipolarUnipolar
±10V±5V0~10V
FFF4095+9.9951+4.9975+9.9951
C003072+5.0000+2.5000+7.5000
8012049+0.0049+0.0025+5.0049
80020480.00000.0000+5.0000
7FF2047-0.0049-0.0025+4.9951
4001024-5.0000-2.5000+2.5000
0000-10.0000-5.00000.0000
A/D Data (Hex) 2's ComplementSigned Decimal ValueVoltage (Volts)
BipolarUnipolar
±10V±5V0~10V
7FF2047+9.9951+4.9975+9.9951
4001024+5.0000+2.5000+7.5000
0010001+0.0049+0.0025+5.0049
00000000.00000.0000+5.0000
FFF-0001-0.0049-0.0025+4.9951
C00-1024-5.0000-2.5000+2.5000
800-2048-10.0000-5.00000.0000
The formula between the A/D data and the analog value is # Direct Binary Coding: Bipolar ±10V: Voltage = (AD\_Data \* 20) / (4096 \* gain) - (10 / gain) Bipolar ±5V: Voltage = (AD\_Data \* 10) / (4096 \* gain) - (5 / gain) Unipolar +10V: Voltage = ( AD\_Data \* 10 ) / ( 4096 \* gain ) # 2's Complement Coding: Bipolar ±10V: Voltage = (AD\_Data \* 20) / (4096 \* gain) Bipolar ±5V: Voltage = (AD\_Data \* 10) / (4096 \* gain) Unipolar +10V: Voltage = (AD\_Data \* 10) / (4096 \* gain) + (5 / gain) where the gain is 1,10,100. Note: For 2's complement coding, user should shift the MSB of AD\_data to be the sign bit of the corresponding signed variable, and over the variable by the shift amount to get the correct value. # 4.2 Interrupt Control # 4.2.1 System Architecture The PCI-9113A's interrupt system is a powerful and flexible system that is suitable for A/D data acquisition and many applications. The system is a Dual Interrupt System. The dual interrupt means the hardware can generate two interrupt request signals in the same time and the software can service these two request signals by ISR. Note that the dual interrupt does not mean the card occupies two IRQ levels. ![**Blocks:**\n* PCI Controller\n* IRQ Flip-Flops\n* INT1 MUX\n\n**Connections:**\n* **INT #A**: An arrow pointing left from the PCI Controller.\n* **INT1**: An arrow pointing left from the IRQ Flip-Flops to the PCI Controller.\n* **INT2**: An arrow pointing right from the PCI Controller to the IRQ Flip-Flops.\n* **AD EOC FIFO**: An arrow pointing left into the INT1 MUX.\n* **Half-full**: An arrow pointing left into the INT1 MUX.\n* **Timer Pacer**: An arrow pointing left into the IRQ Flip-Flops.\n* **Clear IRQ**: An arrow pointing up into the bottom of the IRQ Flip-Flops.\n* An unlabeled arrow pointing left from the INT1 MUX to the IRQ Flip-Flops.](.pci-9113a-manual-3/867183a0a5f6abc66906e853ae87bd6feb6c33939054c0897a69d4fa49efe11b.jpg) Figure 4.2.1 Dual Interrupt System of PCI-9113A The two interrupt request signals (INT1 and INT2) come from digital signals or the timer / counter output. An interrupt source multiplexer (MUX) is used to select the IRQ sources. Fig 4.2.1 shows the interrupt system. # 4.2.2 IRQ Level Setting There is only one IRQ level used by this card, although it is a dual interrupt system. This card uses INT #A interrupt request signal to PCI bus. The motherboard circuits will transfer INT #A to one of the AT bus IRQ levels. The IRQ level is set by the PCI plug and play BIOS and saved in the PCI controller. It is not necessary for users to set the IRQ level. # 4.2.3 Dual Interrupt System The PCI controller of PCI-9113A can receive two hardware IRQ sources. However, a PCI controller can generate only one IRQ to PCI bus, the two IRQ sources should be distinguished by ISR of the application software if the two IRQ are all used. The application software can use the “\_9113A\_Get\_Irq\_Status” function to distinguish which interrupt is inserted. After servicing an IRQ signal, users should check if another IRQ is also asserted and then clear current IRQ to allow the next IRQ occurring. The two IRQs are named as INT1 and INT2. INT1 comes from AD EOC or the FIFO half-full flag. INT2 comes from timer's pacer output only. The sources of INT1 and INT2 are selective by the Interrupt Control (ISC) Register. Because of dual interrupt system, for example, you can use FIFO half-full and external interrupt at the same time if your software ISR can distinguish these two events. # 4.2.4 Interrupt Source Control There are two bits to control the IRQ sources of INT1 and INT2. Refer to section 4.9 for the details of the two bits. In addition, the PCI controller itself can also control the use of the interrupt. For manipulating the interrupt system more easily, ADLINK recommends you to use the function \_9113A\_INT\_Source\_Control to control the IRQ source so that you can disable one or two of the IRQ sources. Note that even you disable all the two IRQ sources without changing the initial condition of the PCI controller, the PCI BIOS still assigns an IRQ level to the PCI card and it will occupy the PC resource. It is not suggested to re-design the initial condition of the PCI card by users' own application software. If users want to disable the IRQ level, please use the ADLINK's software utility to change the power on interrupt setting. # 4.3 Timer/Counter Operation The PCI-9113A has an interval timer/counter 8254 on board. Please refer to section 2.7 for the signal connection and the configuration of the counters. # 4.3.1 Introduction One 8254 programmable timer/counter chip is installed in PCI-9113A. There are three counters in one 8254 chip and 6 possible operation modes for each counter. Timer #1 and Timer #2 are used for periodically triggering the A/D conversion, and Counter #0 is left free for user applications. Appendix A specifies condensed information about the 8254 features. The block diagram of the timer/counter system is shown in following diagram. ![Based on the provided flowchart, here is the accurate description of the labeled blocks and their connections:\n\n**Labeled Blocks:**\n* **Main Block:** '8254 Chip' (containing three sub-blocks)\n* **Sub-blocks:** 'Counter #0', 'Timer #1', 'Timer #2'\n* **Input/Output Labels:** 'CLK0', 'G0', 'OUT0', '2 MHz Clock', 'Timer Pacer', ''H'' (appears twice)\n* **Internal Terminals:** 'C', 'G', 'O' (present in each sub-block)\n\n**Connections:**\n* **Counter #0:**\n * Input 'C' connects to 'CLK0'.\n * Input 'G' connects to 'G0'.\n * Output 'O' connects to 'OUT0'.\n* **Timer #1 & Timer #2 (Clock & Gate Inputs):**\n * The '2 MHz Clock' line splits and connects to the input 'C' of both 'Timer #1' and 'Timer #2'.\n * The input 'G' of 'Timer #1' and the input 'G' of 'Timer #2' are connected together at a common node labeled ''H''.\n* **Timer #1 & Timer #2 (Feedback & Output):**\n * The output 'O' of 'Timer #2' loops back and connects to the common ''H'' node (specifically feeding into the 'G' input of 'Timer #1').\n * The output 'O' of 'Timer #1' connects to 'Timer Pacer'.](.pci-9113a-manual-3/17b0643ae4d641ca399597c42ac4b5689aee8124ac41dfe96d8d5585c1021f4b.jpg) Figure 4.3.1 Timer/Counter System of PCI-9113A. # 4.3.2 Pacer Trigger Source The timer #1 and timer #2 are cascaded together to generate the timer pacer trigger of A/D conversion. The frequency of the pacer trigger is software controllable. The maximum pacer signal rate is 2MHz/4=500K which excess the maximum A/D conversion rate of the PCI-9113A (100KHz). The minimum signal rate is 2MHz/65535/65535, which is a very slow frequency that user may never use it. The output of the programmable timer can be used as the pacer interrupt source or the timer pacer trigger source of A/D conversion. In software library, the timer #1 and #2 are always set as mode 2 (rate generator) or mode 3. # 5 # C/C++ Software Library This chapter describes the software library for operating this card. Only the functions in DOS library and Windows 95 DLL are described. Please refer to the PCIS-DASK function reference manual, which included in ADLINK CD, for the descriptions of the Windows 98/NT/2000 DLL functions. The function prototypes and some useful constants are defined in the header files LIB directory (DOS) and INCLUDE directory (Windows 95). For Windows 95 DLL, the developing environment can be Visual Basic 4.0 or above, Visual C/C++ 4.0 or above, Borland C++ 5.0 or above, Borland Delphi 2.x (32-bit) or above, or any Windows programming language that allows calls to a DLL. It provides the C/C++, VB, and Delphi include files. # 5.1 Libraries Installation Please refer to the "Software Installation Guide" for the detail information about how to install the software libraries for DOS, or Windows 95 DLL, or PCIS-DASK for Windows 98/NT/2000. The device drivers and DLL functions of Windows 98/NT/2000 are included in the PCIS-DASK. Please refer the PCIS-DASK user's guide and function reference, which included in the ADLINK CD, for detailed programming information. # 5.2 Programming Guide # 5.2.1 Naming Convention The functions of the NuDAQ PCI cards or NuIPC CompactPCI cards' software driver are using full-names to represent the functions' real meaning. The naming convention rules are: # In DOS Environment: \_{hardware\_model}\_{action\_name}. e.g. \_9113\_Initial(). All functions in PCI-9113 driver are with 9113 as {hardware\_model}. In order to recognize the difference between DOS library and Windows 95 library, a capital "W" is put on the head of each function name of the Windows 95 DLL driver. e.g. W\_9113\_Initial(). # 5.2.2 Data Types We defined some data type in Pci\_9113.h (DOS) and Acl\_pci.h (Windows 95). These data types are used by NuDAQ Cards' library. We suggest you to use these data types in your application programs. The following table shows the data type names and their range.
Type NameDescriptionRange
U88-bits ASCII character0 to 255
I1616-bits signed integer-32768 to 32767
U1616-bits unsigned integer0 to 65535
I3232-bits signed integer-2147483648 to 2147483647
U3232-bits unsigned integer0 to 4294967295
F3232-bits single-precision floating-point-3.402823E38 to 3.402823E38
F6464-bits double-precision floating-point-1.797683134862315E308 to 1.797683134862315E309
BooleanBoolean logic valueTRUE, FALSE
# 5.3 \_9113\_Initial @ Description This function is used to initialize PCI-9113A card. Every PCI-9113A card has to be initialized by this function before calling other functions. @ Syntax C/C++ (DOS) U16 \_9113\_Initial (U16 \*existCards, PCI\_INFO \*info) C/C++ (Windows 95) U16 W\_9113\_Initial (U16 \*existCards, PCI\_INFO \*info) Visual Basic (Windows 95) W\_9113\_Initial (existCards As Integer, info As PCI\_INFO) As Integer @ Argument existCards: numbers of existing PCI-9113A cards info: relative information of the PCI-9113A cards @ Return Code ERR\_NoError ERR\_BoardNoInit ERR\_PCIBiosNotExist # 5.4 \_9113\_Software\_Reset @ Description This function is used to reset the I/O port configuration. Note that this function cannot re-start the PCI bus and all the hardware setting won't be changed neither. @ Syntax C/C++ (DOS) void \_9113\_Software\_Reset (U16 cardNo) C/C++ (Windows 95) void W\_9113\_Software\_Reset (U16 cardNo) Visual Basic (Windows 95) W\_9113\_Software\_Reset (ByVal cardNo As Integer) @ Argument cardNo: The card number of initialized PCI-9113A card @ Return Code None # 5.5 \_9113\_AD\_Read\_Data # @ Description This function is used to read the A/D conversion data from A/D Data register. The resolution of A/D conversion data is 12 bits. # @ Syntax ```csv C/C++ (DOS) U16 9113_AD_Read_Data (U16 cardNo, U16 far *ADData) C/C++ (Windows 95) U16 W_9113_AD_Read_Data (U16 cardNo, U16 *ADData) Visual Basic (Windows 95) W_9113_AD_Read_Data (ByVal cardNo As Integer, ADData As Integer) As Integer ``` # @ Argument cardNo: The card number of initialized PCI-9113A card. ADData: A/D converted value. The resolution of AD data is 12-bit. The bit 0 of ADData is the LSB of A/D converted data and the bit 11 of ADData is the MSB of A/D converted data. Please refer to section 4.1.5 for the relationship between the voltage and the digital value. # @ Return Code ERR\_NoError # 5.6 \_9113\_AD\_Read\_Data\_Repeat # @ Description This function is used to read the A/D conversion data from the data register n times continuously. # @ Syntax ```csv C/C++ (DOS) U16_9113_AD_Read_Data_Repeat (U16 cardNo, I16 far *ADData, U16 n) C/C++ (Windows 95) U16 W_9113_AD_Read_Data_Repeat (U16 cardNo, I16 *ADData, U16 n) ``` # Visual Basic (Windows 95) ```txt W_9113_AD_Read_Data_Repeat (ByVal cardNo As Integer, ADData As Integer, ByVal n As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized ADData: A/D converted value. The resolution of A/D data is 12-bit. The bit 0 of ADData is the LSB of A/D converted data and the bit 11 of ADData is the MSB of A/D converted data. Please refer to section 4.1.5 for the relationship between the voltage and the value. n: The number of times to read the A/D conversion data. # @ Return Code ```txt ERR_NoError ``` # 5.7 \_9113\_AD\_Read\_Data\_MUX # @ Description This function is used to read data from A/D Data and Channel Number Register. The A/D Data and Channel Number Register is a 32-bit register. Please refer to section 4.10 for the description of A/D Data and Channel Number Register. # @ Syntax ```txt C/C++ (DOS) U16 _9113_AD_Read_Data_MUX (U16 cardNo, U32 far *ADData) C/C++ (Windows 95) U16 W_9113_AD_Read_Data_MUX (U16 cardNo, U32 *ADData) Visual Basic (Windows 95) W_9113_AD_Read_Data_MUX (ByVal cardNo As Integer, ADData As Long) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. ADData: A/D converted value. The resolution of A/D conversion data is 12 bits. The unsigned integer data format of ADData is as follows: Every 32-bit unsigned integer data: bit 0...11: A/D converted data bit 16, 17, ..., 20: converted channel no. Please refer to section 4.1.5 for the relationship between the voltage and the value. # @ Return Code ```txt ERR_NoError ``` # 5.8 \_9113\_AD\_Read\_Data\_Repeat\_MUX # @ Description This function is used to read data from A/D Data and Channel Number Register n times continuously. The A/D Data and Channel Number Register is a 32-bit register. Please refer to section 4.10 for the description of A/D Data and Channel Number Register. # @ Syntax ```csv C/C++ (DOS) U16 _9113_AD_Read_Data_Repeat_MUX (U16 cardNo, U32 far *ADData, U16 n) ``` C/C++ (Windows 95) ```txt U16 W_9113_AD_Read_Data_Repeat_MUX (U16 cardNo, U32 *ADData, U16 n) ``` C/C++ (Windows 95) ```txt W_9113_AD_Read_Data_Repeat_MUX (ByVal cardNo As Integer, ADData As Long, ByVal n As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized ADData: A/D converted value. The resolution of A/D conversion data is 12 bits. The unsigned integer data format of ADData is as follows: Every 32-bit unsigned integer data: bit 0...11: A/D converted data bit 16, 17, ..., 20: converted channel no. Please refer to section 4.1.5 to learn the relationship between the voltage and the value. n: The timer of times to read the AD conversion data. # @ Return Code ERR\_NoError # 5.9 \_9113\_AD\_Set\_Channel # @ Description This function is used to set A/D channel by means of writing data to the channel control register. There are 32 single-ended A/D channels in PCI-9113A. Therefore the channel number could be set between 0 to 31. Under non-auto scan mode, the ADChannelNo stores the channel number setting. Under auto-scan mode, the ADChannelNo records the channel number of ending channel. # @ Syntax C/C++ (DOS) ```txt U16 9113_AD_Set_Channel (U16 cardNo, U16 ADChannelNo) ``` C/C++ (Windows 95) ```txt U16 W_9113_AD_Set_Channel (U16 cardNo, U16 ADChannelNo) ``` Visual Basic (Windows 95) ```txt W_9113_AD_Set_Channel (ByVal cardNo As Integer, ByVal ADChannelNo As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. ADChannelNo: The selected channel number or the ending channel number to perform A/D conversion. # @ Return Code ```txt ERR_NoError ``` # 5.10 \_9113\_AD\_Set\_Range # @ Description This function is used to set the A/D range by means of writing data to the A/D range control register. The initial value of gain is '1' which is the default setting by PCI-9113A hardware. The relationship between gain and input voltage ranges is specified by the following tables:
Input Range (V)GainGain Code
±10 VX 1AD_B_10_V
±1 VX 10AD_B_1_V
±100m VX 100AD_B_0_1_V
±5 VX 1AD_B_5_V
±500m VX 10AD_B_0_5_V
±50m VX 100AD_B_0_05_V
0~10 VX 1AD_U_10_V
0~1 VX 10AD_U_1_V
0~100m VX 100AD_U_0_1_V
# @ Syntax C/C++ (DOS) U16 9113 AD Set Range (U16 cardNo, U16 ADRange) C/C++ (Windows 95) U16 W\_9113\_AD\_Set\_Range (U16 cardNo, U16 ADRange) Visual Basic (Windows 95) W\_9113\_AD\_Set\_Range (ByVal cardNo As Integer, ByVal ADRange As Integer) As Integer # @ Argument cardNo: The card number of PCI-9113A card initialized. ADRange: The programmable gain of A/D conversion, the possible values are: AD\_B\_10\_V, AD\_B\_1\_V, AD\_B\_0\_1\_V, AD\_B\_5\_V, AD\_B\_0\_5\_V, AD\_B\_0\_05\_V, AD\_U\_10\_V, AD\_U\_1\_V, AD\_U\_0\_1\_V, # @ Return Code ERR\_NoError # 5.11 \_9113\_AD\_Get\_Range # @ Description This function is used to get the A/D range from the A/D range control register. # @ Syntax ```csv C/C++ (DOS) U16 _9113A_AD_Get_Range (U16 cardNo, U16 *ADRange) ``` ```csv C/C++ (Windows 95) U16 W 9113A AD Get Range (U16 cardNo, U16 *ADRange) ``` # Visual Basic (Windows 95) ```txt W_9113A_AD_Get_Range (ByVal cardNo As Integer, ADRange As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. ADRange: The programmable gain of A/D conversion, the possible values are: 1, 10, and 100. ADRange=0: Gain=1 ADRange=1: Gain=10 ADRange=2: Gain=100 # @ Return Code ERR\_NoError # 5.12 \_9113\_AD\_Get\_Status # @ Description This function is used to get AD FIFO status from the A/D status readback register. # @ Syntax ```csv C/C++ (DOS) U16 9113_AD_Get_Status (U16 cardNo, U16 *ADStatus) C/C++ (Windows 95) U16 W 9113 AD Get Status (U16 cardNo, U16 *ADStatus) ``` # Visual Basic (Windows 95) ```txt W_9113_AD_Get_Status (ByVal cardNo As Integer, ADStatus As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. ADStatus: The status of AD FIFO. The AD FIFO status could be one of the following: ADSTS\_FF\_EF: FIFO is empty ADSTS FF HF: FIFO is half-full ADSTS\_FF\_FF: FIFO is full, A/D data may have been loss ADSTS\_BUSY: AD is busy, A/D data is written into FIFO. # @ Return Code ```txt ERR_NoError ``` # 5.13 \_9113\_AD\_Set\_Mode # @ Description This function is used to set A/D trigger mode. Please refer to section 4.1.3 for the detailed description of A/D trigger modes. # @ Syntax C/C++ (DOS) U16 9113 AD Set Mode (U16 cardNo, U16 ADMode) C/C++ (Windows 95) U16 W 9113 AD Set Mode (U16 cardNo, U16 ADMode) # Visual Basic (Windows 95) W\_9113\_AD\_Set\_Mode (ByVal cardNo As Integer, ByVal ADMode As Integer) As Integer # @ Argument cardNo: The card number of PCI-9113A card initialized. ADMode: The value of A/D trigger mode. The mode could be one or a combination of the following modes: A 9113 AD FIFO ENABLE A\_9113\_AD\_FIFO\_DISABLE A\_9113\_AD\_TimerTrig A\_9113\_AD\_SoftTrig A\_9113\_AD\_AutoScan # @ Return Code ERR\_NoError # 5.14 \_9113\_AD\_Get\_Mode # @ Description This function is used to get A/D mode from A/D trigger mode control register. Please refer to section 4.1.3 for the detailed description of A/D trigger modes. # @ Syntax ```csv C/C++ (DOS) U16 9113 AD Get_Mode (U16 cardNo, U16 *ADMode) C/C++ (Windows 95) U16 W 9113 AD Get Mode (U16 cardNo, U16 *ADMode) ``` # Visual Basic (Windows 95) ```txt W_9113_AD_Get_Mode (ByVal cardNo As Integer, ADMode As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. ```c ADMode: The value of A/D trigger mode The returned value could be one or a combination of the following modes: A_9113_AD_FIFO_ENABLE A_9113_AD_FIFO_DISABLE A_9113_AD_TimerTrig A_9113_AD_SoftTrig A_9113_AD_AutoScan ``` # @ Return Code ```txt ERR_NoError ``` # 5.15 \_9113\_INT\_Set\_Reg # @ Description This function is used to select the interrupt sources by writing data to interrupt control register. Please refer to section 4.8 to learn how to set the interrupt control register. # @ Syntax ```txt C/C++ (DOS) U16 _9113_INT_Set_Reg (U16 cardNo, U16 INTC) C/C++ (Windows 95) U16 W_9113_INT_Set_Reg (U16 cardNo, U16 INTC) Visual Basic (Windows 95) W_9113_INT_Set_Reg (ByVal cardNo As Integer, ByVal INTC As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. INTC: The value written to the interrupt control register. # @ Return Code ```txt ERR_NoError ``` # 5.16 \_9113\_AD\_Get\_Reg # @ Description This function is used to get the A/D mode setting and interrupt control setting by reading data from the Interrupt control read back register. The settings returned are stored in INTC. Please refer to section 4.8 for the detailed definition of each bit of the returned data. # @ Syntax ```csv C/C++ (DOS) U16 9113 INT Get Reg (U16 cardNo, U16 *INTC) ``` ```txt C/C++ (Windows 95) ``` ```csv U16 W_9113_INT_Get_Reg (U16 cardNo, U16 *INTC) ``` ```txt Visual Basic (Windows 95) ``` ```txt W_9113_INT_Get_Reg (ByVal cardNo As Integer, INTC As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. INTC: The value returned from the interrupt control register. # @ Return Code ```txt ERR_NoError ``` # 5.17 \_9113\_Reset\_FIFO # @ Description The PCI-9113A A/D data are stored in the FIFO after conversion. This function is used to reset A/D FIFO. This function should be called before performing A/D conversion to clear the old data stored in the FIFO. # @ Syntax ```c C/C++ (DOS) U16 _9113_Reset_FIFO (U16 cardNo) C/C++ (Windows 95) U16 W_9113_Reset_FIFO (U16 cardNo) Visual Basic (Windows 95) W_9113_Reset_FIFO (ByVal cardNo As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. # @ Return Code ```txt ERR_NoError ``` # 5.18 \_9113\_AD\_Soft\_Trigger # @ Description This function is used to trigger the A/D conversion by software. When this function is called, a trigger pulse will be generated and the converted data will be stored from address Base +0. # @ Syntax ```txt C/C++ (DOS) U16_9113_AD_Soft_Trigger (U16 cardNo) C/C++ (Windows 95) U16 W_9113_AD_Soft_Trigger (U16 cardNo) Visual Basic (Windows 95) W_9113_AD_Soft_Trigger (ByVal cardNo As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. # @ Return Code ```txt ERR_NoError ``` # 5.19 \_9113\_Set\_8254 @ Description This function is used to write PCI-9113A 8254 Programmable Timer. @ Syntax ```txt C/C++ (DOS) U16 9113_Set_8254 (U16 cardNo, U16 ChannelNo, U8 count) C/C++ (Windows 95) U16 W 9113 Set 8254 (U16 cardNo, U16 ChannelNo, U8 count) ``` Visual Basic (Windows 95) ```txt W_9113_Set_8254 (ByVal cardNo As Integer, ByVal ChannelNo As Integer, ByVal count As Byte) As Integer ``` @ Argument cardNo: The card number of PCI-9113A card initialized. Tmr\_ch: Port of 8254 Timer, the value is within 0 to 2. Count: The counter value. @ Return Code ```txt ERR_NoError ``` # 5.20 \_9113\_Get\_8254 # @ Description This function is used to read PCI-9113A 8254 Programmable Timer. The read value is stored in count. # @ Syntax ```javascript C/C++ (DOS) U16 9113 Get 8254 (U16 cardNo, U16 ChannelNo, U8 *count) ``` ```javascript C/C++ (Windows 95) U16 W 9113 Get 8254 (U16 cardNo, U16 ChannelNo, U8 *count) ``` # Visual Basic (Windows 95) ```txt W_9113_Get_8254 (ByVal cardNo As Integer, ByVal ChannelNo As Integer, count As Byte) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. Tmr\_ch: Port of 8254 Timer, the value is within 0 to 2. count: The value read from 8254 programmable timer, only 8 LSBs are effective # @ Return Code ```txt ERR_NoError ``` # 5.21 \_9113\_AD\_Timer # @ Description This function is used to set the Timer #1 and Timer#2. Timer#1 and Timer#2 are used as frequency dividers for generating constant A/D sampling rate dedicatedly. It is possible to stop the pacer trigger by setting any one of the dividers as 0. Since the A/D conversion rate is limited due to the conversion time of the AD converter, the highest sampling rate of the PCI-9113A can not be exceeded 100 KHz. Thus the multiplication of the dividers must be larger than 20. # @ Syntax ```csv C/C++ (DOS) U16 9113 AD Timer (U16 cardNo, U16 c1, U16 c2) ``` ```txt C/C++ (Windows 95) ``` ```txt U16 W_9113_AD_Timer (U16 cardNo, U16 c1, U16 c2) ``` ```txt Visual Basic (Windows 95) ``` ```txt W_9113_AD_Timer (ByVal cardNo As Integer, ByVal c1 As Integer, ByVal c2 As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. c1: frequency divider of timer #1 c2: frequency divider of timer #2 # @ Return Code ```txt ERR_NoError ``` # 5.22 \_9113\_Counter\_Start # @ Description The counter #0 of the PCI-9113A Timer/Counter chip can be freely programmed by the users. This function is used to program the counter #0. This counter can be used as frequency generator if internal clock is used. It also can be used as event counter if external clock is used. All the 8254 modes (six operating modes) are available. # @ Syntax ```csv C/C++ (DOS) U16 _9113 Counter_Start (U16 cardNo, U16 mode, U16 c0) C/C++ (Windows 95) U16 W_9113 Counter_Start (U16 cardNo, U16 mode, U16 c0) ``` # Visual Basic (Windows 95) ```txt W_9113_Counter_Start (ByVal cardNo As Integer, ByVal mode As Integer, ByVal c0 As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. Mode: the 8254 timer mode, the possible values are: TIMER\_MODE0, TIMER\_MODE1, TIMER\_MODE2, TIMER\_MODE3, TIMER\_MODE4, TIMER\_MODE5. Please refer to Counter/Timer 8254's reference manual for more detailed information of timer mode. c0: counter value of counter#0 # @ Return Code ERR\_NoError # 5.23 \_9113\_Counter\_Read @ Description This function is used to read the counter value of the Counter#0. @ Syntax ```txt C/C++ (DOS) U16 9113 Counter Read (U16 cardNo, U16 *c0) C/C++ (Windows 95) U16 W_9113 Counter Read (U16 cardNo, U16 *c0) Visual Basic (Windows 95) W_9113 Counter Read (ByVal cardNo As Integer, c0 As Integer) As Integer ``` @ Argument cardNo: The card number of PCI-9113A card initialized. c0: count value of counter#0 @ Return Code ERR\_NoError # 5.24 \_9113\_Counter\_Stop @ Description This function is used to stop the timer operation. The timer is set as the "One-shot" mode with counter value '0'. That is, the clock output signal will be set as high after executing this function. @ Syntax ```csv C/C++ (DOS) U16 9113 Counter_Stop (U16 cardNo, U16 *c0) C/C++ (Windows 95) U16 W_9113 Counter_Stop (U16 cardNo, U16 *c0) Visual Basic (Windows 95) U16 W_9113 Counter_Stop (ByVal cardNo As Integer, c0 As Integer) As Integer ``` @ Argument cardNo: The card number of PCI-9113A card initialized. c0: the current counter value of the Counter#0 @ Return Code ERR\_NoError # 5.25 \_9113\_INT\_Source\_Control # @ Description PCI-9113A has a dual-interrupt system, therefore, two interrupt sources can be generated and be checked by the software. This function is used to select and control PCI-9113A interrupt sources by writing data to interrupt control register. Please refer to section 4.1.4 for detailed description of A/D data transfer modes. # @ Syntax ```asm C/C++ (DOS) void _9113_INT_Source_Control (U16 cardNo, U16 int1Ctrl, U16 int2Ctrl) ``` C/C++ (Windows 95) ```txt void W_9113_INT_Source_Control (U16 cardNo, U16 int1Ctrl, U16 int2Ctrl) ``` Visual Basic (Windows 95) ```txt W_9113_INT_Source_Control (ByVal cardNo As Integer, ByVal int1Ctrl As Integer, ByVal int2Ctrl As Integer) ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. int1Ctrl: The value to control INT1, the value can be set and the corresponding definition is the following: int1Ctrl: 0: INT1 disable 1: INT1 AD end of conversion (EOC) interrupt 2: INT1 FIFO half full int2Ctrl: The value to control INT2, the value can be set and the corresponding definition is the following: int2Ctrl: 0: INT2 disable 1: INT2 pacer timer interrupt 2: INT2 external interrupt source # @ Return Code None # 5.26 \_9113\_CLR\_IRQ # @ Description This function is used to clear interrupt request that is requested by PCI-9113A. If you use interrupt to transfer A/D converted data, you should use this function to clear interrupt request status, otherwise the new coming interrupt will not be generated. # @ Syntax ```txt C/C++ (DOS) void _9113_CLR_IRQ (U16 cardNo) C/C++ (Windows 95) void W_9113_CLR_IRQ (U16 cardNo) Visual (Windows 95) W_9113_CLR_IRQ (ByVal cardNo As Integer) ``` # @ Argument None # @ Return Code None # 5.27 \_9113\_Get\_IRQ\_Channel # @ Description This function is used to get the IRQ level of the PCI-9113A card currently used. # @ Syntax ```txt C/C++ (DOS) void _9113_Get_IRQ_Channel (U16 cardNo, U16 *irq_no) C/C++ (Windows 95) void W_9113_Get_IRQ_Channel (U16 cardNo, U16 *irq_no) Visual Basic (Windows 95) W_9113_Get_IRQ_Channel (ByVal cardNo As Integer, irq_no As Integer) ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. Irq\_no: The IRQ level used to transfer A/D data for this card. # @ Return Code None # 5.28 \_9113\_Get\_IRQ\_Status # @ Description This function is used to get the status of the two IRQs (INT1 and INT2) in PCI-9113A card. # @ Syntax ```csv C/C++ (DOS) void 9113 Get IRQ Status (U16 cardNo, U16 *ch1, U16 *ch2) ``` ```csv C/C++ (Windows 95) void W 9113 Get IRQ Status (U16 cardNo, U16 *ch1, U16 *ch2) ``` # Visual Basic (Windows 95) ```txt W_9113_Get_IRQ_Status (ByVal cardNo As Integer, ch1 As Integer, ch2 As Integer) ``` # @ Argument cardNo: the card number of PCI-9113A card initialized. ch1: the IRQ status of INT1 ch2: the IRQ status of INT2 # @ Return Code None # 5.29 \_9113\_AD\_FFHF\_Polling # @ Description This function is used to perform the powerful AD data transfer by applying half-full polling mode. This method checks the FIFO half full signal every time calling this function. If the FIFO is not half-full, the software does not read data. When the FIFO is full, the AD FIFO is overrun. When the FIFO is half-full but not full, software reads the A/D data, which is stored in FIFO, in size of one “block” (512 words). The FIFO half-full polling method is the most powerful A/D data transfer mode. Please refer to section 4.1.4 for the detailed description of half-full polling mode. # @ Syntax ```txt C/C++ (DOS) U16 _9113_AD_FFHF_Polling (U16 cardNo, U16 far *ad_buf) ``` ```txt C/C++ (Windows 95) ``` ```txt U16 W_9113_AD_FFHF_Polling (U16 cardNo, U16 *ad_buf) ``` ```txt Visual Basic (Windows 95) ``` ```txt W_9113_AD_FFHF_Polling (ByVal cardNo As Integer, ad_buf As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. ad\_buf: The buffer stores the A/D converted value. The size of ad\_buf can not be smaller than 512 words. The data format can be referred to section 4.1.5 for the details. # @ Return Code ```txt ERR_NoError ERR_FIFO_Half_NotReady ``` # 5.30 \_9113\_AD\_FFHF\_Polling\_MUX # @ Description This function is used to perform powerful AD data transfer by applying half-full polling mode. This method checks the FIFO half full signal every time calling this function. If the FIFO is not half-full, the software does not read data. When the FIFO is full, the AD FIFO is overrun. When the FIFO is half-full and not full, software reads the A/D data, which is stored in FIFO, in size of one "block" (512 words). The difference between this function and 9113\_AD\_FFHF\_Polling is that the former reads data from the 16-bit register and the latter reads data from 32-bit data register. Please refer to section 4.1.4 for the detailed description of half-full polling mode. # @ Syntax ```txt C/C++ (DOS) U16 _9113_AD_FFHF_Polling_MUX (U16 cardNo, U32 far *ad_buf) C/C++ (Windows 95) U16 W_9113_AD_FFHF_Polling_MUX (U16 cardNo, U32 *ad_buf) Visual Basic (Windows 95) U16 W_9113_AD_FFHF_Polling_MUX (ByVal cardNo As Integer, ad_buf As Long) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. ad\_buf: The 32bits A/D converted value. The data format can be referred to section 4.1.5 for details. # @ Return Code ```txt ERR_NoError ERR_FIFO_Half_NotReady ``` # 5.31 \_9113\_AD\_Aquire # @ Description This function is used to poll the A/D converted data for PCI-9113A by software trigger. It reads the A/D data when the data is ready. # @ Syntax C/C++ (DOS) U16 9113 AD Aquire (U16 cardNo, U16 far \*ad data) C/C++ (Windows 95) U16 W\_9113\_AD\_Aquire (U16 cardNo, U16 \*ad\_data) Visual Basic (Windows 95) W\_9113\_AD\_Aquire (ByVal cardNo As Integer, ad\_data As Integer) As Integer # @ Argument cardNo: The card number of PCI-9113A card initialized. ad\_data: The 16-bit A/D converted value. The bit 0 of ADData is the LSB of A/D converted data and the bit 11 of ADData is the MSB of A/D converted data. Please refer to section 4.1.5 for the relationship between the voltage and the value. # @ Return Code ERR NoError ERR\_AD\_AquireTimeOut # 5.32 \_9113\_AD\_Aquire\_MUX # @ Description This function is used to poll the A/D conversion data for PCI-9113A. It reads the A/D data when the data is ready. # @ Syntax ```csv C/C++ (DOS) U16 _9113_AD_FFFH_Polling_MUX (U16 cardNo, U16 far *ad_data) C/C++ (Windows 95) U16 W_9113_AD_FFFH_Polling_MUX (U16 cardNo, U16 *ad_data) Visual Basic (Windows 95) W_9113_AD_FFFH_Polling_MUX (ByVal cardNo As Integer, ad_data As Integer) As Integer ``` # @ Argument ```txt cardNo: The card number of PCI-9113A card initialized. ad_data: The 32-bit A/D converted value. The resolution of A/D conversion data is 12 bits. The unsigned integer data format of ADData is as follows: Every 32-bit unsigned integer data: bit 0...11: A/D converted data bit 16, 17, ..., 20: converted channel no. Please refer to section 4.1.5 for the relationship between the voltage and the value. ``` # @ Return Code ```txt ERR_NoError ERR_FIFO_Half_NotReady ``` # 5.33 \_9113\_AD\_INT\_Start # @ Description This function is used to initial and startup the AD EOC (end-of-conversion) interrupt. This function could perform A/D conversion N times with interrupt data transfer by using pacer trigger. It takes place in the background and will not stop until the N-th conversion has been completed or your program execute \_9113\_AD\_INT\_Stop() function to stop the process. After executing this function, it is necessary to check the status of the operation by using the function \_9113\_AD\_INT\_Status(). The function can perform on single A/D channel (autoscan is disabled) or multiple A/D channels (autoscan is enabled) with a fixed analog input range. Note: The interrupt mode provided in this function is internal timer source, therefore you must specify c1 & c2 as calling this function. In addition, this function in MS-DOS Borland C++ library supports just one PCI-9113A card and provides only one ISR (interrupt service routine) for processing the interrupt events. If multi-9113A cards and multi-ISR is necessary, users can modify this library for your own purpose. # @ Syntax C/C++ (DOS) ```txt U16 9113_AD_INT_Start (U16 cardNo, U16 auto_scan, U16 ad_ch_no, U16 ad_gain, U16 count, U32 *ad_buffer, U16 c1, U16 c2) ``` C/C++ (Windows 95) ```txt U16 W_9113_AD_INT_Start (U16 cardNo, U16 auto_scan, U16 ad_ch_no, U16 ad_gain, U16 count, U32 *ad_buffer, U16 c1, U16 c2) ``` Visual Basic (Windows 95) ```txt W_9113_AD_INT_Start (ByVal cardNo As Integer, ByVal auto_scan As Integer, ByVal ad_ch_no As Integer, ByVal ad_gain As Integer, ByVal count As Integer, ad_buffer As Long, ByVal c1 As Integer, ByVal c2 As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. auto\_scan: 0: autoscan is disabled. 1: autoscan is enabled. ad\_ch\_no: A/D channel number. If the auto\_scan is set as enabled, the selection sequence of A/D channel is: 0, 1, 2, 3, ..., [ad\_ch\_no], 0, 1, 2, 3, [ad\_ch\_no], ... If the auto\_scan is set as disabled, only the data input from [ad\_ch\_no] is converted. ad\_gain: A/D analog input range, the possible values are: ```c AD_B_10_V, AD_B_1_V, AD_B_0_1_V, AD_B_5_V, AD_B_0_5_V, AD_B_0_05_V, AD_U_10_V, AD_U_1_V, AD_U_0_1_V ``` count: The number of A/D conversion ```txt ad_buffer: The start address of the memory buffer to store the A/D data. The buffer size must large than the number of A/D conversion. The unsigned integer data format in ad_buffer is as follows: Every 32-bit unsigned integer data: bit 0...11: A/D converted data bit 16, 17, ..., 20: converted channel no. Please refer to section 4.1.5 for the relationship between the voltage and the value. ``` c1: the frequency devider of Timer#1 c2: the frequency devider of Timer#2 # @ Return Code ```txt ERR_InvalidADChannel ERR_AD_InvalidGain ERR_InvalidTimerValue ERR_NoError ``` # 5.34 \_9113\_AD\_FFHF\_INT\_Start # @ Description This function is used to initial and start up the interrupt transfer by using AD FIFO Half-Full Interrupt Transfer Mode. This function could perform A/D conversion N times with interrupt data transfer by using pacer trigger. It takes place in the background and will not stop until the N-th conversion has been completed or your program execute \_9113\_AD\_INT\_Stop() function to stop the process. After executing this function, it is necessary to check the status of the operation by using the function \_9113\_AD\_FFHF\_INT\_Status(). The function can perform on single A/D channel (autoscan is disabled) or multiple A/D channels (autoscan is enabled) with fixed analog input range. Note: The interrupt mode provided in this function is internal timer source, therefore you must specify c1 & c2 as calling this function. In addition, this function in MS-DOS Borland C++ library supports just one PCI-9113A card and provides only one ISR (interrupt service routine) for processing the interrupt events. If multi-9113A cards and multi-ISR is necessary, users can modify this library for your own purpose. # @ Syntax C/C++ (DOS) ```txt U16 9113_AD_FFHF_INT_Start (U16 cardNo, U16 auto_scan, U16 ad_ch_no, U16 ad_gain, U16 blockNo, U32 *ad_buffer, U16 c1, U16 c2) ``` C/C++ (Windows 95) ```txt U16 W_9113_AD_FFHF_INT_Start (U16 cardNo, U16 auto_scan, U16 ad_ch_no, U16 ad_gain, U16 blockNo, U32 *ad_buffer, U16 c1, U16 c2) ``` Visual Basic (Windows 95) ```txt W_9113_AD_FFHF_INT_Start (ByVal cardNo As Integer, ByVal auto_scan As Integer, ByVal ad_ch_no As Integer, ByVal ad_gain As Integer, ByVal blockNo As Integer, ad_buffer As Long, ByVal c1 As Integer, ByVal c2 As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. auto\_scan: 0: autoscan is disabled. 1: autoscan is enabled. ad\_ch\_no: A/D channel number. If the auto\_scan is set as enable, the selection sequence of A/D channel is: 0, 1, 2, 3, ..., [ad\_ch\_no], 0, 1, 2, 3, [ad\_ch\_no], ... If the auto\_scan is set as disable, only the data input from [ad\_ch\_no] is converted. ad\_gain: A/D analog input range, the possible values are: AD\_B\_10\_V, AD\_B\_1\_V, AD\_B\_0\_1\_V, AD\_B\_5\_V, AD\_B\_0\_5\_V, AD\_B\_0\_05\_V, AD\_U\_10\_V, AD\_U\_1\_V, AD\_U\_0\_1\_V blockNo: The number of blocks for performing A/D conversion, one block of A/D conversion is 512 words. ad\_buffer: The start address of the memory buffer to store the AD data. The buffer size must large than the number of AD conversion. The unsigned integer data format in ad\_buffer is as follows: Every 32-bit unsigned integer data: bit 0...11: A/D converted data bit 16, 17, ..., 20: converted channel no. Please refer to section 4.1.5 for the relationship between the voltage and the value. c1: the frequency devider of Timer#1 c2: the frequency devider of Timer#2 # @ Return Code ```txt ERR_InvalidADChannel ERR_AD_InvalidGain ERR_InvalidTimerValue ERR_NoError ``` # 5.35 \_9113\_AD\_INT\_Status # @ Description This function is used to check the status of interrupt operation. The \_9113\_AD\_INT\_Start() is executed on background, therefore you can issue this function to check the status of interrupt operation. # @ Syntax ```txt C/C++ (DOS) U16 _9113_AD_INT_Status (U16 cardNo, U16 *status, U16 *count) C/C++ (Windows 95) U16 W_9113_AD_INT_Status (U16 cardNo, U16 *status, U16 *count) ``` # Visual Basic (Windows 95) ```txt W_9113_AD_INT_Status (ByVal cardNo As Integer, status As Integer, count As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. status: The status of the INT data transfer. count: The A/D conversion count number performed currently. # @ Return Code ```txt ERR_NoError ``` # 5.36 \_9113\_AD\_FFHF\_INT\_Status # @ Description This function is used to check the status of interrupt operation by using AD FIFO Half Full Interrupt Transfer Mode. The \_9113\_AD\_FFHF\_INT\_Start() is executed on background, therefore you can issue this function to check the status of interrupt operation. # @ Syntax ```c C/C++ (DOS) U16_9113_AD_FFHF_INT_Status (U16 cardNo, U16 *status, U16 *blockNo) C/C++ (Windows 95) U16 W_9113_AD_FFHF_INT_Status (U16 cardNo, U16 *status, U16 *blockNo) ``` # Visual Basic (Windows 95) ```txt W_9113_AD_FFHF_INT_Status (ByVal cardNo As Integer, status As Integer, blockNo As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. status: The status of the INT data transfer. blockno: The A/D conversion block number performed currently. # @ Return Code ```txt ERR_NoError ``` # 5.37 \_9113\_AD\_FFHF\_INT\_Restart # @ Description After calling \_9113\_AD\_FFHF\_INT\_Start(), the A/D conversion and transfer won't stop until the N blocks of the A/D data is acquired, calling this function can restart the FIFO half full interrupt transfer without re-initial all the relative registers. However, if the interrupt operation was stopped by calling \_9113\_AD\_FFHF\_INT\_Stop(), the program should use \_9113\_AD\_FFHF\_INT\_Start() to restart the interrupt transfer function. # @ Syntax ```txt C/C++ (DOS) U16 _9113_AD_FFHF_INT_Restart (U16 cardNo) C/C++ (Windows 95) U16 W_9113_AD_FFHF_INT_Restart (U16 cardNo) Visual Basic (Windows 95) W_9113_AD_FFHF_INT_Restart (ByVal cardNo As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. # @ Return Code ERR\_NoError # 5.38 \_9113\_AD\_INT\_Stop # @ Description This function is used to stop the interrupt data transfer function. After executing this function, the internal A/D trigger is disabled and the A/D timer is stopped. This function returns the number of data has been transferred, no matter whether the A/D interrupt data transfer is stopped by this function. # @ Syntax ```csv C/C++ (DOS) U16 _9113_AD_INT_Stop (U16 cardNo, U16 *count) C/C++ (Windows 95) U16 W_9113_AD_INT_Stop (U16 cardNo, U16 *count) ``` # Visual Basic (Windows 95) ```txt W_9113_AD_INT_Stop (ByVal cardNo As Integer, count As Integer) As Integer ``` # @ Argument cardNo: The card number of PCI-9113A card initialized. count: The number of A/D data which has been transferred. # @ Return Code ```c ERR_AD_INTNotSet ERR_NoError ``` # 6 # Calibration & Utilities In data acquisition process, how to calibrate your measurement devices to maintain its accuracy is very important. Users can calibrate the analog input channels under the users' operating environment for optimizing the accuracy. This chapter will guide you to calibrate your PCI-9113A to an accuracy condition. # 6.1 Calibration Before calibrating your PCI-9113A card, you should prepare some equipments for the calibration: - Calibration program: Once the program is executed, it will guide you to do the calibration. This program 9113UTIL.EXE is located in the directory C:\ADLINK\9113\DOS\UTIL (Default). ● A 5 1/2 digit multimeter (6 1/2 is recommended) - A voltage calibrator or a very stable and noise free DC voltage generator. # 6.1.1 VR Assignment There are four variable resistors (VR) on the PCI-9113A board to allow you making accurate adjustment on A/D channels. The function of each VR is specified as Table 6.1.
VR1A/D uni-polar offset adjustment
VR2A/D full scale adjustment
VR3A/D bi-polar offset adjustment
VR4PGA offset adjustment
Table 6.1 Function of VRs # 6.1.2 A/D Adjustment # 6.1.2.1 PGA offset calibration 1. Set JP5 as single-ended input 2. Short the A/D channel 0 (pin 1 of CN1) to ground (GND: pin 9 of CN1). 3. Use multi-meter to measure the voltage between TP1 and TP2. 4. Adjust VR4 until the multi-meter value approach to zero. # 6.1.2.2 Uni-polar input 1. Set JP5 as single-ended input 2. Set JP2 as uni-polar A/D input. 3. Set JP3 to 10V full range. 4. Set JP4 to direct binary coding. 5. Short the A/D channel 0 (pin 1 of CN1) to ground (GND: pin 9 of CN1). 6. Set the analog gain = 1 and channel number #0 by software. 7. Adjust VR1 to obtain reading between 0\~1. 8. Applied a +10V reference input signal to A/D channel 0, and trim the VR2 to obtain reading between 4094\~4095. # 6.1.2.3 Bi-polar input 1. Set JP5 as single-ended input 2. Set JP2 as bi-polar A/D input. 3. Set JP3 to 20V full range. 4. Set JP4 to direct binary coding. 5. Set the analog gain = 1 and channel number #0 by software. 6. Short the A/D channel 0 (pin 1 of CN1) to ground (GND). 7. Adjust VR3 to obtain reading between 2047\~2048. 8. Applied a +10V reference input signal to A/D channel 0 (pin 1 of CN1), and trim the VR2 to obtain reading between 4094\~4095. # 6.1.3 Software A/D Offset Calibration For more accuracy calibrate the input offset signal, using software to calibrate the offset of the analog input signal is a good approach. Another benefit is this method can calibrate offset online and thus eliminate any temperature drift. For example, user can short the resistor RB1 to ground. Measuring the digital value of channel #0 can obtain the offset voltage of the AD channels. If the digital offset value is Voff, user can modify any AD data by subtracting Voff from the AD data to obtain the offset calibrated value. Note that the Voff may be different for each gain level,. Users should calibrate the offset value for every gain value. # 6.2 Utilities This software CD provides two utility programs. They are 9113Autil.exe which provides three functions, System Configuration, Calibration, and Functional Testing, and I\_eeprom which is used to enable or disable interrupt of PCI-9113A board. The utility programs are described in the following sections. # 6.2.1 9113UTIL There are three functions provided by 9113UTIL. They are System Configuration, Calibration, and Functional Testing. This utility software is designed as menu-driven based windowing style. Not only the text messages are shown for operating guidance, but also has the graphic to indicate you how to set right hardware configuration. # 6.2.1.1 Running 9113UTIL.exe After finishing the DOS installation, you can execute the utility by typing as follows: C> cd \ADLINK\DOS\9113\Util C> 9113AUTIL The following diagram will be displayed on you screen. The message at the bottom of each window guides you how to select item, go to the next step and change the default settings. \*\*\*\*\* PCI-9113A Utility Rev. 1.0 \*\*\*\*\* Copyright © 2000-2004, ADLINK Technology Inc. All rights reserved. <F1>: Configuration. <F2>: Calibration. <F3>: Function testing. <Esc>: Quit. >>> Select function key F1 \~ F3, or press <Esc> to quit. <<< # 6.2.1.2 System Configuration This function guides you to configure the PCI-9113A card, and set the right hardware configuration. The configuration window shows the setting items that you have to set before using the PCI-9113A card. The following diagram will be displayed on the screen as you choose the Configuration function from main menu. \*\*\*\*\* Calibration of PCI9113A \*\*\*\*\* <1> Card Type PCI9113A <2> AD Polarity setting Bipolar <3> AD Input Range Gain=1 Bipolar(-10V\~10V) >>> <Up/Down>: Select Item, <PgUp/PgDn>: Change Setting <<< # 6.2.1.3 Calibration This function guides you to calibrate the PCI-9113A. The calibration program serves as a useful test of the PCI-9113A's A/D functions and can aid in troubleshooting if problems arise. Note: For an environment with frequently large changes of temperature and vibration, a 3 months re-calibration interval is recommended. For laboratory conditions, 6 months to 1 year is acceptable When you choose the calibration function from the main menu list, a calibration items menu is displayed on the screen. After you select one of the calibration items from the calibration items menu, a calibration window shows. The upper window shows the detailed procedures which have to be followed when you proceed the calibration. The instructions will guide you to calibrate each item step by step. The bottom window shows the layout of PCI-9113A. In addition, the proper Variable Resister (VR) will blink to indicate the related VR which needs to be adjusted for the current calibration step. \*\*\*\*\* PCI-9113A Calibration \*\*\*\*\* ```txt <1> A/D Bipolar (Gain = 1, -10V ~ 10V) adjusting <2> A/D Unipolar (Gain = 1, 0V ~ 10V) adjusting <Esc> Quit ``` Select 1 to 2 or <Esc> to quit calibration. # 6.2.1.4 Functional Testing This function is used to test the functions of PCI-9113A. It includes A/D polling testing, A/D Interrupt Testing, and A/D FIFO Half-Full Interrupt testing. When you choose one of the testing functions from the functions menu, a diagram is displayed on the screen. The figures below are the function testing menu window and A/D with polling Testing window. \*\*\*\*\* PCI-9113A Function Testing \*\*\*\*\* ```txt <1>: A/D with Polling Test <2>: A/D with Interrupt Test <3>: A/D with FIFO Half-Full Interrupt <Esc>: Quit ``` Select 1 to 3 or <Esc> to quit function testing # 6.2.2 I\_EEPROM This file is used to enable or disable the interrupt of PCI-9113A board. This software is a text-driven program. Because the default interrupt on PCI-9113A board is “on”, users who don’t want to use interrupt function can use this utility to turn off the interrupt of their PCI-9113A board. # 6.2.2.1 Running I\_eeprom.exe After finishing the DOS installation, you can execute the utility by typing as follows: C> cd \ADLINK\DOS\9113\UTIL C> I\_eeprom At first, this program prompts you to input the card type—9113. After specifying the card type, this program shows the instructions to guide you to enable or disable the interrupt of your PCI-9113A board. # Appendix A 8254 Programmable Interval Timer # A.1 The 8254 Timer / Counter Chip The Intel (NEC) 8254 contains three independent, programmable, multi-mode 16 bit counter/timers. The three independent 16 bit counters can be clocked at rates from DC to 5 MHz. Each counter can be individually programmed with 6 different operating modes by appropriately formatted control words. The most common uses for the 8254 in microprocessor based system are: ● programmable baud rate generator - event counter - binary rate multiplier - real-time clock - digital one-shot - motor control # A.2 The Control Byte The 8254 occupies 4 I/O address locations in the PCI-9113A I/O map. As shown in the following table:
Base + 20LSB OR MSB OF COUNTER 0
Base + 22LSB OR MSB OF COUNTER 1
Base + 24LSB OR MSB OF COUNTER 2
Base + 26CONTROL BYTE
Before loading or reading any of these individual counters, the control byte (Base +26) must be loaded first. The format of control byte is: # Control Byte:
Bit76543210
SC1SC0RL1RL0M2M1M0BCD
• SC1 & SC1 - Select Counter (Bit7 & Bit 6)
SC1SC0COUNTER
000
011
102
11ILLEGAL
\- RL1 & RL0 - Select Read/Load operation (Bit 5 & Bit 4)
RL1RL0OPERATION
00COUNTER LATCH
01READ/LOAD LSB
10READ/LOAD MSB
11READ/LOAD LSB FIRST, THEN MSB
\- M2, M1 & M0 - Select Operating Mode (Bit 3, Bit 2, & Bit 1)
M2M1M0MODE
0000
0011
x102
x113
1004
1015
\- BCD - Select Binary/BCD Counting (Bit 0)
016-BITS BINARY COUNTER
1BINARY CODED DECIMAL(BCD) COUNTER (4 DIGITAL)
NoteThe count of the binary counter is from 0 up to 65,535 and the count of the BCD counter is from 0 up to 9,999
# Mode Definitions In 8254, six operating modes can be selected. They are: ● Mode 0: Interrupt on Terminal Count ● Mode 1: Programmable One-Shot ● Mode 2: Rate Generator ● Mode 3: Square Wave Rate Generator ● Mode 4: Software Triggered Strobe ● Mode 5: Hardware Triggered Strobe All detailed descriptions of these modes are written in Intel's data sheet ("http://support.intel.com/support/controllers/peripheral/231164.htm") # Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully. 1. Before using ADLINK's products please read the user manual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA application form which can be downloaded from: http://rma.adlinktech.com/policy/. 2. All ADLINK products come with a limited two-year warranty, one year for products bought in China. - The warranty period starts on the day the product is shipped from ADLINK's factory. - Peripherals and third-party products not manufactured by ADLINK will be covered by the original manufacturers' warranty. - For products containing storage devices (hard drives, flash cards, etc.), please back up your data before sending them for repair. ADLINK is not responsible for any loss of data. - Please ensure the use of properly licensed software with our systems. ADLINK does not condone the use of pirated software and will not service systems using such software. ADLINK will not be held legally responsible for products shipped with unlicensed software installed by the user. - For general repairs, please do not include peripheral accessories. If peripherals need to be included, be certain to specify which items you sent on the RMA Request & Confirmation Form. ADLINK is not responsible for items not listed on the RMA Request & Confirmation Form. 3. Our repair service is not covered by ADLINK's guarantee in the following situations: - Damage caused by not following instructions in the User's Manual. - Damage caused by carelessness on the user's part during product transportation. - Damage caused by fire, earthquakes, floods, lightening, pollution, other acts of God, and/or incorrect usage of voltage transformers. - Damage caused by inappropriate storage environments such as with high temperatures, high humidity, or volatile chemicals. - Damage caused by leakage of battery fluid during or after change of batteries by customer/user. - Damage from improper repair by unauthorized ADLINK technicians. - Products with altered and/or damaged serial numbers are not entitled to our service. • This warranty is not transferable or extendible. • Other categories not protected under our warranty. 4. Customers are responsible for all fees necessary to transport damaged products to ADLINK. For further questions, please e-mail our FAE staff: service@adlinktech.com [🔗 Link to the original document](.pci-9113a-manual-3/pci-9113a-manual-3.pdf)