| System Noise (measured and calculated under 50 Ω input impedance) |
| Input Range | PXI-9816D | PXI-9826D | PXI-9846D | PXI-9846W | PCI-9846D |
| ±0.2 V | $5.0 \text{LSB}_{\text{RMS}}$ | $6.0 \text{LSB}_{\text{RMS}}$ | $8.0 \text{LSB}_{\text{RMS}}$ | $15.0 \text{LSB}_{\text{RMS}}$ | $8.0 \text{LSB}_{\text{RMS}}$ |
| ±1 V | $3.0 \text{LSB}_{\text{RMS}}$ | $4.0 \text{LSB}_{\text{RMS}}$ | $5.0 \text{LSB}_{\text{RMS}}$ | $7.0 \text{LSB}_{\text{RMS}}$ | $5.0 \text{LSB}_{\text{RMS}}$ |
| Input Range | PCI-9816H | PCI-9826H | PCI-9846H | PXI-9846H | |
| ±1 V | $5.0 \text{LSB}_{\text{RMS}}$ | $6.0 \text{LSB}_{\text{RMS}}$ | $8.0 \text{LSB}_{\text{RMS}}$ | $8.0 \text{LSB}_{\text{RMS}}$ | |
| ±5 V | $3.0 \text{LSB}_{\text{RMS}}$ | $4.0 \text{LSB}_{\text{RMS}}$ | $5.0 \text{LSB}_{\text{RMS}}$ | $5.0 \text{LSB}_{\text{RMS}}$ | |
Table 1-4: System Noise
Spectral Characteristics – PXI-9816
| Specification | Input Range |
| ±1 V | ±0.2 V |
| Signal to Noise and Distortion (SINAD), typical | 79.11 dBc | 75.93 dBc |
| Signal-to-Noise Ratio (SNR), typical | 79.36 dBc | 75.96 dBc |
| Total Harmonic Distortion (THD), typical | -89.90 dBc | -95.77 dBc |
| Spurious Free Dynamic Range (SFDR), typical | 90.37 dBc | 98.65 dBc |
| Effective Number of Bit (ENOB), typical | 12.85-Bit | 12.32-Bit |
| Test Conditions: Input signal frequency is 0.998 MHz. Digitizer sampling rate at 10 MHz with 50 Ω input impedance. Calculated with 64 K-point data. Note that these dynamic parameters may vary from one unit to another, with input frequency and with the full scale input range selected. |
Table 1-5: Spectral Characteristics – PCI/PXI-9816
Figure 1-4: PXI-9816 FFT with ±0.2 V Input Range
Figure 1-5: PXI-9816 FFT with ±1 V Input Range
Spectral Characteristics – PXI-9826
| Specification | Input Range |
| ±1 V | ±0.2 V |
| Signal to Noise and Distortion (SINAD), typical | 78.63 dBc | 74.44 dBc |
| Signal-to-Noise Ratio (SNR), typical | 79.95 dBc | 74.48 dBc |
| Total Harmonic Distortion (THD), typical | -88.29 dBc | -93.52 dBc |
| Spurious Free Dynamic Range (SFDR), typical | 88.88dBc | 95.52 dBc |
| Effective Number of Bit (ENOB), typical | 12.77-Bit | 12.07-Bit |
| Test Conditions: Input signal frequency is 0.998 MHz. Digitizer sampling rate at 20 MHz with 50 Ω input impedance. Calculated with 64 K-point data. Note that these dynamic parameters may vary from one unit to another, with input frequency and with the full scale input range selected. |
Table 1-6: Spectral Characteristics – PXI-9826
Figure 1-6: PXI-9826 FFT with ±0.2 V Input Range
Figure 1-7: PXI-9826 FFT with ±1 V Input Range
Spectral Characteristics – PXI-9846
| Specification | Input Range |
| ±1 V | ±0.2 V |
| Signal to Noise and Distortion (SINAD), typical | 76.06 dBc | 71.97 dBc |
| Signal-to-Noise Ratio (SNR), typical | 76.17 dBc | 71.98 dBc |
| Total Harmonic Distortion (THD), typical | -90.65 dBc | -95.78 dBc |
| Spurious Free Dynamic Range (SFDR), typical | 91.62 dBc | 96.15 dBc |
| Effective Number of Bit (ENOB), typical | 12.34-Bit | 11.66-Bit |
| Test Conditions: Input signal frequency is 0.998 MHz. Digitizer sampling rate at 40 MHz with 50 Ω input impedance. Calculated with 64 K-point data. Note that these dynamic parameters may vary from one unit to another, with input frequency and with the full scale input range selected. |
Table 1-7: Spectral Characteristics – PCI/PXI-9846
Figure 1-8: PXI-9846 FFT with ±0.2 V Input Range
Figure 1-9: PXI-9846 FFT with ±1 V Input Range
Timebase
| Specification | Value |
| Trigger Sources | Software, TRG IO (front panel SMB connector), analog trigger from CH0~CH3, PXI STAR, PXI Trigger Bus[0..7], SSI bus |
| Trigger Modes | Pre-trigger, Post-trigger, Middle-trigger, Delay-trigger |
| TRG IO, as input port |
| Connector type | SMB |
| Compatibility | 3.3 V LVTTL, 5 V tolerant |
| Input Level | High threshold ( $V_{IH}$ ): 2.0 V, minimumLow threshold ( $V_{IL}$ ): 0.8 V, maximum |
| Maximum Input Overload | -0.5 V to +5.5 V |
| Trigger Polarity | Rising edge or falling edge, software programmable |
| Minimum Pulse Width | 20 ns |
| TRG IO, as output port |
| Connector Type | SMB |
| Compatibility | 3.3 V TTL |
| Output Level | High threshold (VOH): 2.4V, minimumLow threshold (VOL): 0.2, maximum |
| Driving Capability | 8 mA |
| Minimum Output Pulse Width | 20 ns |
| Analog Trigger |
| Sources | AI channel 0 - 3 |
| Trigger Slope | Rising or falling, software selectable |
| Trigger Level Range | Full scale input range |
| Trigger Level Resolution | 8-bit, 256 steps in full scale range |
Table 1-9: Triggering
Data Storage and Transfer
| Specification | Value |
| Environment |
| Operating Environment | Ambient temperature:0°C to +55°C for PXI version,0°C to +50°C for PCI versionRelative humidity: 10% to 90%, non-condensing |
| Storage Environment | Ambient temperature: -20°C to +85°CRelative humidity: 10% to 90%, non-condensing |
| Physical |
| PCB Dimension(not including connectors) | PXI version: Single 3U PXI module, 100 mm by 160 mmPCI version: Standard height, half length PCI card, 167.64 mm by 106.68 mm |
| PCI Slot Width | 1-slot |
| PCI Bus Interface |
| PCI Signaling | Support 3.3 V and 5 V signaling |
| PCI Interface | 32-bit, 66 MHz |
| Electromagnetic Compatibility |
| Emission | EN 55022 |
| Immunity | EN 55024 |
| Typical Power Requirements |
| PCI/PXI-9816 | PCI/PXI-9826 | PCI/PXI-9846 |
| +12 V | 0.3 A | 0.3 A | 0.3 A |
| +5 V | 1.4 A | 1.5 A | 2.0 A |
| +3.3 V | 0.8 A | 0.8 A | 0.8 A |
| Total Power | 13.2 W | 13.7 W | 16.2 W |
Table 1-12: General Information
# 2 Getting Started
This chapter describes the proper installation environment, installation procedures, its package contents and basic information user should be aware of.
NOTE:
Diagrams and images of equipment mentioned are used for reference only. Actual system configuration and specs may vary.
# 2.1 Installation Environment
Whenever unpacking and preparing to install any equipment described in this manual, please refer to the Important Safety Instructions chapter of this manual.
Only install equipment in well lit areas on flat, sturdy surfaces with access to basic tools such as flat and cross head screwdrivers, preferably with magnetic heads as screws and standoffs are small and easily misplaced.
# Recommended Installation Tools
Philips (cross-head\_ screwdriver
Flat-head screwdriver
Anti-static wrist strap
Anti-static mat
The PCI/PXI-9816/26/46 contain several electro-static sensitive components that can be easily be damaged by static electricity. The equipment should be handled on a grounded anti-static mat and the operator should wear an anti-static wristband during the unpacking and installation procedure.
Please also inspect the components for apparent damage. Improper shipping and handling may cause damage to the components. Be sure this is no shipping and handling damage on the components before continuing.
CAUTION
The equipment must be protected from static discharge and physical shock. Never remove any of the socketed parts except at a static-free workstation. Use the antistatic bag shipped with the product to handle the equipment and wear a grounded wrist strap when servicing.
# 2.2 Package Contents
Before continuing, check the package contents for any damage and check if the following items are included in the packaging:
PCI/PXI-9816/26/46 digitizer card
ADLINK All-in-one CD.
Software installation guide
PCI/PXI-9816/26/46 User’s Manual.
# CAUTION
Do not install or apply power to equipment that is damaged or if there is missing/incomplete equipment. Retain the shipping carton and packing materials for inspection. Please contact your ADLINK dealer/vendor immediately for assistance. Obtain authorization from your dealer before returning any product to ADLINK.
# 2.3 Mechanical Drawing and I/O Connectors
Figure 2-1: PXI-98x6 Mechanical Drawing
Figure 2-2: PCI-98x6 Mechanical Drawing
The ADLINK PXI-9816/PXI-9826/PXI-9846 is packaged in a Eurocard form factor with PXI specifications measuring 160 mm in length and 100 mm in height (not including connectors). The PCI-9816/9826/9846 is a half-length and standard height PCI form factor. Please refer to above figure for detail dimension.
The connector types and functions are described as follows.
| Signal Name | Direction | Description | Location |
| SSI_TIMEBASE | Input/Output | Timebase signal through SSI | pin 1 |
| SSI_TRIG1 | Input/Output | Trigger signal through SSI | pin 11 |
| SSI_TRIG2 | Input/Output | Clocked trigger signal through SSI | pin 9 |
| SSI_START_OP | Input/Output | Acquisition start signal in pre-trigger or middle-trigger mode | pin 7 |
| GND | - | Ground | pins 2, 4, 6, 8, 10, 12, 14, 16, 18, 20 |
| NC | - | No Connection | pins 3, 13 |
| Reserved | Input/Output | Reserved for future use | pins 5, 15, 17, 19 |
Table 3-5: SSI Signal Locations and Pin Definition
# 3.7.1 SSI\_TIMEBASE
As an output, the SSI\_TIMEBASE signal outputs the onboard LVTTL timebase through PXI trigger bus.
As an input, the PCI/PXI-9816/26/46 accepts the SSI\_TIMEBASE signal to be the source of timebase.
# 3.7.2 SSI\_TRIG1
As an output, the SSI\_TRIG1 signal reflects the trigger event signal in an acquisition sequence. You can use the function SSI\_SourceConn() to output the SSI\_TRIG1 signal.
As an input, the PCI/PXI-9816/26/46 accepts the SSI\_TRIG1 signal to be the trigger event source. The signal is configured in the rising edge-detection mode. When selecting the trigger sources of the PCI/PXI-9816/26/46, you can select TRSRC\_SSI\_1 to set SSI\_TRIG1 as the source of trigger event.
Figure 3-21: SSI\_TRIG1 Input and Output Timing Characteristics
# 3.7.3 SSI\_TRIG2 and SSI\_START\_OP
As an output, the SSI\_TRIG2 signal is a clocked SSI\_TRIG1 signal by TIMEBASE, as illustrated in Figure 3-22.
Tw = 2 TIMEBASE Clocks
Figure 3-22: SSI\_TRIG2 Output Timing
As an input, the PCI/PXI-9816/26/46 accepts the SSI\_TRIG2 signal to be the source of a one-clock delayed trigger event. The controller on the PCI/PXI-9816/26/46 will then compensate the oneclock delay if using SSI\_TRIG2 as the source of trigger event. The signal is configured in the rising edge-detection mode.
Figure 3-23: SSI\_TRIG2 Input Timing Requirement
As an output, the SSI\_START\_OP signal reflects the operation start signal in a pre-trigger or middle-trigger acquisition sequence. Please refer to Figure 3-12 - Figure 3-14 for the relationship between the operation start signal and the acquisition sequence.
As an input, the PCI/PXI-9816/26/46 accepts the SSI\_START\_OP signal to be the operation start signal in a pre-trigger or middletrigger acquisition sequence. The signal is configured in the rising edge-detection mode. Figure 3-24 show the SSI\_START\_OP signal input and output timing requirements.
For enabling output operations, you can use the function SSI\_SourceConn() to output the SSI\_TRIG2 and SSI\_START\_OP signals.
For the input operations, you can select TRSRC\_SSI\_2 to set SSI\_TRIG2 and SSI\_START\_OP as the source of the trigger event and operation start signal.
Figure 3-24: SSI\_START\_OP Output and Input Timing Characteristics
# 3.7.4 Comparing the Different Trigger Sources from SSI
When selecting TRSRC\_SSI\_1 as the trigger source input, the signal SSI\_TRIG1 reflects the trigger event signal in an acquisition sequence. However, when synchronizing multiple PCI/PXI-9816/ 26/46 devices, each module may recognize the trigger signal with one-clock time difference because the signal is not related to the timebase.
There is another phenomenon if using TRSRC\_SSI\_2 in pre-trigger and middle-trigger mode. The operation start signal is generated by a software command so multiple PCI/PXI-9816/26/46 modules don’t start the data acquisition simultaneously, which may result in the fact that the amount of stored samples are different if the trigger event occurs before the specified amount of data has been acquired.
When selecting TRSRC\_SSI\_2 as the trigger source input, SSI\_TRIG2 and SSI\_START\_OP can achieve better synchronization between multiple PCI/PXI-9816/26/46 devices. A clocked SSI\_TRIG2 can guarantee all PCI/PXI-9816/26/46 devices recognize the trigger event at the same clock edge if they use the same timebase. In pre-trigger and middle-trigger mode, SSI\_START\_OP guarantees all the PCI/PXI-9816/26/46 devices start the data acquisition at the same time.
# 3.8 Physical Location of the PXI and PCI Digitizer
# 3.8.1 Identify PXI Digitizer’s Physical Location by Geographic Address
CompactPCI and PXI chassis accommodate slot numbering mechanism based on the definition of Geographical Address pins on its backplane. Users can identify module’s physical location by reading back Geographical Address. This is a useful feature especially when multiple modules are installed in one host system. The PXI-9816/26/46 can read back the Geographical Address through software driver. Please refer to software function reference manual for more detail description.
# 3.8.2 Assign a Board ID to a PCI Digitizer
When users plug two or more PCI-9816/26/46 modules in one computer, board ID provides an effective mechanism for user to identity the specific module. With this method, users can access to specific module in accordance with board ID. The dip switch of board ID is located on the top of the module. Please refer to following figure and table for detail setting.
Please note that users have to assign a unique board ID to each module that are installed in the same computer, otherwise software driver will not allocate correct system resource to these modules. Once users assign identical board ID to different module, please turn off your computer first and then adjust the board ID again. After correct board ID is assigned, then users can power up computer again.
Figure 3-25: The Location of Board ID Switch
Figure 3-26: Enlargement of Board ID setting.
Note:
Only dip switches 1-5 are valid for board ID settings. Dip switches 6- 9 are unused. When a dip switch is switched to ‘ON’, it represents $" 1 "$ , the opposite direction represents $\mathfrak { v }$ .
1: ON
0: OFF