# PXIe-3987

# PXI Express Embedded

# Controller

# User’s Manual

![Exterior view of an ADLINK PCIe-3987 PCI controller module with visible ports and connectors (no readable text beyond branding)](.pxie-3987-50-17056-1000-10/7bf5de21469ce117505e4eb202d12c1ae44d00f1dcc906a660fa2417429ed8fc.jpg)

Manual Rev.: 1.0

Revision Date: Apr. 29, 2019

Part No: 50-17056-1000

# Revision History

<table><tr><td>Revision</td><td>Release Date</td><td>Description of Change(s)</td></tr><tr><td>1.0</td><td>Apr. 29, 2019</td><td>Initial Release</td></tr></table>

# Preface

# Copyright 2019 ADLINK Technology Inc.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

![Symbol of a trash bin crossed out by two diagonal lines (no text or numbers present)](.pxie-3987-50-17056-1000-10/0c7b6e77b3834f602416e78115c7af5af9bde91398d8506fd04aa72add6ed910.jpg)

![The image displays a black horizontal line near the top edge. Below this line is a large black rectangular area. To the left of this area, there is a vertical black bar. Inside the upper portion of this vertical bar is a small white square. To the left of the vertical bar is a thin vertical strip of white space. There is no text in the image.](.pxie-3987-50-17056-1000-10/fcffab2ce3a33ffb3f048d44ea66ac3fa03714ef120e730c11ad019c7ed7b435.jpg)

# Battery Labels (for products with battery)

![Symbol of a trash bin crossed out by two diagonal lines (no text or numbers present)](.pxie-3987-50-17056-1000-10/2646d20f58d1bd2a0d7d4d9b8f795df535777e5324e5f43e1d9a68e27f5a940b.jpg)

![Li-ion](.pxie-3987-50-17056-1000-10/cd549d8932aeb61841490c0043513c7cbc1403b210518fbc15da6269b64d4e73.jpg)

![RECYCLE\nRBRC\nLi·ion\n1.800.822.8837](.pxie-3987-50-17056-1000-10/0874dcc48aaaa8b5d966d8d5a1f6f1f7b3e1aa1f60816be3dd47e41de8a46ca5.jpg)

![廢電池請回收](.pxie-3987-50-17056-1000-10/d63f012dccc4fb78abe050900f397d9cd70fcd63469956a9fd1d2e6e2b211cc1.jpg)

# California Proposition 65 Warning

![The image displays a standard warning sign featuring a yellow triangle with a thick black border. In the center of the yellow field is a large, black exclamation point. There is no text present in the image.](.pxie-3987-50-17056-1000-10/efd389b7dc1c4474da21306e59a8c6775bb34779bf34c52a1a9722fd0e63f25f.jpg)

WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl) phosphate (TDCPP), 1,4- Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Conventions

Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly.

![The image displays a white document icon with a folded upper-left corner and faint grey horizontal lines near the bottom. A large, bold red check mark is superimposed over the center of the document.](.pxie-3987-50-17056-1000-10/b6923afa00265f38c50418c339111b333433ca2a7367f68a7386040a4e7647a3.jpg)
NOTE:

Additional information, aids, and tips that help users perform tasks.

![The image displays a standard warning sign featuring a yellow triangle with a thick black border. Inside the triangle is a black exclamation point. Below the triangle, the word 'CAUTION:' appears in black capital letters on a white background.](.pxie-3987-50-17056-1000-10/482251ee326d45bb41d790e1557e2876adcc9bfc09a80c400cb7d007e69e6f8e.jpg)

Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.

![The image features a vertical red triangle with a black exclamation mark inside. Below the triangle is the text 'WARNING' in black capital letters.](.pxie-3987-50-17056-1000-10/03b11169c5cf5c4bd51f4c13b6094b93a863e0e1babaab1e98a930eb02087e26.jpg)

Information to prevent serious physical injury, component damage, data loss, and/or program corruption when trying to complete a specific task.

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# Table of Contents

# Revision History........ i

# Preface ........... iii

# List of Figures ........ . xi

# List of Tables ........ ... xiii

# 1 Introduction .....

1.1 Features.... 2
1.2 Specifications... 3
1.3 I/O and Indicators . 7

1.3.1 Front Panel ..
1.3.2 GPIB Connector . ... 10
1.3.3 Reset Button ..... ... 11
1.3.4 LED Indicators .. .. 11
1.3.5 USB 2.0 Ports .... .. 11
1.3.6 Gigabit Ethernet Ports .... .. 12
1.3.7 USB 3.0 Ports ..... .. 13
1.3.8 COM Port... ... 14
1.3.9 Onboard Connections and Settings.. .. 15

# 2 Getting Started .... . 17

2.1 Package Contents .... . 17
2.2 Operating System Installation.... 17

2.2.1 Installation Environment . .. 18
2.2.2 Installing the PXIe-3987 .. 20
2.2.3 Replacing the Hard Drive or Solid State Drive ......... 23
2.2.4 Replacing the Battery Backup ...... .. 24
2.2.5 Clearing CMOS . .... 25

# 3 Driver Installation......... 27

# A Appendix: PXI Trigger I/O Function Reference.............. 29

A.1 Data Types... . 29
A.2 Function Library .. 30

A.2.1 TRIG\_Init .. ... 30
A.2.2 TRIG\_Close.... .... 31
A.2.3 TRIG\_SetSoftTrg. .... 31
A.2.4 TRIG\_Trigger\_Route .... .. 32
A.2.5 TRIG\_Trigger\_Clear ..... .. 34
A.2.6 TRIG\_GetSoftTrg...... ... 34
A.2.7 TRIG\_Trigger\_Route\_Query ....... .. 35
A.2.8 TRIG\_GetDriverRevision.. .. 37

# B Appendix: BIOS Setup.......... 39

B.1 Menu Structure . . 39
B.2 Starting the BIOS ... . 40
B.3 Main . . 42

B.3.1 BIOS Information .. .. 42
B.3.2 Processor Information... .. 43
B.3.3 PCH Information ... .. 43
B.3.4 System Management.. .. 43

B.4 Advanced.. . 47

B.4.1 CPU ... ... 48
B.4.2 Memory Configuration .. .. 50
B.4.3 Graphics Configuration.. ... 50
B.4.4 Onboard Devices Configuration... ... 50
B.4.5 USB Configuration.... .. 52
B.4.6 Network Stack Configuration .... .. 52
B.4.7 PCI and PCIe Configuration .... .. 54
B.4.8 Advanced Power Management .. .. 54
B.4.9 Intel® I210 Gigabit

Network Connection- (MAC address).. . 55

B.4.10 Intel® Ethernet

Connection (H) I219-LM - (MAC address) ........... .. 55

B.4.11 System Health Status . .. 57

B.4.12 PXIe Links Control Configuration .... .. 57

B.5 Boot .. 58

B.5.1 Boot Configuration. .. 58

B.5.2 CSM Configuration . .. 59

B.6 Security ........ 60

B.6.1 Password Description.. .. 60

B.7 Save & Exit ... 60

C Appendix: Dual BIOS ..... .... 63

D Appendix: Legacy Boot Mode Settings........................... 65

Important Safety Instructions ...... 67

Getting Service........ 71

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# List of Figures

Figure 1-1: PXIe-3987 Functional Block Diagram.. 3
Figure 1-2: PXIe-3987 Front Panel .
Figure 1-3: PXI Trigger SMB Jack . . 8
Figure 1-4: DisplayPort Connector.. 9
Figure 1-5: GPIB Connector... .. 10
Figure 1-6: PXIe-3987 LED Indicators .. .. 11
Figure 1-7: COM Port.. .. 14
Figure 1-8: PXIe-3987 Onboard Configuration . .. 15
Figure B-1: BIOS Setup Navigation.. .. 41

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# List of Tables

Table 1-1: Front Panel Legend . 7
Table 1-2: DisplayPort Pin Assignment . 9
Table 1-3: GPIB Pin Description.. . 10
Table 1-4: LED Indicator Legend. . 11
Table 1-5: USB 2.0 Port Pin Assignment.. . 12
Table 1-6: PXIe-3987 Ethernet Port Pin Assignments. . 12
Table 1-7: D-Sub COM Port Signal Functions. . 14
Table 1-8: Onboard Configuration Legend . . 15
Table B-1: BIOS Hot Key Functions.. .. 41

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# 1 Introduction

The ADLINK PXIe-3987 PXI Express™ embedded controller is based on the seventh generation Intel® Core™ i7 processor specifically designed for PXI Express-based testing systems. A rugged and stable operating environment is provided for a variety of testing and measurement applications.

Combining state-of-the-art Intel® Core™ i7-7820EQ 3.0GHz processors and up to 32GB of DDR4 2400MHz memory, the PXIe-3987 utilizes four separate computing engines on a single processor, enabling execution of four independent tasks simultaneously. With a configurable PCIe switch, the PXIe-3987 can support four links x4 or two links x8 x16 PXI Express link capability, with maximum system throughput of up to 16GB/s (PCI Express 3.0).

PXI Express-based testing systems typically make up a PXI Express platform and diversified standalone instruments for complex testing tasks. The PXIe-3987 series provides ample interfaces, including two DisplayPort connectors, allowing connection to two monitors, dual USB 3.0 connections for high speed peripheral devices, dual Gigabit Ethernet ports, one for LAN connection and the other for controlling LXI instruments, four USB 2.0 ports for peripheral devices and USB instrument control, an SMB connector for configurable input/output routing of signal to/from PXI Trigger Bus on PXI Express chassis, and a Micro-D GPIB connector for GPIB instrument connection, for hybrid PXI-based testing system control.

![The image displays a white document icon with a folded top-left corner. Faint horizontal gray lines appear across the paper, resembling text or a list. A large, bold red checkmark is superimposed diagonally over the document.](.pxie-3987-50-17056-1000-10/f8ac38f2402c99d0ebc167d46d603a49cc55e76194ed4694401275cca51ba29c.jpg)
NOTE:

Memory addressing over 4GB is OS-dependent, such that a 32-bit operating system may be unable to address memory space over 4GB. To fully utilize memory, 64-bit operating systems are required.

# 1.1 Features

 PXITM-5 PXI Express Hardware Specification Rev.1.0
Intel® Core™ i7-7820EQ processor for maximum computing power, 3.7GHz maximum in single-core, Turbo Boost mode.
 Dual Channel DDR4 SODIMM
 Up to 32GB 2400MHz
 Maximum System Throughput 16GB/s
 PXI Express Link Capability
 Four Links Configuration: x4 x4 x4 x4
 Two Links Configuration: x16 x8
 Pre-integrated SATA solid state drive at 240GB
 Supports 2.5” HDD or SSD
 SATA 6.0 Gb/s
 Supports AHCI
 Integrated I/O
 Dual Gigabit Ethernet ports
 Two USB 3.0 Ports
 Four USB 2.0 Ports
 Built-in GPIB (IEEE488) controller
 Dual DisplayPort connectors
 One COM port (D-sub9 serial)
 Trigger I/O for advanced PXITM trigger functions
 OS
 Microsoft Windows 10 64 bit

# 1.2 Specifications

![This diagram illustrates the architecture of a mobile computing platform, specifically connecting a processor, chipset, and various I/O controllers to front and rear connectors.\n\n**Central Processing & Memory**\n*   **Mobile 7th Gen Intel Core i7-7820EQ Processor (formerly 'Kaby Lake-H')** connects to **DDR4 2133/2400 MHz SODIMM x2** via **Memory Bus**.\n*   The Processor connects to the **Mobile Intel QM175 Chipset** via **Intel FDI** and **DMI 3.0**.\n*   The Processor connects to **DisplayPort Connector x2** (under Front Panel Connectors) via **DP/HDMI Dual Mode**.\n\n**Chipset Interconnections**\nThe **Mobile Intel QM175 Chipset** serves as a hub connecting to several controllers and ports:\n*   Connects to **GPIB Controller** via **PCIe x1**.\n*   Connects to **GbE Controller I219** via **PCIe x1**.\n*   Connects to **GbE Controller I210** via **PCIe x1**.\n*   Connects to **2.5' SATA Storage** via **SATA**.\n*   Connects to **USB 3.0 Connector x2** via **USB 3.0**.\n*   Connects to **USB 2.0 Connector x4** via **USB 2.0**.\n*   Connects to **LCP-COM Port** via **LPC**.\n*   Connects to the **SMBus Controller / Programmable MUX** block via **PCIe x1**.\n\n**Expansion & Rear Connections**\n*   **Mobile 7th Gen Intel Core i7-7820EQ Processor** connects to **PCI Express Switch (PCI Express 3.0)** via **PCIe 3.0 x16**.\n*   The **PCI Express Switch** connects to **Rear Connectors to PXI Express Chassis** via **PCIe 3.0 2 Link Mode (x16 x8) or PCIe 3.0 4 Link Mode (x4 x4 x4 x4)**.\n\n**Peripheral & I/O Connections**\n*   **GPIB Controller** connects to **GPIB Connector**.\n*   **GbE Controller I219** connects to **GbE Connector**.\n*   **GbE Controller I210** connects to **GbE Connector**.\n*   **LCP-COM Port** connects to **COM Port Connector (RS-232/422/485)**.\n*   **SMBus Controller / Programmable MUX** connects to **SMB Connector** via **Trigger Signal**.\n*   The **SMBus Controller / Programmable MUX** connects to **Rear Connectors to PXI Express Chassis** via **SMBus** and **Trigger Bus**.](.pxie-3987-50-17056-1000-10/ebca39485fb4ca994f5cc7586d09af507c87c895e973af0f3f457f128edabaf5.jpg)

Figure 1-1: PXIe-3987 Functional Block Diagram

# Processor

 Intel® Core™ i7-7820EQ 3.0GHz processor
 DMI (Direct Media Interface) 3.0 with 8GT/s bandwidth in each direction

# Chipset

Mobile Intel® QM175 chipset

# Memory

 Two standard 260-pin DDR4 SODIMM sockets
 Supports 2133/2400MHz RAM up to 32 GB total
 Supports non-ECC, unbuffered memory

![The image displays a white document icon featuring faint horizontal lines near the bottom, overlaid with a large, bold red checkmark.](.pxie-3987-50-17056-1000-10/bd9d72a382435d6adf6fba6cf4677cd55b71eab9c28cc73c1a5500f960a9464f.jpg)
NOTE:

The externally accessible SODIMM socket can accept replacement DDR4 DRAM DIMM modules.

PXIe-3987 specifications and stability guarantees are only supported when ADLINK-provided DDR4 DRAM SODIMM modules are used.

# Video

 DisplayPort supports up to 3840x 2160 @ 60 Hz resolution
 DVI (with passive DisplayPort-to-DVI adapter) supports resolution up to 1920 x 1200 @ 60 Hz

![The image displays a white document icon featuring horizontal grey lines. A large, thick red checkmark is superimposed over the center of the document, slanting upwards from left to right.](.pxie-3987-50-17056-1000-10/c18ff8fe2f400ff4f1446c992511ccb85c355ec647019a86e2fd193a991ec645.jpg)
NOTE:

DisplayPort adapters for other standards are available, with maximum available resolution dependent on the adapter chosen

# Hard Drive

Built-in 2.5” 500GB SATA hard drive or 240GB SATA solid state hard drive.

# I/O Connectivity

Dual Gigabit Ethernet controllers through two RJ-45 connectors with speed/link/active LED on the faceplate, with both supporting Wake on LAN.

# USB

Four USB 2.0 and two USB 3.0 ports on the faceplate.

# GPIB

Onboard IEEE488 GPIB controller through Micro-D 25-pin connector on the faceplate.

# Trigger I/O

One SMB connector on the faceplate to route an external trigger signal to/from PXI trigger bus

# Dimensions (3U PXI module)

3U/4-slot PXI standard

# Weight

1.0 kg (exclusive of packaging)

Environmental

<table><tr><td>Operating temperature with SSD</td><td>0 to 55°C</td></tr><tr><td>Operating temperature with HDD</td><td>0 to 50°C</td></tr><tr><td>Storage temperature</td><td>-20 to 70°C</td></tr><tr><td>Relative humidity , non-condensing</td><td>5 to 95%</td></tr></table>

# Shock and Vibration

Functional shock 30 G, half-sine, 11 ms pulse duration

Random vibration:

 Operating 5 to 500 Hz, 0.21 Grms, 3 axes
 Non-operating 5 to 500 Hz, 2.46 Grms, 3 axes

![An icon depicting a white document with horizontal lines and a folded top-right corner, overlaid with a large red checkmark.](.pxie-3987-50-17056-1000-10/79fb446796b541f0579d93b7280757a5b5a6806590781e6989d17c9a420a4339.jpg)
NOTE:

Environmental & Shock and Vibration values are only guaranteed with use of an ADLINK-provided SSD/HDD

# Certification

Electromagnetic compatibility:

 EN 61326-1 (IEC 61326-1): Class A emissions; Basic immunity
 EN 55011 (CISPR 11): Group 1, Class A emissions
 EN 55032 2015/AC: 2016 Class A
 EN 55032 2015/AC: 2016 Class B
 EN 55024 2010+ A1: 2015
 EN 61000-3-2:2014 : Class A
 EN 61000-3-3:2013 : Class A
 EN 55024:2010+A1:2015 : Immunity
 FCC 47 CFR Part 15 Subpart A (Class A)
 FCC 47 CFR Part 15 Subpart B (Class B)
 ICES-001 Class A
 ICES-003 Issue 6-2016
 AS/NZS CISPR 11: Group 1, Class A emissions
 AS/NZS CISPR 32: 2015 (Ed 2.0)/C1:2016 : Class B

The PXIe-3987 meets the essential requirements of applicable European Directives.

Power Requirements

<table><tr><td>Typical Consumption</td><td>DC +3.3V</td><td>DC +5V</td><td>DC +12V</td></tr><tr><td>Typical operation(Measured while W10 is idle)</td><td>5A</td><td>2.5A</td><td>2A</td></tr><tr><td>Heavy operation(Measured while W10 is under heavy CPU and storage utilization)</td><td>5A</td><td>2.8A</td><td>8A</td></tr></table>

# 1.3 I/O and Indicators

# 1.3.1 Front Panel

![ADLINK\nPXIe-3987\nHD USR\nPXIe Embedded\nController\nPW\nI\nH\nG\n2\nTRIG\nSS\nCOM\nE\nF\nGPIB](.pxie-3987-50-17056-1000-10/41790b96e606e7b61e06eb40e8b23049127ecf4cf8fc77dc774cf8c0c51fe564.jpg)

Figure 1-2: PXIe-3987 Front Panel

<table><tr><td>A</td><td>Reset Button</td><td>F</td><td>GPIB Connector (Micro D-Sub 25P)</td></tr><tr><td>B</td><td>2X DisplayPort</td><td>G</td><td>2X Gigabit Ethernet</td></tr><tr><td>C</td><td>2X USB 3.0</td><td>H</td><td>PXI Trigger</td></tr><tr><td>D</td><td>4X Type-A USB 2.0</td><td rowspan="2">I</td><td rowspan="2">LED indicators</td></tr><tr><td>E</td><td>COM port (D-sub9 serial)</td></tr></table>

Table 1-1: Front Panel Legend

# PXI Trigger Connector

![Ground\nTrigger](.pxie-3987-50-17056-1000-10/88dc405c6e3e30348a563315127396e1523ccb5f4adf65716c25af2b5680825c.jpg)

Figure 1-3: PXI Trigger SMB Jack

The PXI trigger connector is a SMB jack, used to route external trigger signals to or from the PXI backplane. Trigger signals are TTL-compatible and edge sensitive. The PXIe-3987 provides four trigger routing modes from/to the PXI trigger connector to synchronize PXI modules, including

 From a selected trigger bus line to PXI trigger connector
 From the PXI trigger connector to a selected trigger bus line
 From software trigger to a selected trigger bus line
 From software trigger to PXI trigger connector

All trigger modes are programmable by the provided driver.

# DisplayPort Connectors

Provide monitor connection, with, if connecting to VGA/DVI/HDMI monitors, installation of requisite adapters required. Dual display function is also supported.

![19\n1\n20\n2](.pxie-3987-50-17056-1000-10/b9a076ac38f0bef6a213145be4e7b458ee2616e97fc1c753d4e885e1ad1ac136.jpg)

Figure 1-4: DisplayPort Connector

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>CN_DDPx0+</td><td>11</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>12</td><td>CN_DDPx3-</td></tr><tr><td>3</td><td>CN_DDPx0-</td><td>13</td><td>CN_DDPx_AUX_SEL</td></tr><tr><td>4</td><td>CN_DDPx1+</td><td>14</td><td>CN_DDPx_CONFIG2</td></tr><tr><td>5</td><td>GND</td><td>15</td><td>CN_DDPx_AUX+</td></tr><tr><td>6</td><td>CN_DDPx1-</td><td>16</td><td>GND</td></tr><tr><td>7</td><td>CN_DDPx2+</td><td>17</td><td>CN_DDPx_AUX-</td></tr><tr><td>8</td><td>GND</td><td>18</td><td>CN_DDPx_HPD</td></tr><tr><td>9</td><td>CN_DDPx2-</td><td>19</td><td>GND</td></tr><tr><td>10</td><td>CN_DDPx3+</td><td>20</td><td>+V3.3_DDPx_PWR</td></tr></table>

Table 1-2: DisplayPort Pin Assignment

# 1.3.2 GPIB Connector

The GPIB connector on PXIe-3987 is a micro D-sub 25P connector, controlling external bench-top instruments. Connection to other instruments requires the optional ACL-IEEE488-MD1-A cable. The on-board GPIB controller provides:

 Full compatibility with IEEE 488 standard
 Up to 1.5MB/s data transfer rates
 Onboard 2 KB FIFO for read/write operations
 Driver APIs are compatible with NI-488.2 driver software
 Connection with up to 14 instruments

![1\n13\n14\n25](.pxie-3987-50-17056-1000-10/00721767977d6f67747535370b07615be6d483e60d7964d394d272ea15e3d99a.jpg)

Figure 1-5: GPIB Connector

<table><tr><td>Pin</td><td>Signal</td><td>Description</td><td>Pin</td><td>Signal</td><td>Description</td></tr><tr><td>1</td><td>DIO1#</td><td>GPIB Data 1</td><td>14</td><td>DIO5#</td><td>GPIB Data 5</td></tr><tr><td>2</td><td>DIO2#</td><td>GPIB Data 2</td><td>15</td><td>DIO6#</td><td>GPIB Data 6</td></tr><tr><td>3</td><td>DIO3#</td><td>GPIB Data 3</td><td>16</td><td>DIO7#</td><td>GPIB Data 7</td></tr><tr><td>4</td><td>DIO4#</td><td>GPIB Data 4</td><td>17</td><td>DIO8#</td><td>GPIB Data 8</td></tr><tr><td>5</td><td>EOI</td><td>End Or Identify</td><td>18</td><td>REN</td><td>Remote Enable</td></tr><tr><td>6</td><td>DAV</td><td>Data Valid</td><td>19</td><td>Ground</td><td>Signal Ground</td></tr><tr><td>7</td><td>NRFD</td><td>Not Ready For Data</td><td>20</td><td>Ground</td><td>Signal Ground</td></tr><tr><td>8</td><td>NDAC</td><td>No Data Accepted</td><td>21</td><td>Ground</td><td>Signal Ground</td></tr><tr><td>9</td><td>IFC</td><td>Interface Clear</td><td>22</td><td>Ground</td><td>Signal Ground</td></tr><tr><td>10</td><td>SRQ</td><td>Service Request</td><td>23</td><td>Ground</td><td>Signal Ground</td></tr><tr><td>11</td><td>ATN</td><td>Attention</td><td>24</td><td>Ground</td><td>Signal Ground</td></tr><tr><td>12</td><td>Chassis Ground</td><td>Chassis Ground</td><td>25</td><td>Ground</td><td>Signal Ground</td></tr><tr><td>13</td><td>Ground</td><td>Signal Ground</td><td></td><td></td><td></td></tr></table>

Table 1-3: GPIB Pin Description

# 1.3.3 Reset Button

The reset button, activated by insertion of any pin-like implement, executes a hard reset for the PXIe-3987.

# 1.3.4 LED Indicators

Three LED indicators on the faceplate indicate operational status of the PXIe-3987, as follows.

![HD USR\n● ○\nPW ●](.pxie-3987-50-17056-1000-10/23fdb49f0836d71795e794f3c5abe193c961934f4842e8e54eafbd2cbd8a96fa.jpg)

Figure 1-6: PXIe-3987 LED Indicators

<table><tr><td>LED</td><td>Color</td><td>Description</td></tr><tr><td>PW</td><td>Green</td><td>Indicates system power, remaining lit when the system boots normally and main power supply is functioning</td></tr><tr><td>HD</td><td>Yellow</td><td>Indicates operating state of the HDD or SSD, flashing during access to or activity on the SATA HDD.</td></tr><tr><td>USR</td><td>Blue</td><td>User-programmable LED indicator</td></tr></table>

Table 1-4: LED Indicator Legend

# 1.3.5 USB 2.0 Ports

The PXIe-3987 provides four USB 2.0 ports via USB Type A connectors on the faceplate, all compatible with hi-speed, full-speed and low-speed USB devices. Supported boot devices include USB flash drive, USB floppy, USB CD-ROM, and others, with boot priority and device settings configurable configured in BIOS. Please see Section B.5.1: Boot Configuration for more information.

![Pure electrical connector pinout diagram without any text or symbols](.pxie-3987-50-17056-1000-10/70cf3aa9190e04f303d47ac159e5f89a3e04fbb53ffa88ff9598a137c8912ce7.jpg)

![1\n2\n3\n4](.pxie-3987-50-17056-1000-10/7b12a10b383a3dc8e64d0bb0452055305aaa17db99f0d1fe20403f5c24775351.jpg)

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1/5</td><td>Power 5V</td></tr><tr><td>2/6</td><td>USB Data-</td></tr><tr><td>3/7</td><td>USB Data +</td></tr><tr><td>4/8</td><td>Ground</td></tr></table>

Table 1-5: USB 2.0 Port Pin Assignment

# 1.3.6 Gigabit Ethernet Ports

Dual Gigabit Ethernet connection is provided on the PXIe-3987 front panel.

<table><tr><td>Pin</td><td>1000Base-T Signal</td><td>100/10Base-T Signal</td></tr><tr><td>1</td><td>MDI0+</td><td>TX+</td></tr><tr><td>2</td><td>MDI0-</td><td>TX-</td></tr><tr><td>3</td><td>MDI1+</td><td>RX+</td></tr><tr><td>4</td><td>MDI2+</td><td>Reserved</td></tr><tr><td>5</td><td>MDI2-</td><td>Reserved</td></tr><tr><td>6</td><td>MDI1-</td><td>RX-</td></tr><tr><td>7</td><td>MDI3+</td><td>Reserved</td></tr><tr><td>8</td><td>MDI3-</td><td>Reserved</td></tr></table>

Table 1-6: PXIe-3987 Ethernet Port Pin Assignments

The Ethernet ports each include two LED indicators, one Active/ Link indicator and one Speed indicator, functioning as follows.

<table><tr><td></td><td>LED</td><td>Status</td><td>Description</td></tr><tr><td rowspan="3">&lt;img src="images/c52e47333d7324ec5b04c1ee33e525db3485b8d69f4262e9f4776634228689b8.jpg"/&gt;</td><td rowspan="3">Active/Link (Yellow)</td><td>Off</td><td>Ethernet port is disconnected</td></tr><tr><td>On</td><td>Ethernet port is connected with no data transmission</td></tr><tr><td>Flashing</td><td>Ethernet port is connected with data transmitted/received</td></tr><tr><td rowspan="3">&lt;img src="images/178ce022fd622e9ae339a94f11a59372b60ed62b735f3c45da712386bd4af312.jpg"/&gt;</td><td rowspan="3">Speed (Green/Orange)</td><td>Off</td><td>10 Mbps</td></tr><tr><td>Green</td><td>100 Mbps</td></tr><tr><td>Orange</td><td>1000 Mbps</td></tr></table>

# 1.3.7 USB 3.0 Ports

The PXIe-3987 provides two Type A USB 3.0 ports on the front panel, supporting SuperSpeed, Hi-Speed, full-speed, and lowspeed transmission for downstream. Multiple boot devices, including USB flash, USB external HD, and USB CD-ROM drives are supported, with boot priority configured in BIOS.

![The image displays a graphic of a white piece of lined paper with a large, thick red checkmark drawn diagonally across it.](.pxie-3987-50-17056-1000-10/38879e710d7270926a0f370583c1c0c8fe163cf0a7633065cf5d10a9db143226.jpg)
NOTE:

USB 3.0 may not be supported by the OS installation programs/environment. Use USB 2.0 ports for OS installation if necessary.

# 1.3.8 COM Port

A COM port on the front panel with D-sub 9P connectors supports RS-232/RS-422/RS-485 by BIOS selection.

![1\n5\n6\n9](.pxie-3987-50-17056-1000-10/4a2c51efcde68df7a6cc0cac8e43bf37b07b3a716abfff533b32f8b8d0023a4f.jpg)

Figure 1-7: COM Port

<table><tr><td rowspan="2">Pin</td><td colspan="3">Signal Name</td></tr><tr><td>RS-232</td><td>RS-422</td><td>RS-485</td></tr><tr><td>1</td><td>DCD#</td><td>TXD422-</td><td>485DATA-</td></tr><tr><td>2</td><td>RXD</td><td>TXD422+</td><td>485DATA+</td></tr><tr><td>3</td><td>TXD</td><td>RXD422+</td><td>N/S</td></tr><tr><td>4</td><td>DTR#</td><td>RXD422-</td><td>N/S</td></tr><tr><td>5</td><td>GND</td><td>N/S</td><td>N/S</td></tr><tr><td>6</td><td>DSR#</td><td>N/S</td><td>N/S</td></tr><tr><td>7</td><td>RTS#</td><td>N/S</td><td>N/S</td></tr><tr><td>8</td><td>CTS#</td><td>N/S</td><td>N/S</td></tr><tr><td>9</td><td>RI#</td><td>N/S</td><td>N/S</td></tr></table>

Table 1-7: D-Sub COM Port Signal Functions

# 1.3.9 Onboard Connections and Settings

![ADLINK\n500GB\nWD Blue®\nA\nB\nC\n0.47μH\n1734NO\nR10B\nR27\nR10D\nR39\nR528\nSWT\nClearNormal\nA\nB\nC](.pxie-3987-50-17056-1000-10/a80b7203653a0737027d08857a657cf036f9f8edbb9175c81d45592a603ef5cf.jpg)

Figure 1-8: PXIe-3987 Onboard Configuration

<table><tr><td>A</td><td>Clear CMOS switch</td></tr><tr><td>B</td><td>SATA connector</td></tr><tr><td>C</td><td>System battery</td></tr></table>

Table 1-8: Onboard Configuration Legend

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# 2 Getting Started

This chapter describes procedures for installing the PXIe-3987 and making preparations for its operation, including hardware and software setup. Please note that the PXIe-3987 is shipped with RAM and HDD or SSD preinstalled. Please contact ADLINK or authorized dealer if there are any problems during the installation.

![The image displays a document icon featuring a white page with a folded top-left corner and thin horizontal lines representing text. A large, bold red checkmark is superimposed over the center of the page.](.pxie-3987-50-17056-1000-10/ec6b3439781d304930f8a8f8f4546ab8be39cb81b31f6be980cfae0de2d2b8ad.jpg)
NOTE:

Diagrams and illustrated equipment are for reference only. Actual system configuration and specifications may vary.

# 2.1 Package Contents

Before beginning, check the package contents for any damage and ensure that the following items are included:

 PXIe-3987 Controller (equipped with RAM and HDD or SSD)
 PXIe-3987 Quick Start Guide

If any of these items are missing or damaged, contact the dealer from whom you purchased the product. Save the shipping materials and carton in case you want to ship or store the product in the future.

![The image displays a vertical warning sign. At the top is a red triangle with a white border containing a white exclamation point. Below the triangle, the word 'WARNING' is printed in black, uppercase letters.](.pxie-3987-50-17056-1000-10/87dc7ac6d1f95a2a6b542ddfdb6cc591cbea22d46caf9af735130a10f685d8a5.jpg)

Do not install or apply power to equipment that is damaged or missing components. Retain the shipping carton and packing materials for inspection. Please contact your ADLINK dealer/ vendor immediately for assistance and obtain authorization before returning any product.

# 2.2 Operating System Installation

For more detailed information about the operating system, refer to the documentation provided by the operating system manufacturer. Preferred/supported operating systems for PXIe-3987 are:

 Windows 10 64-bit
 For other OS support, please contact ADLINK

Most operating systems require initial installation from a hard drive, floppy drive, or CD-ROM drive. The PXIe-3987 controller supports USB CD-ROM drive, USB flash disk, USB external hard drive, or a USB floppy drive as the first boot device. Please see Section B.5.1: Boot Configuration for information about setting the boot devices. These devices should be configured, installed, and tested with the supplied drivers before attempting to load the new operating system.

![The image displays a simple graphic of a white document or piece of paper with a folded top-right corner. Faint horizontal lines run across the paper, resembling a checklist or form. Overlaid on the document is a large, bold, red checkmark (or tick) that stretches diagonally from the bottom left towards the top right.](.pxie-3987-50-17056-1000-10/59fe7feb67aa8ae6a5466f951bda1cdcbfd70daff3663afe6d0cf051a3246c78.jpg)
NOTE:

Read the release notes and installation documentation provided by the operating system vendor. Be sure to read all the README files or documents provided on the distribution disks, as these typically note documentation discrepancies or compatibility problems.

1. Select the appropriate boot device order from the BIOS Boot Setup Menu based on the OS installation media used. For example, if the OS is distributed on a bootable installation CD, select USB CD-ROM as the first boot device and reboot the system with the installation CD in the USB CD-ROM drive
2. Proceed with the OS installation as directed and be sure to select appropriate device types if prompted. Refer to the appropriate hardware manuals for specific device types and compatibility modes of ADLINK PXI products.
3. When installation is complete, reboot the system and set the boot device order in the SETUP boot menu accordingly.

# 2.2.1 Installation Environment

When preparing to install any equipment described in this manual, please refer to Important Safety Instructions.

Only install equipment in well lit areas on flat, sturdy surfaces with access to basic tools such as flat- and cross-head screwdrivers, preferably with magnetic heads as screws and standoffs are small and easily misplaced.

# Recommended Installation Tools include:

 Phillips (cross-head) screwdriver
 Flat-head screwdriver
 Anti-static wrist strap
 Anti-static mat

ADLINK PXIe-3987 system controllers are electrostatically sensitive and can be easily damaged by static electricity. The equipment must be handled on a grounded anti-static mat, and operators must wear an anti-static wristband, grounded at the same point as the anti-static mat.

Inspect the carton and packaging for damage. Shipping and handling may cause damage to the contents. Ensure that all contents are undamaged before installing.

![A yellow triangular warning sign featuring a large black exclamation point in the center. Below the triangle is a white rectangular box containing the black text 'CAUTION:'.](.pxie-3987-50-17056-1000-10/b1347bb0164b847492c5c0735082fc3e2b4e9d431d6bf037d57bac775ab0d7cb.jpg)

All equipment must be protected from static discharge and physical shock. Never remove any of the socketed parts except at a static-free workstation. Use the antistatic bag shipped with the product to handle the equipment and wear a grounded wrist strap when servicing or installing.

# 2.2.2 Installing the PXIe-3987

1. Remove all screw caps (x4).

![The image displays a four-panel comparison illustrating a hardware modification on a metal electronic enclosure.\n\n**Top Row:**\n*   **Left Panel:** Shows a metal casing with a green circuit board (marked 'CE'). Red circles highlight two black plastic pins inserted into the metal.\n*   **Right Panel:** Shows the same setup, but the black pins have been replaced by silver screws, which are highlighted by red circles. A red arrow points from the left panel to the right panel.\n\n**Bottom Row:**\n*   **Left Panel:** Shows a view of the casing's interior/side. Red circles highlight two black pins. The number '67255' is visible on a metal plate below the circuit board.\n*   **Right Panel:** Shows the same view with the black pins replaced by silver screws, highlighted by red circles. A red arrow points from the left panel to the right panel.](.pxie-3987-50-17056-1000-10/26fa37c3a07dc88c43989804139013ccaa924c68ea17585bd2de574a1761d659.jpg)

2. Release the red locking lever

![Close-up of a black mechanical component with red and black parts, showing a red arrow pointing to a specific area (no text or symbols visible)](.pxie-3987-50-17056-1000-10/5dd5c45111a6896f55827588dc143a1f8e7ff8f79fa9f6ab34345b5aeb52fcc0.jpg)

3. Depress the latch

![Close-up of a mechanical device with a red arrow pointing to a black plastic clip (no visible text or symbols)](.pxie-3987-50-17056-1000-10/010d98a2b1a21cdf302754bf20acb9f1e5402ac3e339955e54073fc6c3545752.jpg)

4. Locate the system controller slot of the chassis (Slot 1).

![ADLINK\n1\n2 H\n3 H\n4 H](.pxie-3987-50-17056-1000-10/843ebd922dd0537ac7ebbc830dcba9ade8404118ff0f4f82c191d34dcafcb4be.jpg)

5. Align the controller’s top and bottom edges with the card guides, and carefully slide the PXIe-3987 into the chassis, as shown

![ADLINK\n2 H 3 H 4 H\nADLINK\n2 H 3 H 4 H](.pxie-3987-50-17056-1000-10/49bee7db636d8b53f86d83a99c0fd257f6081610b81affbe963963f8a6d6ba44.jpg)

![Close-up of a computer motherboard with a red circle highlighting a component, no visible text or symbols](.pxie-3987-50-17056-1000-10/fe780fd2c8b1cce6c365def1b90489e2a8406fdc700ba7700dac707d6391ecbd.jpg)

6. Elevate the latch until the PXIe-3987 is fully seated in the chassis backplane. The alignment pin on the rear of the latch can be threaded into the best fit alignment port in the chassis rail.
7. Fasten the four mounting screws on the faceplate and connect all peripheral devices.

# 2.2.3 Replacing the Hard Drive or Solid State Drive

The PXIe-3987 provides a SATA 3.0 port with a pre-installed 2.5" SATA hard drive or solid state drive. Replacing the HDD or SSD is accomplished as follows.

1. Locate the five screws attaching the hard drive housing to the PXIe-3987 controller, as shown.

![WD Blue™\nWDS2000/PCX\n500GB\nWDS2000/PCX - 427V433\nSIN 1611-1848-1916\nADLINK\nTECHNOLOGY INC.\nWDS2000/PCX - 427V433\nWDS2000/PCX - 427V433\nWDS2000/PCX - 427V433\nWDS2000/PCX - 427V433\nWDS2000/PCX - 427V433\nWDS2000/PCX - 427V433\nWDS2015/1848-1916\nWDS2015/1848-1916\nWDS2015/1848-1916\nWDS2015/1848-1916\nWDS2015/1848-1916\nWDS2015/1848-1916\nWDS2015/1848-1\nWDS2015/1848-1916\nWDS2015/1848-1916\nWDS2015/1848-1916\nWDS2015/1848-1916\nWDS2015/1848-1916\nWDS2015/1848-1.5\nWDS2015/1848-1.5\nWDS2015/1848-1.5\nWDS2015/1848-1.5\nWDS2015/1848-1.5\nWDS2015/1848-1.5\nWDS2015/1848-1.5\nWDS1611-1848-1916\nWDS1611-1848-1916\nWDS1611-1848-1916\nWDS1611-1848-1916\nWDS1611-1848-1916\nWDS2000/PCX - 427V433\nWDS2000/PCX - 427V433\nWDS2000/PCX - 427V433\nWDS2000/PCX - 427V433\nWDS2000/PCX - 427V433\nWDS2500/PCX - 427V433\nWDS2500/PCX - 427V433\nWDS2500/PCX - 427V433\nWDS2500/PCX - 427V433\nWDS2500/PCX - 427V433\nWDS2500/PCx - 427V433\nWDS2500/PCx - 427V433\nWDS2500/PCx - 427V433\nWDS2500/PCx - 427V433\nWDS2500/PCx - 427V433\nWDS2500/PCx - 42TENRINT 7.5%\nWDS2500/PCx - 42TENRINT 7.5%\nWDS2500/PCx - 42TENRINT 7.5%\nWDS2500/PCx - 42TENRINT 7.5%\nWDS2500/PCx - 42TENRINT 7.5%\nWDS2500/PCx - 7.5%\nWDS2500/PCx - 7.5%\nWDS2500/PCx - 7.5%\nWDS2500/PCx - 7.5%\nWDS2500/PCx - 7.5%\nWDS2500/PCx - 7.5%\nWDS2500/PCx - 7.5%\nWDS25C/E-F-P\nE-E-F-P](.pxie-3987-50-17056-1000-10/503a55988ba2611e01c61704fc435d51478928885f4504b63a2ac042a52a541d.jpg)

2. Remove the screws.
3. Gently lift and remove the housing with the installed HDD or SSD.
4. Locate the four screws (two on each side, as shown) fix-

ing the hard drive, and remove.

![0025-T5S-AE\nSF D6Y17EJ\nZ060-80025-001 REV P2\nPP1\nPP2\nPP3\nPP4\nPP5\nPP6\nPP7\nPP8\nPP9\nPP10\nPP11\nPP12\nPP13\nPP14\nPP15\nPP16\nPP17\nPP18\nPP19\nPP20\nPP21\nC1\nE46 E47 E48 E49 E50 E51 E52 E53 E54 E55 E56 E57 E58 E59 E60 E61 E62 E63 E64 E65 E66 E67 E68 E69 E70 E71 E72 E73 E74 E75 E76 E77 E78 E79 E80 E81 E82 E83 E84 E85 E86 E87 E88 E89 E90 E91 E92 E93 E94 E95 E96 E97 E98 E99 E100 E101 E102 E103 E104 E105 E106 E107 E108 E109 E110 E111 E112 E113 E114 E115 E116 E117 E118 E119 E120 E121 E122 E123 E124 E125 E126 E127 E128 E129 E130 E131 E132 E133 E134 E135 E136 E137 E138 E139 E140 E141 E142 E143 E144 E145 E146 E147 E148 E149 E150 E151 E152 E153 E154 E155 E156 E157 E158 E159 E160 E161 E162 E163 E164 E165 E166 E167 E168 E169 E170 E171 E172 E173 E174 E175 E176 E177 E178 E179 E180 E181 E182 E183 E184 E185 E186 E187 E188 E189 E190 E191 E192 E193 E194 E195 E196 E197 E198 E199 E200\nE20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C 20 C](.pxie-3987-50-17056-1000-10/9dc70ff481c88cdadf97052cb996236b59e724103dbfe737a746f97117d19f75.jpg)

5. To install a HDD or SSD or other compatible SATA hard drive, reverse the steps and reinstall the PXIe-3987 into the PXI system.

# 2.2.4 Replacing the Battery Backup

The PXIe-3987 is provided with a 3.0 V “coin cell” lithium battery, replacement of which is as follows.

1. Turn off the PXI chassis.
2. Remove the PXIe-3987 embedded controller from the chassis. Observe all anti-static precautions.
3. To remove the battery, gently insert a small (approx. 5 mm) flathead screwdriver under the battery at the negative retaining clip. Gently pry up and the battery should easily pop out.
4. Place a fresh identical battery (CR2032 or equivalent) in the socket, ensuring that the positive pole (+) is facing upwards. The battery is most easily seated by first being

inserted under the positive retaining clip, and then pushed downward at the negative retaining clip. The battery should easily snap into position.

5. Reinstall the embedded controller into the PXI chassis and restore power.

# 2.2.5 Clearing CMOS

In the event of a system malfunction causing the PXIe-3987 to halt or fail to boot, clear the CMOS and restore the controller BIOS to its default settings. To clear the CMOS:

1. Shut down the controller operating system and turn off the PXI Chassis.
2. Remove the PXIe-3987 from the chassis. Observe all anti-static precautions.
3. Locate the CMOS clear switch (SW1) on the board (see Section 1.3.9: Onboard Connections and Settings). Move the switch from Normal position

![Simple gray rectangle with a white top-right square and a small white dot at the bottom (no text or symbols)](.pxie-3987-50-17056-1000-10/731c5aecdd79515f482f36c88a0886027b39dcf2eb4d72056d969cfb7f8dd1c5.jpg)

to Clear position

![Simple graphic with a white rectangle and gray rectangle, no text or symbols present.](.pxie-3987-50-17056-1000-10/1712d7f6eba343f6025b25ed38a95261e98ba0416b546dfe4a9df40574b6a0fe.jpg)

and wait for 5 seconds, then return the switch to Normal position.

4. Remount the controller into the PXI chassis.
5. Press "Delete" or "ESC" to enter the BIOS setup when the splash logo appears.
6. Press "F9" to load Optimized defaults in BIOS setup
7. Modify the system date and time
8. Press "F10" to save configuration and exit

# 3 Driver Installation

Windows 10 carries most device drivers for the PXIe-3987, builtin. Others can be downloaded from the ADLINK PXIe-3987 Product Page.

After downloading, execute the Setup file, and follow the instructions to complete installation for the following drivers

 Intel® chipset driver
 Intel® graphics driver
 Intel® Ethernet driver
? Intel® RST driver
 Intel® ME driver
 GPIB driver
 PXI trigger I/O driver
 PXI platform service (for more information, please refer to the ADLINK PXI Platform Service Manual)

This page intentionally left blank.

# Appendix A - PXI Trigger I/O Function Reference

This appendix describes use of the PXI trigger I/O function library for the PXIe-3987 controller, to program routing of trigger signals between the trigger I/O SMB connector on the faceplate and the PXI trigger bus on the backplane. API files are located in the installation directory of the PXI Trigger I/O driver.

# A.1 Data Types

The PXIe-3987 library uses these data types in pxitrigio.h in the directory X:\ADLINK\PXI Trigger IO\Include. It is recommended that you use these data types in your application programs. The table shows the data type names, ranges, and corresponding data types in C/C++, Visual Basic, and Delphi for reference.

<table><tr><td rowspan="2">Type</td><td rowspan="2">Description</td><td rowspan="2">Range</td><td colspan="3">Type</td></tr><tr><td>C/C++ (for 32-bit compiler)</td><td>Visual Basic</td><td>Pascal (Delphi)</td></tr><tr><td>U8</td><td>8-bit ASCII character</td><td>0 to 255</td><td>unsigned char</td><td>Byte</td><td>Byte</td></tr><tr><td>I16</td><td>16-bit signed integer</td><td>-32768 to 32767</td><td>short</td><td>Integer</td><td>SmallInt</td></tr><tr><td>U16</td><td>16-bit unsigned integer</td><td>0 to 65535</td><td>unsigned short</td><td>Not supported by BASIC, use the signed integer (I16) instead</td><td>Word</td></tr><tr><td>I32</td><td>32-bit signed integer</td><td>-2147483648 to 2147483647</td><td>long</td><td>Long</td><td>LongInt</td></tr><tr><td>U32</td><td>32-bit unsigned integer</td><td>0 to 4294967295</td><td>unsigned long</td><td>Not supported by BASIC, use the signed long integer (I32) instead</td><td>Cardinal</td></tr><tr><td>F32</td><td>32-bit single-precision floating-point</td><td>-3.402823E38 to 3.402823E38</td><td>float</td><td>Single</td><td>Single</td></tr><tr><td>F64</td><td>64-bit double-precision floating-point</td><td>1.7976831348 62315E308 to 1.7976831348 62315E309</td><td>double</td><td>Double</td><td>Double</td></tr></table>

# A.2 Function Library

This section provides detailed definitions of the functions available in the PXIe-3987 function library. Each function includes a description, list of supported cards, syntax, parameter list and Return Code information.

# A.2.1 TRIG\_Init

# Description

Initializes trigger I/O function of PXIe-3987 controller. TRIG\_Init must be called before the invocation of any other trigger I/O function.

# Syntax

```txt
C/C++
I16 TRIG_Init()
Visual Basic
TRIG_Init As Integer
```

# Parameter

None

# Return Code

```txt
ERR_NoError
ERR_BoardBusy
ERR_OpenDriverFail
ERR_GetGPIOAddress
```

# A.2.2 TRIG\_Close

# Description

Closes trigger I/O function of PXIe-3987 controller, releasing resources allocated for the trigger I/O function. Users must invoke TRIG\_Close before exiting the application.

# Syntax

```txt
C/C++
I16 TRIG_Close()
Visual Basic
TRIG_Close() As Integer
```

# Parameter

None

# Return Code

```txt
ERR_NoError
ERR_BoardNoInit
```

# A.2.3 TRIG\_SetSoftTrg

# Description

Generates a TTL trigger signal to the trigger I/O SMB connector on the faceplate or the PXI trigger bus on the backplane by software command

# Syntax

```txt
C/C++
I16 TRIG_SetSoftTrg(U8 Status)
Visual Basic
TRIG_SetSoftTrg (ByVal status As Byte) As Integer
```

# Parameters

Status

Logic level of trigger signal.

Available value description:

0: Logic low

# 1: Logic high

# Return Code

ERR\_NoError

ERR\_BoardNoInit

# A.2.4 TRIG\_Trigger\_Route

# Description

Routes the trigger signal between the trigger I/O SMB connector on the faceplate and the PXI trigger bus on the backplane. This function also allows routing of the softwaregenerated trigger signal to SMB connector or trigger bus.

# Syntax

C/C++

I16 TRIG\_Trigger\_Route (U32 source, U32 dest, U32 halfway)

# Visual Basic

TRIG\_Trigger\_Route (ByVal source As Long, ByVal dest As Long, ByVal halfway As Long) As Integer

# Parameters

source

Source of trigger routing. It can be one of the following values.

<table><tr><td>Available value</td><td>Description</td></tr><tr><td>PXI_TRIG_VAL_SMB</td><td>SMB connector on the faceplate</td></tr><tr><td>PXI_TRIG_VAL_SOFT</td><td>Software-generated trigger signal</td></tr><tr><td>PXI_TRIG_VAL_TRIG0</td><td>PXI trigger bus #0</td></tr><tr><td>PXI_TRIG_VAL_TRIG1</td><td>PXI trigger bus #1</td></tr><tr><td>PXI_TRIG_VAL_TRIG2</td><td>PXI trigger bus #2</td></tr><tr><td>PXI_TRIG_VAL_TRIG3</td><td>PXI trigger bus #3</td></tr><tr><td>PXI_TRIG_VAL_TRIG4</td><td>PXI trigger bus #4</td></tr><tr><td>PXI_TRIG_VAL_TRIG5</td><td>PXI trigger bus #5</td></tr><tr><td>PXI_TRIG_VAL_TRIG6</td><td>PXI trigger bus #6</td></tr><tr><td>PXI_TRIG_VAL_TRIG7</td><td>PXI trigger bus #7</td></tr></table>

dest

Destination of trigger routing. It can be one of the following values.

<table><tr><td>Available value</td><td>Description</td></tr><tr><td>PXI_TRIG_VAL_SMB</td><td>SMB connector on the faceplate</td></tr><tr><td>PXI_TRIG_VAL_TRIG0</td><td>PXI trigger bus #0</td></tr><tr><td>PXI_TRIG_VAL_TRIG1</td><td>PXI trigger bus #1</td></tr><tr><td>PXI_TRIG_VAL_TRIG2</td><td>PXI trigger bus #2</td></tr><tr><td>PXI_TRIG_VAL_TRIG3</td><td>PXI trigger bus #3</td></tr><tr><td>PXI_TRIG_VAL_TRIG4</td><td>PXI trigger bus #4</td></tr><tr><td>PXI_TRIG_VAL_TRIG5</td><td>PXI trigger bus #5</td></tr><tr><td>PXI_TRIG_VAL_TRIG6</td><td>PXI trigger bus #6</td></tr><tr><td>PXI_TRIG_VAL_TRIG7</td><td>PXI trigger bus #7</td></tr></table>

# halfway

Halfway point of trigger routing. This parameter is used only to route the software-generated trigger signal to the SMB connector on the faceplate. In this case, the halfway should be set as one of the trigger bus lines, otherwise as PXI\_TRIG\_VAL\_NONE.

<table><tr><td>Available value</td><td>Description</td></tr><tr><td>PXI_TRIG_VAL_NONE</td><td>No halfway point</td></tr><tr><td>PXI_TRIG_VAL_TRIG0</td><td>PXI trigger bus #0</td></tr><tr><td>PXI_TRIG_VAL_TRIG1</td><td>PXI trigger bus #1</td></tr><tr><td>PXI_TRIG_VAL_TRIG2</td><td>PXI trigger bus #2</td></tr><tr><td>PXI_TRIG_VAL_TRIG3</td><td>PXI trigger bus #3</td></tr><tr><td>PXI_TRIG_VAL_TRIG4</td><td>PXI trigger bus #4</td></tr><tr><td>PXI_TRIG_VAL_TRIG5</td><td>PXI trigger bus #5</td></tr><tr><td>PXI_TRIG_VAL_TRIG6</td><td>PXI trigger bus #6</td></tr><tr><td>PXI_TRIG_VAL_TRIG7</td><td>PXI trigger bus #7</td></tr></table>

# Return Code

```txt
ERR_NoError
ERR_BoardNoInit
ERR_Set_Path
```

# A.2.5 TRIG\_Trigger\_Clear

# Description

Clears the trigger routing setting

# Syntax

```txt
C/C++
I16 TRIG_Trigger_Clear()
Visual Basic
TRIG_Trigger_Clear() As Integer
```

# Parameters

None

# Return Code

```txt
ERR_NoError
ERR_BoardNoInit
ERR_Trigger_Clr
```

# A.2.6 TRIG\_GetSoftTrg

# Description

Acquires the current software trigger state, with default state after system boot of Logic Low

# Syntax

```csv
C/C++
I16 TRIG_GetSoftTrg(U8 *Status)
Visual Basic
TRIG_GetSoftTrg (status As Byte) As Integer
```

# Parameters

```txt
Status
Returns the logic level of software trigger signal
```

Returned value:

0: Logic low

1: Logic high

# Return Code

```txt
ERR_NoError
ERR_BoardNoInit
ERR_Query_Status
```

# A.2.7 TRIG\_Trigger\_Route\_Query Description

Acquires the current trigger signal routing path

# Syntax

C/C++

```txt
I16 TRIG_Trigger_Route_Query (U32* source, U32* dest, U32* halfway)
```

Visual Basic

TRIG\_Trigger\_Route\_Query (source As Long, dest As Long, halfway As Long) As Integer

# Parameters

source

Returns to the current source of trigger routing, with possible values including:

<table><tr><td>Available Definition</td><td>Defined Value</td></tr><tr><td>PXI_TRIG_VAL_NONE</td><td>0</td></tr><tr><td>PXI_TRIG_VAL_SMB</td><td>2</td></tr><tr><td>PXI_TRIG_VAL_SOFT</td><td>3</td></tr><tr><td>PXI_TRIG_VAL_TRIG0</td><td>111</td></tr><tr><td>PXI_TRIG_VAL_TRIG1</td><td>112</td></tr><tr><td>PXI_TRIG_VAL_TRIG2</td><td>113</td></tr><tr><td>PXI_TRIG_VAL_TRIG3</td><td>114</td></tr><tr><td>PXI_TRIG_VAL_TRIG4</td><td>115</td></tr><tr><td>PXI_TRIG_VAL_TRIG5</td><td>116</td></tr><tr><td>PXI_TRIG_VAL_TRIG6</td><td>117</td></tr><tr><td>PXI_TRIG_VAL_TRIG7</td><td>118</td></tr></table>

dest

Returns to the current destination of trigger routing, with possible values including:

<table><tr><td>Available Definition</td><td>Defined Value</td></tr><tr><td>PXI_TRIG_VAL_NONE</td><td>0</td></tr><tr><td>PXI_TRIG_VAL_SMB</td><td>2</td></tr><tr><td>PXI_TRIG_VAL_TRIG0</td><td>111</td></tr><tr><td>PXI_TRIG_VAL_TRIG1</td><td>112</td></tr><tr><td>PXI_TRIG_VAL_TRIG2</td><td>113</td></tr><tr><td>PXI_TRIG_VAL_TRIG3</td><td>114</td></tr><tr><td>PXI_TRIG_VAL_TRIG4</td><td>115</td></tr><tr><td>PXI_TRIG_VAL_TRIG5</td><td>116</td></tr><tr><td>PXI_TRIG_VAL_TRIG6</td><td>117</td></tr><tr><td>PXI_TRIG_VAL_TRIG7</td><td>118</td></tr></table>

halfway

Returns to the current halfway point of trigger routing, with possible values including:

<table><tr><td>Available Value</td><td>Description</td></tr><tr><td>PXI_TRIG_VAL_NONE</td><td>0</td></tr><tr><td>PXI_TRIG_VAL_TRIG0</td><td>111</td></tr><tr><td>PXI_TRIG_VAL_TRIG1</td><td>112</td></tr><tr><td>PXI_TRIG_VAL_TRIG2</td><td>113</td></tr><tr><td>PXI_TRIG_VAL_TRIG3</td><td>114</td></tr><tr><td>PXI_TRIG_VAL_TRIG4</td><td>115</td></tr><tr><td>PXI_TRIG_VAL_TRIG5</td><td>116</td></tr><tr><td>PXI_TRIG_VAL_TRIG6</td><td>117</td></tr><tr><td>PXI_TRIG_VAL_TRIG7</td><td>118</td></tr></table>

# Return Code

```txt
ERR_NoError
ERR_BoardNoInit
ERR_Query_Status
```

# A.2.8 TRIG\_GetDriverRevision

# Description

Acquires the PXI Trigger software driver version; format of the version number is major.minor1.minor2

# Syntax

```txt
C/C++
I16 TRIG_GetDriverRevision(unsigned short *major, unsigned short *minor1, unsigned short *minor2)
```

# Visual Basic

```txt
TRIG_GetDriverRevision (major As Integer, minor1 As Integer, minor2 As Integer) As Integer
```

# Parameters

```txt
major
Returns the major version number of the pxi trigger software driver
minor1
Returns the first minor version number of the pxi trigger software driver
minor2
Returns the second minor version number of the pxi trigger software driver
```

# Return Code

```txt
ERR_NoError
ERR_Query_Revision
```

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# Appendix B BIOS Setup

# B.1 Menu Structure

This section presents the primary menus of the BIOS Setup Utility. Use the following table as a quick reference for the contents of the BIOS Setup Utility. The subsections in this section describe the submenus and setting options for each menu item. The default setting options are presented in bold, and the function of each setting is described in the right hand column of the respective table.

<table><tr><td>Main</td><td>BIOS InformationProcessor InformationPCH InformationSystem Management ▶System Date and Time</td></tr><tr><td>Advanced</td><td>CPU▶Graphics▶USB Configuration▶Onboard Devices Configuration▶PCI and PCIe Configuration▶Advanced Power Management▶Network Stack Configuration▶Intel I210▶Intel I219-LM▶Hardware Health Configuration▶PXle Links Control Configuration▶</td></tr><tr><td>Security</td><td>Password Description▶Administrator Password▶User Password▶Secure Boot▶</td></tr><tr><td>Boot</td><td>Boot Configuration▶CSM Configuration▶Fixed Boot Order Priorities▶</td></tr><tr><td>Save &amp; Exit</td><td>Save Options▶Default Options▶Boot Override▶</td></tr></table>

![The image displays an icon of a white document with a folded top-right corner. Horizontal grey lines run across the lower portion, simulating text lines. A large, bold red checkmark is superimposed over the center of the document.](.pxie-3987-50-17056-1000-10/09912778f6d2eae212daf25b54ee8321ac09edb19dd36f2843f5a77815a2b42f.jpg)
NOTE:

► indicates a submenu

# B.2 Starting the BIOS

1. Power on or reboot the PXIe-3987 controller.
2. Press the &lt;Delete&gt; key when the controller beeps. This should be concurrent with the main startup screen. The BIOS setup program loads after a short delay.
3. The Main menu is displayed when you first enter the BIOS setup program.

![The image displays a graphic icon representing a document. It features a white page with horizontal gray lines running across it. A large, thick red checkmark is superimposed diagonally over the page, extending from the bottom left to the top right.](.pxie-3987-50-17056-1000-10/f917610afcfa17cdf8e939aaa9e5db4c42b114c3cd218b35e084b2eb298a8fe3.jpg)
NOTE:

In most cases, the &lt; Delete &gt; key is used to invoke the setup screen. There are several cases that use other keys, such as &lt; F1 &gt;, &lt; F2 &gt;, and so on.

The main BIOS setup menu is the first screen that you can navigate. Each main BIOS setup menu option is described in this user’s guide.

The Main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. “Grayed” options cannot be configured, “Blue” options can be.

The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it.

# Navigation

The BIOS setup/utility uses a key-based navigation system called hot keys. Most BIOS setup utility hot keys can be used at any time during setup navigation, as follows.

<table><tr><td>Key(s)</td><td>Function</td></tr><tr><td>Right Arrow, Left Arrow</td><td>Moves between different setup menus</td></tr><tr><td>Up Arrow, Down Arrow</td><td>Moves between options within a setup menu</td></tr><tr><td></td><td>Opens a submenu or displays all available settings for a highlighted configuration option</td></tr><tr><td></td><td>Returns to the previous menu and shortcuts to the Exit menu from top-level menus</td></tr><tr><td>&lt;+&gt; and &lt;--&gt;</td><td>Cycles between all available settings</td></tr><tr><td></td><td>Selects time and date fields</td></tr><tr><td></td><td>Opens the general help window for the BIOS</td></tr><tr><td></td><td>Loads previous values into the BIOS</td></tr><tr><td></td><td>Restores optimal default values into the BIOS</td></tr><tr><td></td><td>Saves the current configuration and exits BIOS setup</td></tr></table>

Table B-1: BIOS Hot Key Functions

![Based on the provided image, here is the description of the flowchart:\n\n**Top Section**\n*   **Block:** **BIOS Setup Utility**\n*   **Connection:** An arrow points downward to the text **Screens**.\n\n**Middle Section (Screens)**\n*   **Block:** **Left and Right Keys to Select a Setup Screen**\n*   **Connection:** A dotted arrow points from this block to the first screen in a horizontal sequence.\n*   **Sequence:** **Screen 1** \$\leftrightarrow\$ **Screen 2** \$\leftrightarrow\$ **Screen 3** \$\leftrightarrow\$ **Screen 4** \$\leftrightarrow\$ **Screen 5** (connected by double-headed arrows).\n\n**Bottom Section (Items and Fields)**\n*   **Connection:** An arrow points downward from **Screens** to the text **Items**.\n*   **Block:** **Tab Key to Select Fields** (Left side)\n    *   **Connection:** A dotted line points from this block toward the left side of the items grid.\n*   **Block:** **± To Change Field Values** (Right side)\n    *   **Text layout:** '± To Change' / 'Field Values'\n    *   **Connection:** A dotted line points to the top-right box of the items grid.\n*   **Block:** **Up and Down Keys to Select a Setup Item** (Bottom right)\n    *   **Text layout:** 'Up and Down Keys' / 'to Select a Setup Item'\n    *   **Connection:** A dotted line points to the vertical arrows between the item rows.\n*   **Label:** **Fields** (Far left)\n    *   **Connection:** A bracket points to the left side of the item grid.\n*   **Grid Structure:**\n    *   Two rows of small square boxes, each containing the symbol **±**.\n    *   **Top Row:** Three boxes connected by double-headed arrows.\n    *   **Bottom Row:** Three boxes connected by double-headed arrows.\n    *   **Vertical Connection:** Arrows pointing up and down connect the top row to the bottom row.](.pxie-3987-50-17056-1000-10/d8c75ea687358d23f7f93394447cbcdf95f9af9f0a5a505eb649c60c6c27233c.jpg)

Figure B-1: BIOS Setup Navigation

![The image displays a white document icon with a folded top-left corner and horizontal lines, overlaid with a large red checkmark.](.pxie-3987-50-17056-1000-10/4bed2acbf04d3d657cece2a27a01be7ad075893936b2abdc96d259da4828b8af.jpg)
NOTE:

A hot key legend is located in the right frame on most setup screens.

The &lt; F8 &gt; key on your keyboard is the Fail-Safe key. It is not displayed on the key legend by default. To set the Fail-Safe settings of the BIOS, press the &lt; F8 &gt; key on your keyboard. It is located on the upper row of a standard 101 keyboard. The Fail-Safe settings allow the motherboard to boot up with the least amount of options set. This can lessen the probability of conflicting settings.

# B.3 Main

The Main Menu provides read-only information about your system and also allows you to set the System Date and Time. Refer to the tables below for details of the submenus and settings.

# B.3.1 BIOS Information

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>BIOS Vendor</td><td>Info only</td><td>American Megatrends</td></tr><tr><td>Core Version</td><td>Info only</td><td>Displays Core version</td></tr><tr><td>Compliancy</td><td>Info only</td><td>Displays compliance information</td></tr><tr><td>Project Version</td><td>Info only</td><td>ADLINK BIOS version</td></tr><tr><td>Build Date and Time</td><td>Info only</td><td>Date the ADLINK BIOS was built</td></tr><tr><td>Access Level</td><td>Info only</td><td>Current BIOS menu access permission</td></tr><tr><td>Link Cap</td><td>Info only</td><td>PCI Express link configuration to PXIe chassis.2 link configuration : x8 x164 link configuration : x4 x4 x4 x4</td></tr></table>

# B.3.2 Processor Information

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Name</td><td>Info only</td><td>Displays CPU brand name</td></tr><tr><td>CPU Signature</td><td>Info only</td><td>Displays CPU signature</td></tr><tr><td>CPU Speed</td><td>Info only</td><td>Displays CPU frequency</td></tr><tr><td>Processor ID</td><td>Info only</td><td>Displays CPU ID</td></tr><tr><td>Stepping</td><td>Info only</td><td>Displays CPU stepping</td></tr><tr><td>Number of Processors</td><td>Info only</td><td>Displays number of processors</td></tr><tr><td>GT Info</td><td>Info only</td><td>Displays GT info of Intel Graphics.</td></tr><tr><td>GOP Version</td><td>Info only</td><td>Graphics Output Protocol version</td></tr><tr><td>Memory RC Version</td><td>Info only</td><td>Displays memory version</td></tr><tr><td>Total Memory</td><td>Info only</td><td>Displays installed memory size</td></tr><tr><td>Memory Frequency</td><td>Info only</td><td>Displays memory frequency</td></tr></table>

# B.3.3 PCH Information

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Name</td><td>Info only</td><td>Displays PCH name.</td></tr><tr><td>PCH SKU</td><td>Info only</td><td>Displays PCH SKU</td></tr><tr><td>Stepping</td><td>Info only</td><td>Displays PCH stepping</td></tr><tr><td>LAN PHY Revision</td><td>Info only</td><td>Displays LAN PHY revision</td></tr><tr><td>ME FW Version</td><td>Info only</td><td>Displays version of ME</td></tr><tr><td>ME Firmware SKU</td><td>Info only</td><td>Displays ME Firmware Kit SKU number</td></tr></table>

# B.3.4 System Management

# Board Information

<table><tr><td>Board Information</td><td>Info only</td><td>Description</td></tr><tr><td>SEMA Firmware</td><td>Read only</td><td>Displays SEMA firmware</td></tr><tr><td>Build Date</td><td>Read only</td><td>Displays SEMA firmware build date</td></tr><tr><td>SEMA Boot loader</td><td>Read only</td><td>Displays SEMA boot loader</td></tr><tr><td>Build Date</td><td>Read only</td><td>Displays SEMA boot loader build date</td></tr><tr><td>Hardware Version</td><td>Read only</td><td>Displays SEMA hardware version</td></tr><tr><td>Serial Number</td><td>Read only</td><td>Displays SEMA S/N</td></tr><tr><td>Manufacturing Date</td><td>Read only</td><td>Displays SEMA manufacture date</td></tr><tr><td>Last Repair Date</td><td>Read only</td><td>Displays last SEMA repair date</td></tr><tr><td>MAC ID</td><td>Read only</td><td>Displays SMC MAC ID</td></tr></table>

Temperatures

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Temperatures</td><td colspan="2">Info only</td></tr><tr><td>CPU Temperature</td><td colspan="2">Info only</td></tr><tr><td>Current</td><td>Read only</td><td>Displays current CPU temperature</td></tr><tr><td>Startup</td><td>Read only</td><td>Displays CPU startup temperature</td></tr><tr><td>Min</td><td>Read only</td><td>Displays min. CPU temperature</td></tr><tr><td>Max</td><td>Read only</td><td>Displays max. CPU temperature</td></tr><tr><td>Board Temperatures</td><td colspan="2">Info only</td></tr><tr><td>Current</td><td>Read only</td><td>Displays current board temperature</td></tr><tr><td>Startup</td><td>Read only</td><td>Displays board startup temperature</td></tr><tr><td>Min</td><td>Read only</td><td>Displays min. board temperature</td></tr><tr><td>Max</td><td>Read only</td><td>Displays max. board temperature</td></tr></table>

Power Consumption

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Power Consumption</td><td colspan="2">Info only</td></tr><tr><td>Current Input Current</td><td>Read only</td><td>Displays input current</td></tr><tr><td>Current Input Power</td><td>Read only</td><td>Displays input power</td></tr><tr><td>VCORE</td><td>Read only</td><td>Displays actual voltage of the VCC_CORE</td></tr><tr><td>VGFX</td><td>Read only</td><td>Displays actual voltage of the VGFX</td></tr><tr><td>VMEM</td><td>Read only</td><td>Displays actual voltage of the VMEM</td></tr><tr><td>5VSB</td><td>Read only</td><td>Displays actual voltage of the 5VSB</td></tr><tr><td>VIN</td><td>Read only</td><td>Displays actual voltage of the VIN</td></tr><tr><td>5V</td><td>Read only</td><td>Displays actual voltage of the 5V</td></tr><tr><td>3.3V</td><td>Read only</td><td>Displays actual voltage of the 3.3V</td></tr><tr><td>3.3VSB</td><td>Read only</td><td>Displays actual voltage of the 3.3VSB</td></tr></table>

# Runtime Statistics

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Runtime Statistics</td><td colspan="2">Info only</td></tr><tr><td>Total Runtime</td><td>Read only</td><td>The returned value specifies the total time in minutes the system is running in S0 state</td></tr><tr><td>Current Runtime</td><td>Read only</td><td>The returned value specifies the time in seconds the system is running in S0 state, where the counter is cleared when the system is removed from the external power supply</td></tr><tr><td>Power Cycles</td><td>Read only</td><td>The returned value specifies the number of times the external power supply has been shut down</td></tr><tr><td>Boot Cycles</td><td>Read only</td><td>Boot count is increased after a HW- or SW-Reset or successful power-up</td></tr><tr><td>Boot Reason</td><td>Read only</td><td>Shows the event responsible for reboot of the system</td></tr></table>

#

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Flags</td><td colspan="2">Info only</td></tr><tr><td>BMC Flags</td><td>Read only</td><td></td></tr><tr><td>BIOS Select</td><td>Read only</td><td>Displays the current selection of BIOS ROM</td></tr><tr><td>ATX/AT-Mode</td><td>Read only</td><td>Displays ATX/AT mode</td></tr><tr><td>Exception Code</td><td>Read only</td><td>System exception reason</td></tr></table>

# Power Up

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Power Up</td><td colspan="2">Info only</td></tr><tr><td>Power-up Mode(only in effect if the module is in ATX-Mode)</td><td>Turn onRemain offLast State</td><td>Turn On: The machine starts automatically when the power supply is turned on.Remain Off: To start the machine the power button has to be pressed.Last State: when powered on during a power failure the system will automatically power on when power is restored</td></tr></table>

# System Date and Time

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>System Date</td><td>Weekday, MM/DD/YYYY</td><td>Requires alpha-numeric entry of the day of the week, day of the month, calendar month, and all 4 digits of the year, indicating the century and year (Fri XX/XX/20XX)</td></tr><tr><td>System Time</td><td>HH/MM/SS</td><td>Presented as a 24-hour clock in hours, minutes, and seconds</td></tr></table>

# B.4 Advanced

Provides settings for most user interfaces in the system.

# B.4.1 CPU

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>CPU</td><td>Info only</td><td>Manufacturer, model, speed</td></tr><tr><td>CPU Signature</td><td>Info only</td><td>Displays CPU signature</td></tr><tr><td>Microcode Revision</td><td>Info only</td><td>Displays microcode revision</td></tr><tr><td>CPU Speed</td><td>Info only</td><td>Displays CPU operating frequency</td></tr><tr><td>Processor Cores</td><td>Info only</td><td>Displays Processor Cores</td></tr><tr><td>Hyper Threading Technology</td><td>Info only</td><td>Displays presence/absence of Intel Hyper Threading support</td></tr><tr><td>VMX</td><td>Info only</td><td>Displays presence/absence of Intel Virtualization Technology support</td></tr><tr><td>SMX/TXT</td><td>Info only</td><td>Displays presence/absence of Intel SMX Technology support</td></tr><tr><td>L1 Data Cache</td><td></td><td>Displays cache info</td></tr><tr><td>L1 Instruction Cache</td><td>Info only</td><td>Displays cache info</td></tr><tr><td>L2 Cache</td><td>Info only</td><td>Displays cache info</td></tr><tr><td>L3 Cache</td><td>Info only</td><td>Displays cache info</td></tr><tr><td>L4 Cache</td><td>Info only</td><td>Displays cache info</td></tr><tr><td>Hyper-Threading</td><td>Disabled Enabled</td><td>Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and disabled for other OS (not optimized). When Disabled only one thread per enabled core is active.</td></tr><tr><td>VT-d</td><td>Disabled Enabled</td><td>Enables/disables VT-d function on MCH</td></tr><tr><td>Intel (VMX) Virtualization Technology</td><td>Disabled Enabled</td><td>Enables/disables support for Intel Virtualization technology</td></tr><tr><td>Intel® SpeedStep(TM)</td><td>Disabled Enabled</td><td>Allows support for more than two frequency ranges</td></tr><tr><td>Turbo Mode</td><td>Disabled Enabled</td><td>Enables/disables turbo mode</td></tr><tr><td>Configurable TDP Boot Mode</td><td>TDP Nominal TDP Down Disabled</td><td>Configures TDP Mode as Nominal/Down/Disabled, where Disabled sets MSR to Nominal and MMI/O to Zero</td></tr><tr><td>Configurable TDP Lock</td><td>Disabled Enabled</td><td>Configurable TDP Mode Lock sets the Lock bits on TURBO_ACTIVATION_RATI/O and CONFIG_TDP_CONTROL When CTDP Lock is enabled, Custom ConfigTDP Count defaults to 1 and Custom ConfigTDP Boot Index to 0</td></tr><tr><td>Custom Configurable TDP</td><td>Disabled Enabled</td><td>Custom Configurable TDP settings</td></tr><tr><td>CPU C state</td><td>Disabled Enabled</td><td>Enables/disables CPU C states</td></tr><tr><td>Package C State limit</td><td>AutoC2C3C6C7Auto</td><td>Maximum Package C State limit</td></tr><tr><td>Intel Trusted Execution Technology</td><td>Disabled Enabled</td><td>Enables/disables Intel Trusted Execution Technology</td></tr><tr><td>DTS SMM</td><td>Disabled Enabled</td><td>Enables/disables CPU DTS</td></tr><tr><td>ACPI T-states</td><td>Disabled Enabled</td><td>Enables/disables ACPI 3.0 T-states</td></tr></table>

# B.4.2 Memory Configuration

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Memory RC Version</td><td>Info only</td><td>Displays Memory Reference Code version</td></tr><tr><td>Memory Frequency</td><td>Info only</td><td>Displays memory frequency</td></tr><tr><td>Total Memory</td><td>Info only</td><td>Displays total memory</td></tr><tr><td>DIMM#0/1</td><td>Info only</td><td>Displays DIMM#0/1</td></tr><tr><td>Memory Timings (tCL-tRCD-tRP-tRAS)</td><td>Info only</td><td>Displays memory timings</td></tr></table>

# B.4.3 Graphics Configuration

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>GTT Size</td><td>2MB4MB8MB</td><td>Selects Graphics Translation Table size</td></tr><tr><td>Aperture Size</td><td>128MB256MB512M1024MB2048MB4096MB</td><td>Selects Aperture size.</td></tr><tr><td>DVMT Pre-Allocated</td><td>0MB32MB64MB</td><td>Selects DVMT Pre-Allocated (Fixed) Graphics Memory size used by the Internal Graphics Device</td></tr><tr><td>DVMT Total Gfx Mem</td><td>128MB256MBMAX</td><td>Selects DVMT Total Graphics Memory size used by the Internal Graphics Device</td></tr></table>

# B.4.4 Onboard Devices Configuration

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Serial Port Configuration</td><td>Info only</td><td></td></tr><tr><td>COM Device Settings</td><td>Info only</td><td>Serial port I/O address and IRQ</td></tr><tr><td>COM Control</td><td>RS232RS422RS485</td><td>Selects serial port mode, from among RS232, RS422, and RS485</td></tr><tr><td>LAN Port Configuration</td><td>Info only</td><td></td></tr><tr><td>LAN1 Controller</td><td>EnabledDisabled</td><td>Enables/disables onboard I219 LAN controller</td></tr><tr><td>LAN2 Controller</td><td>EnabledDisabled</td><td>Enables/disables onboard I210 LAN controller</td></tr><tr><td>SATA Configuration</td><td>Info only</td><td></td></tr><tr><td>SATA Controller(s)</td><td>EnabledDisabled</td><td>Enables/disables SATA device</td></tr><tr><td>SATA Signal Setting</td><td>HDDSSD</td><td>Sets SATA signaling for optional HDD and SSD</td></tr><tr><td>Serial ATA Port X</td><td>Info only</td><td>Installed SATA device name</td></tr><tr><td>Software Preserve</td><td>Info only</td><td>Bootable OS in installed SATA device</td></tr><tr><td>Port X</td><td>DisabledEnabled</td><td>Enables/disables SATA port</td></tr><tr><td>Hot Plug</td><td>DisabledEnabled</td><td>Designates the port as Hot Pluggable</td></tr></table>

# B.4.5 USB Configuration

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>USB Configuration</td><td>Submenu</td><td></td></tr><tr><td>USB Module Version</td><td>Info only</td><td></td></tr><tr><td>USB Devices</td><td>Info only</td><td>Lists USB-connected peripheral devices</td></tr><tr><td>Legacy USB Support</td><td>EnabledDisabledAuto</td><td>Enables legacy USB support, where Auto disables legacy support if no USB devices are connected, and Disable retains USB devices only for EFI applications and setup</td></tr><tr><td>XHCI Hand-off</td><td>EnabledDisabled</td><td>A workaround for OS without XHCI hand-off support. XHCI ownership change should be claimed by the XHCI OS driver</td></tr><tr><td>USB Mass Storage Driver Support</td><td>EnabledDisabled</td><td>Enables/disables USB Mass Storage driver support</td></tr><tr><td>Port 60/64 Emulation</td><td>EnabledDisabled</td><td>Enables I/O port 60h/64h emulation, and should be enabled for complete USB keyboard legacy support for non-USB aware OS</td></tr><tr><td>Device reset time-out</td><td>10 sec20 sec30 sec40 sec</td><td>USB mass storage device Start Unit command timeout</td></tr><tr><td>Device power-up delay</td><td>AutoManual</td><td>Maximum time before the device properly reports itself to the Host Controller. &#x27;Auto&#x27; uses default value: for a Root port, 100 ms, for a Hub port the delay is taken from the Hub descriptor</td></tr></table>

# B.4.6 Network Stack Configuration

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Network Stack</td><td>Enabled Disabled</td><td>Enables/disables UEFI network stack.</td></tr><tr><td>IPv4 PXE Support</td><td>Enabled Disabled</td><td>Enables/disables IPv4 PXE boot support.</td></tr><tr><td>IPv6 PXE Support</td><td>Enabled Disabled</td><td>Enables/disables IPv6 PXE boot support.</td></tr><tr><td>PXE boot wait time</td><td>0 sec</td><td>Wait time for ESC key to abort PXE boot</td></tr></table>

# B.4.7 PCI and PCIe Configuration

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Above 4G Decoding</td><td>Disabled Enabled</td><td>Enables/disables Memory Mapped I/O BIOS assignment above 4GB.</td></tr><tr><td>Holdoff timer</td><td>0,1,2,3,4,5,6,7,8 sec</td><td>System delay for PCI Express Discovery</td></tr><tr><td>Native PCIe Enable</td><td>Disabled Enabled</td><td>Enables/disables native PCIe</td></tr><tr><td>PEG Port Configuration</td><td colspan="2">Info only</td></tr><tr><td>PEG 0:1:0</td><td>Info only</td><td>Information about PCI express mode and link to the PCI Express bus root.</td></tr><tr><td>Max Link Speed</td><td>Auto Gen1 Gen2 Gen3</td><td>Sets maximum PCI Express link capability of the PCI Express bus root</td></tr></table>

# B.4.8 Advanced Power Management

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Advanced Power Management</td><td colspan="2">Info only</td></tr><tr><td>RTC Wake system from S5</td><td>Disabled Fixed Time Dynamic Time</td><td>Enables/disables system wake on alarm event, from among Fixed Time, where system wakes at the setting time, and Dynamic Time, in which system wakes at setting time later</td></tr><tr><td>PCIe Wake</td><td>Enabled Disabled</td><td>Enables/disables PCI Express bus and onboard LAN2 Controller (I210) wake capability</td></tr><tr><td>I219 LAN Wake</td><td>Enabled Disabled</td><td>Enables/disables onboard LAN1 Controller (I219) wake capability</td></tr></table>

# B.4.9 Intel® I210 Gigabit Network Connection- (MAC address)

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>NIC Configuration</td><td colspan="2">Submenu</td></tr><tr><td>Link Speed</td><td>Auto Negotiated10 Mbps Half10 Mbps Full100 Mbps Half100 Mbps Full</td><td>LAN port speed</td></tr><tr><td>Wake On LAN</td><td>EnabledDisabled</td><td>Enables/disables wake by receiving magic packet</td></tr><tr><td>Blink LEDs</td><td>Enter</td><td>Identifies physical network port by pressing to blink the LED of LAN port</td></tr><tr><td>UEFI Driver</td><td>Info only</td><td>UEFI driver version</td></tr><tr><td>Device Name</td><td>Info only</td><td>LAN port device name</td></tr><tr><td>Chip Type</td><td>Info only</td><td>LAN chip model</td></tr><tr><td>Link Status</td><td>Info only</td><td>LAN port link status</td></tr><tr><td>MAC Address</td><td>Info only</td><td>LAN port MAC address</td></tr></table>

# B.4.10 Intel® Ethernet Connection (H) I219-LM - (MAC address)

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>NIC Configuration</td><td colspan="2">Submenu</td></tr><tr><td>Link Speed</td><td>Auto Negotiated10 Mbps Half10 Mbps Full100 Mbps Half100 Mbps Full</td><td>LAN port speed</td></tr><tr><td>Wake On LAN</td><td>EnabledDisabled</td><td>Enables/disables wake by receiving magic packet</td></tr><tr><td>Blink LEDs</td><td>Enter</td><td>Identifies physical network port by pressing to blink the LED of LAN port</td></tr><tr><td>UEFI Driver</td><td>Info only</td><td>UEFI driver version</td></tr><tr><td>Device Name</td><td>Info only</td><td>LAN port device name</td></tr><tr><td>Chip Type</td><td>Info only</td><td>LAN chip model</td></tr><tr><td>Link Status</td><td>Info only</td><td>LAN port link status</td></tr><tr><td>MAC Address</td><td>Info only</td><td>LAN port MAC address</td></tr></table>

# B.4.11 System Health Status

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>System Health Status</td><td colspan="2">Info only</td></tr><tr><td>Ambient temp of PCIe switch</td><td>Info only</td><td>Ambient temperature near PCIe switch</td></tr><tr><td>Core temp of PCIe switch</td><td>Info only</td><td>Core temperature of PCIe switch</td></tr><tr><td>+3.3V(System)</td><td>Info only</td><td>System +3.3V voltage</td></tr><tr><td>+5V(System)</td><td>Info only</td><td>System +5V voltage</td></tr><tr><td>+12V(System)</td><td>Info only</td><td>System +12V voltage</td></tr><tr><td>VBAT</td><td>Info only</td><td>Battery voltage</td></tr></table>

# B.4.12 PXIe Links Control Configuration

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Link Configuration</td><td>Info only</td><td>PCI Express link configuration to PXIe chassis</td></tr><tr><td>Link 1 Width, Speed</td><td>Info only</td><td>Link lanes and mode</td></tr><tr><td>Max Link Speed</td><td>AutoGen1Gen2Gen3</td><td>Maximum PCI Express link mode for Link 1</td></tr><tr><td>Link 2 Width, Speed</td><td>Info only</td><td>Link lanes and mode</td></tr><tr><td>Max Link Speed</td><td>AutoGen1Gen2Gen3</td><td>Maximum PCI Express link mode</td></tr></table>

# B.5 Boot

# B.5.1 Boot Configuration

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Boot Configuration</td><td colspan="2">Info only</td></tr><tr><td>Setup Prompt Timeout</td><td>1</td><td>Enables/disables onboard SATA controllers</td></tr><tr><td>Bootup NumLock State</td><td>On</td><td>Selects keyboard NumLock state at boot</td></tr><tr><td>Quiet Boot</td><td>Disabled Enabled</td><td>Enables/disables PATA port, enabling/disabling the SATA channel to which the onboard SATA to PATA converter is attached. When Enabled, system boot is delayed for the time specified in PATA Port Detection Timeout if no PATA device is connected, and Auto scans for PATA device and enables by default.</td></tr><tr><td>CSM Configuration</td><td>Submenu</td><td></td></tr><tr><td>Fast Boot</td><td>Disabled Enabled</td><td>Defines the maximum time to wait for drive detection on PATA port</td></tr><tr><td>Boot Mode Select</td><td>UEFT Legacy</td><td></td></tr><tr><td>Boot Option Priorities</td><td>Info only</td><td></td></tr></table>

# B.5.2 CSM Configuration

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>CSM Support</td><td>EnabledDisable</td><td>Determines whether CSM will launch</td></tr><tr><td>CSM16 Module Version</td><td colspan="2">Info only</td></tr><tr><td>GateA20 Active</td><td>Upon RequestAlways</td><td>Selected from among UPON REQUEST, in which GA20 can be disabled using BIOS services, and ALWAYS, in which GA20 cannot be disabled, useful when any RT code is executed above 1MB</td></tr><tr><td>INT19 Trap Response</td><td>ImmediatePostponed</td><td>BIOS reaction on INT19 trapping by Option ROM, where IMMEDIATE executes trap immediately and POSTPONED executes trap during legacy boot</td></tr><tr><td>Boot Option filter</td><td>UEFI andLegacyLegacy onlyUEFI only</td><td>Controls to which devices the system can boot</td></tr><tr><td>Option ROM execution</td><td colspan="2">Info only</td></tr><tr><td>Network</td><td>Do not launchLegacy onlyUEFI only</td><td>Controls execution of UEFI and Legacy PXE OpROM.</td></tr><tr><td>Storage</td><td>Do not launchUEFILegacy only</td><td>Controls execution of UEFI and Legacy Storage OpROM.</td></tr><tr><td>Video</td><td>Do not launchUEFILegacy only</td><td>Controls execution of UEFI and Legacy Video OpROM</td></tr><tr><td>Other PCI devices</td><td>UEFILegacy OpROM</td><td>For PCI devices other than Network, Mass storage or Video, defines the OpROM to launch.</td></tr></table>

# B.6 Security

# B.6.1 Password Description

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Administrator Password</td><td>Enter password</td><td></td></tr><tr><td>User Password</td><td>Enter password</td><td></td></tr><tr><td>Attempt Secure Boot</td><td></td><td></td></tr><tr><td>Attempt Secure Boot</td><td>DisableEnable</td><td>Enables/disables</td></tr><tr><td colspan="3">Password DescriptionIf ONLY the Administrator&#x27;s password is set, then this only limits access to BIOS setup menu and is only asked for when entering BIOS setup menu. If ONLY the User&#x27;s password is set, then this is a power on password and must be entered to boot or enter BIOS setup menu. In BIOS setup menu the User will have Administrator rights.</td></tr></table>

# B.7 Save & Exit

<table><tr><td>Feature</td><td>Options</td><td>Description</td></tr><tr><td>Save Options</td><td colspan="2">Info only</td></tr><tr><td>Save Changes and Exit</td><td></td><td>Saves changes and exits system setup</td></tr><tr><td>Discard Changes and Exit</td><td></td><td>Discards changes and exits system setup</td></tr><tr><td>Save Changes and Reset</td><td></td><td>Saves changes and resets system</td></tr><tr><td>Discard Changes and Reset</td><td></td><td>Discards changes and resets system</td></tr><tr><td>Save Changes</td><td></td><td>Save changes made so far to Setup options</td></tr><tr><td>Discard Changes</td><td></td><td>Discards Changes made so far to Setup options</td></tr><tr><td>Default Options</td><td colspan="2">Info Only</td></tr><tr><td>Restore Defaults</td><td></td><td>Restores/loads Default values for all Setup options</td></tr><tr><td>Save as User Defaults</td><td></td><td>Saves changes made so far as User Defaults</td></tr><tr><td>Restore User Defaults</td><td></td><td>Restores User Defaults to all Setup options</td></tr><tr><td>Boot Override</td><td colspan="2">Info Only</td></tr><tr><td>Launch EFI Shell from filesystem device</td><td></td><td>Attempts to launch EFI shell application (shell.efi) from an available filesystem device</td></tr></table>

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# Appendix C Dual BIOS

Dual BIOS is a backup function that maintains normal operation of the PXIe system module when unexpected boot failure occurs under the default BIOS. Dual BIOS consists of a main BIOS, a backup BIOS, and an independent controller. In normal boot, the main BIOS powers on and boots the system into the OS, monitored by the independent controller. If the main BIOS malfunctions, for example, as the result of corruption incurred by a failed update, boot procedure is terminated abnormally. The backup BIOS is then activated automatically to perform boot procedure. When backup BIOS is activated, during BIOS power-on, notifications are generated indicating that backup BIOS has been deployed. To restore main BIOS function, contact technical support.

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# Appendix D Legacy Boot Mode Settings

UEFI boot mode is default for the PXIe-3987 BIOS.

To boot in legacy boot mode, change related settings in BIOS menu:

1. Power on and press DEL or ESC to enter BIOS menu
2. Move to Boot
3. Under “Boot mode select” select “LEGACY”
4. Move to Boot, CSM
5. Under “CSM Support” select “Enabled”
6. Under “Network” select “Legacy”
7. Under “Storage” select “Legacy”
8. Under “Video” select “Legacy”
9. Under “Other PCI devices” select “Legacy”
10.Press F10 and Enter to save and exit BIOS menu. The system will restart and apply settings for Legacy boot mode.

To restore UEFI boot mode:

1. Power on and press DEL or ESC to enter BIOS menu
2. Press F9 and Enter to load optimized defaults
3. Press F10 and Enter to save and exit BIOS menu

The system restarts and default settings for UEFI boot mode are applied.

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# Important Safety Instructions

For user safety, please read and follow all instructions, Warnings, Cautions, and Notes marked in this manual and on the associated device before handling/operating the device, to avoid injury or damage.

S'il vous plaît prêter attention stricte à tous les avertissements et mises en garde figurant sur l'appareil , pour éviter des blessures ou des dommages.

 Read these safety instructions carefully
 Keep the User’s Manual for future reference
 Read the Specifications section of this manual for detailed information on the recommended operating environment
 The device can be operated at an ambient temperature of 50ºC
 When installing/mounting or uninstalling/removing device; or when removal of a chassis cover is required for user servicing (See “Getting Started” on page 21.):

 Turn off power and unplug any power cords/cables
 Reinstall all chassis covers before restoring power

 To avoid electrical shock and/or damage to device:

 Keep device away from water or liquid sources
 Keep device away from high heat or humidity
 Keep device properly ventilated (do not block or cover ventilation openings)
 Always use recommended voltage and power source settings
 Always install and operate device near an easily accessible electrical outlet
 Secure the power cord (do not place any object on/over the power cord)
 Only install/attach and operate device on stable surfaces and/or recommended mountings

 If the device will not be used for long periods of time, turn off and unplug from its power source

 Never attempt to repair the device, which should only be serviced by qualified technical personnel using suitable tools
 A Lithium-type battery may be provided for uninterrupted backup or emergency power.

![The image displays a safety sign featuring a yellow triangle with a black border. Inside the triangle is a large black exclamation point. Below the triangle is a white rectangular box containing the word 'CAUTION' in black capital letters.](.pxie-3987-50-17056-1000-10/8cfddcb7cd2db8ddf3bca50878384cdb8562e93aa101d3952d0be4a32d21333f.jpg)

Risk of explosion if battery is replaced with one of an incorrect type; please dispose of used batteries appropriately.

Risque d’explosion si la pile est remplacée par une autre de type incorrect. Veuillez jeter les piles usagées de façon appropriée.

 The device must be serviced by authorized technicians when:

 The power cord or plug is damaged
 Liquid has entered the device interior
 The device has been exposed to high humidity and/or moisture
 The device is not functioning or does not function according to the User’s Manual
 The device has been dropped and/or damaged and/or shows obvious signs of breakage

Disconnect the power supply cord before loosening the thumbscrews and always fasten the thumbscrews with a screwdriver before starting the system up

 It is recommended that the device be installed only in a server room or computer room where access is:

 Restricted to qualified service personnel or users familiar with restrictions applied to the location, reasons therefor, and any precautions required

 Only afforded by the use of a tool or lock and key, or other means of security, and controlled by the authority responsible for the location

![Yellow triangular warning sign with black smoke symbol indicating hot weather](.pxie-3987-50-17056-1000-10/587aefa63afcdf3aa095a80c129ae696aae6284527f334db6243ca5dfd7ce445.jpg)

# BURN HAZARD

Touching this surface could result in bodily injury. To reduce risk, allow the surface to cool before touching.

# RISQUE DE BRÛLURES

Ne touchez pas cette surface, cela pourrait entraîner des blessures.

Pour éviter tout danger, laissez la surface refroidir avant de la toucher.

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# Getting Service

Ask an Expert: http://askanexpert.adlinktech.com

# ADLINK Technology, Inc.

9F, No.166 Jian Yi Road, Zhonghe District

New Taipei City 235, Taiwan

Tel: +886-2-8226-5877

Fax: +886-2-8226-5717

Email: service@adlinktech.com

# Ampro ADLINK Technology, Inc.

5215 Hellyer Avenue, #110

San Jose, CA 95138, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-360-0222

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

300 Fang Chun Rd., Zhangjiang Hi-Tech Park

Pudong New Area, Shanghai, 201203 China

Tel: +86-21-5132-8988

Fax: +86-21-5132-3588

Email: market@adlinktech.com

# ADLINK Technology GmbH

Hans-Thoma-Straße 11

D-68163 Mannheim, Germany

Tel: +49-621-43214-0

Fax: +49-621 43214-30

Email: emea@adlinktech.com

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you:
[🔗 Link to the original document](.pxie-3987-50-17056-1000-10/pxie-3987-50-17056-1000-10.pdf)