# PXIS-2556 series 3U 6-Slot Instrument Chassis and Accessories User Manual @Copyright 2004 ADLINK Technology Inc. All Rights Reserved. Manual Rev. 1.10: March 26, 2004 Part No. 50-17007-101 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. # Trademarks PXI is registered trademarks of PXI Systems Alliance. Other product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies. # Getting service from ADLINK Customer Satisfaction is top priority for ADLINK TECHNOLOGY INC. If you need any help or service, please contact us.

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# Table of Contents # Introduction ...... 1.1 Unpacking Checklist..... 2 1.2 Features ..... 2 1.3 OEM options ......... 3 1.3.1 Backplane ...... 3 1.3.2 Power Supply Unit........ 3 1.3.3 Chassis Color and Logo ....... 3 # Installation ........ . 5 2.1 Power Budget Consideration..... 5 2.2 Step for Installation..... 5 2.3 Chassis Mounting . ..... 6 2.4 Mounting Mechanism...... 6 2.4.1 Wall Mount on the Bottom .... 2.4.2 Wall Mount on the Top .......... . 8 2.4.3 Wall Mount on the System Side ..... 9 2.4.4 Wall Mount on the Rear Side ....... .... 10 2.5 Grounding on the Mounting Holes..... .. 11 # Backplane Overview..... .. 13 3.1 Interoperability with CompactPCI.... . 13 3.2 System Controller Slot..... . 13 3.3 Star Trigger Slot ...... . 13 3.4 Peripheral Slots ..... .. 14 3.5 Local Bus ..... . 14 3.6 Trigger Bus ........ .. 15 3.7 System Reference Clock ..... .. 15 # Troubleshooting and Preventative Maintenance......17 4.1 Troubleshooting the PXIS-2556 series....... . 17 4.2 Cleaning ......... ... 17 4.2.1 Interior Cleaning....... ... 18 4.2.2 Exterior Cleaning....... .... 18 # Specifications ....... ... 19 A.1 General .. . 19 A.2 LCD Specifications (for PXIS-2556, PXIS-2556T) ............... 21 A.3 cPS-325 series PSU Specifications..... .. 22 # Backplane Drawing and Pin Assignments ................ 23 B.1 Backplane and LCD Mechanical Drawing....... .. 23 B.2 Backplane cBX-3006L Connectors Pin Assignments ....... 26 B.2.1 PXI Connectors Pin Assignments..... ... 26 B.2.2 Miscellaneous Connectors Pin Assignments .................... 29 B.3 Backplane cBP-3061 PSU Connectors Pin Assignments . 31 B.4 LCD Connectors Pin Assignment.. .... 32 Warranty Policy......... .33 SAFETY INSTRUCTIONS...... ... 36 ![1](.pxis-2506-manual-2/0e1df56faed79ef182d509bf445e4fac6cef907f895ff2bedd14221a60cc2446.jpg) # Introduction ADLINK PXIS-2556 series (PXIS-2556 and PXIS-2556T) is an OEM version of 3U 6-slot instrument chassis that provides one slot for system controller and 5 slots for PXI/CompactPCI peripherals. Both PXI and CompactPCI modules can be plug into this chassis series. The internal 10MHz reference clock is available on all of the 5 peripheral slots, as well as the star trigger functions, PXI trigger bus, and PXI local bus. The standard PXIS-2556 series chassis is equipped with an industrialgrade 250W CompactPCI power supply, cPS-H325/AC, to provide reliable power to the whole system. Once a failure is detected, the failure fans can be removed from the front panel and are hot swappable, which effectively reduces MTTR (Mean-Time-To-Repair). DC input power modules are available too. With DC-input power supply, the PXIS-2556 series is suitable for in-vehicle data acquisition and control applications. Please contact an ADLINK sales representative for available power configurations. The PXIS-2556 series provides a 6.4" TFT LCD display, suitable for portable control systems. With a touch TFT LCD, the PXIS-2556T provides seamless integration for portable applications. ADLINK PXD-3710 (3-slot version, without floppy disk drive), which consists of the system controller and PXD-R3000 rear I/O transition module, is designed to fit in the PXIS-2556 series chassis. Wall mount/Panel mount kits are included in the standard package. The PXIS-2556 series is the ideal chassis for high performance portable applications. # 1.1 Unpacking Checklist Check the shipping carton for any visible damage. If the shipping carton and contents are damaged, notify the dealer for a replacement. Retain the shipping carton and packing materials for inspection by the dealer. Remember to obtain authorization before returning any products to ADLINK. Check the following items in the package. If there are any missing items, contact your dealer: The PXIS-2556 series Chassis, where o PXIS-2556: 6-slot 3U instrument chassis with cPS-H325/AC power supply unit and 6.4” TFT LCD o PXIS-2556T: 6-slot 3U instrument chassis with cPS-H325/AC power supply unit, 6.4” TFT LCD, and touch panel 1 This User Manual Power Cord L Wall mount/Panel mount kit Note: The package of the PXI-2556 series OEM version (non-standard configuration, functionality, or package) may vary according to the custom requests. The assigned controller or peripheral modules may be pre-installed and shipped with the chassis. Please check with the dealer for more options. # 1.2 Features Accepts both 3U PXI and CompactPCI modules One system slot and 5 PXI/CompactPCI peripheral slots Filtered, forced-air cooling Side handles and stand feet for portability Modular AC or DC 250 W power supply IEEE 1101.10 mechanical packaging compliant Wall mount/Panel mount kit included 6.4" TFT LCD (PXIS-2556) and touch panel (PXIS-2556T) # 1.3 OEM options The standard PXIS-2556 series chassis includes two backplanes and a power supply unit in addition to the enclosure metal parts. The following sections depict the standard parts used in the PXIS-2500 series. # 1.3.1 Backplane PXIS-2556 series has the following backplanes inside: cBX-3006L: 6-slot PXI/CompactPCI backplane cBP-3061: Backplane for one 47-pin 3U CompactPCI modular power supply unit Please refer to the Appendix for detail specifications. ADLINK provides customized design and manufacturing service. Please contact an ADLINK sales representative for available backplane configurations. # 1.3.2 Power Supply Unit PXIS-2556 series equips cPS-H325/AC, a 250W modular power supply unit that is complaint with PICMG 2.11, the 3U 47-pin Power Supply Specifications. Please refer to Appendix for detailed specifications. The power module can be removed from the front of the chassis. Various models that accommodate different AC or DC input are available. This makes PXIS-2556 series suitable for wide variety of applications such as telecom signal analysis and transportation computer, which require 24V/48V DC input power supply. Please contact an ADLINK sales representative for available power supply configurations. # 1.3.3 Chassis Color and Logo The standard color of PXI-2556 series is beige. ADLINK provides custom chassis color or paint specific logo for OEM, with minimum order requirement. Please contact ADLINK for more details. # 2 # Installation The chapter depicts the procedure of installation PXIS-2556 series chassis. # 2.1 Power Budget Consideration Prior to installing any cards into the PXIS-2556 series chassis, please calculate the system power requirement. The power budget for every DC power sources shall also be checked, including +5V, +3.3V, +12V, -12V supply rail. Please refer to Appendix A for the maximum usable power. # 2.2 Step for Installation Follow the steps to power on the chassis. 1. For wall mount applications, users can remove the foot-stands those are reserved for plane workstation and then mount the chassis on the wall or panel. For desktop applications, please reserve sufficient space under the chassis for ventilation and make sure the flat to be firm. 2. Ensure the power switch is in the Standby (Off) position. There are two power switches on the PXIS-2556 series chassis. The switch in the rear is for turning ON or OFF the power cord input to the PSU (Power Supply Unit). The switch in the front is for turning ON or OFF the PSU DC power output to the PXI system. Note the imprinted ADLINK logo indicates the front panel of the chassis. 3. Plug in the AC power cord. 4. Make sure the CPU, RAM, and storage device are secured on the controller module. 5. Install the controller. Please check the ejector/injector handle is pushed down. Align the controller edge to the “RED” card guide, sliding in to the rear of the chassis. Push up on the ejector/injector handle to fully inject the card into the chassis. Secure the screws on the module’s front panel. 6. Install peripheral cards, if necessary. 7. Turn on the rear switch to turn on the AC power input to the PSU. The amber LED will light. 8. Turn on the front switch to power on the chassis. The amber LED will go off and the green LED will light. 9. Check if the system power starts, the fans under the chassis should become operational as well. Note: If the chassis does not power on, see Chapter 4, Troubleshooting and Preventative Maintenance. # 2.3 Chassis Mounting The mounting procedure of the PXIS-2556 series chassis are as following: 1. Screw the two L-shape wall-mount kits on to the chassis 2. Drill the wall-mount holes on wall or panel based on the mechanical drawing in following Section. 3. Installed the chassis and screw it on the wall or panel. # 2.4 Mounting Mechanism There are four mounting methods for PXIS-2556 series chassis: Wall mount on the bottom Wall mount on the top Wall mount on the system side Wall mount on the rear side # 2.4.1 Wall Mount on the Bottom ![Technical line drawing of an open electronic device casing with internal components and mounting brackets (no text or symbols)](.pxis-2506-manual-2/61619330a0a3eb9ab8df59581b21f72d119049cc7ce3ec1dd5ef9e1606a6a488.jpg) # 2.4.2 Wall Mount on the Top ![Technical line drawing of an internal electronic device housing with visible cooling fins and mounting brackets (no text or symbols)](.pxis-2506-manual-2/e04a9660b3ae50dae8238317f0f9b818f80b2d100118f3110b9015f10e3f3013.jpg) # 2.4.3 Wall Mount on the System Side ![Technical line drawing of an open computer case with internal fan and drive components (no text or symbols)](.pxis-2506-manual-2/944fcc7ba873c9673f4e6a5a4ef85aeef83d77f1a1044b206b229d1558823354.jpg) # 2.4.4 Wall Mount on the Rear Side ![Technical line drawing of a mechanical housing or enclosure with mounting flanges and internal components (no text or symbols)](.pxis-2506-manual-2/17c26b986e24722a98fd459b4528967956dde9fc32d3c1c9956eccc8ed6a1d31.jpg) # 2.5 Grounding on the Mounting Holes There are two kinds of grounding for the mounting holes of the backplane. The mounting holes labeled as “GND” with “circle soldering mask” are connected to the logic ground plane of the backplane. The mounting holes labeled as “FGND” with “square soldering mask” are not connected to the ground plane, therefore it provides the isolation between the logic ground and the chassis ground. The backplane is mounted on the PXIS-2556 series through all mounting holes by default, therefore the chassis ground is short to the logic ground. For applications that require isolation between the logic ground and the chassis ground, users can remove the screws on the GND mounting holes. # 3 # Backplane Overview # 3.1 Interoperability with CompactPCI The PXIS-2556 series backplane cBX-3006L is interoperable with PXIcompatible and standard CompactPCI products. The signals on the P1 connector of the backplane meet the requirements of the CompactPCI specification for both the peripheral and system modules. The PXI-specific signals are located on P2. Only the signals that are reserved or not used in the CompactPCI 64-bit specification are found on PXI-specific signals. Therefore, all modules that meet the requirements of the CompactPCI 64-bit specification will function in the PXIS-2556 series. # 3.2 System Controller Slot The System Controller slot is located at Slot 1 of the chassis as defined by the PXI specification. It has two controller expansion slots, which are used for system controller modules that occupy 3 slots. As defined in the PXI specification, these slots allow the controller to expand to the left to prevent the controller from using up peripheral slots. # 3.3 Star Trigger Slot The Star Trigger (ST) slot is spotted at Slot 2. This slot has a dedicated trigger line, linking itself through Slot 3, 4, 5, and 6. It is intended for modules with ST functionality that can provide individual triggers to synchronize or trigger the peripherals easily. # 3.4 Peripheral Slots There are 5 peripheral slots including the Star Trigger controller slot. ![Based on the provided block diagram, here are the labeled blocks and their connections:\n\n**Labeled Blocks:**\n* **Clock 10 MHz Buffer Circuitry** (Top horizontal rectangle)\n* **System Controller** (Vertical rectangle, labeled '1')\n* **Star Trigger Controller** (Vertical rectangle, labeled '2')\n* **Peripheral slot** (Vertical rectangle, labeled '3')\n* **Peripheral slot** (Vertical rectangle, labeled '4')\n* **Peripheral slot** (Vertical rectangle, labeled '5')\n* **Peripheral slot** (Vertical rectangle, labeled '6')\n\n**Connections:**\n* **Clock and Triggers:** Lines labeled 'PXI Star Triggers' originate from the 'Clock 10 MHz Buffer Circuitry' and connect to the top of all six vertical blocks ('System Controller', 'Star Trigger Controller', and the four 'Peripheral slot' blocks).\n* **Local Bus:** Double-headed arrows labeled 'Local Bus' connect the blocks horizontally in a chain, but notably skip the first connection:\n * Between 'Star Trigger Controller' (2) and the first 'Peripheral slot' (3).\n * Between the first 'Peripheral slot' (3) and the second 'Peripheral slot' (4).\n * Between the second 'Peripheral slot' (4) and the third 'Peripheral slot' (5).\n * Between the third 'Peripheral slot' (5) and the fourth 'Peripheral slot' (6).\n* **Bus Segments:** A long horizontal arrow at the bottom labeled 'PXI Trigger Bus Segment and PCI Bus Segment' connects vertically to all six blocks (1 through 6).](.pxis-2506-manual-2/d25b85fef2c48310eafffe7849e7b08fcc81ced2c90be63be02b6cbd56b84d6c.jpg) Figure 3.1 PXI Local Bus and Star Trigger Routing # 3.5 Local Bus The local bus of PXI backplane cBX-3006L is a daisy-chained bus that connects each peripheral slot to adjacent peripheral slots at the left and right. Each local bus has 13 lines wide and can pass analog or digital signals between modules, or provides a high-speed side-band communication path that does not occupy the PXI bandwidth. In accordance with the PXI specification, the local bus connections between all slots except the line between Slot 1 and 2. # 3.6 Trigger Bus ADLINK PXIS-2556 series implements the dedicated PXI trigger bus with 8 lines. Users can use these trigger lines to synchronize the operation of several different PXI peripheral modules, or use one module to control carefully timed sequences of operations performed on other modules in the system. Modules can pass triggers to one another through trigger bus, allowing precisely timed responses to asynchronous external events the system is monitoring or controlling. # 3.7 System Reference Clock The PXIS-2556 series supplies the PXI 10MHz system clock signal (PXI\_CLK10) independently to every peripheral slot. An independent buffer (having a source impedance matched to the backplane and a skew of less than 1 ns between slots) drives the clock signal to each peripheral slot. You can use this common reference clock signal to synchronize multiple modules in a measurement or control system, or drive PXI\_CLK10 from an external source through the PXI\_CLK10\_IN pin on the P2 connector of the star trigger slot. Users can select the internal or external clock by setting the jumper $\mathsf { J P 2 }$ and JP3 in the back of the backplane. JP2 JP3: PXI Reference Clock Control

JP2	JP3	Pin 1-2	Description
—[KOKS]	—<img src="images/e68c391eca62800231c981911597b5eff69d4f78ae862f3a85a99d92c669ab53.jpg"/>	Open JP2Short JP3	External clock through the PXI_CLK10_IN on star trigger slot
[Σ3KY]	[ΣZ48]	Short JP2Open JP3(Default)	Internal 10MHz system clock PXI_CLK10

# 4 # Troubleshooting and Preventative Maintenance # 4.1 Troubleshooting the PXIS-2556 series Please refer to Table 4.1 to troubleshoot the PXIS-2556 series chassis. The table lists possible causes for power failure and recommends ways to correct the problem. Table 4.1 troubleshooting

Possible Cause	What to Do
PXIS-2556 series is not connected to power source.	Make sure that the PXIS-2556 series is connected to a live electrical outlet.Try operating another piece of equipment from this outlet.
Power switch is not switched on.	Make sure that both power switches are set to the on position.
Power supply has failed.	Contact ADLINK
Cool fan has failed	Contact ADLINK

# 4.2 Cleaning Cleaning procedures consist of two parts: interior and exterior cleaning of the chassis. Please refer to the relative user documentation of peripheral modules for cleaning the individual CompactPCI or PXI modules. # 4.2.1 Interior Cleaning Use a dry, low-velocity stream of air for cleaning the interior of the chassis. Clean around components with a soft-bristle brush. If you must use a liquid for minor interior cleaning, use a 75% isopropyl alcohol solution and rinse with deionized water. # 4.2.2 Exterior Cleaning Use a dry lint-free cloth or a soft-bristle brush to clean the exterior surfaces of the chassis. If any dirt remains, moisten a cloth to wipe the exterior surfaces of the chassis in a mild soap solution. Wiping with a cloth moistened with clear water to remove any soap residue. Do not use abrasive compounds on any part of the chassis. # Specifications # A.1 General PXI-2556 series Accepts modules compliant with CompactPCI, PICMG 2.0 specifications and PXI specifications # Electrical AC Power Supply (Please refer to A.3 for the detail specifications) PICMG standards: PICMG 2.11 compliant Input voltage: 100 to $2 4 0 \pm 1 0 \% \mathrm { V _ { A C } }$ Input frequency: 50 to 60 ± 5% Hz Output: Maximum usable power: 300W

VDC	Typical	Maximum
+5V	25.0A	33.0A
+3.3V	18.0A	33.0A
+12V	5.0A	5.5A
-12V	0.5A	1A

Power LED LED display: ON for normal condition # Cooling # Fans Two 41.4 CFM fans at the bottom of the chassis Fan speed: 3100 ± 250 RPM Noise: 35 dB(A) Power: 12 $\mathsf { V } _ { \mathsf { D C } }$ @ 0.20 A each fan Air filter: removable # Physical Number of PXI/CompactPCI slots: 6 (1 controller, 5 peripherals) Number of controller expansion slots: 2 (to the left of controller slot) # Dimensions PXIS-2556: 253.1 x 221.4 x 177mm (L x W x H, without wall mount kit, or stand feet) PXIS-2556T: 253.1mm x 221.4mm x 177mm (L x W x H, without wall mount kit, or stand feet) # Weight 5.0 KG (PXIS-2556) 5.2 KG (PXIS-2556T) # Operating Environment # Ambient temperature range

Model	Temperature
PXIS-2556	0 to 45°C
PXIS-2556T	0 to 45°C

Relative humidity: 10 to 90%, noncondensing # Storage Environment Temperature # Ambient temperature range

Model	Temperature
PXIS-2556	0 to 70°C
PXIS-2556T	0 to 70°C

Relative humidity: 5 to 95%, noncondensing # Backplane Backplane bare-board material: UL 94V-0 rated Backplane connectors: Conforms to IEC-917 and IEC 1076-4- 101,UL 94V-0 rated Number of PXI/CompactPCI slots: 6 (1 controller, 5 peripherals) # Shock and Vibration Shock : 15 G peak-to-peak, 11 ms duration, non-operation # Random Vibration Operating: 5 to 500 Hz, 0.5 GRMS, each axis Nonoperating: 5 to 500 Hz, 1.88 GRMS, each axis # A.2 LCD Specifications (for PXIS-2556, PXIS-2556T) Dimension: 3U height x 10-slot (40HP) width Screen Size: 6.4 inches (diagonal) Resolution: 640 x 480 x 18-bit colors (262,144 colors) Pixel pitch: 0.203 mm x 0.203 mm High brightness 300 cd/m2 Lamp life time: 15,000 hours @ 25°C Integrated with back light inverter Power requirement: o 5V @ 6.0 W (for LCD panel) o +12V @ 300 mA x 2 (for two backlight inverters) # A.3 cPS-325 series PSU Specifications Note: PXIS-2556 series use cPS-H325/AC for standard.

Model Name	cPS-H325/AC	cPS-H325/48	cPS-H325/24
PICMG Standards	PICMG 2.11 CompactPCI Power Interface Compliant
Form Factor	3U cPCI (100x160mm), 2 slots (8HP) wide
Input Voltage	100-240 ± 10% VAC	36-72 VDC	18-36 VDC
Input Frequency	50-60 ± 5% Hz	DC	DC
Input Current	2.5A@115VAC / 1.4A@230VAC	7A@48VDC	14A@24VDC
Inrush Current	< 30A@230VAC	N/A	N/A
Power Factor Correction (PFC, only for AC input)	Typical 0.95-0.97Meet Harmonic Correction IEC1000-3-2
Output Voltage/Current	5V: Typ. 25.0A, Max. 33.0A3.3V: Typ. 18.0A, Max. 33.0A+12V: Typ. 5.0A, Max. 5.5A-12V: Typ. 0.5A, Max 1AMax. load is the continuous operating load of each rail. But the max. load of each rail can not be drawn from all outputs at the same time
Output Voltage Minimum Load	0.5A@+5V
Output Wattage	Typical 250W continuous, maximum 300W peak output
Line Regulation	Typical 0.1%
Load Regulation	Typical ± 1-2%
Ripple	50mV @+5V and 3.3V outputs120mV @+12V and -12V outputs
Hold-up Time	5mS after power fail signal
Efficiency	Typical 78-79%
Output voltage sense and current sharing	Available at 5V, 3.3V and +12V outputs
Remote ON/OFF	Available at [INH#] & [EN#]
Protections	Over Temperature Protection (OTP): 70°COver Current Protection (OCP): Installed at each railOver Load Protection (OLP): Typical 120% max. load , fully protected against output overload or short circuit.Over Voltage Protection (OVP): Built-in at all outputs
Status LED	[POWER] means valid input voltage[FAULT] means a critical fault
Earth Leakage	<0.5mA @230VAC
Operating Temp.	0 to 70°C (0 to +50°C at full load with specified air flow.Derates linearly to 50% at +70°C)
Storage Temp.	-40 to +85°C
Humidity	5% to 95% non-condensed	5% to 95% non-condensed	5% to 95% non-condensed
Shock	15G peak-to-peak, 11ms duration, non-operation
Vibration	Operation: 1.88Grms, 5-500Hz, each axis
Cooling Requirement	Min. 20 CFM is required for typical full rating power
Certificate or Safety	IEC950, EN 55022, FCC Class A, IEC60950 Class I

![B](.pxis-2506-manual-2/086ea593164c72aa417c25f8fa4517bc15e3a1c0602b361b28c0592ddc483858.jpg) # Backplane Drawing and Pin Assignments # B.1 Backplane and LCD Mechanical Drawing PXIS-2556 series has the following two part backplanes inside: cBX-3006L: 6-slot PXI backplane cBP-3061: Backplane for one 47-pin 3U CompactPCI modular power supply unit The following figures show the two parts of the backplanes. Figure B.1 cBX-3006L Drawing ![1\n2\n3\n4\n5\n6\nSYS\n2\n3\n4\n5\n6](.pxis-2506-manual-2/30d880d25719ddb5cc761fdcb4fd6f027648bb37c9543a4a41d305935f0cba55.jpg) Front view ![6 5 4 3 2 1](.pxis-2506-manual-2/76cbd264c61613e8d75fb6556b83a6f10c8b570967c771f4074a74e79921fb14.jpg) Rear view Figure B.2 cBP-3061 Mechanical Drawing ![CN1\n9.16\n19.32\n29.48\n40.64\n3.10\n128.70\nAC Neu/ DC+\nAC Ln/ DC-\nChassis GND\nCN3\n1o\nCN4\nCN2](.pxis-2506-manual-2/a0d8d05bbfda2f6e91859a1eed097a2687aad10b87dda33a05edb4f10e16a0f3.jpg) Figure B.3 LCD Mechanical Drawing (for PXIS-2556, PXIS-2556T) ![This image displays a technical engineering drawing with three orthographic projections of a rectangular component.\n\n**Top View (Front):**\n* **Top Horizontal Dimensions:** An outer width of **202.9** and an inner width of **198.1**.\n* **Right Vertical Dimensions:** An outer height of **128.7** and an inner height of **122.5**.\n* **Left Annotation:** Text reads '**Ø 5 4P**' pointing to the corner holes, indicating four holes of diameter 5.\n* **Features:** The view shows a large central rectangular recess or cutout bounded by a frame. Circular markers with crosses indicate hole positions in the corners.\n\n**Bottom View:**\n* Located below the top view, it shows the base profile.\n* **Vertical Dimension:** A height/thickness dimension of **18.6** is shown on the right side.\n* **Features:** It depicts mounting feet or supports underneath the main body.\n\n**Right Side View:**\n* Located to the right of the top view, showing the side profile with mounting slots or brackets attached. No specific dimensions are labeled on this view.](.pxis-2506-manual-2/be3bdfff5f82ef47cd30c87d9bdbe26db9a6e9b37c8939f049239f194a7de4e9.jpg) # B.2 Backplane cBX-3006L Connectors Pin Assignments # B.2.1 PXI Connectors Pin Assignments System Slot (Slot #1) P1 Pin Assignment

Pin	Z	A	B	C	D	E	F
25	GND	+5V	REQ64#	ENUM#	+3.3V	+5V	GND
24	GND	AD[1]	+5V	V(I/O)	AD[0]	ACK64#	GND
23	GND	+3.3V	AD[4]	AD[3]	+5V	AD[2]	GND
22	GND	AD[7]	GND	+3.3V	AD[6]	AD[5]	GND
21	GND	+3.3V	AD[9]	AD[8]	GND	C/BE[0]#	GND
20	GND	AD[12]	GND	V(I/O)	AD[11]	AD[10]	GND
19	GND	+3.3V	AD[15]	AD[14]	GND	AD[13]	GND
18	GND	SERR#	GND	+3.3V	PAR	C/BE[1]#	GND
17	GND	+3.3V	IPMB_SCL	IPMB_SDA	GND	PERR#	GND
16	GND	DEVSEL#	GND	V(I/O)	STOP#	LOCK#	GND
15	GND	+3.3V	FRAME#	IRDY#	GND	TRDY#	GND
12-14	Key
11	GND	AD[18]	AD[17]	AD[16]	GND	C/BE[2]#	GND
10	GND	AD[21]	GND	+3.3V	AD[20]	AD[19]	GND
9	GND	C/BE[3]#	GND	AD[23]	GND	AD[22]	GND
8	GND	AD[26]	GND	V(I/O)	AD[25]	AD[24]	GND
7	GND	AD[30]	AD[29]	AD[28]	GND	AD[27]	GND
6	GND	$\text{REQ\#}^{(1)}$	GND	+3.3V	$\text{CLK}^{(1)}$	AD[31]	GND
5	GND	BRSVP1A5	BRSVP1B5	PCIRST#	GND	$\text{GNT\#}^{(1)}$	GND
4	GND	IPMB_PWR	GND	V(I/O)	INTP	INTS	GND
3	GND	$\text{INTA\#}^{(1)}$	$\text{INTB\#}^{(1)}$	$\text{INTC\#}^{(1)}$	+5V	$\text{INTD\#}^{(1)}$	GND
2	GND	TCK	+5V	TMS	TDO	TDI	GND
1	GND	+5V	-12V	TRST#	+12V	+5V	GND
Pin	Z	A	B	C	D	E	F

System Slot (Slot #1) P2 Pin Assignment

Pin	Z	A	B	C	D	E	F
22	GND	PXI_BRSVA22	PXI_BRSVB22	PXI_BRSVC22	PXI_BRSVD22	PXI_BRSVE22	GND
21	GND	CLK6	GND	NC	NC	NC	GND
20	GND	CLK5	GND	NC	GND	NC	GND
19	GND	GND	GND	SMBDATA	SMBCLK	SMBALERT-	GND
18	GND	PXI_TRIG3	PXI_TRIG4	PXI_TRIG5	GND	PXI_TRIG6	GND
17	GND	PXI_TRIG2	GND	PRST#	REQ6#	GNT6#	GND
16	GND	PXI_TRIG1	PXI_TRIG0	DEG#	GND	PXI_TRIG7	GND
15	GND	PXI_BRSVA15	GND	FAL#	REQ5#	GNT5#	GND
14	GND	AD[35]	AD[34]	AD[33]	GND	AD[32]	GND
13	GND	AD[38]	GND	V(I/O)	AD[37]	AD[36]	GND
12	GND	AD[42]	AD[41]	AD[40]	GND	AD[39]	GND
11	GND	AD[45]	GND	V(I/O)	AD[44]	AD[43]	GND
10	GND	AD[49]	AD[48]	AD[47]	GND	AD[46]	GND
9	GND	AD[52]	GND	V(I/O)	AD[51]	AD[50]	GND
8	GND	AD[56]	AD[55]	AD[54]	GND	AD[53]	GND
7	GND	AD[59]	GND	V(I/O)	AD[58]	AD[57]	GND
6	GND	AD[63]	AD[62]	AD[61]	GND	AD[60]	GND
5	GND	C/BE[5]#	GND	V(I/O)	C/BE[4]#	PAR64	GND
4	GND	V(I/O)	PXI_BRSVB4	C/BE[7]#	GND	C/BE[6]#	GND
3	GND	CLK4	GND	GNT3#	REQ4#	GNT4#	GND
2	GND	CLK2	CLK3	GND (SYS#)	GNT2#	REQ3#	GND
1	GND	CLK1	GND	REQ1#	GNT1#	REQ2#	GND
Pin	Z	A	B	C	D	E	F

Star Trigger Slot (Slot #2) P1 Pin Assignment

Pin	Z	A	B	C	D	E	F
25	GND	+5V	REQ64#	ENUM#	+3.3V	+5V	GND
24	GND	AD[1]	+5V	V(I/O)	AD[0]	ACK64#	GND
23	GND	+3.3V	AD[4]	AD[3]	+5V	AD[2]	GND
22	GND	AD[7]	GND	+3.3V	AD[6]	AD[5]	GND
21	GND	+3.3V	AD[9]	AD[8]	M66EN	C/BE[0]#	GND
20	GND	AD[12]	GND	V(I/O)	AD[11]	AD[10]	GND
19	GND	+3.3V	AD[15]	AD[14]	GND	AD[13]	GND
18	GND	SERR#	GND	+3.3V	PAR	C/BE[1]#	GND
17	GND	+3.3V	IPMB_SCL	IPMB_SDA	GND	PERR#	GND
16	GND	DEVSEL#	GND	V(I/O)	STOP#	LOCK#	GND
15	GND	+3.3V	FRAME#	IRDY#	GND	TRDY#	GND
12-14	Key
11	GND	AD[18]	AD[17]	AD[16]	GND	C/BE[2]#	GND
10	GND	AD[21]	GND	+3.3V	AD[20]	AD[19]	GND
9	GND	C/BE[3]#	IDSEL (1)	AD[23]	GND	AD[22]	GND
8	GND	AD[26]	GND	V(I/O)	AD[25]	AD[24]	GND
7	GND	AD[30]	AD[29]	AD[28]	GND	AD[27]	GND
6	GND	REQ# (1)	GND	+3.3V	CLK (1)	AD[31]	GND
5	GND	BRSVP1A5	BRSVP1B5	PCIRST#	GND	GNT# (1)	GND
4	GND	IPMB_PWR	GND	V(I/O)	INTP	INTS	GND
3	GND	INTA# (1)	INTB# (1)	INTC# (1)	+5V	INTD# (1)	GND
2	GND	TCK	+5V	TMS	TDO	TDI	GND
1	GND	+5V	-12V	TRST#	+12V	+5V	GND
Pin	Z	A	B	C	D	E	F

Star Trigger Slot (Slot #2) P2 Pin Assignment

Pin	Z	A	B	C	D	E	F
22	GND	PXI_BRSVA22	PXI_BRSVB22	PXI_BRSVC22	PXI_BRSVD22	PXI_BRSVE22	GND
21	GND	PXI_LBR0	GND	PXI_LBR1	PXI_LBR2	PXI_LBR3	GND
20	GND	PXI_LBR4	PXI_LBR5	$PXI\_STAR0^{(2)}$	GND	$PXI\_STAR1^{(2)}$	GND
19	GND	$PXI\_STAR2^{(2)}$	GND	$PXI\_STAR3^{(2)}$	PXI_STAR4	PXI_STAR5	GND
18	GND	PXI_TRIG3	PXI_TRIG4	PXI_TRIG5	GND	PXI_TRIG6	GND
17	GND	PXI_TRIG2	GND	N/C	PXI_CLK10_IN	PXI_CLK10	GND
16	GND	PXI_TRIG1	PXI_TRIG0	N/C	GND	PXI_TRIG7	GND
15	GND	PXI_BRSVA15	GND	N/C	PXI_STAR6	PXI_LBR6	GND
14	GND	AD[35]	AD[34]	AD[33]	GND	AD[32]	GND
13	GND	AD[38]	GND	V(I/O)	AD[37]	AD[36]	GND
12	GND	AD[42]	AD[41]	AD[40]	GND	AD[39]	GND
11	GND	AD[45]	GND	V(I/O)	AD[44]	AD[43]	GND
10	GND	AD[49]	AD[48]	AD[47]	GND	AD[46]	GND
9	GND	AD[52]	GND	V(I/O)	AD[51]	AD[50]	GND
8	GND	AD[56]	AD[55]	AD[54]	GND	AD[53]	GND
7	GND	AD[59]	GND	V(I/O)	AD[58]	AD[57]	GND
6	GND	AD[63]	AD[62]	AD[61]	GND	AD[60]	GND
5	GND	C/BE[5]#	GND	V(I/O)	C/BE[4]#	PAR64	GND
4	GND	V(I/O)	PXI_BRSVB4	C/BE[7]#	GND	C/BE[6]#	GND
3	GND	PXI_LBR7	GND	PXI_LBR8	PXI_LBR9	PXI_LBR10	GND
2	GND	PXI_LBR11	PXI_LBR12	N.C (SYS#)	PXI_STAR7	PXI_STAR8	GND
1	GND	PXI_STAR9	GND	PXI_STAR10	PXI_STAR11	PXI_STAR12	GND
Pin	Z	A	B	C	D	E	F

General Peripheral Slot (Slot #3\~#6) P1 Pin Assignment

Pin	Z	A	B	C	D	E	F
25	GND	+5V	REQ64#	ENUM#	+3.3V	+5V	GND
24	GND	AD[1]	+5V	V(I/O)	AD[0]	ACK64#	GND
23	GND	+3.3V	AD[4]	AD[3]	+5V	AD[2]	GND
22	GND	AD[7]	GND	+3.3V	AD[6]	AD[5]	GND
21	GND	+3.3V	AD[9]	AD[8]	M66EN	C/BE[0]#	GND
20	GND	AD[12]	GND	V(I/O)	AD[11]	AD[10]	GND
19	GND	+3.3V	AD[15]	AD[14]	GND	AD[13]	GND
18	GND	SERR#	GND	+3.3V	PAR	C/BE[1]#	GND
17	GND	+3.3V	IPMB_SCL	IPMB_SDA	GND	PERR#	GND
16	GND	DEVSEL#	GND	V(I/O)	STOP#	LOCK#	GND
15	GND	+3.3V	FRAME#	IRDY#	GND	TRDY#	GND
12-14	Key
11	GND	AD[18]	AD[17]	AD[16]	GND	C/BE[2]#	GND
10	GND	AD[21]	GND	+3.3V	AD[20]	AD[19]	GND
9	GND	C/BE[3]#	IDSEL $^{(1)}$	AD[23]	GND	AD[22]	GND
8	GND	AD[26]	GND	V(I/O)	AD[25]	AD[24]	GND
7	GND	AD[30]	AD[29]	AD[28]	GND	AD[27]	GND
6	GND	REQ# $^{(1)}$	GND	+3.3V	CLK $^{(1)}$	AD[31]	GND
5	GND	BRSVP1A5	BRSVP1B5	PCIRST#	GND	GNT# $^{(1)}$	GND
4	GND	IPMB_PWR	GND	V(I/O)	INTP	INTS	GND
3	GND	INTA# $^{(1)}$	INTB# $^{(1)}$	INTC# $^{(1)}$	+5V	INTD# $^{(1)}$	GND
2	GND	TCK	+5V	TMS	TDO	TDI	GND
1	GND	+5V	-12V	TRST#	+12V	+5V	GND
Pin	Z	A	B	C	D	E	F

General Peripheral Slot (Slot #3\~#6) P2 Pin Assignment

Pin	Z	A	B	C	D	E	F
22	GND	PXI_BRSVA22	PXI_BRSVB22	PXI_BRSVC22	PXI_BRSVD22	PXI_BRSVE22	GND
21	GND	PXI_LBR0	GND	PXI_LBR1	PXI_LBR2	PXI_LBR3	GND
20	GND	PXI_LBR4	PXI_LBR5	PXI_LBL0	GND	PXI_LVL1	GND
19	GND	PXI_LVL2	GND	PXI_LVL3	PXI_LVL4	PXI_LVL5	GND
18	GND	PXI_TRIG3	PXI_TRIG4	PXI_TRIG5	GND	PXI_TRIG6	GND
17	GND	PXI_TRIG2	GND	N/C	PXI_STAR (2)	PXI_CLK10	GND
16	GND	PXI_TRIG1	PXI_TRIG0	N/C	GND	PXI_TRIG7	GND
15	GND	PXI_BRSVA15	GND	N/C	PXI_LVL6	PXI_LBR6	GND
14	GND	AD[35]	AD[34]	AD[33]	GND	AD[32]	GND
13	GND	AD[38]	GND	V(I/O)	AD[37]	AD[36]	GND
12	GND	AD[42]	AD[41]	AD[40]	GND	AD[39]	GND
11	GND	AD[45]	GND	V(I/O)	AD[44]	AD[43]	GND
10	GND	AD[49]	AD[48]	AD[47]	GND	AD[46]	GND
9	GND	AD[52]	GND	V(I/O)	AD[51]	AD[50]	GND
8	GND	AD[56]	AD[55]	AD[54]	GND	AD[53]	GND
7	GND	AD[59]	GND	V(I/O)	AD[58]	AD[57]	GND

6	GND	AD[63]	AD[62]	AD[61]	GND	AD[60]	GND
5	GND	C/BE[5]\#	GND	V(I/O)	C/BE[4]\#	PAR64	GND
4	GND	V(I/O)	PXI_BRSVB4	C/BE[7]\#	GND	C/BE[6]\#	GND
3	GND	PXI_LBR7	GND	PXI_LBR8	PXI_LBR9	PXI_LBR10	GND
2	GND	PXI_LBR11	PXI_LBR12	N/C (SYS#)	PXI_LBL7	PXI_LBL8	GND
1	GND	PXI_LBL9	GND	PXI_LBL10	PXI_LBL11	PXI_LBL12	GND
Pin	Z	A	B	C	D	E	F

Note 1: Please refer the following table for the routing of the Bus Mastering (REQ/GNT), IDSEL, PCI CLK and Interrupt signals.

	IDSEL	REQ#/GNT#	PCI CLK	PXI P1 Pin A3	PXI P1 Pin B3	PXI P1 Pin C3	PXI P1 Pin E3
Slot 1(SYS)	-	-	-	INTA#	INTB#	INTC#	INTD#
Slot 2	AD30	1	5	INTC#	INTD#	INTA#	INTB#
Slot 3	AD29	2	1	INTB#	INTC#	INTD#	INTA#
Slot 4	AD28	3	3	INTA#	INTB#	INTC#	INTD#
Slot 5	AD27	4	4	INTD#	INTA#	INTB#	INTC#
Slot 6	AD26	5	0	INTC#	INTD#	INTA#	INTB#

Note 2: Please refer the following table for the routing of the PXI\_STAR addressing signals from the trigger slot to peripheral slots.

Physical Slot Number	PXI_STAR (P2-D17)
Slot 2(Star Trigger Slot)	PXI_STAR0 ~ PXI_STAR3
Slot 3	PXI_STAR0
Slot 4	PXI_STAR1
Slot 5	PXI_STAR2
Slot 6	PXI_STAR3

# B.2.2 Miscellaneous Connectors Pin Assignments CN3: ATX-like DC Power input connectors

Signal Name	Pin #	Pin #	Signal Name
V2SENSE	1	11	V2 (+3.3V)
V2 (+3.3V)	2	12	V4 (-12V)
GND	3	13	GND
V1 (+5V)	4	14	INH#
GND	5	15	GND
V1 (+5V)	6	16	SRTN
GND	7	17	GND
FAL#1	8*	18*	V3SENSE
DEG#1	9*	19	V1SENSE
V3 (+12V)	10	20	V1 (+5V)

Note 1: Pin #8, #9, and #18 are not standard ATX power definition. General Purpose screw terminals ![The image displays two vertically stacked rectangular outlines. The top box contains a single, centered circle. The bottom, taller box contains two circles stacked vertically, with one near the top and one near the bottom.](.pxis-2506-manual-2/813ce3b2224762ff43a7cf94169a9d2d2acc3aee7d73c60a3c8ce12f1f91871f.jpg)

Position	Signal Name
J4	+3.3V
J6	V(I/O)
J7	+5V

Note that the V(I/O) must be shorted to either +3.3V or +5V. The default factory setting is to short V(I/O) to +5V. J3 INH#: DC power inhibit signal

J3<img src="images/29af3bd74b7259fec77289a0ad7e31800c1da1c1627e8713cac6a1448304a71c.jpg"/>	Pin #	Signal Name
	1	INH#
	2	GND

J2 PRST#: System reset signal

J2<img src="images/07990d44c20967a66f4ae38a10d07c7ce10f6a4844e35a36d8940721214e7b16.jpg"/>	Pin #	Signal Name
	1	RST#
	2	GND

J1 FAL#: Power supply fail input

J1<img src="images/287be798f84c7be351a810239c217f3cbc17a88943365ae9efcc922701ed3f14.jpg"/>	Pin #	Signal Name
	1	FAL#
	2	GND

J8: Connector for LED power status

J5<img src="images/a03140ea4551c823b7d6c4e20445bf4d66305c7520df734208b439fe8dffa003.jpg"/>	Name	Pin #	Pin #	Name
	GND	8	7	+3.3V
	GND	6	5	+5V
	GND	4	3	-12V
	GND	2	1	+12V

J5: SMB (system managing bus) connector

J5(0x4)	Pin #	Name
	1	SMCLK
	2	GND
	3	SMDATA
	4	V(I/O)
	5	ALERT

The SMB is connected to the P2 of the system slot. JP1: PXI Bus Speed Control

	Pin 1-2	Description
bound	Short	Short M66EN to ground to force PCI bus run 33M Hz
bound	Open (Default)	PCI bus speed defined by M66EN on the PXI bus

JP2 JP3: PXI Reference Clock Control

JP2 JP3		Pin 1-2	Description
<img src="images/73978a4fca62b8e580a6caa51025841881e553994eb7cc5a42458d3e4141cad1.jpg"/>	[2074]	Open JP2Short JP3	External clock through the PXI_CLK10_IN on star trigger slot
[DB77]	[XXY7]	Short JP2Open JP3(Default)	Internal 10 MHz system clock PXI_CLK10

# B.3 Backplane cBP-3061 PSU Connectors Pin Assignments CN1: Standard 47-pin 3U CompactPCI power supply socket, compliant with PICMG 2.11 specifications CN2: ATX-like power output connectors

Signal	Pin No.	Pin No.	Signal
V2SENSE	1	11	V2 (+3.3V)
V2 (+3.3V)	2	12	V4 (-12V)
GND	3	13	GND
V1 (+5V)	4	14	INH#
GND	5	15	GND
V1 (+5V)	6	16	SRTN
GND	7	17	GND
FAL#1	8*	18*	V3SENSE
DEG#1	9*	19	V1SENSE
V3 (+12V)	10	20	V1 (+5V)

Note 1: Pin #8, #9, and #18 are not standard ATX power definition. CN3: Screw terminals for external AC/DC input power lines

Pin #	AC Input	DC Input
1	AC Neutral	DC +
2	AC Line	DC -
3	Chassis GND	Chassis GND

CN4 INH#: DC power output inhibit signal. It is for inhibiting the DC power supply. This connector can be used for a power-on switch. ![The image displays a simple black-and-white line drawing. It features a large vertical rectangle serving as a frame. Inside this frame, there are two shapes stacked vertically: a circle at the top and a square at the bottom. There is no text in the image.](.pxis-2506-manual-2/e7acaf4fa856aa3148d24738e1978978926b379ffdabe02d050f251eb0654ff6.jpg)

Pin #	Signal Name
1	INH#
2	GND

# B.4 LCD Connectors Pin Assignment LCD Signal Connector

Signal	Pin #	Pin #	Signal
NC	1	2	NC
GND	3	4	GND
VDD	5	6	VDD
NC	7	8	NC
P0	9	10	P1
P2	11	12	P3
P4	13	14	P5
NC	15	16	NC
P8	17	18	P9
P10	19	20	P11
P12	21	22	P13
NC	23	24	NC
P16	25	26	P17
P18 (N/C)	27	28	P19 (N/C)
P20 (N/C)	29	30	P21 (N/C)
NC	31	32	NC
GND	33	34	GND
CLK	35	36	FLM
M	37	38	LP
GND	39	40	NC
NC	41	42	NC
VDD	43	44	NC

Power and control connector for the backlight inverter

Pin #	Name	Color
1	+12V	Yellow
2	Power On (default connect to +5V)	Red
3	GND	Black
4	VR (default connect to GND)	Black

# Warranty Policy Thank you for choosing ADLINK. To understand your rights and enjoy all the aftersales services we offer, please read the following carefully: 1. Before using ADLINK’s products please read the user manual and follow the instructions exactly. 2. When sending in damaged products for repair, please attach an RMA application form. 3. All ADLINK products come with a two-year guarantee, repaired free of charge. The warranty period starts from the product’s shipment date from ADLINK factory. Peripherals and third-party products not manufactured by ADLINK will be covered by the original manufacturers’ warranty. End users requiring maintenance services should contact their local dealers. Local warranty conditions will depend on local dealers. 4. This warranty will not cover repair costs due to: • Damage caused by not following instructions. Damage caused by carelessness on the users’ part during product transportation. Damage caused by fire, earthquakes, floods, lightening, pollution, other acts of God, and/or incorrect usage of voltage transformers. Damage caused by unsuitable storage environments (i.e. high temperatures, high humidity, or volatile chemicals. • Damage caused by leakage of battery fluid. • Damage from improper repair by unauthorized technicians. • Products with altered and/or damaged serial numbers. • Other categories not protected under our guarantees. 5. Customers are responsible for shipping costs to transport damaged products to our company or sales office. 6. To ensure the speed and quality of product repair, please download a RMA application form from our company website: www.adlinktech.com. Damaged products with attached RMA forms receive priority. For further questions, please contact our FAE staff. ADLINK: service@adlinktech.com # RMA Request & Confirmation Form Dear Customer, Please fill out and fax back this form to obtain the RMA number for your returned or repaired product. Thank you very much!

Your Company Name :
Your Name :
Invoice No. :
Part No.	Qty.	Serial No.	The reason of defect	Received Qty.by ADLINK

# Note: 1. Please give specific details of the defect. Do not give general reasons like, “not working, error, dead, etc. “ 2. Please ship prepaid by Speed post (EMS) (If items are shipped via freight forwarder, we will not cover the extra handing charges) 3. Please show a value of US\$10 for each item and include the RMA number. Also, be sure to write on shipping invoice, “for repair, no commercial value” for customs. (Please note that the amount must be under US\$200 for customs purposes only) 4. Enclose this form (page 1 & 2) in the package for fast identification. 5. Please sign this form (page 1 & 2) and fax it back to us for confirmation within three days. Otherwise, we will process your request according the stated on the RMA Request Form. 6. We will charge for items no longer under warranty. Please let us know your preferred shipping method for returning reworked items to you. Ship with your next shipment Ship separately by air parcel (Note: we do not accept liability for items shipped by air parcel) Other

ADLINK Technology Inc.		Accepted & Confirmed by

# SAFETY INSTRUCTIONS 1. Please read these safety instructions carefully. 2. Please keep this User‘s Manual for later reference. 3. Two AC Inlets provided and service as Disconnect Devices, disconnect the equipment from both AC outlets use these AC Inlets before servicing or clearing. Use moisture sheet or cloth for cleaning. 4. For pluggable equipment, that the socket-outlet shall be installed near the equipment and shall be easily accessible. 5. Please keep this equipment from humidity. 6. Lay this equipment on a reliable surface when install. A drop or fall could cause injury. 7. Make sure the voltage of the power source when connect the equipment to the power outlet. 8. Place the power cord such a way that people can not step on it. Do not place anything over the power cord. 9. All cautions and warnings on the equipment should be noted. 10. If the equipment is not use for long time, disconnect the equipment from mains to avoid being damaged by transient overvoltage. 11. Never pour any liquid into opening, this could cause fire or electrical shock. 12. Never open the equipment. For safety reason, the equipment should only be opened by qualified service personnel. 13. If one of the following situations arises, get the equipment checked by a service personnel: a. The Power cord or plug is damaged. b. Liquid has penetrated into the equipment. c. The equipment has been exposed to moisture. d. The equipment has not work well or you can not get it work according to user‘s manual. e. The equipment has dropped and damaged. f. If the equipment has obvious sign of breakage. 1. The equipment can be operated at an ambient temperature of $\pmb { 4 0 } \%$ . 2. Lithium Battery provided (real time clock battery), contact ADLINK for replacement. CAUTION – Risk of explosion if battery is replaced by an incorrect type. Dispose of used batteries according to the instructions. [🔗 Link to the original document](.pxis-2506-manual-2/pxis-2506-manual-2.pdf)