# PXIS-2670

3U 14-Slot PXI Chassis

with 500W AC Power Supply

User's Manual

Manual Rev. 2.01

Revision Date: December 21, 2006

Part No: 50-17022-1000

![The image shows a black circle containing a white graphic of the universal recycling symbol. The graphic consists of three arrows arranged in a triangular formation, chasing each other in a clockwise direction. The arrows are stylized with parallel lines running along their outer edges.](.pxis-2670-manual-4/ec6e57400380a4521ed3fd069b41cb256807f43e53056cf5daf8d7ea87267d12.jpg)
Recycled Paper

Copyright 2006 ADLINK TECHNOLOGY INC.

All Rights Reserved.

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Trademarks

NuDAQ, NuIPC, DAQBench are registered trademarks of ADLINK TECHNOLOGY INC.

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Getting Service from ADLINK

Customer Satisfaction is top priority for ADLINK Technology Inc. Please contact us should you require any service or assistance.

# ADLINK TECHNOLOGY INC.

Web Site: http://www.adlinktech.com

Sales & Service: Service@adlinktech.com

TEL: +886-2-82265877

FAX: +886-2-82265717

Address: 9F, No. 166, Jian Yi Road, Chungho City,

Taipei, 235 Taiwan

Please email or FAX this completed service form for prompt and satisfactory service.

<table><tr><td colspan="2">Company Information</td></tr><tr><td>Company/Organization</td><td></td></tr><tr><td>Contact Person</td><td></td></tr><tr><td>E-mail Address</td><td></td></tr><tr><td>Address</td><td></td></tr><tr><td>Country</td><td></td></tr><tr><td>TEL</td><td>FAX:</td></tr><tr><td>Web Site</td><td></td></tr><tr><td colspan="2">Product Information</td></tr><tr><td>Product Model</td><td></td></tr><tr><td>Environment</td><td>OS:M/B: CPU:Chipset: BIOS:</td></tr></table>

Please give a detailed description of the problem(s):

# Table of Contents

# Table of Contents...... i

# List of Tables...... iii

# List of Figures ...... iv

# 1 Introduction ...... 1

1.1 Unpacking Checklist 2
1.2 Features.... 3
1.3 OEM options 4

Backplane 4

Power Supply Unit 4

Chassis Color and Logo 5

# 2 Installation 7

2.1 Power Budget Consideration 7
2.2 Steps for Installation 7
2.3 System monitoring 7
2.4 Grounding on the Mounting Holes 9

# 3 Backplane Overview 11

3.1 Interoperability with CompactPCI 11
3.2 System Controller Slot 11
3.3 Star Trigger Slot.... 11
3.4 Peripheral Slots 12
3.5 Local Bus 13
3.6 Trigger Bus 13
3.7 System Reference Clock 13

# 4 Troubleshooting and Preventative Maintenance ..... 15

4.1 Troubleshooting the PXIS-2670.... 15
4.2 Cleaning.... 16

Interior Cleaning 16

Exterior Cleaning 16

4.3 Temperature Detect.... 17
4.4 Fan Hot-Swap Replacement.... 17

# A Specifications.... 19

A.1 General 19

Electrical 19

# B Backplane Drawing and Pin Assignments 23

B.1 Backplane Drawing 23
B.2 Backplane xBP-3014L Connectors Pin Assignments ..... 24

PXI Connectors Pin Assignments 24

Miscellaneous Connectors Pin Assignments .... 31

# Important Safety Instructions.... 35

# Warranty Policy 37

# List of Tables

Table 3-1: JP2: PXI 10MHz Reference Clock Control ..... 13

Table 4-1: Troubleshooting 15

# List of Figures

Figure 1-1: Front View of the PXIS-2670 Chassis ...... 3

Figure 1-2: Rear View of the PXIS-2670 Chassis.... 4

Figure 1-3: Optional power supply (redundant AC/DC cPCI PSU) 5

Figure 3-1: PXI Local Bus and Star Trigger Routing.... 12

Figure B-1: XBP-3014L front view drawing 23

Figure B-2: XBP-3014L rear view drawing 23

# 1 Introduction

The ADLINK PXIS-2670 is a 19" 3U PXI chassis providing one PXI system slot and 13 PXI peripheral slots in a system. This chassis is compliant with PXI and CompactPCI specifications. Both PXI and CompactPCI modules can be used in the chassis. Compliant with PXI specifications, the internal 10MHz reference clock or external reference clock is available on all of the 13 PXI slots, as well as the star trigger functions, PXI trigger bus, and PXI local bus.

The PXIS-2670 is equipped with an industrial-grade, 2U ATX 500W AC power supply to provide reliable power to the system. The status of system power supply, temperature, and cooling fans are monitored by the alarm module assembled in the chassis. Once a failure is detected, a LED and buzzer will be actuated. The failure fans can be removed from the front panel and are hot swappable, which effectively reduces MTTR (Mean-Time-To-Repair).

The PXIS-2670 chassis is designed to accommodate a 3-slot or 4-slot PXI controller module. ADLINK PXI-3800/PXI-3710 (3-slot PXI controller) and PXI-3710F (4-slot PXI controller, with floppy disk drive) are recommended for the PXIS-2670 chassis. With its powerful features, the PXIS-2670 is ideal for applications which need high performance, robust and compact chassis.

# 1.1 Unpacking Checklist

Check the shipping carton for any damage. If the shipping carton and contents are damaged, notify the local dealer or sales for a replacement. Retain the shipping carton and packing material for inspection by the dealer.

Check for the following items in the package. If there are any missing items, contact your local dealer or sales.

- PXIS-2670: 14-slot 3U PXI/CompactPCI instrument chassis with a 500W AC power supply installed
▶ This User's Manual
▶ Power Cord

Note: The package of the PXI-2670 OEM version (non-standard configuration, functionality, or package) may vary according to custom requests. The assigned controller or peripheral modules may be pre-installed and shipped with the chassis. Please check with the dealer for more options.

# 1.2 Features

▶ Accepts both 3U PXI and CompactPCI modules
▶ One system slot and 13 PXI/CompactPCI peripheral slots
▶ PXI specifications Rev. 2.2 compliant
▶ IEEE 1101.10 mechanical packaging compliant
▶ Filtered, forced-air cooling
▶ Industrial-grade 500W AC power supply
▶ Temperature, voltage, and fan monitoring LED
▶ 4U high rackmount and benchtop installation

Figures 1-1 and 1-2 show some of the features and components of the PXIS-2670 chassis. Figure 1-1 shows the front view of the PXIS-2670. Figure 1-2 shows the rear view of the PXIS-2670.
![482.6\n177.8\nCompact PCI\nFRONT VIEW\n(14)\n(15.8)](.pxis-2670-manual-4/9989a4b071fa45ff170e64045c538f75f8814c68d48ab63cc60cf13b370e90ec.jpg)

Figure 1-1: Front View of the PXIS-2670 Chassis

![465.9\n448.4\n10.3 R3.4\n101.6\n38.1](.pxis-2670-manual-4/9a8b89992135a333f6a68dcd2b4bb28bd59e988a2228416db2086afea6c0ee11.jpg)

Figure 1-2: Rear View of the PXIS-2670 Chassis

# 1.3 OEM options

The standard PXIS-2670 chassis includes backplanes and a power supply unit in addition to the enclosure metal parts. The following sections depict the standard parts used in the PXIS-2670 and OEM options.

# Backplane

The PXIS-2670 has a 14-slot PXI backplane xBP-3014L inside. The backplane is used to accommodate PXI/CompactPCI controller and peripheral modules. The xBP-3014L is designed to support both 32-bit/33MHz and 64-bit/66MHz PXI bus.

# Power Supply Unit

PXIS-2670 equips one industrial-grade, 2U ATX 500W AC power supply to provide reliable power to the system.

Various OEM models that accommodate different AC or DC input are available. This makes PXIS-2670 suitable for wide variety of applications such as communication signal analysis and transportation computer, which require 24V/48V DC power supply. Please contact us for other power supply options that fit your applications.

![CompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nCompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp10 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet\nExp20 CompNet](.pxis-2670-manual-4/ec4781af6eed668880ba1f79531d7b57180866853d05e7e6f94a2979240af1c1.jpg)

Figure 1-3: Optional power supply (redundant AC/DC cPCI PSU)

# Chassis Color and Logo

The standard color of PXI-2670 is beige. ADLINK provides custom chassis color or paint specific logo for OEMs, with minimum order requirement. Please contact us for more details.

# 2 Installation

The chapter depicts the procedure of installation PXIS-2670 chassis.

# 2.1 Power Budget Consideration

Prior to installing any modules into the PXIS-2670 chassis, please calculate the system power requirement. The power budget for every DC outputs shall also be checked, including +5V, +3.3V, +12V, -12V supply rail.

# 2.2 Steps for Installation

Follow the step to power on the chassis.

1. Make sure the power switch is in the OFF position.
2. Plug in the AC power cord.
3. Install your controller. Please check the ejector/injector handle is pushed down. Align the controller edge to the "RED" card guide, sliding in to the rear of the chassis. Push up on the ejector/injector handle to fully inject the card into the chassis. Secure the screws on the module's front panel.
4. Install peripheral modules if any.
5. Press the power switch on the front panel to power on the chassis.
6. Check the LED to make sure the power input is ready. There are four Green LED indicators (3.3V, 5V, +12V, and -12V). The four LEDs will light when power turn on. The fans should become operational as well.

Note: If the chassis does not power on, see Chapter 4, Troubleshooting and Preventative Maintenance.

# 2.3 System monitoring

There are LEDs on the front panel for system monitoring, including powers, temperature, and fans. Please refer to following for the detail meaning of display status on LEDs.

# System Monitoring

▶ Power LED (Voltage : 3.3V, 5V, +12V, -12V)

Color: Green
▷ ON while supplied

▶ Temperature LED

▷ Color: Amber
▷ ON for normal condition
▶ Flashes if exceeds temperature

▶ Fan LED

▷ Color: Green
▷ ON while normal fan speed
▶ Flashes if abnormal fan speed

▶ Alarm LED

▷ Color: Red
▷ ON while normal condition
▶ Flashes if alarm occurs

The Alarm Buzzer beeps continuously if any alarm occurs. When the Alarm Buzzer beeps, users can check the LED on the front panel to find out which kind of alarm occurs.

There is a black button labeled Alarm RST near by the Alarm LED on the front panel. When the Alarm LED flashes and the Alarm Buzzer continues beeping, you can push Alarm RST button to stop beeping.

Refer to Chapter 4 for Troubleshooting.

# 2.4 Grounding on the Mounting Holes

There are two kinds of grounding for the mounting holes of the backplane. The mounting holes labeled as “GND” with “circle soldering mask” connected to the logic ground plane of the backplane. The mounting holes labeled as “FGND” with “square soldering mask” not connected to the ground plane therefore providing isolation between the logic ground and the chassis ground.

The backplane is mounted on the PXIS-2670 through all mounting holes by default, therefore the chassis ground is shorted to the logic ground. For applications that require isolation between the logic ground and the chassis ground, users can remove the screws on the GND mounting holes.

# 3 Backplane Overview

# 3.1 Interoperability with CompactPCI

The PXIS-2670 backplane XBP-3014L can use both PXI-compatible products and standard CompactPCI products.

The signals on the P1 connector of the backplane meet the requirements of the CompactPCI specification for both the peripheral and system modules.

The PXI-specific signals are located on P2. Only the signals that are reserved or not used in the CompactPCI 64-bit specification are found on PXI-specific signals. Therefore, all modules that meet the requirements of the CompactPCI 64-bit specification will function in the PXIS-2670.

# 3.2 System Controller Slot

The System Controller slot is Slot 1 of the chassis as defined by the PXI specification. It has three controller expansion slots, which are used for system controller modules that are wider than one slot. As defined in the PXI specification, these slots allow the controller to expand to the left to prevent the controller from using up peripheral slots.

# 3.3 Star Trigger Slot

The Star Trigger (ST) slot is Slot 2. This slot has a dedicated trigger line between itself and slots 3-14 is intended for modules with ST functionality that can provide individual triggers to the peripherals.

# 3.4 Peripheral Slots

There are 7 peripheral slots including the Star Trigger controller slot.

![Based on the provided block diagram, here is an accurate description of the labeled blocks and their connections:\n\n**Labeled Blocks:**\n*   **Top:** A rectangular block labeled 'Clock 10 MHz Buffer Circuitry'.\n*   **Left:** A vertical rectangular block labeled 'System Controller'.\n*   **Center/Right:** A row of vertical rectangular blocks. The first is labeled 'Star Trigger Controller'. The subsequent blocks are labeled 'Peripheral slot'.\n*   **Bottom:** A long horizontal arrow labeled 'PXI Trigger Bus Segment and PCI Bus Segment'.\n*   **Labels:**\n    *   'PXI Star Triggers' (text label near the top left lines).\n    *   'Local' (text label above horizontal arrows).\n    *   Numbers '2' through '8' located in small shapes below the blocks.\n    *   An ellipsis '...' after the last block.\n\n**Connections:**\n*   **Clock Connections:** Lines extend downward from the 'Clock 10 MHz Buffer Circuitry' block to the top of the 'Star Trigger Controller' and all 'Peripheral slot' blocks.\n*   **Star Trigger Connections:** A bundle of lines labeled 'PXI Star Triggers' originates from the left side and connects to the top of the 'Star Trigger Controller' and all 'Peripheral slot' blocks.\n*   **Local Bus Connections:** Horizontal arrows labeled 'Local' connect the blocks horizontally from left to right:\n    *   From 'Star Trigger Controller' to the first 'Peripheral slot' (labeled 3).\n    *   From the first 'Peripheral slot' (3) to the second 'Peripheral slot' (4).\n    *   From the second 'Peripheral slot' (4) to the third 'Peripheral slot' (5).\n    *   From the third 'Peripheral slot' (5) to the fourth 'Peripheral slot' (6).\n    *   From the fourth 'Peripheral slot' (6) to the fifth 'Peripheral slot' (7).\n    *   From the fifth 'Peripheral slot' (7) to the sixth 'Peripheral slot' (8).\n*   **Bus Segment Connections:**\n    *   Bidirectional arrows connect the 'System Controller' directly to the bottom 'PXI Trigger Bus Segment and PCI Bus Segment'.\n    *   A diamond labeled '2' is below the 'Star Trigger Controller' and connects via bidirectional arrows to the bottom segment.\n    *   Circles labeled '3' through '8' are below the respective 'Peripheral slot' blocks. Each circle connects via bidirectional arrows to the bottom segment.\n*   **Ellipsis:** An ellipsis '...' appears to the right of the sixth 'Peripheral slot' block (labeled 8), indicating continuation.](.pxis-2670-manual-4/ce753cf24902c6ddf231d2382340d1862428f6a27368433f8f8957611d071426.jpg)

Figure 3-1: PXI Local Bus and Star Trigger Routing

# 3.5 Local Bus

The local bus of PXI backplane XBP-3014L is a daisy-chained bus that connects each peripheral slot with its adjacent peripheral slots to the left and right. Each local bus is 13 lines wide and can pass analog signals between modules or provide a high-speed side-band communication path that does not affect the PXI bandwidth.

In accordance with the PXI specification, the local bus connections between all slots except slots 1 and 2.

# 3.6 Trigger Bus

ADLINK PXIS-2670 has PXI trigger bus. Users can use triggers to synchronize the operation of several different PXI peripheral modules, or use one module to control carefully timed sequences of operations performed on other modules in the system. Modules can pass triggers to one another through trigger bus, allowing precisely timed responses to asynchronous external events the system is monitoring or controlling.

# 3.7 System Reference Clock

The PXIS-2670 supplies the PXI 10MHz system clock signal (PXI\_CLK10) independently to every peripheral slot. An independent buffer (having source impedance matched to the backplane and a skew of less than 1ns between slots) drives the clock signal to each peripheral slot. Users can use this common reference clock signal to synchronize multiple modules in a measurement or control system or drive PXI\_CLK10 from an external source through the PXI\_CLK10\_IN pin on the P2 connector of the star trigger slot.

Users can select the internal or external clock by setting the jumper JP2.

<table><tr><td>JP2</td><td>Description</td></tr><tr><td>Pin 1-2</td><td>External clock through the PXI_CLK10_IN on star trigger slot</td></tr><tr><td>Pin 2-3</td><td>Internal 10MHz system clock PXI_CLK10</td></tr></table>

Table 3-1: JP2: PXI 10MHz Reference Clock Control

# 4 Troubleshooting and Preventative Maintenance

# 4.1 Troubleshooting the PXIS-2670

Please refer to Table 4-1 to troubleshoot the PXIS-2670 chassis. The table lists possible causes for power failure and recommends ways to correct the problem.

<table><tr><td>Possible Cause</td><td>What to Do</td></tr><tr><td>PXIS-2670 is not connected to power source.</td><td>Make sure that the PXIS-2670 is connected to a live electrical outlet. Try operating another piece of equipment from this outlet.</td></tr><tr><td>Power switch is not switched on.</td><td>Make sure the power switch is set to the ON position.</td></tr><tr><td>Power supply has failed.</td><td>Contact ADLINK for repair.</td></tr><tr><td>The Alarm Buzzer is beeping</td><td>Push Alarm RST button to stop beeping and refer to Chapter 2.3 to find out which alarm occurs.Temperature LED flashes:Cool down the PXIS-2670 system under 50°C.Fan LED flashes:Refer to Chapter 4.4 for the fan hot-swap replacement.</td></tr></table>

Table 4-1: Troubleshooting

# 4.2 Cleaning

Cleaning procedures consist of two parts: interior and exterior cleaning of the chassis. Refer to your module user documentation for information about cleaning the individual CompactPCI or PXI modules.

Note: Always power-off the chassis and disconnect the power cord before cleaning of servicing the chassis.

# Interior Cleaning

Use a dry, low-velocity stream of air for cleaning the interior of the chassis. Clean around components with a soft-bristle brush. If you must use a liquid for minor interior cleaning, use a 75% isopropyl alcohol solution and rinse with deionized water.

# Exterior Cleaning

Use a dry lint-free cloth or a soft-bristle brush to clean the exterior surfaces of the chassis. If any dirt remains, moisten a cloth to wipe the exterior surfaces of the chassis in a mild soap solution. Wiping with a cloth moistened with clear water to remove any soap residue. Do not use abrasive compounds on any part of the chassis.

# 4.3 Temperature Detect

If the system overheats, an Amber Temp LED flashes and a buzzer beeps continuously. There are three values of temperature setting, $50^{\circ}$ C, $60^{\circ}$ C, and $70^{\circ}$ C. The default is $50^{\circ}$ C. Contact ADLINK if you need to change setting.

# 4.4 Fan Hot-Swap Replacement

There is a LED for each fan for system monitoring. When any one of the fans is defective, the corresponding LED flashes and the alarm buzzer keep beeping. Please refer to the following for the fan hot-swap replacement.

# Fan Hot-Swap Replacement Procedure

1. Press the Alarm RST button on the front panel to stop the beeping.
2. Remove the front panel cover of fans.
3. Pull out the defective fan.
4. Replace with a new fan.
5. Cover back the fans panel cover.

# A Specifications

# A.1 General

Complies with PXI specifications and accepts modules compliant with CompactPCI, PICMG 2.0 specifications.

# Electrical

# AC Power Supply

▶ Input voltage: 100 to 240 ±10%
▶ Input frequency: 50Hz to 60Hz ±5% Hz
▶ Output

Maximum usable power: 500W

<table><tr><td>VDC</td><td>Maximum</td></tr><tr><td>+5V</td><td>50.0A</td></tr><tr><td>+3.3V</td><td>28.0A</td></tr><tr><td>+12V</td><td>35.0A</td></tr><tr><td>-12V</td><td>0.8A</td></tr></table>

The maximum +5V and +3.3V power source outputs must not exceed 250W.

# System Monitoring

▶ Power LED
▷ Voltage : +5V, +3.3V, +12V, -12V
Color : Green
▶ ON while power supplied Temperature LED
▷ Temperature setting: 50°C, 60°C, 70°C
Color: Amber
▷ ON for normal condition
▷ FLASH if exceeds temperature

▶ Fan LED

▷ Fan speed monitoring

▷ Color: Green

▷ ON while normal fan speed
▷ FLASH while abnormal fan speed

▶ Alarm LED

▷ Color: Red
▷ ON while normal condition
▷ FLASH if any alarm occurs

▶ Alarm Buzzer

▷ Beep if any alarm occurs

▶ Alarm reset button

▷ Reset the alarm monitor system

# Cooling

# Fans:

▶ Front-access hot swappable fan trays
▶ Five 31CFM fans trays at the bottom of the chassis
▶ Fan speed: 2900 ±300RPM
▶ Power: 12 VDC @ 0.17 A each fan
▶ Noise: 36dB(A)
▶ Air filter: removable from the bottom of the chassis

# Physical

▶ Number of PXI/CompactPCI slots: 14 (1 system slot, 13 peripheral slots)
▶ Number of controller expansion slots: 3 (left of controller slot)
▶ Dimensions:
▷ 258mm x 448.4mm x 177.8 mm (L x W x H, w/o handle)
▶ Weight
▷ 14 Kg

# Operating Environment

▶ Ambient temperature range: 0 to 50°C
▶ Relative humidity: 10 to 90%, noncondensing

# Storage Environment Temperature

▶ Ambient temperature range: -20 to 70°C
▶ Relative humidity: 5 to 95%, noncondensing

# Backplane

▶ Backplane bare-board material: UL 94V-0 rated
▶ Backplane connectors: Conforms to IEC-917 and IEC 1076-4-101, UL 94V-0 rated
▶ Number of PXI/CompactPCI slots: 14 (1 controller, 13 peripherals)

# Shock and Vibration

▶ Shock: 15 G $_{peak-to-peak}$ , 11 ms duration, non-operation
▶ Random Vibration

▶ Operating: 5 to 500 Hz, 0.5 $G_{RMS}$ , each axis
▷ Nonoperating: 5 to 500 Hz, 1.88 G $_{RMS}$ , each axis

# Safety and EMC/EMI Compliance

EMC/EMI: CE, FCC Class A

# B Backplane Drawing and Pin Assignments

# B.1 Backplane Drawing

The following figures show the two parts of the backplanes and Mechanical Drawing.

![1\n2\n3\n4\n5\n6\n7\n8\n9\n10\n11\n12\n13\n14](.pxis-2670-manual-4/309771d78e9960eeba0b834683c77b0738c4189a7b865b1df320244b9a5e3034.jpg)

Figure B-1: XBP-3014L front view drawing
![14 13 12 11 10 9 8 7 6 5 4 3 2 1\n14 13 12 11 10 9 8 7 6 5 4 3 2 1](.pxis-2670-manual-4/61d2941efeb21da46eaa6ad7ade1e5b4557bcc1bdbc2ddc0a850592428382c5c.jpg)

Figure B-2: XBP-3014L rear view drawing

# B.2 Backplane xBP-3014L Connectors Pin Assignments

PXI Connectors Pin Assignments
System Slot (Slot #1) P1 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>25</td><td>GND</td><td>+5V</td><td>REQ64#</td><td>ENUM#</td><td>+3.3V</td><td>+5V</td><td>GND</td></tr><tr><td>24</td><td>GND</td><td>AD[1]</td><td>+5V</td><td>V(I/O)</td><td>AD[0]</td><td>ACK64#</td><td>GND</td></tr><tr><td>23</td><td>GND</td><td>+3.3V</td><td>AD[4]</td><td>AD[3]</td><td>+5V</td><td>AD[2]</td><td>GND</td></tr><tr><td>22</td><td>GND</td><td>AD[7]</td><td>GND</td><td>+3.3V</td><td>AD[6]</td><td>AD[5]</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>+3.3V</td><td>AD[9]</td><td>AD[8]</td><td>GND</td><td>C/BE[0]#</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>AD[12]</td><td>GND</td><td>V(I/O)</td><td>AD[11]</td><td>AD[10]</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>+3.3V</td><td>AD[15]</td><td>AD[14]</td><td>GND</td><td>AD[13]</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>SERR#</td><td>GND</td><td>+3.3V</td><td>PAR</td><td>C/BE[1]#</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>+3.3V</td><td>IPMB_SCL</td><td>IPMB_SDA</td><td>GND</td><td>PERR#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>DEVSEL#</td><td>GND</td><td>V(I/O)</td><td>STOP#</td><td>LOCK#</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>FRAME#</td><td>IRDY#</td><td>GND</td><td>TRDY#</td><td>GND</td></tr><tr><td>12-14</td><td colspan="7">Key</td></tr><tr><td>11</td><td>GND</td><td>AD[18]</td><td>AD[17]</td><td>AD[16]</td><td>GND</td><td>C/BE[2]#</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[21]</td><td>GND</td><td>+3.3V</td><td>AD[20]</td><td>AD[19]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>C/BE[3]#</td><td>GND</td><td>AD[23]</td><td>GND</td><td>AD[22]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[26]</td><td>GND</td><td>V(I/O)</td><td>AD[25]</td><td>AD[24]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[30]</td><td>AD[29]</td><td>AD[28]</td><td>GND</td><td>AD[27]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>REQ# (1)</td><td>GND</td><td>+3.3V</td><td>CLK (1)</td><td>AD[31]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>BRSVP1A5</td><td>BRSVP1B5</td><td>PCIRST#</td><td>GND</td><td>GNT# (1)</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>IPMB_PWR</td><td>GND</td><td>V(I/O)</td><td>INTP</td><td>INTS</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>INTA# (1)</td><td>INTB# (1)</td><td>INTC# (1)</td><td>+5V</td><td>INTD# (1)</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>TCK</td><td>+5V</td><td>TMS</td><td>TDO</td><td>TDI</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>+5V</td><td>-12V</td><td>TRST#</td><td>+12V</td><td>+5V</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

System Slot (Slot #1) P2 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>22</td><td>GND</td><td>PXI_BRSVA22</td><td>PXI_BRSVB22</td><td>PXI_BRSVC22</td><td>PXI_BRSVD22</td><td>PXI_BRSVE22</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>CLK6</td><td>GND</td><td>NC</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>CLK5</td><td>GND</td><td>NC</td><td>GND</td><td>NC</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>GND</td><td>GND</td><td>SMBDATA</td><td>SMBCLK</td><td>SMBALERT-</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>PXI_TRIG3</td><td>PXI_TRIG4</td><td>PXI_TRIG5</td><td>GND</td><td>PXI_TRIG6</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>PXI_TRIG2</td><td>GND</td><td>PRST#</td><td>REQ6#</td><td>GNT6#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>PXI_TRIG1</td><td>PXI_TRIG0</td><td>DEG#</td><td>GND</td><td>PXI_TRIG7</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>PXI_BRSVA15</td><td>GND</td><td>FAL#</td><td>REQ5#</td><td>GNT5#</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>AD[35]</td><td>AD[34]</td><td>AD[33]</td><td>GND</td><td>AD[32]</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>AD[38]</td><td>GND</td><td>V(I/O)</td><td>AD[37]</td><td>AD[36]</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>AD[42]</td><td>AD[41]</td><td>AD[40]</td><td>GND</td><td>AD[39]</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>AD[45]</td><td>GND</td><td>V(I/O)</td><td>AD[44]</td><td>AD[43]</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[49]</td><td>AD[48]</td><td>AD[47]</td><td>GND</td><td>AD[46]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>AD[52]</td><td>GND</td><td>V(I/O)</td><td>AD[51]</td><td>AD[50]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[56]</td><td>AD[55]</td><td>AD[54]</td><td>GND</td><td>AD[53]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[59]</td><td>GND</td><td>V(I/O)</td><td>AD[58]</td><td>AD[57]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>AD[63]</td><td>AD[62]</td><td>AD[61]</td><td>GND</td><td>AD[60]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>C/BE[5]\#</td><td>GND</td><td>V(I/O)</td><td>C/BE[4]\#</td><td>PAR64</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>V(I/O)</td><td>PXI_BRSVB4</td><td>C/BE[7]\#</td><td>GND</td><td>C/BE[6]\#</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>CLK4</td><td>GND</td><td>GNT3#</td><td>REQ4#</td><td>GNT4#</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>CLK2</td><td>CLK3</td><td>GND (SYS\#)</td><td>GNT2#</td><td>REQ3#</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>CLK1</td><td>GND</td><td>REQ1#</td><td>GNT1#</td><td>REQ2#</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

Star Trigger Slot (Slot #2) P1 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>25</td><td>GND</td><td>+5V</td><td>REQ64#</td><td>ENUM#</td><td>+3.3V</td><td>+5V</td><td>GND</td></tr><tr><td>24</td><td>GND</td><td>AD[1]</td><td>+5V</td><td>V(I/O)</td><td>AD[0]</td><td>ACK64#</td><td>GND</td></tr><tr><td>23</td><td>GND</td><td>+3.3V</td><td>AD[4]</td><td>AD[3]</td><td>+5V</td><td>AD[2]</td><td>GND</td></tr><tr><td>22</td><td>GND</td><td>AD[7]</td><td>GND</td><td>+3.3V</td><td>AD[6]</td><td>AD[5]</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>+3.3V</td><td>AD[9]</td><td>AD[8]</td><td>M66EN</td><td>C/BE[0]#</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>AD[12]</td><td>GND</td><td>V(I/O)</td><td>AD[11]</td><td>AD[10]</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>+3.3V</td><td>AD[15]</td><td>AD[14]</td><td>GND</td><td>AD[13]</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>SERR#</td><td>GND</td><td>+3.3V</td><td>PAR</td><td>C/BE[1]#</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>+3.3V</td><td>IPMB_SCL</td><td>IPMB_SDA</td><td>GND</td><td>PERR#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>DEVSEL#</td><td>GND</td><td>V(I/O)</td><td>STOP#</td><td>LOCK#</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>FRAME#</td><td>IRDY#</td><td>GND</td><td>TRDY#</td><td>GND</td></tr><tr><td>12-14</td><td>Key</td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>11</td><td>GND</td><td>AD[18]</td><td>AD[17]</td><td>AD[16]</td><td>GND</td><td>C/BE[2]#</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[21]</td><td>GND</td><td>+3.3V</td><td>AD[20]</td><td>AD[19]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>C/BE[3]#</td><td>IDSEL (1)</td><td>AD[23]</td><td>GND</td><td>AD[22]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[26]</td><td>GND</td><td>V(I/O)</td><td>AD[25]</td><td>AD[24]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[30]</td><td>AD[29]</td><td>AD[28]</td><td>GND</td><td>AD[27]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>REQ# (1)</td><td>GND</td><td>+3.3V</td><td>CLK (1)</td><td>AD[31]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>BRSVP1A5</td><td>BRSVP1B5</td><td>PCIRST#</td><td>GND</td><td>GNT# (1)</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>IPMB_PWR</td><td>GND</td><td>V(I/O)</td><td>INTP</td><td>INTS</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>INTA# (1)</td><td>INTB# (1)</td><td>INTC# (1)</td><td>+5V</td><td>INTD# (1)</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>TCK</td><td>+5V</td><td>TMS</td><td>TDO</td><td>TDI</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>+5V</td><td>-12V</td><td>TRST#</td><td>+12V</td><td>+5V</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

Star Trigger Slot (Slot #2) P2 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>22</td><td>GND</td><td>PXI_BRSVA22</td><td>PXI_BRSVB22</td><td>PXI_BRSVC22</td><td>PXI_BRSVD22</td><td>PXI_BRSVE22</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>PXI_LBR0</td><td>GND</td><td>PXI_LBR1</td><td>PXI_LBR2</td><td>PXI_LBR3</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>PXI_LBR4</td><td>PXI_LBR5</td><td>PXI_STAR0 (2)</td><td>GND</td><td>PXI_STAR1 (2)</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>PXI_STAR2 (2)</td><td>GND</td><td>PXI_STAR3 (2)</td><td>PXI_STAR4</td><td>PXI_STAR5</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>PXI_TRIG3</td><td>PXI_TRIG4</td><td>PXI_TRIG5</td><td>GND</td><td>PXI_TRIG6</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>PXI_TRIG2</td><td>GND</td><td>N/C</td><td>PXI_CLK10_IN</td><td>PXI_CLK10</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>PXI_TRIG1</td><td>PXI_TRIG0</td><td>N/C</td><td>GND</td><td>PXI_TRIG7</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>PXI_BRSVA15</td><td>GND</td><td>N/C</td><td>PXI_STAR6</td><td>PXI_LBR6</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>AD[35]</td><td>AD[34]</td><td>AD[33]</td><td>GND</td><td>AD[32]</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>AD[38]</td><td>GND</td><td>V(I/O)</td><td>AD[37]</td><td>AD[36]</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>AD[42]</td><td>AD[41]</td><td>AD[40]</td><td>GND</td><td>AD[39]</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>AD[45]</td><td>GND</td><td>V(I/O)</td><td>AD[44]</td><td>AD[43]</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[49]</td><td>AD[48]</td><td>AD[47]</td><td>GND</td><td>AD[46]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>AD[52]</td><td>GND</td><td>V(I/O)</td><td>AD[51]</td><td>AD[50]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[56]</td><td>AD[55]</td><td>AD[54]</td><td>GND</td><td>AD[53]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[59]</td><td>GND</td><td>V(I/O)</td><td>AD[58]</td><td>AD[57]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>AD[63]</td><td>AD[62]</td><td>AD[61]</td><td>GND</td><td>AD[60]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>C/BE[5]\#</td><td>GND</td><td>V(I/O)</td><td>C/BE[4]\#</td><td>PAR64</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>V(I/O)</td><td>PXI_BRSVB4</td><td>C/BE[7]\#</td><td>GND</td><td>C/BE[6]\#</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>PXI_LBR7</td><td>GND</td><td>PXI_LBR8</td><td>PXI_LBR9</td><td>PXI_LBR10</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>PXI_LBR11</td><td>PXI_LBR12</td><td>N.C (SYS#)</td><td>PXI_STAR7</td><td>PXI_STAR8</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>PXI_STAR9</td><td>GND</td><td>PXI_STAR10</td><td>PXI_STAR11</td><td>PXI_STAR12</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

General Peripheral Slot (Slot #3\~#6) P1 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>25</td><td>GND</td><td>+5V</td><td>REQ64#</td><td>ENUM#</td><td>+3.3V</td><td>+5V</td><td>GND</td></tr><tr><td>24</td><td>GND</td><td>AD[1]</td><td>+5V</td><td>V(I/O)</td><td>AD[0]</td><td>ACK64#</td><td>GND</td></tr><tr><td>23</td><td>GND</td><td>+3.3V</td><td>AD[4]</td><td>AD[3]</td><td>+5V</td><td>AD[2]</td><td>GND</td></tr><tr><td>22</td><td>GND</td><td>AD[7]</td><td>GND</td><td>+3.3V</td><td>AD[6]</td><td>AD[5]</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>+3.3V</td><td>AD[9]</td><td>AD[8]</td><td>M66EN</td><td>C/BE[0]#</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>AD[12]</td><td>GND</td><td>V(I/O)</td><td>AD[11]</td><td>AD[10]</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>+3.3V</td><td>AD[15]</td><td>AD[14]</td><td>GND</td><td>AD[13]</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>SERR#</td><td>GND</td><td>+3.3V</td><td>PAR</td><td>C/BE[1]#</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>+3.3V</td><td>IPMB_SCL</td><td>IPMB_SDA</td><td>GND</td><td>PERR#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>DEVSEL#</td><td>GND</td><td>V(I/O)</td><td>STOP#</td><td>LOCK#</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>FRAME#</td><td>IRDY#</td><td>GND</td><td>TRDY#</td><td>GND</td></tr><tr><td>12-14</td><td>Key</td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>11</td><td>GND</td><td>AD[18]</td><td>AD[17]</td><td>AD[16]</td><td>GND</td><td>C/BE[2]#</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[21]</td><td>GND</td><td>+3.3V</td><td>AD[20]</td><td>AD[19]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>C/BE[3]#</td><td>IDSEL (1)</td><td>AD[23]</td><td>GND</td><td>AD[22]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[26]</td><td>GND</td><td>V(I/O)</td><td>AD[25]</td><td>AD[24]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[30]</td><td>AD[29]</td><td>AD[28]</td><td>GND</td><td>AD[27]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>REQ# (1)</td><td>GND</td><td>+3.3V</td><td>CLK (1)</td><td>AD[31]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>BRSVP1A5</td><td>BRSVP1B5</td><td>PCIRST#</td><td>GND</td><td>GNT# (1)</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>IPMB_PWR</td><td>GND</td><td>V(I/O)</td><td>INTP</td><td>INTS</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>INTA# (1)</td><td>INTB# (1)</td><td>INTC# (1)</td><td>+5V</td><td>INTD# (1)</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>TCK</td><td>+5V</td><td>TMS</td><td>TDO</td><td>TDI</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>+5V</td><td>-12V</td><td>TRST#</td><td>+12V</td><td>+5V</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

General Peripheral Slot (Slot #3\~#14) P2 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>22</td><td>GND</td><td>PXI_BRSVA22</td><td>PXI_BRSVB22</td><td>PXI_BRSVC22</td><td>PXI_BRSVD22</td><td>PXI_BRSVE22</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>PXI_LBR0</td><td>GND</td><td>PXI_LBR1</td><td>PXI_LBR2</td><td>PXI_LBR3</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>PXI_LBR4</td><td>PXI_LBR5</td><td>PXI_LBL0</td><td>GND</td><td>PXI_LBL1</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>PXI_LBL2</td><td>GND</td><td>PXI_LBL3</td><td>PXI_LBL4</td><td>PXI_LBL5</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>PXI_TRIG3</td><td>PXI_TRIG4</td><td>PXI_TRIG5</td><td>GND</td><td>PXI_TRIG6</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>PXI_TRIG2</td><td>GND</td><td>N/C</td><td>PXI_STAR (2)</td><td>PXI_CLK10</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>PXI_TRIG1</td><td>PXI_TRIG0</td><td>N/C</td><td>GND</td><td>PXI_TRIG7</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>PXI_BRSVA15</td><td>GND</td><td>N/C</td><td>PXI_LBL6</td><td>PXI_LBR6</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>AD[35]</td><td>AD[34]</td><td>AD[33]</td><td>GND</td><td>AD[32]</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>AD[38]</td><td>GND</td><td>V(I/O)</td><td>AD[37]</td><td>AD[36]</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>AD[42]</td><td>AD[41]</td><td>AD[40]</td><td>GND</td><td>AD[39]</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>AD[45]</td><td>GND</td><td>V(I/O)</td><td>AD[44]</td><td>AD[43]</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[49]</td><td>AD[48]</td><td>AD[47]</td><td>GND</td><td>AD[46]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>AD[52]</td><td>GND</td><td>V(I/O)</td><td>AD[51]</td><td>AD[50]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[56]</td><td>AD[55]</td><td>AD[54]</td><td>GND</td><td>AD[53]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[59]</td><td>GND</td><td>V(I/O)</td><td>AD[58]</td><td>AD[57]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>AD[63]</td><td>AD[62]</td><td>AD[61]</td><td>GND</td><td>AD[60]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>C/BE[5]\#</td><td>GND</td><td>V(I/O)</td><td>C/BE[4]\#</td><td>PAR64</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>V(I/O)</td><td>PXI_BRSVB4</td><td>C/BE[7]\#</td><td>GND</td><td>C/BE[6]\#</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>PXI_LBR7</td><td>GND</td><td>PXI_LBR8</td><td>PXI_LBR9</td><td>PXI_LBR10</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>PXI_LBR11</td><td>PXI_LBR12</td><td>N/C (SYS#)</td><td>PXI_LBL7</td><td>PXI_LBL8</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>PXI_LBL9</td><td>GND</td><td>PXI_LBL10</td><td>PXI_LBL11</td><td>PXI_LBL12</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

Note 1: Please refer the following table for the routing of the Bus Mastering (REQ/GNT), IDSEL, PCI CLK, and Interrupt signals.

<table><tr><td></td><td>IDSEL</td><td>REQ#/GNT#</td><td>PCI CLK</td><td>PXI P1 Pin A3</td><td>PXI P1 Pin B3</td><td>PXI P1 Pin C3</td><td>PXI P1 Pin E3</td></tr><tr><td>Slot 1(SYS)</td><td>-</td><td>-</td><td>-</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>INTD#</td></tr><tr><td>Slot 2</td><td>AD30</td><td>1</td><td>5</td><td>INTC#</td><td>INTD#</td><td>INTA#</td><td>INTB#</td></tr><tr><td>Slot 3</td><td>AD29</td><td>2</td><td>1</td><td>INTB#</td><td>INTC#</td><td>INTD#</td><td>INTA#</td></tr><tr><td>Slot 4</td><td>AD28</td><td>3</td><td>3</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>INTD#</td></tr><tr><td>Slot 5</td><td>AD27</td><td>4</td><td>4</td><td>INTD#</td><td>INTA#</td><td>INTB#</td><td>INTC#</td></tr><tr><td>Slot 6</td><td>AD26</td><td>5</td><td>0</td><td>INTC#</td><td>INTD#</td><td>INTA#</td><td>INTB#</td></tr><tr><td>Slot 7</td><td>AD25</td><td>6</td><td>6</td><td>INTB#</td><td>INTC#</td><td>INTD#</td><td>INTA#</td></tr><tr><td>Slot 8</td><td>S1_AD31</td><td>S1_0</td><td>0</td><td>INTC#</td><td>INTD#</td><td>INTA#</td><td>INTB#</td></tr><tr><td>Slot 9</td><td>S1_AD30</td><td>S1_1</td><td>1</td><td>INTB#</td><td>INTC#</td><td>INTD#</td><td>INTA#</td></tr><tr><td>Slot10</td><td>S1_AD29</td><td>S1_2</td><td>2</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>INTD#</td></tr><tr><td>Slot11</td><td>S1_AD28</td><td>S1_3</td><td>3</td><td>INTD#</td><td>INTA#</td><td>INTB#</td><td>INTC#</td></tr><tr><td>Slot12</td><td>S1_AD27</td><td>S1_4</td><td>4</td><td>INTC#</td><td>INTD#</td><td>INTA#</td><td>INTB#</td></tr><tr><td>Slot13</td><td>S1_AD26</td><td>S1_5</td><td>5</td><td>INTB#</td><td>INTC#</td><td>INTD#</td><td>INTA#</td></tr><tr><td>Slot14</td><td>S1_AD25</td><td>S1_6</td><td>6</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>INTD#</td></tr></table>

Note 2: Please refer the following table for the routing of the PXI\_STAR addressing signals from the trigger slot to peripheral slots.

<table><tr><td>Physical Slot Number</td><td>PXI_STAR (P2-D17)</td></tr><tr><td>Slot 2 (Star Trigger Slot)</td><td>PXI_STAR0 ~ PXI_STAR11</td></tr><tr><td>Slot 3</td><td>PXI_STAR0</td></tr><tr><td>Slot 4</td><td>PXI_STAR1</td></tr><tr><td>Slot 5</td><td>PXI_STAR2</td></tr><tr><td>Slot 6</td><td>PXI_STAR3</td></tr><tr><td>Slot 7</td><td>PXI_STAR4</td></tr><tr><td>Slot 8</td><td>PXI_STAR5</td></tr><tr><td>Slot 9</td><td>PXI_STAR6</td></tr><tr><td>Slot 10</td><td>PXI_STAR7</td></tr><tr><td>Slot 11</td><td>PXI_STAR8</td></tr><tr><td>Slot 12</td><td>PXI_STAR9</td></tr><tr><td>Slot 13</td><td>PXI_STAR10</td></tr><tr><td>Slot 14</td><td>PXI_STAR11</td></tr></table>

Miscellaneous Connectors Pin Assignments
CN1 & CN2: ATX DC Power input connectors

<table><tr><td>Signal Name</td><td>Pin #</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>V2SENSE</td><td>1</td><td>11</td><td>V2 (+3.3V)</td></tr><tr><td>V2 (+3.3V)</td><td>2</td><td>12</td><td>V4 (-12V)</td></tr><tr><td>GND</td><td>3</td><td>13</td><td>GND</td></tr><tr><td>V1 (+5V)</td><td>4</td><td>14</td><td>INH#</td></tr><tr><td>GND</td><td>5</td><td>15</td><td>GND</td></tr><tr><td>V1 (+5V)</td><td>6</td><td>16</td><td>SRTN</td></tr><tr><td>GND</td><td>7</td><td>17</td><td>GND</td></tr><tr><td>FAL#1</td><td>8*</td><td>18*</td><td>V3SENSE</td></tr><tr><td>DEG#1</td><td>9*</td><td>19</td><td>V1SENSE</td></tr><tr><td>V3 (+12V)</td><td>10</td><td>20</td><td>V1 (+5V)</td></tr></table>

Note: Pin #8, #9, and #18 are not standard ATX power definition.

# J1 INH#: DC power inhibit signal

<table><tr><td rowspan="3">J1&lt;img src="images/f4a37e460334e834ef0f71408a2fe26d07b963dba6d4529db43a22a92a6a3c32.jpg"/&gt;</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>INH#</td></tr><tr><td>2</td><td>GND</td></tr></table>

# J2 FAL#: Power supply fail input

<table><tr><td rowspan="3">J2&lt;img src="images/705372f1f1af97d3f282fcaa8ea557744b87fe68ff6d81c0ed7a0116a7e560af.jpg"/&gt;</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>FAL#</td></tr><tr><td>2</td><td>GND</td></tr></table>

# J3 PRST#: System reset signal

<table><tr><td rowspan="3">J3&lt;img src="images/b5b4c00b6b17bb0a1300b5f9ef26deda80fe3401e8d94985c67acc5593599d8b.jpg"/&gt;</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>RST#</td></tr><tr><td>2</td><td>GND</td></tr></table>

# J4: Connector for LED power status

<table><tr><td rowspan="5">J4</td><td>Name</td><td>Pin #</td><td>Pin #</td><td>Name</td></tr><tr><td>GND</td><td>8</td><td>7</td><td>+3.3V</td></tr><tr><td>GND</td><td>6</td><td>5</td><td>+5V</td></tr><tr><td>GND</td><td>4</td><td>3</td><td>-12V</td></tr><tr><td>GND</td><td>2</td><td>1</td><td>+12V</td></tr></table>

# CN5: SMB (system managing bus) connector

<table><tr><td rowspan="6">CN5</td><td>Pin #</td><td>Name</td></tr><tr><td>1</td><td>IPMB_CLK</td></tr><tr><td>2</td><td>GND</td></tr><tr><td>3</td><td>IPMB_DATA</td></tr><tr><td>4</td><td>IPMB_PWR</td></tr><tr><td>5</td><td>ALERT</td></tr></table>

Note: The SMB is connected to the P2 of the system slot.

JP3: PXI Bus Speed Control

<table><tr><td>JP3</td><td>Pin 1-2</td><td>Description</td></tr><tr><td>&lt;img src="images/5384f8952cbc7c1e0f41e910048955482fa515921da8c4a98320dc231fa8fd83.jpg"/&gt;</td><td>Short (default)</td><td>Short M66EN to ground to force PCI bus run 33MHz</td></tr><tr><td>&lt;img src="images/95e58ae116c23968b172649dc723a6a8d27f4d69732cbfff3a045b7301c39cb7.jpg"/&gt;</td><td>Open</td><td>PCI bus speed defined by M66EN on the PXI bus</td></tr></table>

JP2: PXI 10MHz Reference Clock Control

<table><tr><td>JP2</td><td>Description</td></tr><tr><td>Pin 1-2</td><td>External clock through the PXI_CLK10_IN on star trigger slot</td></tr><tr><td>Pin 2-3</td><td>Internal 10MHz system clock PXI_CLK10</td></tr></table>

# Important Safety Instructions

Please read and follow all instructions marked on the product and in the documentation before operating the system. Retain all safety and operating instructions for future use.

▶ Please read these safety instructions carefully.
$\triangleright$ Please keep this User's Manual for future reference.
▶ The equipment should be operated in an ambient temperature between 0 to 50°C.
The equipment should be operated only from the type of power source indicated on the rating label. Make sure the voltage of the power source is correct when connecting the equipment to the power outlet.
If the user's equipment has a voltage selector switch, make sure that the switch is set to the proper position for the area. The voltage selector switch is set at the factory to the correct voltage.
▶ For pluggable equipment, ensure they are installed near a socket-outlet that is easily accessible.
- Secure the power cord to prevent unnecessary accidents. Do not place anything over the power cord.
If the equipment will not be in use for long periods of time, disconnect the equipment from mains to avoid being damaged by transient overvoltage.
▶ All cautions and warnings on the equipment should be noted.
▶ Please keep this equipment away from humidity.
▶ Do not use this equipment near water or a heat source.
▶ Place this equipment on a reliable surface when installing. A drop or fall could cause injury.
▶ Never pour any liquid into the opening, this could cause fire or electrical shock.

▶ Openings in the case are provided for ventilation. Do not block or cover these openings. Make sure there is adequate space around the system for ventilation when setting up the work area. Never insert objects of any kind into the ventilation openings.
▶ To avoid electrical shock, always unplug all power and modem cables from the wall outlets before removing covers.
▶ Lithium Battery provided (real time clock battery)

"CAUTION - Risk of explosion if battery is replaced by an incorrect type. Dispose used batteries as instructed in the instructions"

▶ The equipment should be checked by service personnel if one of the following situation arises:

The power cord or plug is damaged.
▷ Liquid has penetrated the equipment.
The equipment has been exposed to moisture.
The equipment is not functioning or does not function according to the user's manual.
The equipment has been dropped and damaged.
▷ If the equipment has obvious sign of breakage.

▶ Never open the equipment. For safety reasons, the equipment should only be opened by qualified service personnel.

# Warranty Policy

Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully.

1. Before using ADLINK's products please read the user manual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA application form which can be downloaded from: http://rma.adlinktech.com/policy/.
2. All ADLINK products come with a limited two-year warranty, one year for products bought in China:

The warranty period starts on the day the product is shipped from ADLINK's factory.
▶ Peripherals and third-party products not manufactured by ADLINK will be covered by the original manufacturers' warranty.
For products containing storage devices (hard drives, flash cards, etc.), please back up your data before sending them for repair. ADLINK is not responsible for any loss of data.
▶ Please ensure the use of properly licensed software with our systems. ADLINK does not condone the use of pirated software and will not service systems using such software. ADLINK will not be held legally responsible for products shipped with unlicensed software installed by the user.
For general repairs, please do not include peripheral accessories. If peripherals need to be included, be certain to specify which items you sent on the RMA Request & Confirmation Form. ADLINK is not responsible for items not listed on the RMA Request & Confirmation Form.

3. Our repair service is not covered by ADLINK's guarantee in the following situations:

▶ Damage caused by not following instructions in the User's Manual.
▶ Damage caused by carelessness on the user's part during product transportation.
▶ Damage caused by fire, earthquakes, floods, lightening, pollution, other acts of God, and/or incorrect usage of voltage transformers.
▶ Damage caused by unsuitable storage environments (i.e. high temperatures, high humidity, or volatile chemicals).
▶ Damage caused by leakage of battery fluid during or after change of batteries by customer/user.
▶ Damage from improper repair by unauthorized ADLINK technicians.
▶ Products with altered and/or damaged serial numbers are not entitled to our service.
▶ This warranty is not transferable or extendible.
▶ Other categories not protected under our warranty.

4. Customers are responsible for shipping costs to transport damaged products to our company or sales office.

5. To ensure the speed and quality of product repair, please download an RMA application form from our company website: http://rma.adlinktech.com/policy. Damaged products with attached RMA forms receive priority.

If you have any further questions, please email our FAE staff: service@adlinktech.com.
[🔗 Link to the original document](.pxis-2670-manual-4/pxis-2670-manual-4.pdf)
