# PXIS-3320

# PXIS-3320/1000W

15-Slot 6U PXI/CompactPCI Chassis with 500W/1000W Hot-swappable Power Supply

User's Manual

Manual Rev. 2.00

Revision Date: October 27, 2006

Part No: 50-17024-1000

![The image displays a black circle containing the universal recycling symbol in white. The symbol consists of three arrows arranged in a triangular formation, chasing each other in a clockwise direction. Each arrow features three parallel lines at its tail end.](.pxis-3320-manual-5/48a4f0c5932d6aa5d7e16ea990f4fef145e7c5962c0baa3953657e8fdee217ea.jpg)
Recycled Paper

Copyright 2006 ADLINK TECHNOLOGY INC.

All Rights Reserved.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Trademark Information

PXI is registered trademarks of PXI Systems Alliance. Other product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

# Getting service from ADLINK

Customer satisfaction is our top priority. Contact us should you require any service or assistance.

# ADLINK TECHNOLOGY INC.

Web Site: http://www.adlinktech.com

Sales & Service: Service@adlinktech.com

TEL: +886-2-82265877

FAX: +886-2-82265717

Address: 9F, No. 166, Jian Yi Road, Chungho City,

Taipei, 235 Taiwan

E-mail or fax this completed service form for prompt and satisfactory service.

<table><tr><td colspan="2">Company Information</td></tr><tr><td>Company/Organization</td><td></td></tr><tr><td>Contact Person</td><td></td></tr><tr><td>E-mail Address</td><td></td></tr><tr><td>Address</td><td></td></tr><tr><td>Country</td><td></td></tr><tr><td>TEL</td><td>FAX:</td></tr><tr><td>Web Site</td><td></td></tr><tr><td colspan="2">Product Information</td></tr><tr><td>Product Model</td><td></td></tr><tr><td>Environment</td><td>OS:M/B: CPU:Chipset: BIOS:</td></tr></table>

Please give a detailed description of the problem(s):

# Table of Contents

# List of Tables...... iii

# List of Figures ...... v

# 1 Introduction ...... 1

1.1 Features.... 2
1.2 Unpacking Checklist 3

# 2 Chassis Overview.... 5

2.1 Front View.... 5
2.2 Right View.... 7
2.3 Top View 7
2.4 Rear View 8
2.5 Backplane overview 9

System Controller Slot 9
Star Trigger Slot 10
Peripheral Slots 10
Local Bus 10
Trigger Bus 10
10 MHz Reference Clock 11

# 3 Installation 13

3.1 Calculating Power Consumption.... 13
3.2 Installing the Chassis and Starting Up.... 14
3.3 Monitoring the System 15
3.4 Alarms.... 15
3.5 Grounding the Chassis 16
3.6 Changing the Power Supply Modules.... 16
3.7 Changing the Fans 17

# 4 Troubleshooting and Preventive

# Maintenance 19

4.1 Troubleshooting for Power Failure of PXIS-3320 19
4.2 Cleaning.... 20

Cleaning the Chassis Interior 20

Cleaning the Chassis Exterior 20

# A Specifications.... 21

A.1 General 21
A.2 Power Supply.... 21
A.3 System Monitoring 22

System LEDs 22

Buzzer/Alarm 22

A.4 Cooling System.... 22
A.5 Physical.... 23
A.6 Operating Environment 23
A.7 Backplane 23
A.8 Shock and Vibration.... 23
A.9 Safety and EMC/EMI Compliance 23

# B Backplane Drawing and Pin Assignments 25

B.1 Backplane Layout 25
B.2 Backplane CBX-6015 Connectors Pin Assignments 27

PXI Connectors Pin Assignments 27

B.3 Bus Segments and Interrupt Routings 33
B.4 Bus Segments and Interrupt Routings 34
B.5 Miscellaneous Connectors Pin Assignments 35

CN1, CN7, CN8, CN9: ATX-like DC Power input connectors 35
PCI VIO Selection Screw Terminals 35
J6 INH#: DC power inhibit signal 36
J8 RST#: System reset signal 36
J9 FAL#: Power supply fail input 36
J5: Connector for LED power status 36
CN5: SMB (System Management Bus) connector ..... 37
JP1: 10 MHz Reference Clock 37
J2: POWER SENSE 37

# Important Safety Instructions.... 39

# Warranty Policy 41

# List of Tables

Table 3-1: LED indications 15

Table 4-1: Troubleshooting Power Failures ...... 19

# List of Figures

Figure 2-1: PXIS-3320 front view....5

Figure 2-2: PXIS-3320/1000W front view....6

Figure 2-3: PXIS-3320 and PXIS/1000W right view....7

Figure 2-4: PXIS-3320 and PXIS/1000W top view....7

Figure 2-5: PXIS-3320 and PXIS-3320/1000W rear view...... 8

Figure 2-6: Backplane functions....9

Figure B-1: CBX-6015 front view 25

Figure B-2: CBX-6015 rear view.... 26

# 1 Introduction

The ADLINK PXIS-3320 is a 19" 6U PXI chassis featuring one system slot and 14 PXI peripheral slots. The chassis is compliant with PXI and CompactPCI specifications and accommodates both 6U PXI and CompactPCI modules. An internal 10 MHz reference clock is available on all of the 14 PXI peripheral slots, as well as star trigger, PXI trigger bus, and PXI local bus. These functions are dedicated for users to facilitate synchronization among multiple peripheral modules.

The PXIS-3320 series is equipped with industrial-grade, PICMG 2.11-compliant CompactPCI power modules to provide reliable power and easy maintenance. The standard PXIS-3320 is equipped with two power modules to provide up to 500 W of power. Designed to support high-power configurations, the PXIS-3320/1000W model provides sufficient and reliable power supply to power-intensive peripherals such as high-speed digitizers, digital pin driver/receiver, and communication modules. The system power supply, temperature, and cooling fan statuses are monitored by the alarm module onboard the chassis. When a component failure is detected, corresponding LED and buzzer alarms are activated for rapid maintenance and/or replacement.

To guarantee operating stability, two decks of hot-swappable fan trays are available to create a superb 482 CFM airflow that effectively exhausts all heat generated inside the chassis. Defective fans may be easily removed from the front panel of the chassis, thus effectively reducing MTTR (Mean-Time-To-Repair).

It is recommended that you use the cPCI-6840 and cPCI-6860A controllers for the PXIS-3320 chassis. These high-performance controllers are ideal for the development of applications within the PXIS-3320. You may also deploy ADLINK's PCI-8570 or PXI-8570/6U PCI-to-PXI extension module to remotely control the PXIS-3320 via a host computer.

# 1.1 Features

▶ Supports both 6U PXI and CompactPCI modules
▶ PXI specifications Rev. 2.2-compliant
▶ Supports one system slot and 14 PXI/CompactPCI peripheral slots
▶ Two hot-swappable 250 W CompactPCI power supply with universal AC input (PXIS-3320)
▶ Filtered, forced-air cooling architecture
▶ Magnetic circuit breaker protection for AC input
▶ Temperature, voltage, and fan monitoring LEDs
▶ Optional 1000 W power supply (PXIS-3320/1000W)

# 1.2 Unpacking Checklist

Before unpacking, check the shipping carton for any damage. If the shipping carton and/or contents are damaged, inform your dealer immediately. Retain the shipping carton and packing materials for inspection. Obtain authorization from your dealer before returning any product to ADLINK.

Check if the following items are included in the package.

# PXIS-3320

▶ 6U PXI/CompactPCI chassis with 15 slots and two cPS-H325/AC power supply modules
▶ Power cord
▶ User's manual

# PXIS-3320/1000W

▶ 6U PXI/CompactPCI chassis with 15 slots and four cPS-H325/AC power supply modules
▶ Power cord
▶ User's manual

# NOTE

The PXIS-3320 OEM version package may vary depending on customer requests. The assigned controller and/or peripheral modules may be pre-installed and shipped with the chassis. Inquire with your dealer for additional information on these options.

# 2 Chassis Overview

This section illustrates the mechanical dimensions of the PXIS-3320 and PXIS-3320/1000W chassis, identifies the basic, and describes the backplane functions and features.

# 2.1 Front View

![Fan tray cover screw\nFan tray cover\nAlarm reset button\nPower switch\nLEDs\n323.85\n399\n37.075\n465.5\n483.2\nFan tray cover\nPower supply modules](.pxis-3320-manual-5/4dc1bd7acbeb3e2d8b8ca4b949808ac7decf9cef4bf82bc86c00effeeb7d6aa7.jpg)

Figure 2-1: PXIS-3320 front view

![Fan tray cover screw\nFan tray cover\nAlarm reset button\nPower switch\nLEDs\n323.85\n399\n37.075\n465.5\n483.2\nFan tray cover\nPower supply modules](.pxis-3320-manual-5/657b4da5eb550e52086e827e636572daf7642d619be9888277652fa679e5f901.jpg)

Figure 2-2: PXIS-3320/1000W front view

# 2.2 Right View

![Handle\n160\n42\n297.1](.pxis-3320-manual-5/b0d12a14bac51b00d7e0e0ed7c22842d31632c5af4114826a5f277a5cdace45d.jpg)

Figure 2-3: PXIS-3320 and PXIS/1000W right view

# 2.3 Top View

![| Dimension | Value  |\n| --------- | ------ |\n| Height    | 438.8  |\n| Width     | 297.1  |\n| Bottom Left | 10.65 |\n| Bottom Right | 10.65 |](.pxis-3320-manual-5/161d1bd44090f0c0fc693f55b1a4c2cfa7f5c12bebd3a453121c03b54608f42b.jpg)

Figure 2-4: PXIS-3320 and PXIS/1000W top view

# 2.4 Rear View

![120.65\nCircuit breaker\nPower connector\n439.9](.pxis-3320-manual-5/68daa4d9e97e48135dd5f2f220836c4930971debdeebb4cacb6513f3bff30d77.jpg)

Figure 2-5: PXIS-3320 and PXIS-3320/1000W rear view

# 2.5 Backplane overview

The PXIS-3320 chassis comes with a 6U, 15-slot PXI backplane that supports one PXI system controller and 14 PXI/CompactPCI peripheral modules. This section illustrates the functions of the backplane.

![Based on the provided image, here is the accurate description of the flowchart/block diagram:\n\n**Labeled Blocks:**\n*   **Top Block:** 'Clock 10 MHz Buffer Circuity'\n*   **Vertical Blocks (from left to right):**\n    *   'System Controller' (containing a circle labeled '1')\n    *   'Star Trigger Controller' (containing a circle labeled '2')\n    *   'Peripheral slot' (containing a circle labeled '3')\n    *   'Peripheral slot' (containing a circle labeled '4')\n    *   'Peripheral slot' (containing a circle labeled '5')\n    *   'Peripheral slot' (containing a circle labeled '...')\n    *   'Peripheral slot' (containing a circle labeled '13')\n    *   'Peripheral slot' (containing a circle labeled '14')\n*   **Bottom Label:** 'PXI Trigger Bus Segment and PCI Bus Segment'\n\n**Connections:**\n*   **Clock Connections:** Lines extend downwards from the 'Clock 10 MHz Buffer Circuity' block to the top of the 'Star Trigger Controller' and all 'Peripheral slot' blocks.\n*   **Star Trigger Connections:** Lines extend from the 'Star Trigger Controller' upwards and to the right, connecting to the top of all 'Peripheral slot' blocks. This group of lines is labeled 'PXI Star'.\n*   **System Controller Connection:** A line extends from the right side of the 'System Controller', curves upward and to the right, and connects to the 'Star Trigger Controller'.\n*   **Local Connections:** At the bottom of each vertical block, an arrow points downwards towards a numbered circle. The text 'Local' is positioned next to these connections.\n*   **Bus Segment:** Below each numbered circle, double-headed arrows point downwards. The entire bottom section is encompassed by a large arrow labeled 'PXI Trigger Bus Segment and PCI Bus Segment'.](.pxis-3320-manual-5/bb74a86db4368fbcd030f136629516c107c552f9f9da0c833dae30868c11130f.jpg)

Figure 2-6: Backplane functions

# System Controller Slot

As defined by PXI specifications, the system controller slot occupies Slot 1 of the chassis. The system slot occupies two units of slot space and accommodates either a 1-slot or 2-slot 6U PXI/cPCI system controller. It is recommended that you use ADLINK cPCI-6840 and cPCI-6860A system controller for the PXIS-3320 chassis.

# Star Trigger Slot

Slot 2 is designated as the Star Trigger (ST) slot. This slot features a dedicated trigger line between itself and slots 3 to 15. The star trigger delivers trigger signals with ultra-low skew (&lt;1ns) to peripheral modules. To use the star trigger functionality, you must install a special star trigger controller in Slot 2.

# Peripheral Slots

The PXIS-3320 chassis backplane accommodates up to fourteen 6U PXI/CompctPCI peripheral modules.

# Local Bus

The PXI backplane's local bus is a daisy-chained bus that connects each peripheral slot with the slots on its left and right. Each local bus is 14 lines wide and can pass analog and digital signals between modules or provide a high-speed, sideband communication path that does not affect the PCI bandwidth.

Following PXI specifications, the local bus connects all adjacent slots except Slots 1 and 2.

# Trigger Bus

The backplane's trigger bus is an 8-line bus that connects all slots in the same PCI segment. Users can use triggers to synchronize the operation of several PXI peripheral modules, or use one module to control accurate timing sequences of operations performed on other modules in the system. Modules can pass trigger signals or clock signals to other modules through the trigger bus, allowing precise timed responses to asynchronous external events that the system is monitoring or controlling.

# 10 MHz Reference Clock

The backplane supplies every peripheral slot with a 10 MHz system clock signal (PXI\_CLK10). An independent clock buffer (having source impedance matched to the backplane and a skew of &lt;1ns between slots) drives the clock signals to each peripheral slot.

You can use this common reference clock signal to synchronize multiple modules in a measurement or control system or drive PXI\_CLK10 from an external source through the PXI\_CLK10\_IN pin on the P2 connector of the star trigger slot.

# 3 Installation

The chapter describes the procedures on how to install the system controller to the PXIS-3320 chassis. It also provides information on how to power up and monitor the system.

# 3.1 Calculating Power Consumption

Before installing any modules into the PXIS-3320 chassis, calculate the total system power requirement and check the power saving requirements for each DC power source including the +5 V, +3.3 V, +12 V, and -12 V supply rail. Refer to Appendix A for the maximum usable power.

# 3.2 Installing the Chassis and Starting Up

Follow the steps to power on the chassis.

1. For rackmount or bench-top installation, provide a sufficient space under the chassis for ventilation and make sure that the chassis is installed on a flat and stable surface.
2. Put the power switch in the standby (OFF) position. The power switch protrudes from the bezel when the system is in standby power mode. Refer to the illustration below. The front-panel power switch turns the system ON or OFF.

![Diagram of a control panel with warning symbols and a red circle highlighting a specific area](.pxis-3320-manual-5/04bef65f46a00e52bf7c92bd6d02b3215cfe5ec50cd95061b572a22eaa7ee00b.jpg)

3. Plug the AC power cord to a properly grounded wall socket or power strip.
4. Make sure that the CPU, memory modules, and storage device are properly installed on the system controller module.
5. Push down (loose) the ejector/injector handles of the system controller module.
6. Align the system controller module's top and bottom edges to the card guides.
7. Carefully slide the system controller module into the chassis, then push the ejector/injector handle up to secure the module in place. Secure the module with screws from the chassis front panel.
8. Install additional 6U PXI/CompactPCI peripheral modules, if needed.

9. Press the power switch. The amber LED and green LEDs on the upper right corner of the front panel light up. The chassis fans also start to rotate.

# NOTE

If the chassis fails to turn on, refer to Chapter 4: Troubleshooting and Preventive Maintenance for details.

# 3.3 Monitoring the System

Light Emitting Diodes (LEDs) on the front panel tell you the power status, chassis temperature, and fan operations. Refer to Table 3-1 for details.

&lt;table&gt;<tr><td>LED</td><td>Function</td><td>Color</td><td>Status</td><td>Indication</td></tr><tr><td rowspan="2">Power</td><td rowspan="2">DC rail voltages (+3.3 V, +5 V, +12 V, -12 V)</td><td rowspan="2">Green</td><td>ON</td><td>Power is supplied to the system</td></tr><tr><td>OFF</td><td>No power is supplied to the system</td></tr><tr><td rowspan="2">Temperature</td><td rowspan="2">Internal temperature status</td><td rowspan="2">Red</td><td>ON</td><td>Internal temperature is less than 50°C</td></tr><tr><td>Flashing</td><td>internal temperature is more than 50°C</td></tr><tr><td rowspan="2">Fan</td><td rowspan="2">Fan speeds and operation</td><td rowspan="2">Amber</td><td>ON</td><td>Fan speed is normal</td></tr><tr><td>Flashing</td><td>Fan speed is abnormal; fan is defective</td></tr></table>

Table 3-1: LED indications

# 3.4 Alarms

The chassis comes with an alarm buzzer and an alarm reset button. The alarm buzzer beeps to alert you of any power, temperature, or fan failure. The alarm reset button resets the alarm monitor system and stops the buzzer.

# 3.5 Grounding the Chassis

The backplane's mounting holes may be grounded in two ways. First, the mounting holes labeled as GND with circle soldering mask can be connected to the signal ground plane of the backplane. Second, the mounting holes labeled as FGND with square soldering mask can be connected to the power ground plane (the earth), and is isolated from the signal ground.

A proper signal and power wiring helps reduce the effects of ground loop and increases the accuracy of measurement.

By default, the PXIS-3320 backplane is mounted on the chassis through the FGND mounting holes. The signal ground (GND), therefore, is isolated to the power ground (FGND). For applications that require the short of signal ground and power ground, an external wiring is needed to connect the GND and FGND soldering pots.

# 3.6 Changing the Power Supply Modules

The PXIS-3320 chassis comes with two 3U CompactPCI power supply modules, while the PXIS-3320/1000W chassis comes with four 3U CompactPCI power supply modules. The power supply modules are current-sharing and are hot-swappable.

To replace the power modules:

1. Release the handle of the defective power module.
2. Push down the handle to eject the power module from the chassis.
3. Carefully pull the power module out from the chassis, then set aside.
4. Align the top and bottom edges of power supply modules to the card guides, then install the power supply module into the chassis.
5. Use the handle to firmly connect the power module into the chassis backplane.

# 3.7 Changing the Fans

The PXIS-3320 chassis has ten 80 mm x 80 mm x 25 mm fans. These fans are installed in two decks of fan trays. Five fans are located at the bottom of the chassis for air intake, while the other five fans are installed on top of the chassis for air ventilation. The fan trays are hot-swappable.

When a fan fails to operate, the alarm buzzer beeps and the fan LED flashes to alert you. Reset the alarm by pressing the alarm reset button, then replace the defective fan.

To replace a defective fan:

1. Remove the fan tray cover by loosening the thumb screw.
2. Check the LED in front of each fan tray. The LED blinks when the fan is defective.
3. Remove two screws that secure the fan tray to the chassis, then carefully pull the tray out of the chassis.
4. Install a new fan into the tray, then secure it with two screws you earlier removed.
5. Replace the fan tray cover.

# 4 Troubleshooting and Preventive Maintenance

# 4.1 Troubleshooting for Power Failure of PXIS-3320

When the PXI-3320 chassis fails to turn on, refer to Table 4-1 for basic power troubleshooting. The table lists the most common cause for power failure and the recommends process to correct the problem.

<table><tr><td>Possible Causes</td><td>What to Do</td></tr><tr><td>The power cord is not connected to the power outlet.</td><td>Make sure that the power cord is connected to a properly grounded and live electrical outlet. Try connecting another electrical equipment to this outlet to make sure that it has power.</td></tr><tr><td>Power switch is not at ON position.</td><td>Set the power switch to the ON position.</td></tr><tr><td>The circuit breaker is not at ON position.</td><td>Make sure to turn off the power switch before setting the circuit breaker to ON position. After turning the circuit breaker on, turn the power switch on.</td></tr><tr><td>Power supply has failed.</td><td>Check the LED indicators on the CompactPCI power supply modules. If the POWER LED is off or the FAULT LED lights up orange when you press the power switch, the power supply module may be damaged. Contact an ADLINK representative for more information.</td></tr></table>

Table 4-1: Troubleshooting Power Failures

# 4.2 Cleaning

It is recommended that you clean the interior and exterior of the PXIS-3320 chassis regularly. To clean individual CompactPCI or PXI modules, refer to the documentation that came with the module.

# NOTE

Always turn the chassis off and disconnect the power cord from the electrical socket before cleaning the chassis.

# Cleaning the Chassis Interior

Use a dry, low-velocity stream of air to clean the interior of the chassis. Clean around components with a soft-bristle brush. If you must use liquid for minor interior cleaning, use a 75% isopropyl alcohol solution, then rinse the area with de-ionized water.

# Cleaning the Chassis Exterior

Use a dry lint-free cloth or a soft-bristle brush to clean the exterior surfaces of the chassis. To remove dirt, moisten a cloth with a mild soap solution to wipe the exterior surfaces of the chassis. To remove any soap residue, wipe the surface with a cloth moistened with clean water. Do not use abrasive compounds to clean any part of the chassis.

# A Specifications

# A.1 General

Complies with PXI specifications and accepts modules compliant with CompactPCI, PICMG 2.0 specifications.

# A.2 Power Supply

▶ PICMG standards: PICMG 2.11-compliant
▶ Input voltage: 100 to 240 VAC
▶ Input frequency: 47 to 63 Hz
▶ Output: 250 W (each)

<table><tr><td>VDC</td><td>Typical</td><td>Maximum</td></tr><tr><td>+5 V</td><td>25.0 A</td><td>33.0 A</td></tr><tr><td>+3.3 V</td><td>18.0 A</td><td>33.0 A</td></tr><tr><td>+12 V</td><td>5.0 A</td><td>5.5 A</td></tr><tr><td>-12 V</td><td>0.5 A</td><td>1 A</td></tr></table>

# A.3 System Monitoring

System LEDs

<table><tr><td>LED</td><td>Function/Setting</td><td>Status</td><td>Indication</td></tr><tr><td>Power</td><td>Voltage monitoring of +3.3 V, +5 V, +12 V, -12 V</td><td>ON</td><td>Power is supplied</td></tr><tr><td rowspan="2">Temperature</td><td rowspan="2">Temperature monitoring. 50°C (default setting)</td><td>ON</td><td>Temperature is normal</td></tr><tr><td>FLASHING</td><td>Temperature exceeds normal settings</td></tr><tr><td rowspan="2">Fan</td><td rowspan="2">Fan speed monitoring</td><td>ON</td><td>Normal fan speed</td></tr><tr><td>FLASHING</td><td>Fan is not working or has malfunctioned</td></tr></table>

Buzzer/Alarm

<table><tr><td>Alarm/ Buzzer</td><td>Function</td></tr><tr><td>Alarm buzzer</td><td>Beeps when any alarm occurs</td></tr><tr><td>Alarm reset button</td><td>Resets the alarm monitor system</td></tr></table>

# A.4 Cooling System

Front-access hot-swappable fan trays for air intake and ventilation

▶ Type: 12 VDC brush-less, dual-ball bearing
▶ Five fans for air intake and five fans for ventilation
▶ Rated fan speed: 4000 to 5000 RPM
▶ Rated fan power: 2.64W
▶ Airflow for intake: 241 CFM
▶ Airflow for ventilation: 241 CFM

# A.5 Physical

▶ Number of slots: 15 (one system slot, 14 peripheral slots)
▶ Dimensions: 484 mm x 295 mm x 398 mm (L x W x H) without handles
▶ Weight: 23 kg

# A.6 Operating Environment

Ambient temperature range

<table><tr><td>Model</td><td>Temperature</td></tr><tr><td>PXIS-3320</td><td>0 to 50°C</td></tr><tr><td>PXIS-3320/1000W</td><td>0 to 50°C</td></tr></table>

Relative humidity: 10 to 90%, non-condensing

# A.7 Backplane

▶ Backplane bare-board material: UL 94V-0 rated
▶ Backplane connectors: Conforms to IEC-917 and IEC 1076-4-101, UL 94V-0 rated

# A.8 Shock and Vibration

▶ Shock: 15 G peak-to-peak, 11 ms duration, non-operation
▶ Random Vibration
▶ Operating: 5 to 500 Hz, 0.5 GRMS each axis
▷ Nonoperating: 5 to 500 Hz, 1.88 GRMS each axis

# A.9 Safety and EMC/EMI Compliance

EMC/EMI: CE, FCC Class A

# B Backplane Drawing and Pin Assignments

# B.1 Backplane Layout

The following figures show the front and rear view of the PXIS-3320 backplane.

![Floor plan diagram with labeled rooms and dimensions, showing room numbers and layout elements](.pxis-3320-manual-5/7e6215183e2688e5a1fab13ded990ad97ae957576cfcd58ce96475c862b9219d.jpg)

Figure B-1: CBX-6015 front view

![Pure electrical circuit lines without any symbols](.pxis-3320-manual-5/333a9c4e35fa28c95efe0b34014a6b3bd052aefc9d7b7784cc710b141ac4b584.jpg)

Figure B-2: CBX-6015 rear view

# B.2 Backplane CBX-6015 Connectors Pin Assignments

# PXI Connectors Pin Assignments

System Slot (Slot #1) P1 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>25</td><td>GND</td><td>+5V</td><td>REQ64#</td><td>ENUM#</td><td>+3.3V</td><td>+5V</td><td>GND</td></tr><tr><td>24</td><td>GND</td><td>AD[1]</td><td>+5V</td><td>V(I/O)</td><td>AD[0]</td><td>ACK64#</td><td>GND</td></tr><tr><td>23</td><td>GND</td><td>+3.3V</td><td>AD[4]</td><td>AD[3]</td><td>+5V</td><td>AD[2]</td><td>GND</td></tr><tr><td>22</td><td>GND</td><td>AD[7]</td><td>GND</td><td>+3.3V</td><td>AD[6]</td><td>AD[5]</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>+3.3V</td><td>AD[9]</td><td>AD[8]</td><td>GND</td><td>C/BE[0]#</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>AD[12]</td><td>GND</td><td>V(I/O)</td><td>AD[11]</td><td>AD[10]</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>+3.3V</td><td>AD[15]</td><td>AD[14]</td><td>GND</td><td>AD[13]</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>SERR#</td><td>GND</td><td>+3.3V</td><td>PAR</td><td>C/BE[1]#</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>+3.3V</td><td>IPMB_SCL</td><td>IPMB_SDA</td><td>GND</td><td>PERR#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>DEVSEL#</td><td>GND</td><td>V(I/O)</td><td>STOP#</td><td>LOCK#</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>FRAME#</td><td>IRDY#</td><td>GND</td><td>TRDY#</td><td>GND</td></tr><tr><td>12-14</td><td colspan="7">Key</td></tr><tr><td>11</td><td>GND</td><td>AD[18]</td><td>AD[17]</td><td>AD[16]</td><td>GND</td><td>C/BE[2]#</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[21]</td><td>GND</td><td>+3.3V</td><td>AD[20]</td><td>AD[19]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>C/BE[3]#</td><td>GND</td><td>AD[23]</td><td>GND</td><td>AD[22]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[26]</td><td>GND</td><td>V(I/O)</td><td>AD[25]</td><td>AD[24]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[30]</td><td>AD[29]</td><td>AD[28]</td><td>GND</td><td>AD[27]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>REQ# (1)</td><td>GND</td><td>+3.3V</td><td>CLK (1)</td><td>AD[31]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>BRSVP1A5</td><td>BRSVP1B5</td><td>PCIRST#</td><td>GND</td><td>GNT# (1)</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>IPMB_PWR</td><td>GND</td><td>V(I/O)</td><td>INTP</td><td>INTS</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>INTA# (1)</td><td>INTB# (1)</td><td>INTC# (1)</td><td>+5V</td><td>INTD# (1)</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>TCK</td><td>+5V</td><td>TMS</td><td>TDO</td><td>TDI</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>+5V</td><td>-12V</td><td>TRST#</td><td>+12V</td><td>+5V</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

System Slot (Slot #1) P2 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>22</td><td>GND</td><td>PXI_BRSVA22</td><td>PXI_BRSVB22</td><td>PXI_BRSVC22</td><td>PXI_BRSVD22</td><td>PXI_BRSVE22</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>CLK6</td><td>GND</td><td>NC</td><td>NC</td><td>NC</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>CLK5</td><td>GND</td><td>NC</td><td>GND</td><td>NC</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>GND</td><td>GND</td><td>SMBDATA</td><td>SMBCLK</td><td>SMBALERT-</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>PXI_TRIG3</td><td>PXI_TRIG4</td><td>PXI_TRIG5</td><td>GND</td><td>PXI_TRIG6</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>PXI_TRIG2</td><td>GND</td><td>PRST#</td><td>REQ6#</td><td>GNT6#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>PXI_TRIG1</td><td>PXI_TRIG0</td><td>DEG#</td><td>GND</td><td>PXI_TRIG7</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>PXI_BRSVA15</td><td>GND</td><td>FAL#</td><td>REQ5#</td><td>GNT5#</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>AD[35]</td><td>AD[34]</td><td>AD[33]</td><td>GND</td><td>AD[32]</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>AD[38]</td><td>GND</td><td>V(I/O)</td><td>AD[37]</td><td>AD[36]</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>AD[42]</td><td>AD[41]</td><td>AD[40]</td><td>GND</td><td>AD[39]</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>AD[45]</td><td>GND</td><td>V(I/O)</td><td>AD[44]</td><td>AD[43]</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[49]</td><td>AD[48]</td><td>AD[47]</td><td>GND</td><td>AD[46]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>AD[52]</td><td>GND</td><td>V(I/O)</td><td>AD[51]</td><td>AD[50]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[56]</td><td>AD[55]</td><td>AD[54]</td><td>GND</td><td>AD[53]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[59]</td><td>GND</td><td>V(I/O)</td><td>AD[58]</td><td>AD[57]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>AD[63]</td><td>AD[62]</td><td>AD[61]</td><td>GND</td><td>AD[60]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>C/BE[5]\#</td><td>GND</td><td>V(I/O)</td><td>C/BE[4]\#</td><td>PAR64</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>V(I/O)</td><td>PXI_BRSVB4</td><td>C/BE[7]\#</td><td>GND</td><td>C/BE[6]\#</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>CLK4</td><td>GND</td><td>GNT3#</td><td>REQ4#</td><td>GNT4#</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>CLK2</td><td>CLK3</td><td>GND (SYS\#)</td><td>GNT2#</td><td>REQ3#</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>CLK1</td><td>GND</td><td>REQ1#</td><td>GNT1#</td><td>REQ2#</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

Star Trigger Slot (Slot #2) P1 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>25</td><td>GND</td><td>+5V</td><td>REQ64#</td><td>ENUM#</td><td>+3.3V</td><td>+5V</td><td>GND</td></tr><tr><td>24</td><td>GND</td><td>AD[1]</td><td>+5V</td><td>V(I/O)</td><td>AD[0]</td><td>ACK64#</td><td>GND</td></tr><tr><td>23</td><td>GND</td><td>+3.3V</td><td>AD[4]</td><td>AD[3]</td><td>+5V</td><td>AD[2]</td><td>GND</td></tr><tr><td>22</td><td>GND</td><td>AD[7]</td><td>GND</td><td>+3.3V</td><td>AD[6]</td><td>AD[5]</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>+3.3V</td><td>AD[9]</td><td>AD[8]</td><td>M66EN</td><td>C/BE[0]#</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>AD[12]</td><td>GND</td><td>V(I/O)</td><td>AD[11]</td><td>AD[10]</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>+3.3V</td><td>AD[15]</td><td>AD[14]</td><td>GND</td><td>AD[13]</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>SERR#</td><td>GND</td><td>+3.3V</td><td>PAR</td><td>C/BE[1]#</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>+3.3V</td><td>IPMB_SCL</td><td>IPMB_SDA</td><td>GND</td><td>PERR#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>DEVSEL#</td><td>GND</td><td>V(I/O)</td><td>STOP#</td><td>LOCK#</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>FRAME#</td><td>IRDY#</td><td>GND</td><td>TRDY#</td><td>GND</td></tr><tr><td>12-14</td><td>Key</td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>11</td><td>GND</td><td>AD[18]</td><td>AD[17]</td><td>AD[16]</td><td>GND</td><td>C/BE[2]#</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[21]</td><td>GND</td><td>+3.3V</td><td>AD[20]</td><td>AD[19]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>C/BE[3]#</td><td>IDSEL (1)</td><td>AD[23]</td><td>GND</td><td>AD[22]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[26]</td><td>GND</td><td>V(I/O)</td><td>AD[25]</td><td>AD[24]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[30]</td><td>AD[29]</td><td>AD[28]</td><td>GND</td><td>AD[27]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>REQ# (1)</td><td>GND</td><td>+3.3V</td><td>CLK (1)</td><td>AD[31]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>BRSVP1A5</td><td>BRSVP1B5</td><td>PCIRST#</td><td>GND</td><td>GNT# (1)</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>IPMB_PWR</td><td>GND</td><td>V(I/O)</td><td>INTP</td><td>INTS</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>INTA# (1)</td><td>INTB# (1)</td><td>INTC# (1)</td><td>+5V</td><td>INTD# (1)</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>TCK</td><td>+5V</td><td>TMS</td><td>TDO</td><td>TDI</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>+5V</td><td>-12V</td><td>TRST#</td><td>+12V</td><td>+5V</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

Star Trigger Slot (Slot #2) P2 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>22</td><td>GND</td><td>PXI_BRSVA22</td><td>PXI_BRSVB22</td><td>PXI_BRSVC22</td><td>PXI_BRSVD22</td><td>PXI_BRSVE22</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>PXI_LBR0</td><td>GND</td><td>PXI_LBR1</td><td>PXI_LBR2</td><td>PXI_LBR3</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>PXI_LBR4</td><td>PXI_LBR5</td><td>PXI_STAR0 (2)</td><td>GND</td><td>PXI_STAR1 (2)</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>PXI_STAR2 (2)</td><td>GND</td><td>PXI_STAR3 (2)</td><td>PXI_STAR4</td><td>PXI_STAR5</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>PXI_TRIG3</td><td>PXI_TRIG4</td><td>PXI_TRIG5</td><td>GND</td><td>PXI_TRIG6</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>PXI_TRIG2</td><td>GND</td><td>N/C</td><td>PXI_CLK10_IN</td><td>PXI_CLK10</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>PXI_TRIG1</td><td>PXI_TRIG0</td><td>N/C</td><td>GND</td><td>PXI_TRIG7</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>PXI_BRSVA15</td><td>GND</td><td>N/C</td><td>PXI_STAR6</td><td>PXI_LBR6</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>AD[35]</td><td>AD[34]</td><td>AD[33]</td><td>GND</td><td>AD[32]</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>AD[38]</td><td>GND</td><td>V(I/O)</td><td>AD[37]</td><td>AD[36]</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>AD[42]</td><td>AD[41]</td><td>AD[40]</td><td>GND</td><td>AD[39]</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>AD[45]</td><td>GND</td><td>V(I/O)</td><td>AD[44]</td><td>AD[43]</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[49]</td><td>AD[48]</td><td>AD[47]</td><td>GND</td><td>AD[46]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>AD[52]</td><td>GND</td><td>V(I/O)</td><td>AD[51]</td><td>AD[50]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[56]</td><td>AD[55]</td><td>AD[54]</td><td>GND</td><td>AD[53]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[59]</td><td>GND</td><td>V(I/O)</td><td>AD[58]</td><td>AD[57]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>AD[63]</td><td>AD[62]</td><td>AD[61]</td><td>GND</td><td>AD[60]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>C/BE[5]\#</td><td>GND</td><td>V(I/O)</td><td>C/BE[4]\#</td><td>PAR64</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>V(I/O)</td><td>PXI_BRSVB4</td><td>C/BE[7]\#</td><td>GND</td><td>C/BE[6]\#</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>PXI_LBR7</td><td>GND</td><td>PXI_LBR8</td><td>PXI_LBR9</td><td>PXI_LBR10</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>PXI_LBR11</td><td>PXI_LBR12</td><td>N.C (SYS#)</td><td>PXI_STAR7</td><td>PXI_STAR8</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>PXI_STAR9</td><td>GND</td><td>PXI_STAR10</td><td>PXI_STAR11</td><td>PXI_STAR12</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

General Peripheral Slot (Slot #3\~#15) P1 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>25</td><td>GND</td><td>+5V</td><td>REQ64#</td><td>ENUM#</td><td>+3.3V</td><td>+5V</td><td>GND</td></tr><tr><td>24</td><td>GND</td><td>AD[1]</td><td>+5V</td><td>V(I/O)</td><td>AD[0]</td><td>ACK64#</td><td>GND</td></tr><tr><td>23</td><td>GND</td><td>+3.3V</td><td>AD[4]</td><td>AD[3]</td><td>+5V</td><td>AD[2]</td><td>GND</td></tr><tr><td>22</td><td>GND</td><td>AD[7]</td><td>GND</td><td>+3.3V</td><td>AD[6]</td><td>AD[5]</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>+3.3V</td><td>AD[9]</td><td>AD[8]</td><td>M66EN</td><td>C/BE[0]#</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>AD[12]</td><td>GND</td><td>V(I/O)</td><td>AD[11]</td><td>AD[10]</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>+3.3V</td><td>AD[15]</td><td>AD[14]</td><td>GND</td><td>AD[13]</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>SERR#</td><td>GND</td><td>+3.3V</td><td>PAR</td><td>C/BE[1]#</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>+3.3V</td><td>IPMB_SCL</td><td>IPMB_SDA</td><td>GND</td><td>PERR#</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>DEVSEL#</td><td>GND</td><td>V(I/O)</td><td>STOP#</td><td>LOCK#</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>+3.3V</td><td>FRAME#</td><td>IRDY#</td><td>GND</td><td>TRDY#</td><td>GND</td></tr><tr><td>12-14</td><td>Key</td><td></td><td></td><td></td><td></td><td></td><td></td></tr><tr><td>11</td><td>GND</td><td>AD[18]</td><td>AD[17]</td><td>AD[16]</td><td>GND</td><td>C/BE[2]#</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[21]</td><td>GND</td><td>+3.3V</td><td>AD[20]</td><td>AD[19]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>C/BE[3]#</td><td>IDSEL (1)</td><td>AD[23]</td><td>GND</td><td>AD[22]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[26]</td><td>GND</td><td>V(I/O)</td><td>AD[25]</td><td>AD[24]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[30]</td><td>AD[29]</td><td>AD[28]</td><td>GND</td><td>AD[27]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>REQ# (1)</td><td>GND</td><td>+3.3V</td><td>CLK (1)</td><td>AD[31]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>BRSVP1A5</td><td>BRSVP1B5</td><td>PCIRST#</td><td>GND</td><td>GNT# (1)</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>IPMB_PWR</td><td>GND</td><td>V(I/O)</td><td>INTP</td><td>INTS</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>INTA# (1)</td><td>INTB# (1)</td><td>INTC# (1)</td><td>+5V</td><td>INTD# (1)</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>TCK</td><td>+5V</td><td>TMS</td><td>TDO</td><td>TDI</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>+5V</td><td>-12V</td><td>TRST#</td><td>+12V</td><td>+5V</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

General Peripheral Slot (Slot #3\~#15) P2 Pin Assignment

<table><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr><tr><td>22</td><td>GND</td><td>PXI_BRSVA22</td><td>PXI_BRSVB22</td><td>PXI_BRSVC22</td><td>PXI_BRSVD22</td><td>PXI_BRSVE22</td><td>GND</td></tr><tr><td>21</td><td>GND</td><td>PXI_LBR0</td><td>GND</td><td>PXI_LBR1</td><td>PXI_LBR2</td><td>PXI_LBR3</td><td>GND</td></tr><tr><td>20</td><td>GND</td><td>PXI_LBR4</td><td>PXI_LBR5</td><td>PXI_LBL0</td><td>GND</td><td>PXI_LBL1</td><td>GND</td></tr><tr><td>19</td><td>GND</td><td>PXI_LBL2</td><td>GND</td><td>PXI_LBL3</td><td>PXI_LBL4</td><td>PXI_LBL5</td><td>GND</td></tr><tr><td>18</td><td>GND</td><td>PXI_TRIG3</td><td>PXI_TRIG4</td><td>PXI_TRIG5</td><td>GND</td><td>PXI_TRIG6</td><td>GND</td></tr><tr><td>17</td><td>GND</td><td>PXI_TRIG2</td><td>GND</td><td>N/C</td><td>PXI_STAR (2)</td><td>PXI_CLK10</td><td>GND</td></tr><tr><td>16</td><td>GND</td><td>PXI_TRIG1</td><td>PXI_TRIG0</td><td>N/C</td><td>GND</td><td>PXI_TRIG7</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>PXI_BRSVA15</td><td>GND</td><td>N/C</td><td>PXI_LBL6</td><td>PXI_LBR6</td><td>GND</td></tr><tr><td>14</td><td>GND</td><td>AD[35]</td><td>AD[34]</td><td>AD[33]</td><td>GND</td><td>AD[32]</td><td>GND</td></tr><tr><td>13</td><td>GND</td><td>AD[38]</td><td>GND</td><td>V(I/O)</td><td>AD[37]</td><td>AD[36]</td><td>GND</td></tr><tr><td>12</td><td>GND</td><td>AD[42]</td><td>AD[41]</td><td>AD[40]</td><td>GND</td><td>AD[39]</td><td>GND</td></tr><tr><td>11</td><td>GND</td><td>AD[45]</td><td>GND</td><td>V(I/O)</td><td>AD[44]</td><td>AD[43]</td><td>GND</td></tr><tr><td>10</td><td>GND</td><td>AD[49]</td><td>AD[48]</td><td>AD[47]</td><td>GND</td><td>AD[46]</td><td>GND</td></tr><tr><td>9</td><td>GND</td><td>AD[52]</td><td>GND</td><td>V(I/O)</td><td>AD[51]</td><td>AD[50]</td><td>GND</td></tr><tr><td>8</td><td>GND</td><td>AD[56]</td><td>AD[55]</td><td>AD[54]</td><td>GND</td><td>AD[53]</td><td>GND</td></tr><tr><td>7</td><td>GND</td><td>AD[59]</td><td>GND</td><td>V(I/O)</td><td>AD[58]</td><td>AD[57]</td><td>GND</td></tr><tr><td>6</td><td>GND</td><td>AD[63]</td><td>AD[62]</td><td>AD[61]</td><td>GND</td><td>AD[60]</td><td>GND</td></tr><tr><td>5</td><td>GND</td><td>C/BE[5]\#</td><td>GND</td><td>V(I/O)</td><td>C/BE[4]\#</td><td>PAR64</td><td>GND</td></tr><tr><td>4</td><td>GND</td><td>V(I/O)</td><td>PXI_BRSVB4</td><td>C/BE[7]\#</td><td>GND</td><td>C/BE[6]\#</td><td>GND</td></tr><tr><td>3</td><td>GND</td><td>PXI_LBR7</td><td>GND</td><td>PXI_LBR8</td><td>PXI_LBR9</td><td>PXI_LBR10</td><td>GND</td></tr><tr><td>2</td><td>GND</td><td>PXI_LBR11</td><td>PXI_LBR12</td><td>N/C (SYS#)</td><td>PXI_LBL7</td><td>PXI_LBL8</td><td>GND</td></tr><tr><td>1</td><td>GND</td><td>PXI_LBL9</td><td>GND</td><td>PXI_LBL10</td><td>PXI_LBL11</td><td>PXI_LBL12</td><td>GND</td></tr><tr><td>Pin</td><td>Z</td><td>A</td><td>B</td><td>C</td><td>D</td><td>E</td><td>F</td></tr></table>

B.3 Bus Segments and Interrupt Routings

<table><tr><td>Bus</td><td>Slot #</td><td>IDSEL</td><td>REQ#/GNT#</td><td>PCICLK</td><td>PXI P1Pin A3</td><td>PXI P1Pin B3</td><td>PXI P1Pin C3</td><td>PXI P1Pin E3</td></tr><tr><td rowspan="6">BUS #1</td><td>Slot 1 (SYS)</td><td>-</td><td>-</td><td>-</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>INTD#</td></tr><tr><td>Slot 2</td><td>AD30</td><td>1</td><td>5</td><td>INTC#</td><td>INTD#</td><td>INTA#</td><td>INTB#</td></tr><tr><td>Slot 3</td><td>AD29</td><td>2</td><td>1</td><td>INTB#</td><td>INTC#</td><td>INTD#</td><td>INTA#</td></tr><tr><td>Slot 4</td><td>AD28</td><td>3</td><td>3</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>INTD#</td></tr><tr><td>Slot 5</td><td>AD27</td><td>4</td><td>4</td><td>INTD#</td><td>INTA#</td><td>INTB#</td><td>INTC#</td></tr><tr><td>Slot 6</td><td>AD26</td><td>5</td><td>0</td><td>INTC#</td><td>INTD#</td><td>INTA#</td><td>INTB#</td></tr><tr><td>B1</td><td>Bridge1</td><td>AD31</td><td>0</td><td>2</td><td>INTD#</td><td>INTA#</td><td>INTB#</td><td>INTC#</td></tr><tr><td rowspan="6">BUS #2</td><td>Slot 7</td><td>S1_AD30</td><td>S1_1</td><td>S1_1</td><td>INTB#</td><td>INTC#</td><td>INTD#</td><td>INTA#</td></tr><tr><td>Slot 8</td><td>S1_AD29</td><td>S1_2</td><td>S1_2</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>INTD#</td></tr><tr><td>Slot 9</td><td>S1_AD28</td><td>S1_3</td><td>S1_3</td><td>INTD#</td><td>INTA#</td><td>INTB#</td><td>INTC#</td></tr><tr><td>Slot 10</td><td>S1_AD27</td><td>S1_4</td><td>S1_4</td><td>INTC#</td><td>INTD#</td><td>INTA#</td><td>INTB#</td></tr><tr><td>Slot 11</td><td>S1_AD26</td><td>S1_5</td><td>S1_5</td><td>INTB#</td><td>INTC#</td><td>INTD#</td><td>INTA#</td></tr><tr><td>Slot 12</td><td>S1_AD25</td><td>S1_6</td><td>S1_6</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>INTD#</td></tr><tr><td>B2</td><td>Bridge2</td><td>S1_AD31</td><td>S1_0</td><td>S1_0</td><td>INTC#</td><td>INTD#</td><td>INTA#</td><td>INTB#</td></tr><tr><td rowspan="3">BUS #3</td><td>Slot 13</td><td>S2_AD31</td><td>S2_0</td><td>S2_0</td><td>INTB#</td><td>INTC#</td><td>INTD#</td><td>INTA#</td></tr><tr><td>Slot 14</td><td>S2_AD30</td><td>S2_1</td><td>S2_1</td><td>INTA#</td><td>INTB#</td><td>INTC#</td><td>INTD#</td></tr><tr><td>Slot 15</td><td>S2_AD29</td><td>S2_2</td><td>S2_2</td><td>INTD#</td><td>INTA#</td><td>INTB#</td><td>INTC#</td></tr></table>

# B.4 Bus Segments and Interrupt Routings

<table><tr><td>Physical Slot Number</td><td>PXI_STAR (P2-D17)</td></tr><tr><td>Slot 2(Star Trigger Slot)</td><td>PXI_STAR0 ~ PXI_STAR12</td></tr><tr><td>Slot 3</td><td>PXI_STAR0</td></tr><tr><td>Slot 4</td><td>PXI_STAR1</td></tr><tr><td>Slot 5</td><td>PXI_STAR2</td></tr><tr><td>Slot 6</td><td>PXI_STAR3</td></tr><tr><td>Slot 7</td><td>PXI_STAR4</td></tr><tr><td>Slot 8</td><td>PXI_STAR5</td></tr><tr><td>Slot 9</td><td>PXI_STAR6</td></tr><tr><td>Slot 10</td><td>PXI_STAR7</td></tr><tr><td>Slot 11</td><td>PXI_STAR8</td></tr><tr><td>Slot 12</td><td>PXI_STAR9</td></tr><tr><td>Slot 13</td><td>PXI_STAR10</td></tr><tr><td>Slot 14</td><td>PXI_STAR11</td></tr><tr><td>Slot 15</td><td>PXI_STAR12</td></tr></table>

# B.5 Miscellaneous Connectors Pin Assignments

CN1, CN7, CN8, CN9: ATX-like DC Power input connectors

<table><tr><td>Signal Name</td><td>Pin #</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>V2SENSE</td><td>1</td><td>11</td><td>V2 (+3.3V)</td></tr><tr><td>V2 (+3.3V)</td><td>2</td><td>12</td><td>V4 (-12V)</td></tr><tr><td>GND</td><td>3</td><td>13</td><td>GND</td></tr><tr><td>V1 (+5V)</td><td>4</td><td>14</td><td>INH#</td></tr><tr><td>GND</td><td>5</td><td>15</td><td>GND</td></tr><tr><td>V1 (+5V)</td><td>6</td><td>16</td><td>SRTN</td></tr><tr><td>GND</td><td>7</td><td>17</td><td>GND</td></tr><tr><td>FAL#1</td><td>8*</td><td>18*</td><td>V3(+12V)SENSE</td></tr><tr><td>DEG#1</td><td>9*</td><td>19</td><td>V1(+5V) SENSE</td></tr></table>

# NOTE

Pin #8, #9, and #18 are not standard ATX power definitions.

# PCI VIO Selection Screw Terminals

<table><tr><td>Position</td><td>Signal Name</td></tr><tr><td>J1</td><td>+5V</td></tr><tr><td>J3</td><td>V(I/O)</td></tr><tr><td>J4</td><td>+3.3V</td></tr><tr><td>J7</td><td>GND</td></tr><tr><td>J10</td><td>-12V</td></tr><tr><td>J11</td><td>+12V</td></tr></table>

# NOTE

The V(I/O) must be shorted to either +3.3V or +5V. The default factory setting is to short V(I/O) to +5V.J1 INH#: DC power inhibit signa.

# J6 INH#: DC power inhibit signal

<table><tr><td rowspan="3">J6&lt;img src="images/bc2405846589bae02258d54ffba741f45f2cf7e232b2662693260c6177db226b.jpg"/&gt;</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>INH#</td></tr><tr><td>2</td><td>GND</td></tr></table>

# J8 RST#: System reset signal

<table><tr><td rowspan="3">J8&lt;img src="images/5f9cd681daf36a18aa6d71d2459f3ef7dd53575deb477d6fec2da2fefa493240.jpg"/&gt;</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>RST#</td></tr><tr><td>2</td><td>GND</td></tr></table>

# J9 FAL#: Power supply fail input

<table><tr><td rowspan="3">J9&lt;img src="images/61a61064b16a62f737e210dd6921d9ce311a7dcf6630a6ee0ba8b3d5b11b06ca.jpg"/&gt;</td><td>Pin #</td><td>Signal Name</td></tr><tr><td>1</td><td>FAL#</td></tr><tr><td>2</td><td>GND</td></tr></table>

# J5: Connector for LED power status

<table><tr><td rowspan="5">J5</td><td>Name</td><td>Pin #</td><td>Pin #</td><td>Name</td></tr><tr><td>GND</td><td>8</td><td>7</td><td>+3.3V</td></tr><tr><td>GND</td><td>6</td><td>5</td><td>+5V</td></tr><tr><td>GND</td><td>4</td><td>3</td><td>-12V</td></tr><tr><td>GND</td><td>2</td><td>1</td><td>+12V</td></tr></table>

# CN5: SMB (System Management Bus) connector

<table><tr><td rowspan="6">CN2(a) vs.</td><td>Pin #</td><td>Name</td></tr><tr><td>1</td><td>IPMB_CLK</td></tr><tr><td>2</td><td>GND</td></tr><tr><td>3</td><td>IPMB_DATA</td></tr><tr><td>4</td><td>IPMB_PWR</td></tr><tr><td>5</td><td>ALERT</td></tr></table>

# NOTE

The SMB is connected to the P2 of the system slot.

# JP1: 10 MHz Reference Clock

<table><tr><td></td><td>Pin #</td><td>Description</td></tr><tr><td>(c2c2e1)</td><td>Pin 1-2(Default)</td><td>Internal 10MHz system clock PXI_CLK10</td></tr><tr><td>(f2e2)</td><td>Pin 2-3</td><td>External clock through the PXI_CLK10_IN on star trigger slot</td></tr></table>

# J2: POWER SENSE

<table><tr><td rowspan="6">J2&lt;img src="images/5d93c4c025d9f25ba28795fbaf181cc9ced207d49153ba74e1e1d8b4fcb8a975.jpg"/&gt;</td><td>Pin #</td><td>Name</td></tr><tr><td>1</td><td>NC</td></tr><tr><td>2</td><td>+12V</td></tr><tr><td>3</td><td>+3.3V</td></tr><tr><td>4</td><td>GND</td></tr><tr><td>5</td><td>+5V</td></tr></table>

# Important Safety Instructions

Read and follow all instructions marked on the product and in the documentation before operating the system. Retain all safety and operating instructions for future use.

▶ Read these safety instructions carefully.
- Keep this user’s manual for future reference.
The equipment should be operated in an ambient temperature between $0^{\circ}$ C to $50^{\circ}$ C.
The equipment should be operated only from the type of power source indicated on the rating label. Make sure the voltage of the power source is correct when connecting the equipment to the power outlet.
If the user's equipment has a voltage selector switch, make sure that the switch is set to the proper position for the area. The voltage selector switch is set at the factory to the correct voltage.
▶ For pluggable equipment, ensure they are installed near a socket-outlet that is easily accessible.
- Secure the power cord to prevent unnecessary accidents. Do not place anything over the power cord.
▶ If the equipment will not be in use for long periods of time, disconnect the equipment from the power outlet to avoid being damaged by transient overvoltage.
▶ All cautions and warnings on the equipment must be noted.
▶ Keep this equipment away from humidity.
▶ Do not use this equipment near water or a heat source.
▶ Place this equipment on a stable surface when installing to prevent injury.
▶ Never pour any liquid into the product to prevent fire or electrical shock.

▶ Openings in the chassis are provided for ventilation. Do not block or cover these openings. Make sure there is adequate space around the system for ventilation when setting up the work area. Never insert objects of any kind into the ventilation holes.
▶ To avoid electrical shock, always unplug all power and modem cables from wall outlets before removing the system covers.
▶ A Lithium-type battery is provided for the real time clock.

# CAUTION - Risk of explosion if battery is replaced by an incorrect type. Dispose used batteries as instructed.

▶ The equipment must be serviced by authorized technicians when:

The power cord or plug is damaged.
▷ Liquid has penetrated the equipment.
▷ It has been exposed to moisture.
$\triangleright$ It is not functioning or does not function according to the user's manual.
▷ It has been dropped and damaged.
▷ It has an obvious sign of breakage.

▶ Never attempt to fix the equipment. For safety reasons, the equipment should only be serviced by qualified personnel.

# Warranty Policy

Thank you for choosing ADLINK. To understand your rights and enjoy all the after-sales services we offer, please read the following carefully.

1. Before using ADLINK's products please read the user manual and follow the instructions exactly. When sending in damaged products for repair, please attach an RMA application form which can be downloaded from: http://rma.adlinktech.com/policy/home.htm/.

2. All ADLINK products come with a limited two-year guarantee, one year for products bought in China:

The warranty period starts on the day the product is shipped from ADLINK's factory.
▶ Peripherals and third-party products not manufactured by ADLINK will be covered by the original manufacturers' warranty.
For products containing storage devices (hard drives, flash cards, etc.), please back up your data before sending them for repair. ADLINK is not responsible for loss of data.
▶ Please ensure the use of properly licensed software with our systems. ADLINK does not condone the use of pirated software and will not service systems using such software. ADLINK will not be held legally responsible for products shipped with unlicensed software installed by the user.
For general repairs, please do not include peripheral accessories. If peripherals need to be included, be certain to specify which items you sent on the RMA Request & Confirmation Form. ADLINK is not responsible for items not listed on the RMA Request & Confirmation Form.

3. Our repair service is not covered by ADLINK's guarantee in the following situations:

▶ Damage caused by not following instructions in the User's Manual.
▶ Damage caused by carelessness on the user's part during product transportation.
▶ Damage caused by fire, earthquakes, floods, lightening, pollution, other acts of God, and/or incorrect usage of voltage transformers.
▶ Damage caused by unsuitable storage environments (i.e. high temperatures, high humidity, or volatile chemicals).
▶ Damage caused by leakage of battery fluid during or after change of batteries by customer/user.
▶ Damage from improper repair by unauthorized ADLINK technicians.
▶ Products with altered and/or damaged serial numbers are not entitled to our service.
▶ This warranty is not transferable or extendible.
▶ Other categories not protected under our warranty.

4. Customers are responsible for shipping costs to transport damaged products to ADLINK.

If you have any further questions, please email our FAE staff: service@adlinktech.com.