# SBC35-MTL

# User’s Manual

3.5” Single Board Computer with Intel® Core™ Ultra Processor

![Green computer motherboard with various electronic components and connectors (no visible text or symbols)](.sbc35-mtl-50m-47301-1000-10/ddbfebe1ccb2e2a8d7c8d34a4bf9ef51c94fb5236123d99ccd15cfa5759564c4.jpg)

Manual Rev.: Rev 1.0

Revision Date: January 2, 2025

Part Number: 50M-47301-1000

# Preface

# Copyright

Copyright 2025 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

![Symbol of a trash bin crossed with two crossed lines and a solid rectangle below (no text or labels)](.sbc35-mtl-50m-47301-1000-10/74e88dc1995537d7a17850d8ae160e870da5ff40290e03ee04b00da53499a032.jpg)

Battery Labels (for products with battery)

![Simple line drawing of a trash bin crossed out by two diagonal lines (no text or symbols)](.sbc35-mtl-50m-47301-1000-10/1bfa79afa291c9d7edcf5c6ce98da04644fc7610dff371987b347dfd597364c5.jpg)

![The image shows a black outline of a square containing a recycling symbol (three arrows in a triangular loop). Below the square, the text 'Li-ion' is written in bold, black letters.](.sbc35-mtl-50m-47301-1000-10/7996b166eb0bef6acd5e942181781f9f1a62ed740a69080749e72e675d3580ca.jpg)

![RECYCLF\nRBRC\nLi-ion\n1.800.822.8837](.sbc35-mtl-50m-47301-1000-10/24760d33c9212bdf7ce1486f8bce73a7ac7df5e104399846d7a4c366e61349d5.jpg)

![廢電池請回收](.sbc35-mtl-50m-47301-1000-10/9c8823ae63e1a7f0188c9ff9a8be799354073b9853e35ea07467d37266392957.jpg)

# California Proposition 65 Warning

![The image displays a yellow triangular warning sign with a thick black border. Inside the triangle is a large black exclamation point.](.sbc35-mtl-50m-47301-1000-10/4790329079d34de524378e5a1a4ec9a0216e0a42db7c8b5523c3235d38910834.jpg)

WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP,

DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

Revision History

<table><tr><td>Revision</td><td>Description</td><td>Date</td></tr><tr><td>1.0</td><td>Initial release</td><td>2025-01-02</td></tr></table>

# Table of Contents

Preface...

List of Figures .... ..vi

List of Tables...... ..vii

1 Introduction....

1.1 Packing List ..
1.2 Optional Accessories .

2 Quick Installation....

2.1 Assembling Passive Heatsink for 15W SKU... .3
2.2 Assembing Cooler Solution for 28W SKU .
2.3 Installing M.2 Expansion Modules. 5

3 Specifications ..........

3.1 Core System .
3.2 I/O Interface . 7
3.3 Video . 7
3.4 Audio 7
3.5 LAN..
3.6 Dimension.. 7
3.7 Power Supply...... .8
3.8 Temperatures . ..8
3.9 ESD . .8
3.10 Certificate (EMC) ... .8
3.11 Operating Systems . .8
3.12 Functional Block Diagram .9

4 Mechanical Layout .. .11

4.1 Connector Locations .... .11
4.2 Mechanical Dimensions . ..14

5 Connector Pinouts ............... .17

5.1 Interface Connectors.. ..17
5.2 Power Input & DC-In Connector.. ..18
5.3 RS-232/422/485.. ..19
5.4 GPIO/USB2/Audio Header.. ..19
5.5 M.2 Key-B ... ..20
5.6 Nano SIM.. ..21
5.7 M.2 Key-M . ..21

5.8 M.2 Key-E.. .22
5.9 SATA Connector.. .23
5.10 SATA Power Connector.. .24
5.11 Fan Connector . ..24
5.12 USB Connector.. .24
5.13 SBC-FM Connector.. .25

# 6 BIOS Settings...... .27

6.1 Menu Structure . .27
6.2 Main Menu. ..28
6.3 Advanced Menu. ..29
6.4 Chipset .. ..36
6.5 Security..... ..37
6.6 Boot ... ..37
6.7 Save & Exit .. ...40
6.8 MEBx.. ...40

# Safety Instructions... .41

# Getting Service.... .42

# List of Figures

Figure 1: Functional block diagram.. .9
Figure 2: I/O Panel connector locations.. .11
Figure 3: Onboard connector locations (Top) . ..12
Figure 4: Onboard connector locations (Bottom) . ..13
Figure 5: Mechanical dimensions . .14
Figure 6: Mechanical dimensions – I/O panel.. ..14
Figure 7: Mechanical dimensions . ..15
Figure 8: Mechanical dimensions – I/O panel.. ..15

# List of Tables

Table 1: I/O Panel connector definitions ... .11
Table 2: Onboard connector definitions (Top).. ..12
Table 3: Onboard connector definitions (Bottom).. .13

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# 1 Introduction

ADLINK SBC35-MTL is a 3.5-inch single board computer powered by Intel® Core™ Ultra processors for efficient, high-performance computing. an integrated NPU to enhance AI processing capabilities and includes a reserved MIPI-CSI signal pathway for easy camera integration, making it ideal for real-time and vision-based applications. The SBC35-MTL is designed to meet the needs of modern embedded systems, delivering cutting-edge performance in a compact form factor.

# 1.1 Packing List

SBC35-MTL motherboard
M.2 screw kit (Part Number: 58-10515-0000)
• Thermal kit (Part Number: 58-10514-0000)

# 1.2 Optional Accessories

• CPU cooler for 28W CPU (Part Number: 32-21014-1000-A0)
• Passive heatsink for 15W CPU (Part Number: 32-21015-1000-A0)
• USB 2.0 Type A connector (Part Number: 30-21363-0000-A0)
RS-232/485/422 x2 (Part Number: 30-22139-2000-A0)
GPIO + audio + USB 2.0 x2 (Part Number: 30-21535-6000-A0)
SATA + SATA Power (Part Number: 30-22121-0000-A0)
SBC-FM PWR cable (Part Number: 30-22224-0000-A0)
• 2x 2P to DC jack cable (Part Number: 30-22238-0000-A0)
• SBC35-MTL LVDS FPC (Part Number: 91-49076-0010)

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# 2 Quick Installation

This chapter covers how to assmelbe cooling solutions and M.2 expansion modules for the ADLINK SBC35-MTL.

# 2.1 Assembling Passive Heatsink for 15W SKU

1. Remove the plastic seal from the thermal pad.

![Technical line drawing of a mechanical assembly with a red arrow indicating a specific component (no text or symbols present)](.sbc35-mtl-50m-47301-1000-10/d81f4f2cd9c8d739cf3b9cfcc758ae4340d17b3c5fd8c7ed7dbb94d0f613184e.jpg)

2. Assemble and secure the heatsink using the screws provided, as illustrated below.

![Technical line drawing of an electronic device assembly showing internal components and mounting points (no text or labels)](.sbc35-mtl-50m-47301-1000-10/ce592dea91eba84adce031ee7aef4ca807a279ea6930fed6ae41efb7a125d82f.jpg)

# 2.2 Assembing Cooler Solution for 28W SKU

1. Remove the plastic seal from the thermal pad.

![Technical line drawing of a mechanical component with a red arrow indicating a specific feature (no text or symbols present)](.sbc35-mtl-50m-47301-1000-10/8589bd5f35ac3a3f469ab1b8cf69520535b7227a8a2f9531e25bb4de4d275291.jpg)

2. Assemble and secure the CPU cooler using the screws provided, as illustrated below.

![Technical line drawing of an electronic device assembly showing internal components and mounting points (no text or labels)](.sbc35-mtl-50m-47301-1000-10/344cba3b355b5b4332ca8805a2a7e64133c03c5d381b39212c56a90a725fc0be.jpg)

# 2.3 Installing M.2 Expansion Modules

M.2 B-key and M.2 E-key share the same mounting hole, please install as illustrated below.

![Exploded view diagram of an electronic device chassis showing internal components and connections (no text or labels)](.sbc35-mtl-50m-47301-1000-10/3b9be860d9f74bef11f70e458e54461d3b59b7fc4c2a86bed879f04c84dc634d.jpg)

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# 3 Specifications

# 3.1 Core System

 CPU: MTL-U, 15W /MTL-H, 28W
Memory: 2x DDR5 SO-DIMMs 5600MHz, up to 96 GB, non-ECC

# 3.2 I/O Interface

 USB:
• 2x USB 3.2 Gen 2x1 ports (10Gbps) (rear I/O)
2x USB 2.0 through 30-pin header
1x USB 2.0 via headers
 USB Type-C: 1x USB TYPE-C (USB 3.2, DP, Power delivery 5V, 3A)
 COM:
2x RS-232/422/485 pin headers
 Serial ATA: 1x SATA 6Gb/s ports w/ 5V SATA power
 DI/DO: GPIO 8-bit through 30-pin header
 TPM: TPM2.0 (option)
M.2 connectors:
M.2 2280 M Key (PCIe x4)
M.2 2230 E Key with (Wi-Fi (PCIe Gen 4x1), (USB))
M.2 3042/ 3052 B-key (USB3.0/2.0, PCIe) w/ SIM card
 SBC-FM Board Expansion: 1x PCIe x1, 1x PCIe x4, 1x USB 3.0/2.0, 1x eSPI

# 3.3 Video

Interfaces: 1x Type-C, 1x eDP (LVDS via driving board), 1x HDMI 2.0, 1x DisplayPort 1.4

# 3.4 Audio

Audio Codec: Realtek® ALC888S
Interfaces: 1x Line-in, 1x Line-out, and 1x Mic-in through a 30-pin header

# 3.5 LAN

 LAN: 2x Intel® I226-V with 10/100/1000/2500 Mbps

# 3.6 Dimension

ATX: 5.75" x 4" (146mm x 102mm)

# 3.7 Power Supply

12V-24V, Reserved DC Jack connector (option)

# 3.8 Temperatures

Operating Temperature: $0 ^ { \circ } \mathsf { C }$ to $6 0 ^ { \circ } \mathsf { C }$
Storage Temperature: $\angle 4 0 ^ { \circ } \mathsf { C }$ to $8 5 ^ { \circ } \mathsf { C }$

# 3.9 ESD

. Contact +/- 8kV, Air +/- 12kV

# 3.10 Certificate (EMC)

CE/FCC Class B

# 3.11 Operating Systems

. Microsoft® Windows 10/Windows 11 IoT Enterprise LTSC 24H2
Ubuntu® 22.04 LTS (by project basis)

# 3.12 Functional Block Diagram

![**Central Component:**\n*   Intel® Core™ Ultra 5/7\n\n**Left-Side Connections:**\n*   **DP 1.4**: Connected via ICPO.\n*   **HDMI Redriver**: Connected via DDIB.\n    *   Connected to **HDMI 2.0b**.\n*   **Type-C**: Connected via TCP1.\n    *   Connected to **PD controller**.\n*   **eDP*/LVDS**: Connected via DDIA.\n*   **SATA 3.0**: Connected via SATA Gen3.\n*   **USB3.2 Gen2**: Connected via USB 3.2 (two separate connections).\n*   **ALC888S**: Connected via HDA.\n    *   Connected to **Line-in Line-out Mic**.\n*   **8x GPIO 2x USB2.0**: Connected via GPIO 8bits and USB2.0 x2.\n\n**Right-Side Connections:**\n*   **SODIMM 1**: Connected via DDR5.\n*   **SODIMM 2**: Connected via DDR5.\n*   **Intel I226-V**: Connected via PCIe (two separate connections).\n    *   Top connection leads to **LAN1 2.5GbE**.\n    *   Bottom connection leads to **LAN2 2.5GbE**.\n*   **M.2 M key**: Connected via PCIe Gen4 x4.\n*   **M.2 M E-key**: Connected via PCIe Gen4 x1 & USB2.0.\n*   **M.2 B E-key**: Connected via PCIe Gen4 x1 & USB3.0/2.0.\n    *   Connected to **Nano SIM**.\n*   **SBC-FM Expansin**: Connected via PCIe x4, PCIe x1, USB 3.0/2.0, and eSPI.\n*   **I2C*/ SMBus**: Connected via I2C and SMBus.\n*   **USB2.0**: Connected via USB2.0.\n*   **TPM**: Connected via SPI.\n*   **BIOS**: Connected via SPI.\n*   **MIPI**: Connected via MIPI (CSI-2 x4 x2).\n\n**Bottom Connection:**\n*   **SIO NCT5525D**: Connected directly from the central block.\n    *   Connected to **2 x RS232/422/485** via COM1/2.\n    *   Connected to **FAN** via FAN.](.sbc35-mtl-50m-47301-1000-10/b8227a6df1f6047c04f8ff23ec7a14a8cdc3442a2666b70ea4742b0856b724f0.jpg)

\* Default by BOM change, contact with your local sales to support option.

Figure 1: Functional block diagram

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# 4 Mechanical Layout

# 4.1 Connector Locations

![A\nB\nC\nD\nE\nF\nG](.sbc35-mtl-50m-47301-1000-10/3ad6de35c03b3a9a3f541e213caa13dbdccee3d21165d5730d0e7ae9c4255ebe.jpg)

Figure 2: I/O Panel connector locations

Table 1: I/O Panel connector definitions

<table><tr><td colspan="2">IO Panel Connectors</td></tr><tr><td>Item</td><td>Description</td></tr><tr><td>A</td><td>DCIN Connector</td></tr><tr><td>B</td><td>RJ45*2(I226*2)</td></tr><tr><td>C</td><td>Type-C Connector</td></tr><tr><td>D</td><td>DP Connector</td></tr><tr><td>E</td><td>HDMI Connector</td></tr><tr><td>F</td><td>USB3.2 Gen. 2x1 *2 Connector</td></tr><tr><td>G</td><td>Power Button</td></tr></table>

![H\nI\nJ\nK\nL\nM\nN\nUDE](.sbc35-mtl-50m-47301-1000-10/a7e1f65388b551003cbefddd42f1539710584527fb30edbc5f02bd5b5c4f483b.jpg)

Figure 3: Onboard connector locations (Top)

Table 2: Onboard connector definitions (Top)

<table><tr><td colspan="2">Onboard Connectors</td></tr><tr><td>Item</td><td>Description</td></tr><tr><td>H</td><td>MIPI Connector</td></tr><tr><td>I</td><td>eSPI Debug Port</td></tr><tr><td>J</td><td>SO-DIMM1 DDR5_5.2mm</td></tr><tr><td>K</td><td>SO-DIMM2 DDR5_9.2mm</td></tr><tr><td>L</td><td>System Fan Connector</td></tr><tr><td>M</td><td>I2C Connector (Co-lay SMBus)</td></tr><tr><td>N</td><td>USB2.0 Connector</td></tr></table>

![S\nT\nU\nV\nO\nP\nQ\nX\nR\nY\nW](.sbc35-mtl-50m-47301-1000-10/44283df4b207686796d41302ef164b3fc9798d8e9e5338ddff4e793240e334b9.jpg)

Figure 4: Onboard connector locations (Bottom)

Table 3: Onboard connector definitions (Bottom)

<table><tr><td colspan="2">Onboard Connectors</td></tr><tr><td>Item</td><td>Description</td></tr><tr><td>O</td><td>Wafer for COM1,2</td></tr><tr><td>P</td><td>SATA PWR Connector</td></tr><tr><td>Q</td><td>SATA Connector</td></tr><tr><td>R</td><td>Wafer for GPIO + MIC + Line-In+Line-Out+USB2.0*2</td></tr><tr><td>S</td><td>NGF E.Key (PCIe4.0x1, USB2.0*1)</td></tr><tr><td>T</td><td>eDP*/LVDS Connector</td></tr><tr><td>U</td><td>SBC-FM FPC Connector</td></tr><tr><td>V</td><td>NGF M.key (PCIe4.0x4)</td></tr><tr><td>W</td><td>External Power Connector for SBC-FM board</td></tr><tr><td>X</td><td>Nano SIM1 Connector</td></tr><tr><td>Y</td><td>NGF B.Key (PCIe4.0x1 USB3.0/2.0*1)</td></tr></table>

# 4.2 Mechanical Dimensions

# 4.2.1 With Passive Heatsink for 15W SKU

(ADLINK Part Number: 32-21015-1000-A0)

Top View
![146\n73.20\n79.21\n102\nUDE\nFOXCONN](.sbc35-mtl-50m-47301-1000-10/8062ebd382cb280b7a018d279f36f2aa841c0160d99730ebebae5b4e45083542.jpg)

Dimensions: mm

Figure 5: Mechanical dimensions
Side View
![Technical line drawing of an electrical enclosure with multiple components and a 32.29mm dimension label (no readable text or symbols beyond the dimension)](.sbc35-mtl-50m-47301-1000-10/628959f24e558e7a910f37e0f4668f583894029e64470c23cde92711c38fd9a7.jpg)

![Technical line drawing of a truck-mounted industrial machine (no text or symbols visible)](.sbc35-mtl-50m-47301-1000-10/455bb2f2af8834677c485963d90f5571411d3138ca6068769a50e5b4e5e52f5a.jpg)

Dimensions: mm

Figure 6: Mechanical dimensions – I/O panel

# 4.2.2 With Cooler Solution for 28W SKU

(ADLINK Part Number: 32-21014-1000-A0)

Top View
![90\n67.02\n60\n22.77\nUDIE\nDDRS H-9.2R\nDDRS REV.\nFOXCONN](.sbc35-mtl-50m-47301-1000-10/a7e0588ccc051cfb032a3ab3dfc2a128b0bc16d8e0de45a3dd41b9f68708c678.jpg)

Dimensions: mm
Figure 7: Mechanical dimensions

Side View
![Technical line drawing of an electrical or mechanical assembly with no visible text or symbols](.sbc35-mtl-50m-47301-1000-10/1a3861b78ad366b59a6a45829669e19f12b0c5e392262d417fbb365344927646.jpg)

![Technical line drawing of a mechanical assembly with no visible text or symbols](.sbc35-mtl-50m-47301-1000-10/012e924feb8be0d214587d2e53541786c8e255eb53ec546b2c9b90b2fa477611.jpg)

Dimensions: mm
Figure 8: Mechanical dimensions – I/O panel

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# 5 Connector Pinouts

# 5.1 Interface Connectors

# 5.1.1 I2C/SMB Connector

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>P_+3V3_S0</td></tr><tr><td>2</td><td>I2C0_CLK_CON</td></tr><tr><td>3</td><td>I2C0_DAT_CON</td></tr><tr><td>4</td><td>I2C1_GPIO-L</td></tr><tr><td>5</td><td>GND</td></tr><tr><td></td><td></td></tr></table>

# 5.1.2 USB2 Connector

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>P_+5V_A</td></tr><tr><td>2</td><td>U2_USB8_N</td></tr><tr><td>3</td><td>U2_USB8_P</td></tr><tr><td>4</td><td>GND</td></tr><tr><td></td><td></td></tr><tr><td></td><td></td></tr></table>

# 5.2 Power Input & DC-In Connector

Input power voltage range: DC 12V\~24V
Input current: 8A to 12A
Suggest Adapter: 100 to 144W (CPU 15W or 28W type)
 OVP: 28.5V
 UVP: 7.53V
Reverse power protection: Yes

![DC Power Jack RT Φ2.6 24V/12A\nPin Signal\n1 Power\n2 GND1\n3 GND2](.sbc35-mtl-50m-47301-1000-10/bea5378af3c29f9cdb1f6efc0d8788fcf5400b813a5719e8d927de922dfd5d82.jpg)

<table><tr><td colspan="5">Power Header ML 2x2P ST D4.2</td></tr><tr><td rowspan="3">&lt;img src="images/56193275f3288e61bc6345634577d5f51b2d5041656a9e710f3ce5a3afd14918.jpg"/&gt;</td><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td><td>3</td><td>Power</td></tr><tr><td>2</td><td>GND</td><td>4</td><td>Power</td></tr></table>

# 5.3 RS-232/422/485

There are two COM ports on the board. Port 1 and 2 can be set to RS232, 422, or 485 within BIOS. All COM port signals are separated within one wafer connector.

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td><td>2</td><td>GND -</td></tr><tr><td>3</td><td>CON1_COM_CTS-L</td><td>4</td><td>CON1_COM_RI</td></tr><tr><td>5</td><td>CON1_COM_DSR-L</td><td>6</td><td>CON1_COM_RTS-L</td></tr><tr><td>7</td><td>CON1_COM_TXD</td><td>8</td><td>CON1_COM_DTR-L</td></tr><tr><td>9</td><td>CON1_COM_DCD-L</td><td>10</td><td>CON1_COM_RXD</td></tr><tr><td>11</td><td>CON2_COM_RXD</td><td>12</td><td>CON2_COM_DCD-L</td></tr><tr><td>13</td><td>CON2_COM_DTR-L</td><td>14</td><td>CON2_COM_TXD</td></tr><tr><td>15</td><td>CON2_COM_DSR-L</td><td>16</td><td>CON2_COM_RTS-L</td></tr><tr><td>17</td><td>CON2_COM_RI</td><td>18</td><td>CON2_COM_CTS-L</td></tr><tr><td>19</td><td>GND</td><td>20</td><td>GND</td></tr></table>

# 5.3.1 RS-232 to 422/485 Pin Comparison in DB9 Connector

<table><tr><td>Pin</td><td>RS232</td><td>RS422</td><td>RS485</td></tr><tr><td>1</td><td>DCD#</td><td>TXD-</td><td>DATA-</td></tr><tr><td>2</td><td>RX</td><td>TXD+</td><td>DATA+</td></tr><tr><td>3</td><td>TX</td><td>RXD+</td><td></td></tr><tr><td>4</td><td>DTR#</td><td>RXD-</td><td></td></tr><tr><td>5</td><td>GND</td><td>GND</td><td></td></tr><tr><td>6</td><td>DSR#</td><td></td><td></td></tr><tr><td>7</td><td>RTS#</td><td></td><td></td></tr><tr><td>8</td><td>CTS#</td><td></td><td></td></tr><tr><td>9</td><td>RI#</td><td></td><td></td></tr></table>

# 5.4 GPIO/USB2/Audio Header

DO signal has PH \*P\_+5V\_S0” on MB side, output current is 5mA. 2x USB2 signals are for internal use. Audio: 1x line-in, 1x line-out, MIC-in

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>P_+5V_USB20_CN</td><td>2</td><td>GND</td></tr><tr><td>3</td><td>P_+5V_USB20_CN</td><td>4</td><td>U2_USB4_N_CON</td></tr><tr><td>5</td><td>P_+5V_USB20_CN</td><td>6</td><td>U2_USB4_P_CON</td></tr><tr><td>7</td><td>GPIO_S0</td><td>8</td><td>GND</td></tr><tr><td>9</td><td>GPIO_S2</td><td>10</td><td>U2_USB2_N_CON</td></tr><tr><td>11</td><td>GPIO_S4</td><td>12</td><td>U2_USB2_P_CON</td></tr><tr><td>13</td><td>GPIO_S6</td><td>14</td><td>GND</td></tr><tr><td>15</td><td>GND</td><td>16</td><td>GPIO_S1</td></tr><tr><td>17</td><td>GND_AUD</td><td>18</td><td>GPIO_S3</td></tr><tr><td>19</td><td>LINL</td><td>20</td><td>GPIO_S5</td></tr><tr><td>21</td><td>LINR</td><td>22</td><td>GPIO_S7</td></tr><tr><td>23</td><td>GND_AUD</td><td>24</td><td>GND_AUD</td></tr><tr><td>25</td><td>MIC1L</td><td>26</td><td>LOUTL</td></tr><tr><td>27</td><td>MIC1R</td><td>28</td><td>LOUTR</td></tr><tr><td>29</td><td>GND_AUD</td><td>30</td><td>GND_AUD</td></tr></table>

# 5.5 M.2 Key-B

The M.2 Key-B connector supports 304 and 3052 two-sized card, and supports 1 Nano SIM.

This connector only supports Key-B card, and not B+M card.

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>M2B_CONFIG_3</td><td>2</td><td>P_+3V3_NGFF_B</td></tr><tr><td>3</td><td>GND</td><td>4</td><td>P_+3V3_NGFF_B</td></tr><tr><td>5</td><td>GND</td><td>6</td><td>PU 100K to P_+3V3_NGFF_B</td></tr><tr><td>7</td><td>U2_USB3_P</td><td>8</td><td>NC</td></tr><tr><td>9</td><td>U2_USB3_N</td><td>10</td><td>NC</td></tr><tr><td>11</td><td>GND</td><td></td><td></td></tr><tr><td>21</td><td>M2B_CONFIG_0</td><td>20</td><td>NC</td></tr><tr><td>23</td><td>NC</td><td>22</td><td>NC</td></tr><tr><td>25</td><td>NC</td><td>24</td><td>NC</td></tr><tr><td>27</td><td>GND</td><td>26</td><td>W_DISABLE2#</td></tr><tr><td>29</td><td>U3_P2_RX_N</td><td>28</td><td>NC</td></tr><tr><td>31</td><td>U3_P2_RX_P</td><td>30</td><td>UIM_RST</td></tr><tr><td>33</td><td>GND</td><td>32</td><td>UIM_CLK</td></tr><tr><td>35</td><td>U3_P2_TX_N</td><td>34</td><td>UIM_DATA</td></tr><tr><td>37</td><td>U3_P2_TX_P</td><td>36</td><td>P_UIM_PWR</td></tr><tr><td>39</td><td>GND</td><td>38</td><td>NC</td></tr><tr><td>41</td><td>X_PCIEX1_P8_RX_N</td><td>40</td><td>NC</td></tr><tr><td>43</td><td>X_PCIEX1_P8_RX_P</td><td>42</td><td>NC</td></tr><tr><td>45</td><td>GND</td><td>44</td><td>NC</td></tr><tr><td>47</td><td>X_PCIEX1_P8_TX_N</td><td>46</td><td>NC</td></tr><tr><td>49</td><td>X_PCIEX1_P8_TX_P</td><td>48</td><td>NC</td></tr><tr><td>51</td><td>GND</td><td>50</td><td>PCH_PLTRST-L_BUF</td></tr><tr><td>53</td><td>C_REFCLK_P5_100M_N</td><td>52</td><td>PCH_CLK_REQ_P5_5G_N</td></tr><tr><td>55</td><td>C_REFCLK_P5_100M_P</td><td>54</td><td>PCIE_WAKE_N_3V3 (NC)</td></tr><tr><td>57</td><td>GND</td><td>56</td><td>NC</td></tr><tr><td>59</td><td>NC</td><td>58</td><td>NC</td></tr><tr><td>61</td><td>NC</td><td>60</td><td>NC</td></tr><tr><td>63</td><td>NC</td><td>62</td><td>NC</td></tr><tr><td>65</td><td>NC</td><td>64</td><td>NC</td></tr><tr><td>67</td><td>WWAN_RESET-L (NC)</td><td>66</td><td>UIM_DET</td></tr><tr><td>69</td><td>M2B_CONFIG_1</td><td>68</td><td>NC</td></tr><tr><td>71</td><td>GND</td><td>70</td><td>P_+3V3_NGFF_B</td></tr><tr><td>73</td><td>GND</td><td>72</td><td>P_+3V3_NGFF_B</td></tr><tr><td>75</td><td>M2B_CONFIG_2</td><td>74</td><td>P_+3V3_NGFF_B</td></tr></table>

5.6 Nano SIM

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>C1</td><td>P_UIM_PWR</td></tr><tr><td>C2</td><td>UIM_RST</td></tr><tr><td>C3</td><td>UIM_CLK</td></tr><tr><td>C5</td><td>GND</td></tr><tr><td>C6</td><td>NC</td></tr><tr><td>C7</td><td>UIM_DATA</td></tr></table>

# 5.7 M.2 Key-M

M.2 Key-M 2280 connector supports PCIe Gen4

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td><td>2</td><td>P_+3V3_M.2_M</td></tr><tr><td>3</td><td>GND</td><td>4</td><td>P_+3V3_M.2_M</td></tr><tr><td>5</td><td>X_PCIE4_P12_RX_N</td><td>6</td><td>NC</td></tr><tr><td>7</td><td>X_PCIE4_P12_RX_P</td><td>8</td><td>NC</td></tr><tr><td>9</td><td>GND</td><td>10</td><td>M2M_LED</td></tr><tr><td>11</td><td>X_PCIE4_P12_TX_N</td><td>12</td><td>P_+3V3_M.2_M</td></tr><tr><td>13</td><td>X_PCIE4_P12_TX_P</td><td>14</td><td>P_+3V3_M.2_M</td></tr><tr><td>15</td><td>GND</td><td>16</td><td>P_+3V3_M.2_M</td></tr><tr><td>17</td><td>X_PCIE4_P11_RX_N</td><td>18</td><td>P_+3V3_M.2_M</td></tr><tr><td>19</td><td>X_PCIE4_P11_RX_P</td><td>20</td><td>NC</td></tr><tr><td>21</td><td>GND</td><td>22</td><td>NC</td></tr><tr><td>23</td><td>X_PCIE4_P11_TX_N</td><td>24</td><td>NC</td></tr><tr><td>25</td><td>X_PCIE4_P11_TX_P</td><td>26</td><td>NC</td></tr><tr><td>27</td><td>GND</td><td>28</td><td>NC</td></tr><tr><td>29</td><td>X_PCIE4_P10_RX_N</td><td>30</td><td>NC</td></tr><tr><td>31</td><td>X_PCIE4_P10_RX_P</td><td>32</td><td>NC</td></tr><tr><td>33</td><td>GND</td><td>34</td><td>NC</td></tr><tr><td>35</td><td>X_PCIE4_P10_TX_N</td><td>36</td><td>NC</td></tr><tr><td>37</td><td>X_PCIE4_P10_TX_P</td><td>38</td><td>PCH_SATA_DEVSLP0 (NC)</td></tr><tr><td>39</td><td>GND</td><td>40</td><td>NC</td></tr><tr><td>41</td><td>X_PCIE4_P9_RX_N</td><td>42</td><td>NC</td></tr><tr><td>43</td><td>X_PCIE4_P9_RX_P</td><td>44</td><td>NC</td></tr><tr><td>45</td><td>GND</td><td>46</td><td>NC</td></tr><tr><td>47</td><td>X_PCIE4_P9_TX_N</td><td>48</td><td>NC</td></tr><tr><td>49</td><td>X_PCIE4_P9_TX_P</td><td>50</td><td>PCH_PLTRST-L_BUF</td></tr><tr><td>51</td><td>GND</td><td>52</td><td>CLKREQ_P3_SSD_N</td></tr><tr><td>53</td><td>C_PCIECLK_P3_100M_N</td><td>54</td><td>PCIE_WAKE_N_3V3 (NC)</td></tr><tr><td>55</td><td>C_PCIECLK_P3_100M_P</td><td>56</td><td>NC</td></tr><tr><td>57</td><td>GND</td><td>58</td><td>NC</td></tr><tr><td>67</td><td>NC</td><td>68</td><td>NC</td></tr><tr><td>69</td><td>M2M_CONFIG_1</td><td>70</td><td>P_+3V3_M.2_M</td></tr><tr><td>71</td><td>GND</td><td>72</td><td>P_+3V3_M.2_M</td></tr><tr><td>73</td><td>GND</td><td>74</td><td>P_+3V3_M.2_M</td></tr><tr><td>75</td><td>GND</td><td></td><td></td></tr></table>

# 5.8 M.2 Key-E

M.2 Key-E connector supports 2230-size card.

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td><td>2</td><td>P_+3V3_M.2_E</td></tr><tr><td>3</td><td>U2_USB0_P</td><td>4</td><td>P_+3V3_M.2_E</td></tr><tr><td>5</td><td>U2_USB0_N</td><td>6</td><td>NC</td></tr><tr><td>7</td><td>GND</td><td>8</td><td>NC</td></tr><tr><td>9</td><td>NC</td><td>10</td><td>NC</td></tr><tr><td>11</td><td>NC</td><td>12</td><td>NC</td></tr><tr><td>13</td><td>NC</td><td>14</td><td>NC</td></tr><tr><td>15</td><td>NC</td><td>16</td><td>NC</td></tr><tr><td>17</td><td>NC</td><td>18</td><td>GND</td></tr><tr><td>19</td><td>NC</td><td>20</td><td>NC</td></tr><tr><td>21</td><td>NC</td><td>22</td><td>NC</td></tr><tr><td>23</td><td>NC</td><td></td><td></td></tr><tr><td>33</td><td>GND</td><td>32</td><td>NC</td></tr><tr><td>35</td><td>X_PCIEX1_P7_TX_P</td><td>34</td><td>NC</td></tr><tr><td>37</td><td>X_PCIEX1_P7_TX_N</td><td>36</td><td>NC</td></tr><tr><td>39</td><td>GND</td><td>38</td><td>NC</td></tr><tr><td>41</td><td>X_PCIEX1_P7_RX_P</td><td>40</td><td>NC</td></tr><tr><td>43</td><td>X_PCIEX1_P7_RX_N</td><td>42</td><td>NC</td></tr><tr><td>45</td><td>GND</td><td>44</td><td>NC</td></tr><tr><td>47</td><td>C_PCIECLK_P4_100M_P</td><td>46</td><td>NC</td></tr><tr><td>49</td><td>C_PCIECLK_P4_100M_N</td><td>48</td><td>NC</td></tr><tr><td>51</td><td>GND</td><td>50</td><td>NC</td></tr><tr><td>53</td><td>CLKREQ_P4_WIFI_N</td><td>52</td><td>PCH_PLTRST-L_BUF</td></tr><tr><td>55</td><td>PCIE_WAKE_N_3V3 (NC)</td><td>54</td><td>BT_DISABLE#</td></tr><tr><td>57</td><td>GND</td><td>56</td><td>WIFI_DISABLE#</td></tr><tr><td>59</td><td>NC</td><td>58</td><td>NC</td></tr><tr><td>61</td><td>NC</td><td>60</td><td>NC</td></tr><tr><td>63</td><td>GND</td><td>62</td><td>NC</td></tr><tr><td>65</td><td>NC</td><td>64</td><td>NC</td></tr><tr><td>67</td><td>NC</td><td>66</td><td>NC</td></tr><tr><td>69</td><td>GND</td><td>68</td><td>NC</td></tr><tr><td>71</td><td>NC</td><td>70</td><td>NC</td></tr><tr><td>73</td><td>NC</td><td>72</td><td>P_+3V3_M.2_E</td></tr><tr><td>75</td><td>GND</td><td>74</td><td>P_+3V3_M.2_E</td></tr></table>

# 5.9 SATA Connector

<table><tr><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>P1</td><td>GND</td><td>P5</td><td>SATA3_P1_RX_N</td></tr><tr><td>P2</td><td>SATA3_P1_TX_P</td><td>P6</td><td>SATA3_P1_RX_P</td></tr><tr><td>P3</td><td>SATA3_P1_TX_N</td><td>P7</td><td>GND</td></tr><tr><td>P4</td><td>GND</td><td></td><td></td></tr></table>

# 5.10 SATA Power Connector

![Pin1\n2.00\nA](.sbc35-mtl-50m-47301-1000-10/a091d896760f10d63bc282a846d8efb57b0f8f58bf5f9ffafdceafa2f4ad286a.jpg)

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>P1</td><td>P_+5V_S0</td></tr><tr><td>P2</td><td>GND</td></tr></table>

# 5.11 Fan Connector

This connector is for system FAN design requirements. FAN speed is based on the RT2 sensor resistor, which detects the board temperature. Please refer to the RT2 location below.

<table><tr><td rowspan="5"></td><td>Pin</td><td>Signal</td></tr><tr><td>P1</td><td>GND</td></tr><tr><td>P2</td><td>P_+5V_S0</td></tr><tr><td>P3</td><td>FAN_FG (FAN TACH)</td></tr><tr><td>P4</td><td>FAN_PWM (FAN PWM)</td></tr></table>

# 5.12 USB Connector

There are two USB3.2 Gen2 Ports on front panel, 2x USB 2.0 via headers, 1x USB 2.0 via WAFER.

USB3.2 Gen 2 ports provide over current protection design, 1A current.

# 5.13 SBC-FM Connector

SBC-FM connector is reserved for I/O expansion flexibility through FPC.

Manufacturer: HIROSE

MFG P/N: FH34SRJ-50S-0.5SH

ADLINK P/N: 61-02010-0500

Location: FPC1

<table><tr><td colspan="6">SBC-FM Connector Pin Definition</td></tr><tr><td>Describe</td><td>Signal</td><td>Pin#</td><td>Pin#</td><td>Signal</td><td>Describe</td></tr><tr><td rowspan="16">PCIE4</td><td>X_PCIEX4_P16_TX_P</td><td>2</td><td>27</td><td>CLKREQ_P2_FM_N</td><td>PCIE3 CLK Request</td></tr><tr><td>X_PCIEX4_P16_TX_N</td><td>3</td><td>28</td><td>U3_P3_TX_P</td><td rowspan="4">USB3.0</td></tr><tr><td>X_PCIEX4_P15_TX_P</td><td>4</td><td>29</td><td>U3_P3_TX_N</td></tr><tr><td>X_PCIEX4_P15_TX_N</td><td>5</td><td>30</td><td>U3_P3_RX_P</td></tr><tr><td>X_PCIEX4_P14_TX_P</td><td>6</td><td>31</td><td>U3_P3_RX_N</td></tr><tr><td>X_PCIEX4_P14_TX_N</td><td>7</td><td>32</td><td>U2_USB5_P_CON</td><td rowspan="2">USB2.0</td></tr><tr><td>X_PCIEX4_P13_TX_P</td><td>8</td><td>33</td><td>U2_USB5_N_CON</td></tr><tr><td>X_PCIEX4_P13_TX_N</td><td>9</td><td>34</td><td>ESPI_CLK_FM</td><td rowspan="8">eSPI</td></tr><tr><td>X_PCIEX4_P16_RX_P</td><td>10</td><td>35</td><td>ESPI_IO3_FM</td></tr><tr><td>X_PCIEX4_P16_RX_N</td><td>11</td><td>36</td><td>ESPI_IO2_FM</td></tr><tr><td>X_PCIEX4_P15_RX_P</td><td>12</td><td>37</td><td>ESPI_IO1_FM</td></tr><tr><td>X_PCIEX4_P15_RX_N</td><td>13</td><td>38</td><td>ESPI_IO0_FM</td></tr><tr><td>X_PCIEX4_P14_RX_P</td><td>14</td><td>39</td><td>ESPI_CS1_FM-L</td></tr><tr><td>X_PCIEX4_P14_RX_N</td><td>15</td><td>40</td><td>ESPI_ALERT1_FM-L</td></tr><tr><td>X_PCIEX4_P13_RX_P</td><td>16</td><td>41</td><td>ESPI_RESET_FM-L</td></tr><tr><td>X_PCIEX4_P13_RX_N</td><td>17</td><td>42</td><td>PCIE_WAKE_N_3V3</td><td>PCIE Wake</td></tr><tr><td>PCIE4 CLK Request</td><td>CLKREQ_P7_FM_N</td><td>18</td><td>43</td><td>PCH_SLP_S3_N</td><td>PCH_SLP3</td></tr><tr><td rowspan="2">PCIE4 CLK</td><td>C_PCIECLK_P7_100M_P</td><td>19</td><td>44</td><td>PCH_PLTRST-L_BUF</td><td>PCH_PLTRST</td></tr><tr><td>C_PCIECLK_P7_100M_N</td><td>20</td><td>45</td><td>SMB_CLK_S</td><td rowspan="3">SMB</td></tr><tr><td rowspan="4">PCIE3</td><td>X_PCIEX1_FM_TX_P</td><td>21</td><td>46</td><td>SMB_DAT_S</td></tr><tr><td>X_PCIEX1_FM_TX_N</td><td>22</td><td>47</td><td>I2C1_GPIO-L</td></tr><tr><td>X_PCIEX1_FM_RX_P</td><td>23</td><td>48</td><td>GND</td><td>GND</td></tr><tr><td>X_PCIEX1_FM_RX_N</td><td>24</td><td>49</td><td>P_+1V8_A</td><td rowspan="2">3.3V PWR(Standby)</td></tr><tr><td rowspan="2">PCIE3 CLK</td><td>C_REFCLK_P2_100M_P</td><td>25</td><td>50</td><td>P_+1V8_A</td></tr><tr><td>C_REFCLK_P2_100M_N</td><td>26</td><td></td><td></td><td></td></tr><tr><td>GND</td><td>GND</td><td>1</td><td></td><td></td><td></td></tr></table>

# 5.13.1 SBC-FM Power Connector

Manufacturer: JVE

MFG P/N: 24W1125A-04M00-06S10-01T

ADLINK P/N: 61-6AJ0X-1060

Location: FM\_PWR

<table><tr><td rowspan="7"></td><td>Pin</td><td>Signal</td></tr><tr><td>P1</td><td rowspan="3">GND</td></tr><tr><td>P2</td></tr><tr><td>P3</td></tr><tr><td>P4</td><td rowspan="3">P_+VIN_S (Standby)</td></tr><tr><td>P5</td></tr><tr><td>P6</td></tr></table>

# 6 BIOS Settings

# 6.1 Menu Structure

This section presents the primary menus of the AMIBIOS® EFI BIOS setup utility. Use the following table as a quick reference for the contents of the BIOS Setup Utility. The subsections describe the submenus and options for each menu item.

To enter the BIOS Setup Utility:

1. Power on the motherboard
2. Press &lt; Delete &gt; when the prompt appears.

<table><tr><td>Main</td><td>Advanced</td><td>Chipset</td></tr><tr><td>- System Date- System Time</td><td>►CPU Configuration►Power Management►Serial Console Redirection►USB Configuration►TPM 2.0 Configuration►Onboard Devices Configuration►Hardware Monitor►BIOS Watchdog Timer►Network Stake Configuration►Intel® Ethernet Controller (3) I226-V►Intel® Ethernet Controller (3) I226-V</td><td>►System Agent (SA) Configuration►PCH-I/O Configuration</td></tr><tr><td>Security</td><td>Boot</td><td>Save &amp; Exit</td></tr><tr><td>- Administrator Password- User Password►Secure Boot menu</td><td>- Boot Option #1,2,3,4,5,6,7,8,9,10,11- Setup Prompt Timeout- Bootup Num-Lock- Quiet Boot- Fast Boot</td><td>- Save Changes and Exit- Discard Changes and Exit- Save Changes and Reset- Discard Changes and Reset- Save Changes- Discard Changes- Restore Defaults- Save as User Defaults- Restore User Defaults- Launch EFI Shell from filesystem Device</td></tr><tr><td>MEBx</td><td></td><td></td></tr><tr><td>- Intel(R) ME Password</td><td>-</td><td>-</td></tr></table>

Note: ► indicates a submenu
Gray text indicates info only
Bold italics font indicates default setting

# 6.2 Main Menu

Upon entering the BIOS Setup Utility, the Main Menu is displayed, providing read-only information about your system and also allows you to set the System Date and Time. Refer to the tables below for details of the submenus and settings.

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>System Date</td><td>xxx mm/dd/yyyy</td><td>Sets the date. Use Tab to switch between date elements.</td></tr><tr><td>System Time</td><td>hh:mm:ss</td><td>Sets the time. Use Tab to switch between time elements.</td></tr></table>

# 6.3 Advanced Menu

This menu contains the settings for most of the user interfaces in the system.

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>▶ CPU Configuration</td><td></td><td>CPU Configuration</td></tr><tr><td>▶ Power Management</td><td></td><td>System ACPI Parameters</td></tr><tr><td>▶ Serial Console Redirection</td><td></td><td>Serial Console Redirection</td></tr><tr><td>▶ USB Configuration</td><td></td><td>USB Configuration Parameters</td></tr><tr><td>▶ TPM 2.0 Configuration</td><td></td><td>TPM 2.0 Configuration</td></tr><tr><td>▶ Onboard Devices Configuration</td><td></td><td>Onboard Device Parameters</td></tr><tr><td>▶ Hardware Monitor</td><td></td><td>Monitor hardware status</td></tr><tr><td>▶ BIOS Watchdog Timer</td><td></td><td>BIOS Watch Dog Configuration</td></tr><tr><td>▶ Network Stack Configuration</td><td></td><td>Network Stack Settings</td></tr><tr><td>▶ Intel® Ethernet Controller I226-V</td><td></td><td>Configure Gigabit Ethernet Device Parameters</td></tr><tr><td>▶ Intel® Ethernet Controller I226-V</td><td></td><td>Configure Gigabit Ethernet Device Parameters</td></tr></table>

6.3.1 Advanced > CPU Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>► Efficient-core Information</td><td></td><td>Displays the E-core Information. *Note1</td></tr><tr><td>► Performance-core</td><td></td><td>Displays the P-core Information. *Note1</td></tr><tr><td>Hyper-threading</td><td>EnabledDisabled</td><td>Enable or Disable Hyper-Threading Technology</td></tr><tr><td>Active Performance-cores</td><td>All76543210</td><td>The number of P-cores to enable in each processor package. Note: The number of cores and E-cores are considered together. When both are {0,0}, Pcode will enable all cores.</td></tr><tr><td>Active Efficient-cores</td><td>All76543210</td><td>The number of E-cores to enable in each processor package. Note: The number of cores and E-cores are considered together. When both are {0,0}, Pcode will enable all cores.</td></tr><tr><td>Active SOC-North Efficient-cores</td><td>All0</td><td>The number of SOC-North Efficient-cores to enable in SOC North. *Note1</td></tr><tr><td>Intel (VMX) Virtualization Technology</td><td>EnabledDisabled</td><td>When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.</td></tr><tr><td>Intel(R) SpeedStep(TM)</td><td>EnabledDisabled</td><td>Allows more than two frequency ranges to be supported.</td></tr><tr><td>Intel(R) Speed Shift Technology</td><td>EnabledDisabled</td><td>Enables/Disables Intel(R) Speed Shift Technology Support. Enabling will expose the CPPC v2 interface to allow for hardware-controlled P-states.</td></tr><tr><td>Turbo Mode</td><td>EnabledDisabled</td><td>Enable/Disable processor Turbo Mode.</td></tr><tr><td>C states</td><td>DisabledEnabled</td><td>Enables/Disables CPU Power Management. Allows CPU to go to C states when it&#x27;s not 100% utilized.</td></tr><tr><td>► Efficient-core Information</td><td></td><td>Displays the E-core Information. *Note1</td></tr></table>

\*Note1: This item shows information, depending on ”ACPI Sleep State.”

6.3.2 Advanced > Power Management

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>ACPI Sleep State</td><td>Suspend DisabledS3 (Suspend to RAM)</td><td>Select the highest ACPI sleep state the system will enter when the SUSPEND button is pressed. Note: For MTL, &#x27;Active SOC-North Efficient-cores&#x27; will change to &#x27;All&#x27; after setting &#x27;ACPI Sleep State&#x27; to &#x27;Suspend Disabled</td></tr><tr><td>Power Supply Unit</td><td>ATX ModeEmulate AT Mode</td><td>Select Emulation AT or ATX function. If this option is set to [Emulation AT], the BIOS will report no suspend functions (S3 &amp; S4) to ACPI OS. In Windows XP, it will cause the OS to display a shutdown message during system shutdown. ATX: The OS will turn off system power when shutdown.</td></tr><tr><td>State After G3</td><td>S0 StateS5 State</td><td>Specify the state to which the system should turn when power is re-applied after a power failure (G3 states).</td></tr><tr><td>RTC Wake system from S5</td><td>DisabledFixed TimeDynamic Time</td><td>Enable or disable System wake on alarm event. Select FixedTime to have the system wake at the hr::min::sec specified. Select DynamicTime to have the system wake at the current time + Increase minutes(S).</td></tr><tr><td>Wake up hour</td><td>0</td><td>Range: 0-23 hrFor example, enter 3 for 3am and 15 for 3pm</td></tr><tr><td>Wake up minute</td><td>0</td><td>Range: 0-59 min</td></tr><tr><td>Wake up second</td><td>0</td><td>Range: 0-59 sec</td></tr><tr><td>Wake up minute increase</td><td>1</td><td>Range: 1-5 min</td></tr><tr><td>PCIe Wake</td><td>EnabledDisabled</td><td>Enable or disable PCI Express wake capability.</td></tr></table>

6.3.3 Advanced > Serial Console Redirection

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Console Redirection</td><td>DisabledEnabled</td><td>Console Redirection Enable or Disable</td></tr><tr><td>Terminal Type</td><td>ANSIVT100VT100PlusVT-UTF8</td><td>Emulation: ANSI: Extended ASCII char set. VT100:ASCII char set. VT100Plus: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes.</td></tr><tr><td>Bites per second</td><td>1152009600192003840057600</td><td>Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds.</td></tr><tr><td>Data Bits</td><td>87</td><td>Data Bites</td></tr><tr><td>Parity</td><td>NoneEvenOddMarkSpace</td><td>A parity bit can be sent with the data bits to detect some transmission errors.Even: The parity bit is 0 if the num of 1's in the data bits is even.Odd: The parity bit is 0 if num of 1's in the data bits is odd. Mark: The parity bit is always 1.Space: The parity bit is always 0.Mark and Space Parity do not allow for error detection.</td></tr><tr><td>Stop Bits</td><td>12</td><td>Stop bits indicate the end of a serial data packet. (A start bit indicates the beginning). The standard setting is 1 stop bit. Communication with slow devices may require more than 1 stop bit.</td></tr><tr><td>Flow Control</td><td>NoneHardware RTS/CTS</td><td>Flow control can prevent data loss due to buffer overflow. When sending data, if the receiving buffers are full, a ‘stop’ signal can be sent to stop the data flow. Once the buffers are empty, a ‘start’ signal can be sent to re-start the flow. Hardware flow control uses tow wires to send start/stop signals.</td></tr><tr><td>VT-UTF8 Combo Key Support</td><td>EnabledDisabled</td><td>Enabled VT-UTF8 Combination Key Support for ANSI/VT100 terminals.</td></tr><tr><td>Recorder Mode</td><td>DisabledEnabled</td><td>With the mode enabled only text will be sent. This is to capture Terminal data.</td></tr><tr><td>Resolution 100x31</td><td>DisabledEnabled</td><td>Enables or disables extended terminal resolution.</td></tr><tr><td>Putty KeyPad</td><td>VT100LINUXXTERMR6SCOESCNVT400</td><td>Select FunctionKey and KeyPad on Putty.</td></tr></table>

6.3.4 Advanced > USB Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>XHCI Hand-off</td><td>EnabledDisabled</td><td>Enable/Disable USB Mass Storage Driver Support</td></tr><tr><td>USB Mass Storage Driver Support</td><td>EnabledDisabled</td><td>Enable/Disable USB Mass Storage Driver Support</td></tr><tr><td>USB transfer time-out</td><td>20 sec1 sec5 sec10 sec</td><td>The time-out value for Control, Bulk, and Interrupt transfers.</td></tr><tr><td>Device reset time-out</td><td>20 sec10 sec30 sec40 sec</td><td>USB mass storage device Start Unit command time-out.</td></tr><tr><td>Device power-up delay</td><td>AutoManual</td><td>The maximum time the device will take before it properly reports itself to the Host Controller. ‘Auto’ uses the default value: for a Root port, it is 100 ms, for a Hub port the delay is taken from the Hub descriptor.</td></tr></table>

6.3.5 Advanced > TPM 2.0 Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Security Device Support</td><td>EnableDisable</td><td>Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available.</td></tr><tr><td>SHA256 PCR Bank</td><td>EnabledDisabled</td><td>Enable or Disable SHA256 PCR Bank</td></tr><tr><td>SHA384 PCR Bank</td><td>DisabledEnabled</td><td>Enable or Disable SHA384 PCR Bank</td></tr><tr><td>Pending operation</td><td>NoneTPM Clear</td><td>Schedule an Operation for the Security Device.Note: Your computer will reboot during a restart in order to change the State of the Security Device.</td></tr><tr><td>Platform Hierarchy</td><td>EnabledDisabled</td><td>Enable or Disable Platform Hierarchy</td></tr><tr><td>Storage Hierarchy</td><td>EnabledDisabled</td><td>Enable or Disable Storage Hierarchy</td></tr><tr><td>Endorsement Hierarchy</td><td>EnabledDisabled</td><td>Enable or Disable Endorsement Hierarchy</td></tr><tr><td>Physical Presence Spec Version</td><td>1.31.2</td><td>Select to Tell O.S. to support PPI Spec. Version 1.2 or 1.3. Please note that some HCK tests might not support 1.3.</td></tr><tr><td>Device Select</td><td>AutoTPM 1.2TPM 2.0</td><td>TPM 1.2 will restrict support to TPM 1.2 devices, TPM 2.0 will restrict support to TPM 2.0 devices, Auto will support both with the default set to TPM 2.0 devices if not found, TPM 1.2 devices will be enumerated</td></tr></table>

6.3.6 Advanced > Onboard Devices Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>COM1 Mode Control</td><td>RS232RS422RS485</td><td>Select COM1 mode. RS232, RS422, RS485</td></tr><tr><td>COM1 TX termination</td><td>DisabledEnabled</td><td>COM1 TX termination Enable/Disable</td></tr><tr><td>COM1 RX termination</td><td>DisabledEnabled</td><td>COM1 RX termination Enable/Disable</td></tr><tr><td>COM2 Mode Control</td><td>RS232RS422RS485</td><td>Select COM1 mode. RS232, RS422, RS485</td></tr><tr><td>COM2 TX termination</td><td>DisabledEnabled</td><td>COM2 TX termination Enable/Disable</td></tr><tr><td>COM2 RX termination</td><td>DisabledEnabled</td><td>COM2 RX termination Enable/Disable</td></tr><tr><td>LAN #1</td><td>EnabledDisabled</td><td>Enable/Disable</td></tr><tr><td>LAN #2</td><td>EnabledDisabled</td><td>Enable/Disable</td></tr></table>

6.3.7 Advanced > Hardware Monitor

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>CPU Fan Control Mode(Fan 1)</td><td>SMART FAN IVManual mode</td><td>Configure Fan Control Mode. Select Manual Mode, user can configure a fix fan duty. Select SMART FAN IV, user can configure 4 temperatures and 4 fan duties. Select Auto Mode, FAN will run at automatic speed with thermal.</td></tr><tr><td>Manual PWM</td><td>128</td><td>Fan will work with this Manual PWM Value(0~255 for 0%~100%)</td></tr><tr><td>Temperature 1</td><td>30</td><td>The value of temperature1.</td></tr><tr><td>Temperature 2</td><td>50</td><td>The value of temperature2.</td></tr><tr><td>Temperature 3</td><td>60</td><td>The value of temperature3.</td></tr><tr><td>Temperature 4</td><td>70</td><td>The value of temperature4.</td></tr><tr><td>FD/RPM 1</td><td>77</td><td>The value of Fan Duty/RPM when temperature is T1.</td></tr><tr><td>FD/RPM 2</td><td>128</td><td>The value of Fan Duty/RPM when temperature is T2.</td></tr><tr><td>FD/RPM 3</td><td>204</td><td>The value of Fan Duty/RPM when temperature is T3.</td></tr><tr><td>FD/RPM 4</td><td>255</td><td>The value of Fan Duty/RPM when temperature is T4.</td></tr><tr><td>Critical Temperature</td><td>71</td><td>Fan temperature critical value.</td></tr></table>

6.3.8 Advanced > BIOS Watchdog Timer

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>BIOS POST Watchdog</td><td>DisabledSecond ModeMinute Mode</td><td>1. Disable: Disables WatchDog Timer; 2. Second Mode: Enables Watchdog Timer in second mode; 3. Minute Mode: Enables Watchdog Timer in minute mode.</td></tr><tr><td>BIOS Watchdog Timer</td><td>1</td><td>Setwatchdogtimer for BIOS POST process. Minute Mode</td></tr><tr><td>BIOS Watchdog Timer</td><td>15</td><td>Setwatchdogtimer for BIOS POST process. Second Mode</td></tr></table>

6.3.9 Advanced > Network Stack Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Network Stack</td><td>DisabledEnabled</td><td>Enable/Disable UEFI Network Stack</td></tr><tr><td>IPv4 PXE Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv4 PXE boot support. If disabled, IPv4 PXE boot support will not be available.</td></tr><tr><td>IPv4 HTTP Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv4 HTTP boot support. If disabled, IPv4 HTTP boot support will not be available.</td></tr><tr><td>IPv6 PXE Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv6 PXE boot support. If disabled, IPv6 PXE boot support will not be available.</td></tr><tr><td>IPv6 HTTP Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv6 HTTP boot support. If disabled, IPv6 HTTP boot support will not be available.</td></tr><tr><td>PXE boot wait time</td><td>0</td><td>Wait time in seconds to press the ESC key to abort the PXE boot. Use either the +/- or numeric keys to set the value.</td></tr><tr><td>Media detect count</td><td>1</td><td>The number of times the presence of media will be checked. Use either the +/- or numeric keys to set the value.</td></tr></table>

6.4 Chipset

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>► System (SA) Configuration</td><td></td><td>System Agent (SA) Parameters</td></tr><tr><td>► PCH-IO Configuration</td><td></td><td>PCH Parameters</td></tr></table>

6.4.1 Chipset > System Agent (SA) Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>► Memory Configuration</td><td></td><td>Memory Configuration Parameters</td></tr><tr><td>► Graphics Configuration</td><td></td><td>Graphics Configuration</td></tr><tr><td>VT-d</td><td>EnabledDisabled</td><td>VT-d Capability</td></tr><tr><td>NPU Device (B0:D11:F0)</td><td>DisabledEnabled</td><td>Enable/Disable NPU (Neural Processing Unit) Device.</td></tr></table>

6.4.2 Chipset > Graphics Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Primary Display</td><td>AutoIGFXPEG SlotPCH PCI</td><td>Select which of the IGFX/PEG/PCI graphics devices should be the primary display, or select HG for Hybrid Gfx.</td></tr><tr><td>INTERNAL GRAPHICS</td><td>AutoEnabledDisabled</td><td>Keep IGFX enabled based on the setup options.</td></tr></table>

6.4.3 Chipset > PCH-IO Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>BIOS Lock</td><td>DisabledEnabled</td><td>Enable/Disable the PCH BIOS Lock Enable feature. Required to be enabled to ensure SMM protection of the flash.</td></tr><tr><td>▶ SATA Configuration</td><td></td><td>SATA Device Options Settings</td></tr><tr><td>▶ NVMe Configuration</td><td></td><td>NVMe Device Options Settings</td></tr></table>

6.4.3.1. Chipset > PCH-IO Configuration > SATA Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>SATA Controller</td><td>EnabledDisabled</td><td>Enable/Disable SATA Device.</td></tr><tr><td>SATA Mode Selection</td><td>AHCI</td><td>Determines how SATA controller(s) operate.</td></tr><tr><td>SATA Controller Speed</td><td>DefaultGen3Gen1Gen2</td><td>Indicates the maximum speed the SATA controller can support.</td></tr></table>

6.5 Security

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Administrator Password</td><td></td><td>Set Administrator Password</td></tr><tr><td>User Password</td><td></td><td>Set User Password</td></tr><tr><td>▶ Secure Boot menu</td><td></td><td>Secure Boot Configuration</td></tr><tr><td>▶ Security Configuration</td><td></td><td>Security Configuration Settings</td></tr></table>

6.5.1 Security > Secure Boot Menu

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Secure Boot Control</td><td>DisabledEnabled</td><td>The secure Boot feature is Active if Secure Boot is Enabled, the Platform key(PK) is enrolled, and the system is in User mode. Changing the mode requires platform reset.</td></tr><tr><td>Secure Boot Mode</td><td>StandardCustom</td><td>Secure Boot mode options: Standard or Custom.In Custom mode, Secure Boot Policy variables can be configured by a physically present user without full authentication</td></tr></table>

6.6 Boot

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Setup Prompt Timout</td><td>1</td><td>The number of seconds to wait for setup activation key. The maximum value is 8.</td></tr><tr><td>Bootup NumLock State</td><td>OffOn</td><td>Select the keyboard NumLock state</td></tr><tr><td>Quiet Boot</td><td>EnabledDisabled</td><td>Enables or disables the Quiet Boot option</td></tr><tr><td>Fast Boot</td><td>Disable LinkEnabled</td><td>Enables or disables boot with the initialization of a minimal set of devices required to launch the active boot option. Has no effect on BBS boot options.</td></tr><tr><td>Boot Option #1</td><td>Hard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #2</td><td>NVMEHard DiskUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #3</td><td>UEFI APHard DiskNVMECD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #4</td><td>CD/DVDHard DiskNVMEUEFI APSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #5</td><td>SDHard DiskNVMEUEFI APCD/DVDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #6</td><td>USB Hard DiskHard DiskNVMEUEFI APCD/DVDSDUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #7</td><td>USB CD/DVDHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #8</td><td>USB KeyHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #9</td><td>USB FloppyHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #10</td><td>USB LanHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyNetworkDisabled</td><td>Sets the system boot order</td></tr></table>

6.7 Save & Exit

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Save Changes and Exit</td><td></td><td>Exit system setup after saving the changes.</td></tr><tr><td>Discard Changes and Exit</td><td></td><td>Exit system setup without saving any changes.</td></tr><tr><td>Save Changes and Reset</td><td></td><td>Reset the system after saving the changes.</td></tr><tr><td>Discard Changes and Reset</td><td></td><td>Reset the system without saving any changes.</td></tr><tr><td>Save Changes</td><td></td><td>Save Changes done so far to any of the setup options.</td></tr><tr><td>Discard Changes</td><td></td><td>Discard Changes done so far to any of the setup options.</td></tr><tr><td>Restore Defaults</td><td></td><td>Restore/Load Default values for all the setup options.</td></tr><tr><td>Save as User Defaults</td><td></td><td>Save the changes done so far as User Defaults.</td></tr><tr><td>Restore User Defaults</td><td></td><td>Restore the User Defaults to all the setup options.</td></tr><tr><td>Launch EFI Shell from filesystem device</td><td></td><td>Attemps to Launch the EFI Shell application (Shell.efi) from one of the available filesystem devices.</td></tr></table>

6.8 MEBx

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Intel(R) ME Password</td><td></td><td>MEBx Login</td></tr><tr><td>Intel(R) AMT</td><td>DisabledEnable</td><td></td></tr></table>

# Safety Instructions

Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use.

Please read these safety instructions carefully.
• Please keep this User‘s Manual for later reference.
• Read the specifications section of this manual for detailed information on the operating environment of this equipment.
• When installing/mounting or uninstalling/removing equipment, turn off the power and unplug any power cords/cables.
• To avoid electrical shock and/or damage to equipment:

Keep equipment away from water or liquid sources.
Keep equipment away from high heat or high humidity.
 Keep equipment properly ventilated (do not block or cover ventilation openings).
 Make sure to use recommended voltage and power source settings.
 Always install and operate equipment near an easily accessible electrical socket-outlet.
Secure the power cord (do not place any object on/over the power cord).
 Only install/attach and operate equipment on stable surfaces and/or recommended mountings.
 If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source.

• Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.

# Getting Service

Ask an Expert: https://www.adlinktech.com/en/Askanexpert

# ADLINK Technology, Inc.

Address: No. 66, Huaya 1st Road, Guishan District Taoyuan City 333, Taiwan

Tel: +886-3-216-5088

Fax: +886-3-328-5723

Email: service@adlinktech.com

# Ampro ADLINK Technology, Inc.

Address: 6450 Via Del Oro, San Jose, CA 95119-1208, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-600-1189

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

Address: 300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area Shanghai, 201203 China

Tel: +86-21-5132-8988

Fax: +86-21-5132-3588

Email: market@adlinktech.com

# ADLINK Technology GmbH

Address: Hans-Thoma-Strasse 8-10, 68163, Mannheim, Germany

Tel: +49-621-43214-0

Fax: +49-621 43214-30

Email: emea@adlinktech.com

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you.
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