# SBC35-RPL

# User’s Manual

3.5” Single Board Computer with 13th Gen Intel® Core™ i7/i5/i3 or Celeron Processor

![Close-up of a green printed circuit board with various electronic components and connectors (no visible text or symbols)](.sbc35-rpl-50m-47300-1010-11/575e195765e4ba0fa50eeac339e26375d3df62ac11c25f301d5db5b6403db24a.jpg)

Manual Rev.: 1.1

Revision Date: December 03, 2024

Part Number: 50M-47300-1010

# Preface

# Copyright

Copyright 2024 ADLINK Technology, Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

# Disclaimer

The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.

# Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

![Symbol of a trash bin crossed with two crossed lines and a solid rectangle below (no text or labels)](.sbc35-rpl-50m-47300-1010-11/a9bbabab6b6adfbb2b15a17341516124e32dec0f8af2e695374f53b6b7f64853.jpg)

Battery Labels (for products with battery)

![Simple line drawing of a trash bin crossed out by two diagonal lines (no text or symbols)](.sbc35-rpl-50m-47300-1010-11/fb79d0b94326d93a931784e254b9cac2cb0777bdcd1af85b23961b10efa631cd.jpg)

![The image displays a black outline of the standard recycling symbol (three chasing arrows) inside a square border. Below the square is the text 'Li-ion' in bold black letters.](.sbc35-rpl-50m-47300-1010-11/3bc9fd44b420f011292562eb74ba7bd809d0d1dbe2fcfa5127f33c753a74bacf.jpg)

![RECYCLF\nRBRC\nLi-ion\n1.800.822.8837](.sbc35-rpl-50m-47300-1010-11/bf883b2793e862b3f7a2ece61ead59a78f4d12bbba82b42f785df8149c492838.jpg)

![廢電池請回收](.sbc35-rpl-50m-47300-1010-11/d9937431e3547e3129f339f28aa85d861ff49e4af65367b522dc4d5b4334e4fa.jpg)

# California Proposition 65 Warning

![The image displays a standard warning symbol featuring a yellow triangle with a thick black border. Centered inside the triangle is a black exclamation mark.](.sbc35-rpl-50m-47300-1010-11/b4c66e10c08ea1db6d963cf3a30b6a8197c2feeb95f0ad5ae5c1eb7be97b6771.jpg)

WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP,

DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm. For more information go to www.P65Warnings.ca.gov.

# Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.

Revision History

<table><tr><td>Revision</td><td>Description</td><td>Date</td></tr><tr><td>1.0</td><td>Initial release</td><td>2024-05-30</td></tr><tr><td>1.1</td><td>Specifications, block diagram, and Mechanical layout updated</td><td>2024-12-03</td></tr></table>

# Table of Contents

Preface...

Table of Contents... .iv

List of Figures ....... ..vi

List of Tables...... ..vii

1 Introduction...

1.1 Packing List ..
1.2 Optional Accessories .

2 Quick Installation...............

2.1 Assembling Passive Heatsink for 15W SKU.. .3

2.2 Assembing Cooler Solution for 28W SKU . 4

2.3 Installing M.2 Expansion Modules.. .5

3 Specifications ...

3.1 Core System .

3.2 I/O Interface ..

3.3 Video 7

3.4 Audio

3.5 LAN.. 7

3.6 Dimension.. .8

3.7 Power Supply...... .8

3.8 Temperatures . ..8

3.9 ESD . ..8

3.10 Certificate (EMC) .. .8

3.11 Operating Systems . .8

3.12 Functional Block Diagram .9

4 Mechanical Layout .... .11

4.1 Connector Locations . .11

4.2 Mechanical Dimensions . .14

5 Connector Pinouts ............... .17

5.1 I2C Connector.. .17

5.2 SMBus Connector.. .17

5.3 USB2 Connector.. .17

5.4 Power Input & DC-In Connector.. ...18

5.5 RS-232/422/485.. ..19

5.6 DI/DO/USB2/Audio Combo Header.. ..20

5.7 M.2 Key-B ... ..20
5.8 Nano SIM.. .21
5.9 M.2 Key-M . ..22
5.10 M.2 Key-E. .23
5.11 SATA connector.. .24
5.12 Fan Connector . ..24
5.13 USB Connector.. .24
5.14 SBC-FM Connector.. .25

# 6 BIOS Setup............ .27

6.1 Menu Structure . .27
6.2 Main Menu. ..28
6.3 Advanced Menu... .29
6.4 Chipset ... ..36
6.5 Security.. ..37
6.6 Boot .. ..38
6.7 Save & Exit . ..42
6.8 MEBx. ...42

# Safety Instructions... .43

# Getting Service............ ..44

# List of Figures

Figure 1: Functional Block Diagram . .9

Figure 2: IO Panel Connector Locations . ..11

Figure 3: Onboard Connector Locations (Top)... ..12

Figure 4: Onboard Connector Locations (Bottom) . ..13

Figure 5: Mechanical Dimensions . ..14

Figure 6: Mechanical Dimensions - IO Panel. ...14

Figure 7: Mechanical Dimensions . ...15

Figure 8: Mechanical Dimensions - IO Panel.. ...15

# List of Tables

Table 1: IO Panel Connector Definitions . ..11
Table 2: Onboard Connector Definitions (Top) .. ..12
Table 3: Onboard Connector Definitions (Bottom) . ...13

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# 1 Introduction

ADLINK SBC35-RPL is a 3.5-inch single board computer powered by 13th GenIntel® Core™ i7/i5/i3 processor (formerly Raptor-Lake-P). It includes a dual-channel DDR5 4800MHz memory of up to 64GB, 2x GbE ports (1x 1G + 1x 2.5G), and provides support for four independent displays (eDP/LVDS, HDMI, DP, USB Type-C). Additionally, it offers 1x PCIe x4, 1x PCIe x1, 1x USB3.0/2.0, LPC, and 3.3V expansions. TPM is optional.

# 1.1 Packing List

SBC35-RPL motherboard
M.2 screw kit (Part Number: 58-10515-0000)
• Thermal kit (Part Number: 58-10514-0000)

# 1.2 Optional Accessories

• CPU cooler for 28W CPU (Part Number: 32-21014-0000-A0)
• Passive Heatsink for 15W CPU (Part Number: 32-21015-0000-A0)
• USB 2.0 Type A connector (Part Number: 30-21363-0000-A0)
• RS-232x2 + RS-232/485/422x2 (Part Number: 30-21534-0010-A0)
• DI/Dox8-bits + Audio + USB2.0x2 (Part Number: 30-22122-0000-A0)
• SATA + SATA Power (Part Number: 30-22121-0000-A0)
• 4-pin to DC jack cable (Part Number: 30-22238-0000-A0)
• SBC35-RPL LVDS FPC (Part Number: 91-49076-0010)

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# 2 Quick Installation

This chapter covers how to assmelbe cooling solutions and M.2 expansion modules for the ADLINK SBC35-RPL.

# 2.1 Assembling Passive Heatsink for 15W SKU

1. Remove the plastic seal from the thermal pad.

![Technical line drawing of a mechanical component with a red arrow indicating direction (no text or symbols)](.sbc35-rpl-50m-47300-1010-11/55245801be3e33b82d6c6377912e6f8f9fb6da77f89f74cdc2a075876cad6698.jpg)

2. Assemble and secure the heatsink using the screws provided, as illustrated below.

![Technical line drawing of an electronic circuit board with cooling fins and internal components (no text or symbols)](.sbc35-rpl-50m-47300-1010-11/cb04176e0459ed3acb88196e6dfc920765165028af1724c53bfa3be570209ca4.jpg)

# 2.2 Assembing Cooler Solution for 28W SKU

1. Remove the plastic seal from the thermal pad.

![Technical line drawing of a heat exchanger or cooling unit with a red arrow indicating a specific component (no text or symbols present)](.sbc35-rpl-50m-47300-1010-11/590ff112e357a0ce8f5b909ce9723ffe3ef1e93c479c8e84ca03e307cf55f79e.jpg)

2. Assemble and secure the CPU cooler using the screws provided, as illustrated below.

![Technical line drawing of an electronic circuit board with cooling fan and internal components (no text or symbols)](.sbc35-rpl-50m-47300-1010-11/52827c666f72a989127d983fc7a105f481e4ff21bfd2c53a65c2f94deedbb201.jpg)

# 2.3 Installing M.2 Expansion Modules

M.2 B-key and M.2 E-key share the same mounting hole, please install as illustrated below.

![Isometric illustration of a green printed circuit board with various electronic components and connectors (no text or labels)](.sbc35-rpl-50m-47300-1010-11/75e2bc1c6c337a010389aa2a827046422bc3edf7d31ffd2ae0ae2c765b77d3cf.jpg)

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# 3 Specifications

# 3.1 Core System

 CPU:

Intel® Core™ i7/i5/i3 or Celeron processor

Memory: Dual-channel DDR5 SO-DIMMs 4800MHz, up to 64GB

# 3.2 I/O Interface

 USB:

• 2x USB 3.2 Gen2x1 ports (10Gbps) (rear)

3x USB 2.0 via headers (max. 5V, 0.5A per port)

 USB Type-C: 1x USB Type-C (USB 3.2, DP, Power delivery 5V, 3A)

 COM:

2x RS-232/422/485 pin headers

2x RS-232 pin headers

 Serial ATA: 1x SATA 6Gb/s ports w/ 5V SATA power

DI/DO: 8DI, 8DO

 TPM: TPM 2.0 (option)

M.2 connectors:

1x M.2 (Key E, 2230) with PCIe x1, USB 2.0

1x M.2 (Key B, 3042) with USB 3.0/2.0

1x M.2 (Key M, 2280) with PCIe x4

 SBC-FM Board Expansion: 1x PCIe x1, 1x PCIe x4, 1x USB 3.0/2.0, LPC

# 3.3 Video

 Interfaces: 1x Type-C, 1x eDP (co-lay LVDS by option), 1x HDMI, 1x DisplayPort

# 3.4 Audio

 Audio Codec: Realtek® ALC888S

Interfaces: 1x Mic-in, 1x Line-in, and 1x Line-out

# 3.5 LAN

 LAN1: Intel® I219-V via RJ45 connector, with 10/100/1000 Mbps

 LAN2: Intel® I225-V via RJ45 connector, with 10/100/1000/2500 Mbps

# 3.6 Dimension

 ATX: 5.75” x 4” (146mm x 102mm)

# 3.7 Power Supply

12V-24V, Reserved DC Jack connector (option)

# 3.8 Temperatures

Operating Temperature: $0 ^ { \circ } \mathsf { C }$ to $6 0 ^ { \circ } \mathsf { C }$
Storage Temperature: $\angle 4 0 ^ { \circ } \mathsf { C }$ to $8 5 ^ { \circ } \mathsf { C }$

# 3.9 ESD

Contact +/- 8kV, Air +/- 12kV

# 3.10 Certificate (EMC)

CE/FCC Class B

# 3.11 Operating Systems

Microsoft® Windows 10 IoT Enterprise LTSC 21H2 (64-bit)
Microsoft® Windows 11
Ubuntu® Desktop 22.04 LTS (by project basis)

3.12 Functional Block Diagram
![The flowchart depicts the connectivity of the **Intel® Raptor Lake-P 15/28W** processor.\n\n**Top Connections (Display & Power):**\n*   **HDMI Redriver** (connected via **DDIB**) connects to **HDMI 2.0b**, which connects to **Type-C**.\n*   **DP 1.4** (connected via **TCP0**).\n*   **eDP*/ LVDS** (connected via **DDIA**).\n*   **PD controller** (connected via **SML1**, **TCP1**) connects to **Type-C**.\n\n**Left Side Connections (LAN, USB, Audio, I/O):**\n*   **Intel I219-V** (connected via **PCIe**) connects to **LAN1 1GbE**.\n*   **Intel I225-V** (connected via **PCIe**) connects to **LAN2 2.5GbE**.\n*   **USB3.2 Gen2x1** (connected via **USB3.2**).\n*   **USB3.2 Gen2x1** (connected via **USB3.2**).\n*   **ALC888S** (connected via **HDA**) connects to **Line-in Line-out Mic 8*DI/DO USB2.0**.\n*   **Line-in Line-out Mic 8*DI/DO USB2.0** also receives connections via **DI/DO 8bits** and **USB2.0 x2** directly from the processor.\n\n**Right Side Connections (Memory, Storage, Expansion):**\n*   **SO-DIMM1** (connected via **DDR5**).\n*   **SO-DIMM2** (connected via **DDR5**).\n*   **M.2 M-Key 2280** (connected via **PCIe Gen4x4**).\n*   **M.2 E-Key 2230** (connected via **PCIe Gen3x1, USB2.0**).\n*   **M.2 B-Key 3042** (connected via **PCIe Gen3x1, USB2.0**) connects to **Nano SIM**.\n*   **SATA III** (connected via **SATA3.0**).\n*   **TPM2.0** (connected via **SPI**).\n*   **BIOS** (connected via **SPI**).\n*   **SBC-FM Expansion** (connected via **PCIe x4**, **PCIe x1**, **USB3.0/2.0**, **LPC**).\n\n**Bottom Connections (Super I/O & Bus Interfaces):**\n*   **SIO NCT6126D** (connected via **eSPI**) connects to **FAN** and **2x RS232/422/485 2x RS232**.\n*   **USB2.0** (connected directly).\n*   **SMBus** (connected directly).\n*   **I2C** (connected directly).](.sbc35-rpl-50m-47300-1010-11/7251ee81733a392ee0029a28f005bdef7d17cca9229f860135975d47b8fa46fd.jpg)

\* Default by BOM change, contact with your local sales to support option.

Figure 1: Functional Block Diagram

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# 4 Mechanical Layout

# 4.1 Connector Locations

![A\nB\nC\nD\nE\nF\nG](.sbc35-rpl-50m-47300-1010-11/c4a39bcb497b6a26706a7b2ec1ffd9fc4d5608d2eaed9d3e9a8218e94f023d49.jpg)

Figure 2: IO Panel Connector Locations

Table 1: IO Panel Connector Definitions

<table><tr><td colspan="2">IO Panel Connectors</td></tr><tr><td>Item</td><td>Description</td></tr><tr><td>A</td><td>Power button</td></tr><tr><td>B</td><td>2x USB 3.0 connectors</td></tr><tr><td>C</td><td>HDMI connector</td></tr><tr><td>D</td><td>DisplayPort connector</td></tr><tr><td>E</td><td>USB Type-C connector</td></tr><tr><td>F</td><td>2x RJ45 LAN ports (I219-V, I225-V)</td></tr><tr><td>G</td><td>DC In connector</td></tr></table>

![I H J\nK\nL\nM\nN\nDDR5 H728\nDDR5 H628\nUDD](.sbc35-rpl-50m-47300-1010-11/c59620bfdd1ba00846fefd73995e360a98f863898e5e3cf5c0f258b9262c2f93.jpg)

Figure 3: Onboard Connector Locations (Top)

Table 2: Onboard Connector Definitions (Top)

<table><tr><td colspan="2">Onboard Connectors</td></tr><tr><td>Item</td><td>Description</td></tr><tr><td>H</td><td>SO-DIMM1 DDR5_5.2mm</td></tr><tr><td>I</td><td>SO-DIMM2 DDR5_9.2mm</td></tr><tr><td>J</td><td>DB40 connector</td></tr><tr><td>K</td><td>System Fan connector</td></tr><tr><td>L</td><td>USB 2.0 connector</td></tr><tr><td>M</td><td>I2C connector</td></tr><tr><td>N</td><td>SMB connector</td></tr></table>

![O\nP\nQ\nR\nW\nV\nU\nI\nS\nY\nZ](.sbc35-rpl-50m-47300-1010-11/ace1e0fd82981d0cc58e7be8ce1f04d56a3b46c947d027b2a182a0d0fb7be800.jpg)

Figure 4: Onboard Connector Locations (Bottom)

Table 3: Onboard Connector Definitions (Bottom)

<table><tr><td colspan="2">Onboard Connectors</td></tr><tr><td>Item</td><td>Description</td></tr><tr><td>O</td><td>NGF M.Key (only supports NVM SSD)</td></tr><tr><td>P</td><td>eDP/LVDS connector(eDP by default, please contact ADLINK representative for LVDS support)</td></tr><tr><td>Q</td><td>FPC connector (supports SBC-FM board)</td></tr><tr><td>R</td><td>NGF E.Key (1x PCIe 3.0, 1x USB 2.0)</td></tr><tr><td>S</td><td>NGF B.Key (1x PCIe 3.0, 1x USB 3.0, 1x USB 2.0)</td></tr><tr><td>T</td><td>Nano SIM connector</td></tr><tr><td>U</td><td>Wafer for COM 1,2,3,4</td></tr><tr><td>V</td><td>Wafer for DI, DO + MIC + Line-in + Line-out + 2x USB 2.0</td></tr><tr><td>W</td><td>RTC Battery connector</td></tr><tr><td>X</td><td>SATA connector</td></tr><tr><td>Y</td><td>SATA Power connector</td></tr><tr><td>Z</td><td>External Power connector for SBC-FM board</td></tr></table>

# 4.2 Mechanical Dimensions

# 4.2.1 With Passive Heatsink for 15W SKU

(ADLINK Part Number: 32-21015-0000-A0)

# Top View

![146\n75\n81.01\n102](.sbc35-rpl-50m-47300-1010-11/3039175bfd54c93efd27e227e5f438b7cfaf2d2d6c18b2043e57a21bee622af3.jpg)

Dimensions: mm
Figure 5: Mechanical Dimensions

# Side View

![32.29](.sbc35-rpl-50m-47300-1010-11/d4c06e55055df8ca466f99d8fa6ad374214c54c9d4e06ae8ce9919452acc8cb9.jpg)

![Technical line drawing of a mechanical assembly with no visible text or symbols](.sbc35-rpl-50m-47300-1010-11/ba8b308ac4d2552f8fa4c1911fb3efcf82d287735bfc9f2e67e194bacb4c57ab.jpg)

Dimensions: mm
Figure 6: Mechanical Dimensions - IO Panel

# 4.2.2 With Cooler Solution for 28W SKU

(ADLINK Part Number: 32-21014-0000-A0)

Top View
![90\n67.02\n20.97](.sbc35-rpl-50m-47300-1010-11/463e8ed52c993628f0765f731e7aa7c1b7984dba16a503621129e0dc258dd731.jpg)

Dimensions: mm

Figure 7: Mechanical Dimensions
Side View
![38.69](.sbc35-rpl-50m-47300-1010-11/a6f26bda56de56efb8bd8731a3526c447abf5a835e8a60f835d47cffc08701bd.jpg)

![Technical line drawing of a mechanical assembly (no text or symbols visible)](.sbc35-rpl-50m-47300-1010-11/91f4e9dba89485c81150a55097f0042ba010105ee2ea5a35cb303dfbcbd86712.jpg)

Dimensions: mm

Figure 8: Mechanical Dimensions - IO Panel

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# 5 Connector Pinouts

# 5.1 I2C Connector

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>P_+3V3_A</td></tr><tr><td>2</td><td>PCH_I2C0_CLK</td></tr><tr><td>3</td><td>PCH_I2C0_DAT</td></tr><tr><td>4</td><td>I2C1_GPIO-L</td></tr><tr><td>5</td><td>GND</td></tr><tr><td></td><td></td></tr></table>

# 5.2 SMBus Connector

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>P_+3V3_A</td></tr><tr><td>2</td><td>SMB_CLK_S</td></tr><tr><td>3</td><td>SMB_DAT_S</td></tr><tr><td>4</td><td>PCH_SMB_ALERT-L</td></tr><tr><td>5</td><td>GND</td></tr><tr><td></td><td></td></tr></table>

# 5.3 USB2 Connector

<table><tr><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>P_+5V_DDR5</td></tr><tr><td>2</td><td>U2_USB1_N</td></tr><tr><td>3</td><td>U2_USB1_P</td></tr><tr><td>4</td><td>GND</td></tr><tr><td></td><td></td></tr></table>

# 5.4 Power Input & DC-In Connector

Input power voltage range: DC 12V-24V
Input current: 8A -12A
Suggest Adapter: 100-144W (CPU 15W or 28W type)

![DC Power Jack RT Φ2.6 24V/12A\nPin Signal\n1 Power\n2 GND1\n3 GND2](.sbc35-rpl-50m-47300-1010-11/e33523857ce6b7fe98e68a03b65177e2c31bb83c0b267d70be667ba3a6795adc.jpg)

<table><tr><td colspan="5">Power Header ML 2x2P ST D4.2 (default)</td></tr><tr><td rowspan="3">&lt;img src="images/0cc662ec3a0c01dec6ea2f5b3714b3d4ed23ae73987d1a8dd1f5d5bc6eabe7e0.jpg"/&gt;</td><td>Pin</td><td>Signal</td><td>Pin</td><td>Signal</td></tr><tr><td>1</td><td>GND</td><td>3</td><td>Power</td></tr><tr><td>2</td><td>GND</td><td>4</td><td>Power</td></tr></table>

# 5.5 RS-232/422/485

There are four COM ports on the board. Port 1 and 2 can be set to RS232, 422, or 485 within BIOS while Port 3 and 4 are RS232 only. All COM port signals are separated within one wafer connector.

<table><tr><td>Pin</td><td>Name</td><td>Pin</td><td>Name</td></tr><tr><td>1</td><td>GND</td><td>2</td><td>GND -</td></tr><tr><td>3</td><td>CON1_COM_CTS-L</td><td>4</td><td>CON1_COM_RI</td></tr><tr><td>5</td><td>CON1_COM_DSR-L</td><td>6</td><td>CON1_COM_RTS-L</td></tr><tr><td>7</td><td>CON1_COM_TXD</td><td>8</td><td>CON1_COM_DTR-L</td></tr><tr><td>9</td><td>CON1_COM_DCD-L</td><td>10</td><td>CON1_COM_RXD</td></tr><tr><td>11</td><td>CON2_COM_RXD</td><td>12</td><td>CON2_COM_DCD-L</td></tr><tr><td>13</td><td>CON2_COM_TXD</td><td>14</td><td>CON2_COM_DTR-L</td></tr><tr><td>15</td><td>CON2_COM_DSR-L</td><td>16</td><td>CON2_COM_RTS-L</td></tr><tr><td>17</td><td>CON2_COM_CTS-L</td><td>18</td><td>CON2_COM_RI</td></tr><tr><td>19</td><td>COM3_RS232_CTS-L</td><td>20</td><td>COM3_RS232_RXD</td></tr><tr><td>21</td><td>COM3_RS232_DTR-L</td><td>22</td><td>COM3_RS232_RI</td></tr><tr><td>23</td><td>COM3_RS232_RTS-L</td><td>24</td><td>COM3_RS232_TXD</td></tr><tr><td>25</td><td>COM3_RS232_DCD-L</td><td>26</td><td>COM3_RS232_DSR-L</td></tr><tr><td>27</td><td>COM4_RS232_DSR-L</td><td>28</td><td>COM4_RS232_DCD-L</td></tr><tr><td>29</td><td>COM4_RS232_TXD</td><td>30</td><td>COM4_RS232_RTS-L</td></tr><tr><td>31</td><td>COM4_RS232_RXD</td><td>32</td><td>COM4_RS232_DTR-L</td></tr><tr><td>33</td><td>COM4_RS232_RI</td><td>34</td><td>COM4_RS232_CTS-L</td></tr><tr><td>35</td><td>GND</td><td>36</td><td>GND</td></tr><tr><td>37</td><td>NC</td><td>38</td><td>NC</td></tr><tr><td>39</td><td>NC</td><td>40</td><td>NC</td></tr></table>

# 5.5.1 RS-232 to 422/485 Pin Comparison in DB9 Connector

<table><tr><td>Pin</td><td>RS232</td><td>RS422</td><td>RS485</td></tr><tr><td>1</td><td>DCD#</td><td>TXD-</td><td>DATA-</td></tr><tr><td>2</td><td>RX</td><td>TXD+</td><td>DATA+</td></tr><tr><td>3</td><td>TX</td><td>RXD+</td><td></td></tr><tr><td>4</td><td>DTR#</td><td>RXD-</td><td></td></tr><tr><td>5</td><td>GND</td><td>GND</td><td></td></tr><tr><td>6</td><td>DSR#</td><td></td><td></td></tr><tr><td>7</td><td>RTS#</td><td></td><td></td></tr><tr><td>8</td><td>CTS#</td><td></td><td></td></tr><tr><td>9</td><td>RI#</td><td></td><td></td></tr></table>

# 5.6 DI/DO/USB2/Audio Combo Header

DO signal has PH \*P\_+5V\_S0” on MB side, output current is 5mA. DI signal only has one pull down 100k on MB side. 2x USB2 signals are for internal use.

Audio: 1x line-in, 1x line-out, MIC-in

<table><tr><td>Pin</td><td>Name</td><td>Pin</td><td>Name</td></tr><tr><td>1</td><td>CN_DO0</td><td>2</td><td>CN_DO4</td></tr><tr><td>3</td><td>CN_DO1</td><td>4</td><td>CN_DO5</td></tr><tr><td>5</td><td>CN_DO2</td><td>6</td><td>CN_DO6</td></tr><tr><td>7</td><td>CN_DO3</td><td>8</td><td>CN_DO7</td></tr><tr><td>9</td><td>CN_DI0</td><td>10</td><td>CN_DI4</td></tr><tr><td>11</td><td>CN_DI1</td><td>12</td><td>CN_DI5</td></tr><tr><td>13</td><td>CN_DI2</td><td>14</td><td>CN_DI6</td></tr><tr><td>15</td><td>CN_DI3</td><td>16</td><td>CN_DI7</td></tr><tr><td>17</td><td>GND</td><td>18</td><td>GND</td></tr><tr><td>19</td><td>P_+5V_DDR5</td><td>20</td><td>U2_USB4_N_C</td></tr><tr><td>21</td><td>P_+5V_DDR5</td><td>22</td><td>U2_USB4_P_C</td></tr><tr><td>23</td><td>GND</td><td>24</td><td>GND</td></tr><tr><td>25</td><td>GND_AUD</td><td>26</td><td>U2_USB3_N_C</td></tr><tr><td>27</td><td>LINE1_JD</td><td>28</td><td>U2_USB3_P_C</td></tr><tr><td>29</td><td>LINL</td><td>30</td><td>GND</td></tr><tr><td>31</td><td>LINR</td><td>32</td><td>GND_AUD</td></tr><tr><td>33</td><td>MIC1_JD</td><td>34</td><td>FRONT_JD</td></tr><tr><td>35</td><td>MIC1L</td><td>36</td><td>LOUTL</td></tr><tr><td>37</td><td>MIC1R</td><td>38</td><td>LOUTR</td></tr><tr><td>39</td><td>GND_AUD</td><td>40</td><td>GND_AUD</td></tr></table>

# 5.7 M.2 Key-B

M.2 Key-B connector supports 3042-size card, and supports 1 Nano SIM.

This connector only supports Key-B card, and not B+M card.

<table><tr><td>Pin</td><td>Name</td><td>Pin</td><td>Name</td></tr><tr><td>1</td><td>M2B_CONFIG_3</td><td>2</td><td>P_+3V3_NGFF_B</td></tr><tr><td>3</td><td>GND</td><td>4</td><td>P_+3V3_NGFF_B</td></tr><tr><td>5</td><td>GND</td><td>6</td><td>PU 100K to P_+3V3_NGFF_B</td></tr><tr><td>7</td><td>U2_USB10_P</td><td>8</td><td>NC</td></tr><tr><td>9</td><td>U2_USB10_N</td><td>10</td><td>NC</td></tr><tr><td>11</td><td>GND</td><td></td><td></td></tr><tr><td>21</td><td>M2B_CONFIG_0</td><td>20</td><td>NC</td></tr><tr><td>23</td><td>NC</td><td>22</td><td>NC</td></tr><tr><td>25</td><td>NC</td><td>24</td><td>NC</td></tr><tr><td>27</td><td>GND</td><td>26</td><td>W_DISABLE2#</td></tr><tr><td>29</td><td>U3_P2_RX_N</td><td>28</td><td>NC</td></tr><tr><td>31</td><td>U3_P2_RX_P</td><td>30</td><td>UIM_RST</td></tr><tr><td>33</td><td>GND</td><td>32</td><td>UIM_CLK</td></tr><tr><td>35</td><td>U3_P2_TX_N</td><td>34</td><td>UIM_DATA</td></tr><tr><td>37</td><td>U3_P2_TX_P</td><td>36</td><td>P_UIM_PWR</td></tr><tr><td>39</td><td>GND</td><td>38</td><td>NC</td></tr><tr><td>41</td><td>X_PCIEX1_P1_RX_N</td><td>40</td><td>NC</td></tr><tr><td>43</td><td>X_PCIEX1_P1_RX_P</td><td>42</td><td>NC</td></tr><tr><td>45</td><td>GND</td><td>44</td><td>NC</td></tr><tr><td>47</td><td>X_PCIEX1_P1_TX_N</td><td>46</td><td>NC</td></tr><tr><td>49</td><td>X_PCIEX1_P1_TX_P</td><td>48</td><td>NC</td></tr><tr><td>51</td><td>GND</td><td>50</td><td>PCH_PLTRST-L_BUF</td></tr><tr><td>53</td><td>C_REFCLK_P5_100M_N</td><td>52</td><td>PCH_CLK_REQ_P5_N</td></tr><tr><td>55</td><td>C_REFCLK_P5_100M_P</td><td>54</td><td>NC</td></tr><tr><td>57</td><td>GND</td><td>56</td><td>NC</td></tr><tr><td>59</td><td>NC</td><td>58</td><td>NC</td></tr><tr><td>61</td><td>NC</td><td>60</td><td>NC</td></tr><tr><td>63</td><td>NC</td><td>62</td><td>NC</td></tr><tr><td>65</td><td>NC</td><td>64</td><td>NC</td></tr><tr><td>67</td><td>NC</td><td>66</td><td>UIM_DET</td></tr><tr><td>69</td><td>M2B_CONFIG_1</td><td>68</td><td>NC</td></tr><tr><td>71</td><td>GND</td><td>70</td><td>P_+3V3_NGFF_B</td></tr><tr><td>73</td><td>GND</td><td>72</td><td>P_+3V3_NGFF_B</td></tr><tr><td>75</td><td>M2B_CONFIG_2</td><td>74</td><td>P_+3V3_NGFF_B</td></tr></table>

5.8 Nano SIM

<table><tr><td>Pin</td><td>Name</td></tr><tr><td>C1</td><td>P_UIM_PWR</td></tr><tr><td>C2</td><td>UIM_RST</td></tr><tr><td>C3</td><td>UIM_CLK</td></tr><tr><td>C5</td><td>GND</td></tr><tr><td>C6</td><td>NC</td></tr><tr><td>C7</td><td>UIM_DATA</td></tr></table>

# 5.9 M.2 Key-M

M.2 Key-M 2280 connector supports PCIe Gen4 x4

<table><tr><td>Pin</td><td>Name</td><td>Pin</td><td>Name</td></tr><tr><td>1</td><td>GND</td><td>2</td><td>P_+3V3_M.2_M</td></tr><tr><td>3</td><td>GND</td><td>4</td><td>P_+3V3_M.2_M</td></tr><tr><td>5</td><td>PCIE4_B_P3_RX_N</td><td>6</td><td>NC</td></tr><tr><td>7</td><td>PCIE4_B_P3_RX_P</td><td>8</td><td>NC</td></tr><tr><td>9</td><td>GND</td><td>10</td><td>M2M_LED</td></tr><tr><td>11</td><td>PCIE4_B_P3_TX_N</td><td>12</td><td>P_+3V3_M.2_M</td></tr><tr><td>13</td><td>PCIE4_B_P3_TX_P</td><td>14</td><td>P_+3V3_M.2_M</td></tr><tr><td>15</td><td>GND</td><td>16</td><td>P_+3V3_M.2_M</td></tr><tr><td>17</td><td>PCIE4_B_P2_RX_N</td><td>18</td><td>P_+3V3_M.2_M</td></tr><tr><td>19</td><td>PCIE4_B_P2_RX_P</td><td>20</td><td>NC</td></tr><tr><td>21</td><td>GND</td><td>22</td><td>NC</td></tr><tr><td>23</td><td>PCIE4_B_P2_TX_N</td><td>24</td><td>NC</td></tr><tr><td>25</td><td>PCIE4_B_P2_TX_P</td><td>26</td><td>NC</td></tr><tr><td>27</td><td>GND</td><td>28</td><td>NC</td></tr><tr><td>29</td><td>PCIE4_B_P1_RX_N</td><td>30</td><td>NC</td></tr><tr><td>31</td><td>PCIE4_B_P1_RX_P</td><td>32</td><td>NC</td></tr><tr><td>33</td><td>GND</td><td>34</td><td>NC</td></tr><tr><td>35</td><td>PCIE4_B_P1_TX_N</td><td>36</td><td>NC</td></tr><tr><td>37</td><td>PCIE4_B_P1_TX_P</td><td>38</td><td>NC</td></tr><tr><td>39</td><td>GND</td><td>40</td><td>NC</td></tr><tr><td>41</td><td>PCIE4_B_P0_RX_N</td><td>42</td><td>NC</td></tr><tr><td>43</td><td>PCIE4_B_P0_RX_P</td><td>44</td><td>NC</td></tr><tr><td>45</td><td>GND</td><td>46</td><td>NC</td></tr><tr><td>47</td><td>PCIE4_B_P0_TX_N</td><td>48</td><td>NC</td></tr><tr><td>49</td><td>PCIE4_B_P0_TX_P</td><td>50</td><td>PCH_PLTRST-L_BUF</td></tr><tr><td>51</td><td>GND</td><td>52</td><td>PCH_CLK_REQ_P3_N</td></tr><tr><td>53</td><td>C_REFCLK_P3_100M_N</td><td>54</td><td>NC</td></tr><tr><td>55</td><td>C_REFCLK_P3_100M_P</td><td>56</td><td>NC</td></tr><tr><td>57</td><td>GND</td><td>58</td><td>NC</td></tr><tr><td>67</td><td>NC</td><td>68</td><td>NC</td></tr><tr><td>69</td><td>M2M_CONFIG_1</td><td>70</td><td>P_+3V3_M.2_M</td></tr><tr><td>71</td><td>GND</td><td>72</td><td>P_+3V3_M.2_M</td></tr><tr><td>73</td><td>GND</td><td>74</td><td>P_+3V3_M.2_M</td></tr><tr><td>75</td><td>GND</td><td></td><td></td></tr></table>

# 5.10 M.2 Key-E

M.2 Key-E connector supports 2230-size card.

<table><tr><td>Pin</td><td>Name</td><td>Pin</td><td>Name</td></tr><tr><td>1</td><td>GND</td><td>2</td><td>P_+3V3_M.2_E</td></tr><tr><td>3</td><td>U2_USB9_P</td><td>4</td><td>P_+3V3_M.2_E</td></tr><tr><td>5</td><td>U2_USB9_N</td><td>6</td><td>NC</td></tr><tr><td>7</td><td>GND</td><td>8</td><td>NC</td></tr><tr><td>9</td><td>NC</td><td>10</td><td>NC</td></tr><tr><td>11</td><td>NC</td><td>12</td><td>NC</td></tr><tr><td>13</td><td>NC</td><td>14</td><td>NC</td></tr><tr><td>15</td><td>NC</td><td>16</td><td>NC</td></tr><tr><td>17</td><td>NC</td><td>18</td><td>GND</td></tr><tr><td>19</td><td>NC</td><td>20</td><td>NC</td></tr><tr><td>21</td><td>NC</td><td>22</td><td>NC</td></tr><tr><td>23</td><td>NC</td><td></td><td></td></tr><tr><td>33</td><td>GND</td><td>32</td><td>NC</td></tr><tr><td>35</td><td>X_PCIEX1_P0_TX_P</td><td>34</td><td>NC</td></tr><tr><td>37</td><td>X_PCIEX1_P0_TX_N</td><td>36</td><td>NC</td></tr><tr><td>39</td><td>GND</td><td>38</td><td>NC</td></tr><tr><td>41</td><td>X_PCIEX1_P0_RX_P</td><td>40</td><td>NC</td></tr><tr><td>43</td><td>X_PCIEX1_P0_RX_N</td><td>42</td><td>NC</td></tr><tr><td>45</td><td>GND</td><td>44</td><td>NC</td></tr><tr><td>47</td><td>C_REFCLK_P4_100M_P</td><td>46</td><td>NC</td></tr><tr><td>49</td><td>C_REFCLK_P4_100M_N</td><td>48</td><td>NC</td></tr><tr><td>51</td><td>GND</td><td>50</td><td>NC</td></tr><tr><td>53</td><td>PCH_CLK_REQ_P4_N</td><td>52</td><td>PCH_PLTRST-L_BUF</td></tr><tr><td>55</td><td>NC</td><td>54</td><td>BT_DISABLE#</td></tr><tr><td>57</td><td>GND</td><td>56</td><td>WIFI_DISABLE#</td></tr><tr><td>59</td><td>NC</td><td>58</td><td>NC</td></tr><tr><td>61</td><td>NC</td><td>60</td><td>NC</td></tr><tr><td>63</td><td>GND</td><td>62</td><td>NC</td></tr><tr><td>65</td><td>NC</td><td>64</td><td>NC</td></tr><tr><td>67</td><td>NC</td><td>66</td><td>NC</td></tr><tr><td>69</td><td>GND</td><td>68</td><td>NC</td></tr><tr><td>71</td><td>NC</td><td>70</td><td>NC</td></tr><tr><td>73</td><td>NC</td><td>72</td><td>P_+3V3_M.2_E</td></tr><tr><td>75</td><td>GND</td><td>74</td><td>P_+3V3_M.2_E</td></tr></table>

# 5.11 SATA connector

<table><tr><td rowspan="5">&lt;img src="images/1d88885137fc29e28737c8d44208413f50141602874afa497bce52b62e7aaf10.jpg"/&gt;</td><td>Pin</td><td>Signal Name</td><td>Pin</td><td>Signal Name</td></tr><tr><td>P1</td><td>GND</td><td>P5</td><td>SATA3_P1_RX_N</td></tr><tr><td>P2</td><td>SATA3_P1_TX_P</td><td>P6</td><td>SATA3_P1_RX_P</td></tr><tr><td>P3</td><td>SATA3_P1_TX_N</td><td>P7</td><td>GND</td></tr><tr><td>P4</td><td>GND</td><td></td><td></td></tr></table>

# 5.11.1 SATA Power Connector

![Pin1\n2.00\nA](.sbc35-rpl-50m-47300-1010-11/1ef8328c04119070d857292130a0097eee551f5fa4d2bc26e873a886fce0ac5a.jpg)

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>P1</td><td>P_+5V_S0</td></tr><tr><td>P2</td><td>GND</td></tr></table>

#

![Pin1\n4.30±0.15\n1.00±0.15\n1.25±0.05\n①※](.sbc35-rpl-50m-47300-1010-11/5c5b0c36c2360773d5a578459c9dc0c2ee0032034793faac21dc3b878823e355.jpg)

<table><tr><td>Pin</td><td>Signal Name</td></tr><tr><td>P1</td><td>GND</td></tr><tr><td>P2</td><td>5V IN PWR</td></tr><tr><td>P3</td><td>FAN TACH</td></tr><tr><td>P4</td><td>FAN PWM</td></tr></table>

# 5.13 USB Connector

There are two USB3.2 Gen2 Ports on front panel, 3x USB 2.0 via headers.

USB3.2 Gen 2 ports provide over current protect design, 1A current.

# 5.14 SBC-FM Connector

SBC-FM connector is reserved for I/O expansion flexibility through FPC.

Manufacturer: HIROSE

MFG P/N: FH34SRJ-50S-0.5SH

ADLINK P/N: 61-02010-0500

Location: FPC

<table><tr><td colspan="6">SBC-NetworkFM Connector Pin Define</td></tr><tr><td></td><td>Signal Name</td><td>Pin#</td><td>Pin#</td><td>Signal Name</td><td></td></tr><tr><td rowspan="16">PCIE4</td><td>PCIE4_A_P3_TX_P</td><td>1</td><td>26</td><td>PCH_CLK_REQ_P6_N</td><td>PCIE3 CLK Request</td></tr><tr><td>PCIE4_A_P3_TX_P</td><td>2</td><td>27</td><td>U3_P3_TX_P</td><td rowspan="4">USB3.0</td></tr><tr><td>PCIE4_A_P2_TX_P</td><td>3</td><td>28</td><td>U3_P3_TX_N</td></tr><tr><td>PCIE4_A_P2_TX_N</td><td>4</td><td>29</td><td>U3_P3_RX_P</td></tr><tr><td>PCIE4_A_P1_TX_P</td><td>5</td><td>30</td><td>U3_P3_RX_N</td></tr><tr><td>PCIE4_A_P1_TX_N</td><td>6</td><td>31</td><td>U2_USB0_P_C</td><td rowspan="2">USB2.0</td></tr><tr><td>PCIE4_A_P0_TX_P</td><td>7</td><td>32</td><td>U2_USB0_N_C</td></tr><tr><td>PCIE4_A_P0_TX_N</td><td>8</td><td>33</td><td>LPC_CLK</td><td rowspan="8">LPC</td></tr><tr><td>PCIE4_A_P3_RX_P</td><td>9</td><td>34</td><td>LPC_AD3</td></tr><tr><td>PCIE4_A_P3_RX_N</td><td>10</td><td>35</td><td>LPC_AD2</td></tr><tr><td>PCIE4_A_P2_RX_P</td><td>11</td><td>36</td><td>LPC_AD1</td></tr><tr><td>PCIE4_A_P2_RX_N</td><td>12</td><td>37</td><td>LPC_AD0</td></tr><tr><td>PCIE4_A_P1_RX_P</td><td>13</td><td>38</td><td>LPC_LFRAME#</td></tr><tr><td>PCIE4_A_P1_RX_N</td><td>14</td><td>39</td><td>LPC_SERIRQ</td></tr><tr><td>PCIE4_A_P0_RX_P</td><td>15</td><td>40</td><td>LPC_LRESET#</td></tr><tr><td>PCIE4_A_P0_RX_N</td><td>16</td><td>41</td><td>PCIE_WAKE-L</td><td>PCIE Wake</td></tr><tr><td>PCIE4 CLK Request</td><td>PCH_CLK_REQ_P0_N</td><td>17</td><td>42</td><td>PCH_SLP_S3_N</td><td>PCH_SLP3</td></tr><tr><td rowspan="2">PCIE4 CLK</td><td>C_PCIECLK_P0_100M_P</td><td>18</td><td>43</td><td>PCH_PLTRST-L_BUF</td><td>PCH_PLTRST</td></tr><tr><td>C_PCIECLK_P0_100M_N</td><td>19</td><td>44</td><td>SMB_CLK_S</td><td rowspan="3">SMB</td></tr><tr><td rowspan="4">PCIE3</td><td>X_PCIEX10_FM_TX_P</td><td>20</td><td>45</td><td>SMB_DAT_S</td></tr><tr><td>X_PCIEX10_FM_TX_N</td><td>21</td><td>46</td><td>PCH_SMB_ALERT-L</td></tr><tr><td>X_PCIEX10_FM_RX_P</td><td>22</td><td>47</td><td>GND</td><td>GND</td></tr><tr><td>X_PCIEX10_FM_RX_N</td><td>23</td><td>48</td><td>P_+3V3_A</td><td rowspan="2">3.3V PWR(Standby)</td></tr><tr><td rowspan="2">PCIE3 CLK</td><td>C_REFCLK_P6_100M_P</td><td>24</td><td>49</td><td>P_+3V3_A</td></tr><tr><td>C_REFCLK_P6_100M_N</td><td>25</td><td>50</td><td>GND</td><td>GND</td></tr><tr><td></td><td></td><td></td><td>51</td><td>GND</td><td>GND</td></tr></table>

# 5.14.1 SBC-FM Power Connector

Manufacturer: JVE

MFG P/N: 24W1125A-04M00-01T-1-CF01

ADLINK P/N: 61-6AJ0X-1040

Location: FM\_PWR

<table><tr><td rowspan="5">&lt;img src="images/7f0c8e068a67e9eff713b777c6a84ed5790f0bd9acb6af98a8983ad7b46f048e.jpg"/&gt;</td><td>Pin</td><td>Signal Name</td></tr><tr><td>P1</td><td rowspan="2">P_+VIN_S (Standby)</td></tr><tr><td>P2</td></tr><tr><td>P3</td><td>GND</td></tr><tr><td>P4</td><td>GND</td></tr></table>

# 6 BIOS Setup

# 6.1 Menu Structure

This section presents the primary menus of the AMIBIOS® EFI BIOS setup utility. Use the following table as a quick reference for the contents of the BIOS Setup Utility. The subsections describe the submenus and options for each menu item.

To enter the BIOS Setup Utility:

• Press [Delete] or [Del] during POST (Power-On-Self-Test)

<table><tr><td>Main</td><td>Advanced</td><td>Chipset</td></tr><tr><td>Sets up the system time/date and displays the system information:- System Date- System Time</td><td>Contains advanced system configurations, including:- CPU Configuration- Power Management- Serial Console Redirection- USB Configuration- TPM 2.0 Configuration- Onboard Devices Configuration- Hardware Monitor- BIOS Watchdog Timer- Network Stake Configuration- Intel® Ethernet Controller (3) I225-V</td><td>Displays chipset configuration, including:- System Agent (SA) Configuration- PCH-I/O Configuration</td></tr><tr><td>Security</td><td>Boot</td><td>Save &amp; Exit</td></tr><tr><td>Changes or clears the administrator/user password for the system- Administrator Password- User Password- Secure Boot menu- Security Configuration</td><td>Configures the boot settings and boot priority for available devices- Boot Option #1,2,3,4,5,6,7,8,9,10,11- Setup Prompt Timeout- Bootup Num-Lock- Quiet Boot- Fast Boot</td><td>Exits the BIOS Setup Utility while saving or discard the changes made- Save Changes and Exit- Discard Changes and Exit- Save Changes and Reset- Discard Changes and Reset- Save Changes- Discard Changes- Restore Defaults- Save as User Defaults- Restore User Defaults- Launch EFI Shell from filesystem device</td></tr><tr><td>MEBx</td><td></td><td></td></tr><tr><td>- Intel(R) ME Password</td><td>-</td><td>-</td></tr></table>

# 6.2 Main Menu

Upon entering the BIOS Setup Utility, the Main Menu is displayed, providing read-only information about your system and also allows you to set the System Date and Time. Refer to the tables below for details of the submenus and settings.

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>System Date</td><td>xxx mm/dd/yyyy</td><td>Sets the date. Use Tab to switch between date elements.</td></tr><tr><td>System Time</td><td>hh:mm:ss</td><td>Sets the time. Use Tab to switch between time elements.</td></tr></table>

# 6.3 Advanced Menu

This menu contains the settings for most of the user interfaces in the system.

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>▶ CPU Configuration</td><td></td><td>CPU Configuration</td></tr><tr><td>▶ Power Management</td><td></td><td>System ACPI Parameters</td></tr><tr><td>▶ Serial Console Redirection</td><td></td><td>Serial Console Redirection</td></tr><tr><td>▶ USB Configuration</td><td></td><td>USB Configuration Parameters</td></tr><tr><td>▶ TPM 2.0 Configuration</td><td></td><td>TPM 2.0 Configuration</td></tr><tr><td>▶ Onboard Devices Configuration</td><td></td><td>Onboard Device Parameters</td></tr><tr><td>▶ Hardware Monitor</td><td></td><td>Monitor hardware status</td></tr><tr><td>▶ BIOS Watchdog Timer</td><td></td><td>BIOS Watch Dog Configuration</td></tr><tr><td>▶ Network Stack Configuration</td><td></td><td>Network Stack Settings</td></tr><tr><td>▶ Intel® Ethernet Controller I225-V</td><td></td><td>Configure Gigabit Ethernet device parameters</td></tr></table>

6.3.1 Advanced > CPU Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Hyper-threading</td><td>EnabledDisabled</td><td>Enable or Disable Hyper-Threading Technology</td></tr><tr><td>Active Performance-cores</td><td>All76543210</td><td>Number of P-cores to enable in each processor package. Note: Number of Cores and E-cores are looked at together. When both are {0,0}, Pcode will enable all cores.</td></tr><tr><td>Active Efficient-cores</td><td>All76543210</td><td>Number of E-cores to enable in each processor package. Note: Number of Cores and E-cores are looked at together. When both are {0,0}, Pcode will enable all cores.</td></tr><tr><td>Intel (VMX) Virtualization Technology</td><td>EnabledDisabled</td><td>When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.</td></tr><tr><td>Intel(R) SpeedStep(TM)</td><td>EnabledDisabled</td><td>Allow more than two frequency ranges to be supported.</td></tr><tr><td>Intel(R) Speed Shift Technology</td><td>EnabledDisabled</td><td>Enable/Disable Intel(R) Speed Shift Technology Support. Enabling will expose the CPPC v2 interface to allow for hardware controlled P-states.</td></tr><tr><td>C states</td><td>DisabledEnabled</td><td>Enable/Disable CPU Power Management. Allows CPU to go to C states when it&#x27;s not 100% utilized.</td></tr></table>

6.3.2 Advanced > Power Management

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Power Supply Unit</td><td>ATX ModeEmulate AT Mode</td><td>Select Emulation AT or ATX function. If this option set to [Emulation AT], BIOS will report no suspend functions (S3 &amp; S4) to ACPI OS. In windows XP, it will make OS show shutdown message during system shutdown. ATX: OS will turn off system power when shutdown.</td></tr><tr><td>State After G3</td><td>S0 StateS5 State</td><td>Specify what state to go to when power is re-applied after a power failure (G3 states).</td></tr><tr><td>RTC Wake system from S5</td><td>DisabledFixed TimeDynamic Time</td><td>Enable or disable System wake on alarm event. Select FixedTime, system will wake on the hr::min::sec specified. Select DynamicTime, system will wake on the current time + Increase minutes(S).</td></tr><tr><td>Wake up hour</td><td>0</td><td>Range: 0-23 hr For example enter 3 for 3am and 15 for 3pm</td></tr><tr><td>Wake up minute</td><td>0</td><td>Range: 0-59 min</td></tr><tr><td>Wake up second</td><td>0</td><td>Range: 0-59 sec</td></tr><tr><td>Wake up minute increase</td><td>0</td><td>Range: 1-5 min</td></tr><tr><td>PCIe Wake</td><td>EnabledDisabled</td><td>Enable or disable PCI Express wake capability.</td></tr></table>

6.3.3 Advanced > Serial Console Redirection

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Console Redirection</td><td>DisabledEnabled</td><td>Console Redirection Enable or Disable</td></tr><tr><td>Terminal Type</td><td>ANSIVT100VT100PlusVT-UTF8</td><td>Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set. VT100Plus: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes.</td></tr><tr><td>Bites per second</td><td>1152009600192003840057600</td><td>Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds.</td></tr><tr><td>Data Bits</td><td>87</td><td>Data Bites</td></tr><tr><td>Parity</td><td>NoneEvenOddMarkSpace</td><td>A parity bit can be sent with the data bits to detect some transmission errors. Even: parity bit is 0 if the num of 1's in the data bits is even. Odd: parity bit is 0 if num of 1's in the data bits is odd. Mark: parity bit is always 1. Space: Parity bit isalways 0. Mark and Space Parity do not allow for error detection.</td></tr><tr><td>Stop Bits</td><td>12</td><td>Stop bits indicates the end of a serial data packet. (A stat bit indicates the beginning). The standard setting is 1 stop bit. Communication with slow devices may require more than 1 stop bit.</td></tr><tr><td>Flow Control</td><td>NoneHardware RTS/CTS</td><td>Flow control can prevent data loss from buffer overflow. When sending data, if the receiving buffers are full, a ‘stop’ signal can be sent to stop the data flow. Once the buffers are empty, a ‘start’ signal can be sent to re-start the flow. Hardware flow control uses tow wires to send start/stop signals.</td></tr><tr><td>VT-UTF8 Combo Key Support</td><td>EnabledDisabled</td><td>Enabled VT-UTF8 Combination Key Support for ANSI/VT100 terminals.</td></tr><tr><td>Recorder Mode</td><td>DisabledEnabled</td><td>With the mode enabled only text will be sent. This is to capture Terminal data.</td></tr><tr><td>Resolution 100x31</td><td>DisabledEnabled</td><td>Enables or disables extended terminal resolution.</td></tr><tr><td>Putty KeyPad</td><td>VT100LINUXXTERMR6SCOESCNVT400</td><td>Select FunctionKey and KeyPad on Putty.</td></tr></table>

6.3.4 Advanced > USB Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>USB Mass Storage Driver Support</td><td>EnabledDisabled</td><td>Enable/Disable USB Mass Storage Driver Support</td></tr><tr><td>USB transfer time-out</td><td>20 sec1 sec5 sec10 sec</td><td>The time-out value for Control, Bulk, and Interrupt transfers.</td></tr><tr><td>Device reset time-out</td><td>20 sec10 sec30 sec40 sec</td><td>USB mass storage device Start Unit command time-out.</td></tr><tr><td>Device power-up delay</td><td>AutoManual</td><td>Maximum time the device will take before it properly reports itself to the Host Controller. ‘Auto’ uses default value: for a Root port it is 100 ms, for a Hub port the delay is taken from Hub descriptor.</td></tr></table>

# 6.3.5 Advanced > TPM 2.0 Configuration

Make sure you have discrete TPM onboard before selecting dTPM item.

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Security Device Support</td><td>EnableDisable</td><td>Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available.</td></tr><tr><td>SHA256 PCR Bank</td><td>EnabledDisabled</td><td>Enable or Disable SHA256 PCR Bank</td></tr><tr><td>SHA384 PCR Bank</td><td>DisabledEnabled</td><td>Enable or Disable SHA384 PCR Bank</td></tr><tr><td>Pending operation</td><td>NoneTPM Clear</td><td>Schedule an Operation for the Security Device. NOTE: Your computer will reboot during restart in order to change State of Security Device.</td></tr><tr><td>Platform Hierarchy</td><td>EnabledDisabled</td><td>Enable or Disable Platform Hierarchy</td></tr><tr><td>Storage Hierarchy</td><td>EnabledDisabled</td><td>Enable or Disable Storage Hierarchy</td></tr><tr><td>Endorsement Hierarchy</td><td>EnabledDisabled</td><td>Enable or Disable Endorsement Hierarchy</td></tr><tr><td>Physical Presence Spec Version</td><td>1.31.2</td><td>Select to Tell O.S. to support PPI Spec Version 1.2 or 1.3. Note some HCK tests might not support 1.3.</td></tr><tr><td>PH Randomization</td><td>EnabledDisabled</td><td>Enables or Disables Platform Hierarchy randomization. DO NOT ENABLE THIS QUESTION IN</td></tr></table>

6.3.6 Advanced > Onboard Devices Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>COM1 Mode Control</td><td>RS232RS422RS485</td><td>Select COM1 mode. RS232, RS422, RS485</td></tr><tr><td>COM2 Mode Control</td><td>RS232RS422RS485</td><td>Select COM1 mode. RS232, RS422, RS485</td></tr><tr><td>LAN #1</td><td>EnabledDisabled</td><td>Enable/Disable</td></tr><tr><td>LAN #2</td><td>EnabledDisabled</td><td>Enable/Disable</td></tr></table>

6.3.7 Advanced > NCT6126D Hardware Monitor

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>CPU Fan Control Mode(Fan 1)</td><td>SMART FAN IVManual mode</td><td>Configure Fan Control Mode. Select Manual Mode, user can configure a fix fan duty. Select SMART FAN IV, user can configure 4 temperatures and 4 fan duties. Select Auto Mode, FAN will run at automatic speed with thermal.</td></tr><tr><td>Manual PWM</td><td>128</td><td></td></tr><tr><td>Temperature 1</td><td>30</td><td>The value of temperature1.</td></tr><tr><td>Percent of full FD/RPM 1</td><td>30</td><td>The value of Fan Duty/RPM when temperature is T1.</td></tr><tr><td>Temperature 2</td><td>43</td><td>The value of temperature2.</td></tr><tr><td>Percent of full FD/RPM 2</td><td>50</td><td>The value of Fan Duty/RPM when temperature is T2.</td></tr><tr><td>Temperature 3</td><td>53</td><td>The value of temperature3.</td></tr><tr><td>Percent of full FD/RPM 3</td><td>80</td><td>The value of Fan Duty/RPM when temperature is T3.</td></tr><tr><td>Temperature 4</td><td>60</td><td>The value of temperature4.</td></tr><tr><td>Percent of full FD/RPM 4</td><td>100</td><td>The value of Fan Duty/RPM when temperature is T4.</td></tr><tr><td>Critical Temperature</td><td>61</td><td>Fan temperature critical value.</td></tr></table>

6.3.8 Advanced > BIOS Watchdog Timer

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>BIOS POST Watchdog</td><td>DisabledSecond ModeMinute Mode</td><td>1. Disable: Disable WatchDog Timer; 2. Second Mode: Enable Watchdog Timer in second mode;3. Minute Mode: Enable Watchdog Timer in minute mode.</td></tr><tr><td>BIOS Watchdog Timer</td><td>1</td><td>Set watchdog timer for BIOS POST process.Minute Mode</td></tr><tr><td>BIOS Watchdog Timer</td><td>15</td><td>Set watchdog timer for BIOS POST process.Second Mode</td></tr></table>

6.3.9 Advanced > Network Stack Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Network Stack</td><td>DisabledEnabled</td><td>Enable/Disable UEFI Network Stack</td></tr><tr><td>IPv4 PXE Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv4 PXE boot support. If disabled, IPv4 PXE boot support will not be available.</td></tr><tr><td>IPv4 HTTP Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv4 HTTP boot support. If disabled, IPv4 HTTP boot support will not be available.</td></tr><tr><td>IPv6 PXE Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv6 PXE boot support. If disabled, IPv6 PXE boot support will not be available.</td></tr><tr><td>IPv6 HTTP Support</td><td>DisabledEnabled</td><td>Enable/Disable IPv6 HTTP boot support. If disabled, IPv6 HTTP boot support will not be available.</td></tr><tr><td>PXE boot wait time</td><td>0</td><td>Wait time in seconds to press ESC key to abort the PXE boot. Use either +/- or numeric keys to set the value.</td></tr><tr><td>Media detect count</td><td>1</td><td>Number of times the presence of media will be checked. Use either +/- or numeric keys to set the value.</td></tr></table>

6.4 Chipset

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>► System (SA) Configuration</td><td></td><td>System Agent (SA) Parameters</td></tr><tr><td>► PCH-IO Configuration</td><td></td><td>PCH Parameters</td></tr><tr><td>PCH digital I/O device</td><td>DisabledEnable</td><td>Disable/Enable ACPI GPIO Device support for PCH digital I/O and user LED</td></tr></table>

6.4.1 Chipset > System Agent (SA) Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>▶ Memory Configuration</td><td></td><td>Memory Configuration Parameters</td></tr><tr><td>▶ Graphics Configuration</td><td></td><td>Graphics Configuration</td></tr><tr><td>VT-d</td><td>EnabledDisabled</td><td>VT-d capability</td></tr></table>

6.4.2 Chipset > Graphics Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Primary Display</td><td>IGFXAutoPEG SlotPCH PCI</td><td>Select which of IGFX/PEG/PCI Graphics device should be Primary Display or select HG for Hybrid Gfx.</td></tr><tr><td>Internal Graphics</td><td>EnabledAutoDisabled</td><td>Keep IGFX enabled based on the setup options.</td></tr><tr><td>GTT Size</td><td>8MB2MB4MB</td><td>Select the GTT Size</td></tr><tr><td>Aperture Size</td><td>256MB128MB512MB1024MB2048MB</td><td>Select the Aperture SizeNote : Above 4GB MMIO BIOS assignment is automatically enabled when selecting &gt; 2048MB aperture. To use this feature, please disable CSM Support.</td></tr><tr><td>DVMT Pre-Allocated</td><td>32M4M8M16M64M</td><td>Select DVMT 5.0 Pre-Allocated (Fixed) Graphics Memory size used by the Internal Graphics Device</td></tr></table>

6.4.3 Chipset > PCH-IO Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>▶ SATA Configuration</td><td></td><td>SATA Device Options Settings</td></tr><tr><td>▶ NVMe Configuration</td><td></td><td>NVMe Device Options Settings</td></tr></table>

6.4.3.1. Chipset > PCH-IO Configuration > SATA Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>SATA Mode Selection</td><td>AHCI</td><td>Determines how SATA controller(s) operate.</td></tr><tr><td>SATA Controller Speed</td><td>Gen3DefaultGen1Gen2</td><td>Indicates the maximum speed the SATA controller can support.</td></tr><tr><td>Serial ATA Port 1</td><td>EnabledDisabled</td><td>Enable or Disable SATA Port</td></tr></table>

6.5 Security

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Administrator Password</td><td></td><td>Set Administrator Password</td></tr><tr><td>User Password</td><td></td><td>Set User Password</td></tr><tr><td>▶ Secure Boot menu</td><td></td><td>Secure Boot configuration</td></tr><tr><td>▶ Security Configuration</td><td></td><td>Security Configuration settings</td></tr></table>

6.5.1 Security > Secure Boot Menu

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Secure Boot Control</td><td>DisabledEnabled</td><td>Secure Boot feature is Active if Secure Boot is Enabled, Platform key(PK) is enrolled and the system is in User mode. The mode change requires platform reset.</td></tr><tr><td>Secure Boot Mode</td><td>StandardCustom</td><td>Secure Boot mode options: Standard or Custom.In Custom mode, Secure Boot Policy variables can be configured by a physically present user without full authentication</td></tr></table>

6.5.2 Security > Security Configuration

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>BIOS Lock</td><td>EnabledDisabled</td><td>Enable/Disable the PCH BIOS Lock Enable feature. Required to be enabled to ensure SMM protect of flash.</td></tr></table>

6.6 Boot

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Setup Prompt Timeout</td><td>1</td><td>Number of seconds to wait for setup activation key. The maximum value is 8.</td></tr><tr><td>Bootup NumLock State</td><td>OffOn</td><td>Select the keyboard NumLock state</td></tr><tr><td>Quiet Boot</td><td>EnabledDisabled</td><td>Enables or disables Quiet Boot option</td></tr><tr><td>Fast Boot</td><td>Disable LinkEnabled</td><td>Enables or disables boot with initialization of a minimal set of devices required to launch active boot option. Has no effect for BBS boot options.</td></tr><tr><td>Boot Option #1</td><td>Hard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #2</td><td>NVMEHard DiskUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #3</td><td>UEFI APHard DiskNVMECD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #4</td><td>CD/DVDHard DiskNVMEUEFI APSDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #5</td><td>SDHard DiskNVMEUEFI APCD/DVDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #6</td><td>USB Hard DiskHard DiskNVMEUEFI APCD/DVDSDUSB CD/DVDUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #7</td><td>USB CD/DVDHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB KeyUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #8</td><td>USB KeyHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB FloppyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #9</td><td>USB FloppyHard DiskNVMEUEFI APCD/DVDSDUSB Hard DiskUSB CD/DVDUSB KeyUSB LanNetworkDisabled</td><td>Sets the system boot order</td></tr><tr><td>Boot Option #10</td><td>USB LanHard DiskNVMEUEFI APCD/DVDSDDUSB Hard DiskUSB CD/DVDUSB KeyUSB FloppyNetworkDisabled</td><td>Sets the system boot order</td></tr></table>

6.7 Save & Exit

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Save Changes and Exit</td><td></td><td>Exit system setup after saving the changes.</td></tr><tr><td>Discard Changes and Exit</td><td></td><td>Exit system setup without saving any changes.</td></tr><tr><td>Save Changes and Reset</td><td></td><td>Reset the system after saving the changes.</td></tr><tr><td>Discard Changes and Reset</td><td></td><td>Reset the system without saving any changes.</td></tr><tr><td>Save Changes</td><td></td><td>Save Changes done so far to any of the setup options.</td></tr><tr><td>Discard Changes</td><td></td><td>Discard Changes done so far to any of the setup options.</td></tr><tr><td>Restore Defaults</td><td></td><td>Restore/Load Default values for all the setup options.</td></tr><tr><td>Save as User Defaults</td><td></td><td>Save the changes done so far as User Defaults.</td></tr><tr><td>Restore User Defaults</td><td></td><td>Restore the User Defaults to all the setup options</td></tr><tr><td>Launch EFI Shell from filesystem device</td><td></td><td>Attempts to Launch EFI Shell application (Shell.efi) from one of the available filesystem devices</td></tr></table>

6.8 MEBx

<table><tr><td>Feature</td><td>Option</td><td>Description</td></tr><tr><td>Intel(R) ME Password</td><td></td><td>MEBx Login</td></tr><tr><td>Intel(R) AMT</td><td>DisabledEnable</td><td></td></tr></table>

# Safety Instructions

Read and follow all instructions marked on the product and in the documentation before you operate your system. Retain all safety and operating instructions for future use.

Please read these safety instructions carefully.
• Please keep this User‘s Manual for later reference.
• Read the specifications section of this manual for detailed information on the operating environment of this equipment.
• When installing/mounting or uninstalling/removing equipment, turn off the power and unplug any power cords/cables.
• To avoid electrical shock and/or damage to equipment:

Keep equipment away from water or liquid sources.
Keep equipment away from high heat or high humidity.
 Keep equipment properly ventilated (do not block or cover ventilation openings).
 Make sure to use recommended voltage and power source settings.
 Always install and operate equipment near an easily accessible electrical socket-outlet.
Secure the power cord (do not place any object on/over the power cord).
 Only install/attach and operate equipment on stable surfaces and/or recommended mountings.
 If the equipment will not be used for long periods of time, turn off and unplug the equipment from its power source.

• Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.

# Getting Service

Ask an Expert: https://www.adlinktech.com/en/Askanexpert

# ADLINK Technology, Inc.

Address: No. 66, Huaya 1st Road, Guishan District Taoyuan City 333, Taiwan

Tel: +886-3-216-5088

Fax: +886-3-328-5723

Email: service@adlinktech.com

# Ampro ADLINK Technology, Inc.

Address: 6450 Via Del Oro, San Jose, CA 95119-1208, USA

Tel: +1-408-360-0200

Toll Free: +1-800-966-5200 (USA only)

Fax: +1-408-600-1189

Email: info@adlinktech.com

# ADLINK Technology (China) Co., Ltd.

Address: 300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area Shanghai, 201203 China

Tel: +86-21-5132-8988

Fax: +86-21-5132-3588

Email: market@adlinktech.com

# ADLINK Technology GmbH

Address: Hans-Thoma-Strasse 8-10, D-68163, Mannheim, Germany

Tel: +49-621-43214-0

Fax: +49-621 43214-30

Email: emea@adlinktech.com

Please visit the Contact page at www.adlinktech.com for information on how to contact the ADLINK regional office nearest you.
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