## Slide 1

![The slide header features the 'COM Express Revision 3.1' logo on the left and the 'ADLINK LEADING EDGE COMPUTING' logo on the right. The central red panel displays the text 'AMD EPYC 2005 COM Express Type 7 (Express-FR7) DEF Gate Report v0.8'. Below this, a grey bar contains the date placeholder 'xxxx / xx. xxth 2026'. The bottom left corner includes the text 'ADLINK   Leading Edge' and 'The DEF Gate report template is'.](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-001.jpg)

## Slide 2

![**DISCLAIMER**  Information in this document is confidential and is subject to legal privilege. This document includes ADLINK Technology Inc., ('ADLINK') products. No license is expressed or implied, by estoppel or otherwise, and no intellectual property rights are granted in this document. ADLINK reserves all rights to make changes, at any time, to any of the information, specification, products and product descriptions without notice. Any products, dates, and drawings are preliminary and based on current expectations, and are subject to change without notice. ADLINK accepts no liability for the consequences of any actions taken on the basis of the information provided in this document. ADLINK disclaims any expressed or implied warranty as to the use of the information acquired in this document.  This document shall be viewed by the intended recipient(s) only, and shall not be reproduced, distributed, published, shared or exchanged by or between any other parties without the prior written consent of ADLINK.  All ADLINK Technology, Inc. products are manufactured or assembled at the ADLINK owned and operated facilities in Taiwan, China, Germany and the United States. ADLINK Technology, Inc., is not owned, directed, or subsidized by the People's Republic of China. ADLINK and ADLINK logos are trademarks of ADLINK Technology, Inc., in the US and other countries. All product and company names are trademarked ™ or registered ® trademarks of their respective holders.  ADLINK   Leading Edge Computing  Page 2](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-002.jpg)

## Slide 3

![The slide is titled 'Reviewer Comments' in red text, followed by 'AATI' in large grey letters. Below a dotted red line is a table containing the following fields:  *   **Date:** 2026/0X/XX *   **Reviewer:** XXXXXX *   **Suggestion:** □ Agree □ Disagree □ Neutral *   **Feedback** (followed by a large blank white space)  The footer displays 'ADLINK   Leading Edge Computing' on the left and 'Page 3' on the right.](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-003.jpg)

## Slide 4

![The slide displays a template for feedback with the following text and layout:  **Header:** Reviewer Comments EMEA ....................  **Table Content:** Date: 2026/0X/XX Reviewer: XXXXXX   Suggestion: □ Agree □ Disagree □ Neutral Feedback  **Footer:** ADLINK   Leading Edge Computing (bottom left) Page 4 (bottom right)](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-004.jpg)

## Slide 5

![The slide is a template for 'Reviewer Comments' specifically for 'CHINA (AITC)'.  **Header:** *   **Reviewer Comments** (in red) *   **CHINA (AITC)** (in grey) *   A dotted red line follows.  **Table Content:** *   **Row 1:** 'Date: 2026/0X/XX' *   **Row 2:** Split into two columns:     *   Left: 'Reviewer: XXXXXX'     *   Right: 'Suggestion: □ Agree □ Disagree □ Neutral' *   **Row 3:** 'Feedback' *   Below this row is a large, empty white space intended for text entry.  **Footer:** *   Bottom Left: 'ADLINK   Leading Edge Computing' *   Bottom Right: 'Page 5'](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-005.jpg)

## Slide 6

![Reviewer Comments Japan ............... Date: 2026/0X/XX Reviewer: XXXXXX Suggestion: □ Agree □ Disagree □ Neutral Feedback ADLINK   Leading Edge Computing Page 6](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-006.jpg)

## Slide 7

![The slide contains the following text:  **Reviewer Comments** **ANZ**  **Table Content:** **Date:** 2026/0X/XX **Reviewer:** XXXXXX **Suggestion:** □ Agree □ Disagree □ Neutral **Feedback**  **Footer:** **ADLINK**   Leading Edge Computing **Page 7**](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-007.jpg)

## Slide 8

![The slide contains the following text:  **Reviewer Comments** **TAIWAN**  **Date: 2026/0X/XX** **Reviewer: XXXXXX** **Suggestion: □ Agree □ Disagree □ Neutral** **Feedback**  **ADLINK   Leading Edge Computing** **Page 8**](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-008.jpg)

## Slide 9

![The slide features the header 'Reviewer Comments' in red, followed by 'KOREA' in grey and a red dotted line. Below this is a table structure. The first row contains 'Date: 2026/0X/XX'. The second row is split into two columns: 'Reviewer: XXXXXX' on the left and 'Suggestion: □ Agree □ Disagree □ Neutral' on the right. The third row is labeled 'Feedback'. The rest of the table area is blank. The footer displays 'ADLINK   Leading Edge Computing' on the left and 'Page 9' on the right.](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-009.jpg)

## Slide 10

![This slide features a template for feedback.  **Header:** *   'Reviewer Comments' (in red) *   'INDIA' (in grey) *   A red dotted line  **Table Content:** *   **Row 1:** 'Date: 2026/0X/XX' *   **Row 2:** Divided into two columns:     *   Left: 'Reviewer: XXXXXX'     *   Right: 'Suggestion: □ Agree □ Disagree □ Neutral' *   **Row 3:** 'Feedback' *   **Row 4:** A large blank white space for text entry.  **Footer:** *   Bottom Left: 'ADLINK   Leading Edge Computing' *   Bottom Right: 'Page 10'](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-010.jpg)

## Slide 11

![**Strategy COM product line**  **1. Modularity** CoMs separate the core computing functions (CPU, memory, storage) from the rest of the system, allowing designers to focus on custom features specific to their applications.  **2. Scalability** CoMs are available in various performance levels, allowing for easy upgrades or downgrades without changing the overall system design.  **3. Reduced Time to Market** By using a pre-designed and pre-tested module, developers can significantly reduce the time needed for hardware design, validation, and certification processes. This accelerates product development and brings solutions to market faster.  **4. Flexibility** CoMs can be used across different products and projects, making it easier to develop a product line with varying specifications and features. This flexibility is especially useful in applications like industrial automation, medical devices, and IoT.  **5. Reduced Total Cost of Ownership** By outsourcing the complex part of hardware development to CoM manufacturers, companies can save on development costs and resources. CoMs also benefit from economies of scale, reducing the cost of high-performance embedded computing.  **6. Future-Proofing** CoMs often have long lifecycle support and are designed to be easily replaceable as technology evolves. This future-proofs the embedded system, allowing for easy upgrades or maintenance.  **7. Supply Line security through Standardization** Many CoMs follow industry standards (e.g., Qseven, COM Express), ensuring compatibility and interoperability between different modules and carrier boards. This standardization facilitates easier integration and reduces the risk of vendor lock-in through single source solutions .  **COM-HPC** **COM Express** **SMARC** **Qseven** **ETX** **OSM**  ADLINK   Leading Edge Computing Page 11](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-011.jpg)

## Slide 12

![**Header:** Product Family : COM Express  **Column 1: Compact, Low-Power** Type 10 targets compact, low-power embedded applications where space and energy efficiency are critical. The focus is on delivering sufficient processing power in combination with sufficient GPU power, within a small form factor. Type 10 is the most rugged compared to other form factors such as Q7 and SMARC  **Type 10 Mini**  **Column 2: Versatile Multimedia and General-Purpose** Type 6 is a general-purpose module designed for multimedia-rich and interactive applications. The strategy focuses on balancing processing power, graphics capabilities, and I/O flexibility to serve a wide range of applications, from gaming, transportation, test and measurement, medical to industrial automation.  **Type 6 Compact** **Type 6 Basic**  **Column 3: Edge and Networking Applications** Type 7 is designed for high-performance computing and networking applications that require substantial processing power and advanced I/O capabilities. The focus is on server-grade applications and industrial use cases that need robust, high-bandwidth  **Type 7 Basic**  **Footer:** ADLINK   Leading Edge Computing Page 12](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-012.jpg)

## Slide 13

![**Header:** COM Express In Production Under Design Under Consideration  **Chart Y-Axis Label:** type 7  **Left Column (In Production / 2025 Q1-Q2):** *   **Express-ID7** (Blue box: Basic, type 6   Red Stamp: EXTREME RUGGED)     Intel® Xeon® D Ice Lake-D (D-1700)     Up 128GB ECC DDR4 (4x 32GB)     4x 10G-KR + 1x GbE     16x PCIe Gen4, 16x PCIe Gen3 *   **Express-BD7 / BD74** (Blue box: Basic, type 6   Red Stamp: EXTREME RUGGED)     Intel® Xeon® D Broadwell-DE (D1500)     BD74 : max 128GB ECC DDR4 (4x 32GB)     BD7 : max 64GB ECC DDR4 (2x 32GB)     2x 10G-KR + 1x GbE,     Up to 32x PCIe lanes *   **Express-DN7** (Blue box: Basic, type 6   Red Stamp: EXTREME RUGGED)     Intel® Atom® D Denverton-NS (C3000)     Up 48GB ECC DDR4     4x 10G-KR + 1x GbE,     Up to 2x PCIex8 Gen3  **Middle Column (2025 Q3-Q4):** *   **Express-VR7** (Blue box: Basic, type 6   Red Stamp: EXTREME RUGGED)     AMD® Embedded Ryzen V3000     Up 64GB ECC DDR5 (2x32GB) 2x10G-KR + 2.5xGbE     Up to 14x PCIe Gen4  **Right Column (Under Consideration):** *   **Propos**     **ed**     (Yellow box: type 6) *   **Express-XXXX**     AMD® Embedded EPYC 2005     Up 128GB ECC DDR5     16x PCIe Gen4, 8x PCIe Gen4  **Timeline (Bottom Axis):** In Production 2025 Q1-Q2 2025 Q3-Q4 2026 Q1-Q2 2026 Q3-Q4 2027 Q1-Q2  **Footer:** ADLINK   Leading Edge Computing Confidential Page 13](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-013.jpg)

## Slide 14

![**Product Line Strategy**  *   The **ONLY DDR5** based COMe Type 7 with **max. 16 CPU cores** at **lower TDP**     *   DDR5 SODIMM, 256GB (4x 64GB), ECC     *   8-16 core CPU at 45-75W cTDP     *   PCIe Gen4x16     *   Fit COM Express 125x95mm, not COM-HPC 160x160mm dimension *   **Attack the market congatec occupied** by using old generation AMD EPYC 3000 series     *   Allied Telesis and Illumina used congatec EPYC 3000 COMe module with DDR4 and looking for the upgrade path *   **Cover headless** application based on **COMe Type 6**     *   Upgrade path from Broadwell-DE COMe Type 6     *   Upgrade path from COMe Type 6 headless application  ADLINK   Leading Edge Computing Page 14](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-014.jpg)

## Slide 15

![**Platform Segment Comparison & Upgrade Path**  **Focused 8C - 20C**  **COM Express** **AMD EPYC 3000** *congatec* (orange diagonal text) - 8-16C at 60-100W - DDR4, 96GB - PCIex16 Gen3 - Limited 4x 10G  **COM HPC** **Intel Ice Lake D HCC** - 8-20C at 80-120W - DDR4, 256GB - PCIex16 Gen4 - 8x 10G  **COM Express** (red arrow pointing to this column) **AMD EPYC 2005** - 8-16C at 45-75W (red text for 45-75W) - DDR5, 256GB (red text) - PCIex16 Gen4 (red text) - NO 10G !!  **Focused 10C - 4C**  **COM Express** **Intel Ice Lake D LCC** - 4-10C at 40-70W - DDR4, 128GB - PCIex16 Gen4 - 4x 10G  **COM Express** **Intel Ice Lake D LCC** - 4-10C at 40-70W - DDR4, 128GB - PCIex16 Gen4 - 4x 10G  **COM Express** **AMD Ryzen V3000** - 4-8C at 15-45W - DDR5, 64GB (red text) - PCIex8 Gen4 - 2x 10G  **Timeline/Footer:** - 2017-2019 - 2022-2024 - 202 6 (text is split) - Yea r (text is split) - ADLINK   Leading Edge Computing - Page 15](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-015.jpg)

## Slide 16

![Compatible with COM Express Type 6 Headless Usage  • Express-FR7 is based on COM Express Type 7 pin out  • We have optional design to offer more SATA and USB2.0 signals on specific pins and expect to fit COM Express Type 6 carrier board pin out. If customer’s existing carrier doesn’t need DDI, LVDS, VGA, HDA (headless usage)  • Project basis support. go to PM to get the pin definition  ADLINK   Leading Edge Computing  Page 16](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-016.jpg)

## Slide 17

![**Title:** Competitors  **Table Headers:** Value chain, RD, Supply Chain, Manufacturing, Sales, Channel, Marketing/Business plan, Service, Others (Branding)  **ADLINK Section:** *   **Current:** Good, Medium, Good, Medium, Medium, Good, Good, Strong *   **Strength:** x86, ARM software; Full control inhouse managed; mirrored production sites; AATI, EMEA, Japan; DR, Marubun; visibility high, partner with silicon vendor; Local FAE with AE back-up. CCC.; I-Pi starterkit sales *   **Weakness:** TTM; (Blank); High MOH; China, Korea. EMEA medical coverage; Many that do not match COM or do not add value; don't utilize it effectively; FAE/pre-sales mixed (EMEA, Japan); -  **Advantech Section:** *   **Current:** Medium, Good, Strong, Strong, Medium, Medium, Good, Good *   **Strength:** x86; Inhouse manage; multi-site production; Global coverage; -; -; all area; THE name in IPC *   **Weakness:** ARM, software; -; -; excessive prodcute line; -; -; many product line; fragmented mes sage due to many product line  **congatec Section:** *   **Current:** Good, Weak, Medium, Medium, Medium, Strong, Medium, Good *   **Strength:** aggressive, fast; -; competitive COGS; EMEA; strategically selection; excellent technical marketing; good at EMEA, DACH; focus and focus *   **Weakness:** -; outsourcing manage; outsouce to single location; Japan, China; -; -; other areas; -  **MSC (Avnet) Section:** *   **Current:** Medium, Strong, Medium, Strong, Strong, Medium, Medium, Medium *   **Strength:** -; use Avnet supply system; fast part L/T; Access to Avnet's customer; they are channel; In the Avnet's weekly newsletters; all area; -](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-017.jpg)

## Slide 18

![**Project Charter**  **Product Highlight** *   Basic size COM Express Type 7 module featuring AMD new gen EPYC Embedded 2005 *   128GB DDR5 SO-DIMM, 8-16C at 45-75W and PCIex16 Gen4  **Positioning Statement** *   For OEM customers *   Who needs outsource their core design in order to     *   Go to the market fast (TTM)     *   Lower their Total cost of Ownership (TCO) *   ADLINK's Express-PTL is a basic size COM Express Type 7 module based on latest PICMG COM.0 Rev 3.1 specifications *   That provides an industrial quality core design based on AMD EPYC Embedded 2005 generation coupled with a long production life in excess of 10 years *   Unlike the majority of our competitors that deliver comparable products *   We provide a combination of high quality products with extended software support, first class localized Sales, Support and R&D in all major industrial centers  **Market Information** *   Target application: Edge computing, networking switch/router, storage tester *   Key customers: Illumina, Allied Telesis, ASUS IOT *   Top competitors: congatec, Advantech, Portwell  **Financials/Dates** *   DEF (MPP): Apr '26 *   DEV: May '26 *   MP (C4): Dec '26 (one phase assumed) *   RBU Price: (1000pcs) USD 913 (EPYC 2435, 8C) *   List Price: USD 993 *   COGS: USD 665 *   Mature Forecast: 4000 pcs above / year *   End to End GM%: 33% *   Development Cost: 194K  ADLINK   Leading Edge Computing  Page 18](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-018.jpg)

## Slide 19

![**Slide Title:** Go To Market Plan  **Overlay Text:** 'Product Marketing will update this page later' (Red, diagonal text across the center)  **Left Column:** *   **Position:** 'ADLINK’s Express-PTL incorporates the 3rd Generation Intel Core Ultra (Panther Lake) processor, targeting the mainstream COM Express Type 6 embedded market with power requirements up to 45W. This module serves as a suitable alternative to legacy CPUs, offering unmatched 170 TOPS iGPU + NPU for edge AI centric solutions. It is designed to support a broad spectrum of applications that demand edge AI, highly responsive edge processing, advanced multimedia capabilities, and low-power consumption. The Express-PTL is ideal for next-generation, modularized edge systems and is particularly well-suited for medical devices, industrial automation, test and measurement, gaming, and multimedia applications.' *   **Place:**     *   'Target customers: SIs, ODM and channel partners'     *   'Target applications: industrial automation, medical, test and measurement, multimedia, ' (Text is partially obscured by the blue bar below)  **Right Column:** *   **Promotion:**     *   'Sales enablement and training for ADLINK sales reps and channel partners: sales kit, product videos, banners, case studies, application stories for customer engagement, and further project discussion.'     *   'Express-PTL marketing for demand generation'         *   'Email streams (EDM) and engagement with existing COM Express customers'         *   'Extend customer touchpoint: product landing page, paid media , online advertisements'         *   'Events: Embedded World* (EMEA), HIMSS* (US), Japan IT Week* (JP), Automation Taipei* (TW) and partner solution days'     *   **Target number of MIO:**         *   Table Headers: AATI, APAC, CHINA, EMEA, Tota (newline) l         *   Table Values: 15, 5, 3, 11, 34         *   Note: '*2026'  **Bottom Section (Colored Bars):** *   **Blue Bar:** 'Sales Enablement and Training for sales and channel partners with sales kit, product video, case studies, application stories' *   **Green Bar:** 'Digital Marketing MKT materials, website, EDM, paid media (Google AdWords/LinkedIn Ads), online ads (Electronic Design, Nikkei BP etc.)' *   **Yellow Bar:** 'Virtual/Physical Events Partner solution days, trade show (Embedded World*, HIMSS*, Japan IT Week Spring, Automation Taipei)'  **Timeline/Footers:** *   **Dates:** Q4'25, Q1'26, Q2'26, Q3'26 *   **Annotations:**     *   Q1'26: 'Marketing Start' (Red triangle pointing up)     *   Q2'26: 'NP' (Red triangle pointing up), 'L' (Below triangle) *   **Bottom Left:** 'ADLINK   Leading Edge Computing' *   **Bottom Right:** 'Page 19'](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-019.jpg)

## Slide 20

![Specifications Express-FR7 Processor: AMD® EPYC Embedded 2005 series (Fire Range) • EPYC 2875 16C/32T, 45-75W • EPYC 2655 12C/24T, 45-75W • EPYC 2435 8C/16T, 45-75W Memory • Up to 256 (4x 64) GB DDR5 SO-DIMM non-ECC/IBECC (64GB memory depends on supplier’s readiness) • Two on top, two on bottom PCI Express: 24 lanes Gen4 max. 9 PCIe based devices in total. incl. GbE and PCIe-to-SATA IC • 1 PCIex16 Gen4 (two controller, 1 x16 or 2 x8, PCIe 16-31) • 4 PCIe Gen4 (four controller, 4 x1 or 2 x2 or 1 x4, PCIe 0-3) • 4 PCIe Gen4 (two controller, 1 x4 or 2 x2, PCIe 4-7) Ethernet • 10GbE: not supported • 2.5GbE (compatible with 1000/100MB) • NC-SI: no supported Peripherals • 2x SATA (via PCIe to SATA IC) (max. 4x SATA, build option) • 4x USB 3.x/2.0. (additional 4x USB2.0 via hub, build option) • 1x I2C, 1x SMB, 8x GPIO, 1x GP_SPI (build option, TBC), LPC (via eSPI to LPC bridge) AMI EFI BIOS and Security (TPM 2.0 chip on module) (dual BIOS as build optional) Debug Connector: DB30 x86 access to I2C for POST code, test points, SPI, SMB Voltage Input : AT/ATX: 12V +/- 5% Operation Temperature • Standard 0°C to 60°C  Standard supported Ubuntu yocto PROJECT (TBC ) AMD COM Express® Revision 3.1 AMD EPYC PCI EXPRESS 4 2.5GbE SUPERspeed USB SERIAL ATA  ADLINK   Leading Edge Computing Page 20](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-020.jpg)

## Slide 21

![**Title:** Function Diagram Express-FR7  **Left Column (Grey Background):** *   PCIE Lane 0-3 -) x4, x2, x1 (four controller) *   PCIE Lane 4-5 -) x2 (one controller) *   USB 2.0 Lane 0-3 *   USB 2.0 Lane 4-7 (OEM Only) *   SATA Port 0-1 -) PCIe to 4xSATA *   SATA Port 2-3 (OEM Only) *   Up to 2.5GbE NC SI -) LAN Controller *   TPM, BIOS *   SPI *   GP_SPI (OEM Only) *   SMBus *   I2C -) I2C *   UART 0-1 -) 2x UART *   8x GPIO -) 8x GPIO *   LPC/eSPI -) eSPI (only one CS)  **Center Connections & Bottom Blocks:** *   USB2.0 Hub *   PCIe (associated with SATA/LAN) *   eSPI to LPC Bridge IC *   Embedded Controller *   Thermal sensor (TBC) *   Thermal sensor (board)  **Central Processor Block (Red Background):** *   GEN4 (appears 4 times) *   AMD EPYC Emb 2005 (Fire Range)  **Memory Blocks (Bottom Right):** *   DDR5 SODIMM ECC/non-ECC (repeated 4 times)  **Right Column (Grey Background):** *   PCIE Lane 16-31 -) x16, x8, x4 (four controller) *   PCIE Lane 6-7 -) x2 (one controller) x4 at PCIE Lane 4-7 *   USB 3.x Lane 0-3 (high speed lanes) *   10G_KR 0-4 & sideband signals  **Footer:** *   ADLINK   Leading Edge Computing *   Page 21](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-021.jpg)

## Slide 22

![The slide is titled **'Compatible with COM Express Type 6 Headless Usage'**.  It lists the following points verbatim: *   **'Express-FR7 is based on COM Express Type 7 pin out'** *   **'We have optional design to offer more SATA and USB2.0 signals on specific pins and expect to fit COM Express Type 6 carrier board pin out. If customer's existing carrier doesn't need DDI, LVDS, VGA, HDA (headless usage)'** *   **'Project basis support. go to PM to get the pin definition'**  The footer displays **'ADLINK   Leading Edge Computing'** on the left and **'Page 22'** on the right.](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-022.jpg)

## Slide 23

![**Mechanical & Thermal** ........................................................................  **Thermal Assemblies**    HTS-FR7-B   HTS-FR7-BT   THS-FR7-B   THS-FR7-BT   THSH-FR7-B   THSF-FR7-B     :---   :---   :---   :---   :---   :---     91-   91-   91-   91-   91-   91-     (Image of flat heatsink)   (Image of flat heatsink)   (Image of low profile heatsink)   (Image of low profile heatsink)   (Image of high profile heatsink)   (Image of heatsink with fan)     Heatspreader Bottom mounting   Heatspreader Top mounting   Low profile heatsink Bottom mounting   Low profile heatsink Top mounting   High profile heatsink Bottom mounting   Heatsink with active FAN Bottom mounting    **Thermal Management** Thermal is not just a thermal solution, the thermal management based on EC/BIOS and even OS would be the key, especially for the space-constrained and/or battery powered application. Would expect to get reference design/document from RD for this portion  **User Manual of Standard Thermal Solution** Dedicated for thermal solution and will include the architecture of thermal solution and the measured thermal profile. Customer can design their solution based on the information we give.  ADLINK   Leading Edge Computing Page 23](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-023.jpg)

## Slide 24

![**Title:** Software Offering  **Table Content:** *   **What:** SEMA EC Linux   **When:** Q4 '26   **Where:** github.com/adlink   **Status:** Public *   **What:** EC/BMC firmware flash Utility   **When:** Q3 '26   **Where:** AE Server   **Status:** Private *   **What:** Yocto BSP   **When:** TBC   **Where:** github.com/adlink   **Status:** Public *   **What:** Ubuntu   **When:** Q3 '26   **Where:** Ubuntu website   **Status:** Public *   **What:** DMI Table editor (Windows & Linux)   **When:** Q4 '26   **Where:** github.com/adlink   **Status:** Public *   **What:** BIOS Flash Tool, afulnx (Linux)   **When:** by project basis   **Status:** Private (3 way NDA) *   **What:** BIOS Capsule update (OTA update)   **When:** Q1 '27  **Footer:** ADLINK   Leading Edge Computing Page 24](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-024.jpg)

## Slide 25

![**BOM cost structure reference**  MOQ Currency : USD  **Item**   **Unit Price**   **Q'ty**   **Cost** CPU (EPYC 2435, 8C)   532   1   532 PCB   22   1   22 Power IC Group   30   1   30 Other components   51   1   51 AMI BIOS lable   2   1   2 Packaging   2   1   2 MOH   26   1   26  **COGS**       **665**  **Note:** AMD CPU price is estimated. AMD always give CPU price by project basis. For example, EPYC 2435 CPU price now is USD 532, but, it could be USD 470 around (guess) if there's good project. The cost calculation above is based on USD 532  ADLINK   Leading Edge Computing Page 25](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-025.jpg)

## Slide 26

![**Header:** Standard Temperature : 0°C + 60°C BOM Cost / Pricing Strategy  **Table:** *   **Headers:** Product (0°C to 60°C), COGS (BOM, MOH), BU Margin, RBU Price, RBU Margin, Volume 1K Price, End to End Margin *   **Row 1:** EPYC 2875 16C at 45-75W   913   26   25.0%   1289   8.0%   1401   33.0% *   **Row 2:** EPYC 2655 12C at 45-75W   761   26   25.0%   1081   8.0%   1175   33.0% *   **Row 3:** EPYC 2435 8C at 45-75W   639   26   25.0%   913   8.1%   993   33.0%  **Formulas (Bottom Right):** *   RBU GM% = (Selling price - RBU price) / Selling price *   BU GM% = (RBU price - COGS) / Selling price  **Note:** Note: all prices in US\$, volume calculation for 1K pcs AMD CPU price is estimated. AMD always give CPU price by project basis. For example, EPYC 2435 CPU price now is USD 532, but, it could be USD 470 around (guess) if there's good project. The cost calculation above is based on USD 532  **Footer:** ADLINK   Leading Edge Computing Page 26](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-026.jpg)

## Slide 27

![The slide is titled 'Competitive Price Comparison' with a red dotted line underneath.  It displays a graph with: *   A vertical axis labeled 'Pric' on one line and 'e' on the next. *   A horizontal axis labeled 'Performan' on one line and 'ce' on the next. *   A cluster of circles (yellow center, pink outline) labeled 'MPP Product' in the upper-right quadrant.  Below the graph, the text states: 'Performance wise no difference' 'Price wise difference max 5 US\$'  The footer contains 'ADLINK   Leading Edge Computing' on the left and 'Page 27' on the right.](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-027.jpg)

## Slide 28

![**Header Text:** Provided by sales. No needed for ODM/EMS product Prospect List  **Table Headers:** Customers or Channel Application Potential Quantity Revenu e ers ent Solution  **Table Rows:** *   **Row 1:** Allied Telesis (ANZ)   Network switch   3000+ pcs/year   (Text obscured)   Current solution is congatec’s EPYC 3000 module Old generation and looking for upgrade *   **Row 2:** Illumina (AATI)   DNA sequencing equipment   1000 pcs/year   0.8M   Current solution is congatec’s EPYC 3000 module Need move to DDR5 memory design *   **Row 3:** XXXX (TW)   NAND Probe equipment   10 (Text obscured)   US\$ 0.5M   Current solution is AMD V3000 COMe from competitor Need higher CPU core count solution Two different carrier board, one is Type 6, the other is Type 7 One module for all. The case we are discussing is Type 6. Type 7 quantity will be bigger, 3000pcs/year likely *   **Row 4:** Astronics (AATI)   Media Sen (Text obscured)   600 pcs/year   US\$ 0.4M   Current solution is ADLINK Express-BD7 module Express-BD7 is DDR4 and on EOL procedure *   **Row 5:** Vigem (EMEA)   Copy St (Text obscured) Storage Systems   500 pcs/year   US\$ 0.2M   They are interested in Ice Lake D But, Fire Range will offer better performance/watt/dollar  **Red Stamp Overlay:** Need RBU's help to give more possible  **Footer:** ADLINK   Leading Edge Computing Page 28](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-028.jpg)

## Slide 29

![Based on BU's estimation Forecast  **Table 1: Quantity Forecast (pcs)**   Region/ Quantity   2026 (NPL)   2027   2028   2029   2030   2031   Grand Total (pcs)     :---   :---   :---   :---   :---   :---   :---   :---     US   20   500   1000   2000   2000   2500   8020     EMEA   20   200   500   1200   1800   2000   5720     AP   20   200   1000   1500   2000   2500   7220     China   10   100   300   600   1000   1500   3510     BU Total   70   1000   2800   5300   6800   8500   24470    **Table 2: Value Forecast (M USD)**   Region/ Quantity   2026 (NPL)   2027   2028   2029   2030   2031   Grand Total (M USD)     :---   :---   :---   :---   :---   :---   :---   :---     US   0.02   0.46   0.92   1.83   1.83   2.29   7.35     EMEA   0.02   0.18   0.44   1.05   1.58   1.75   5.02     AP   0.02   0.15   0.77   1.15   1.53   1.91   5.53     China   0.01   0.08   0.25   0.50   0.84   1.26   2.95     BU Total   0.06   0.87   2.37   4.54   5.78   7.22   20.85    * M US\$1  ADLINK   Leading Edge Computing Page 29](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-029.jpg)

## Slide 30

![Development Cost (One Phase Assumed)      R&D Man Months (5070 US\$ / month)   R&D Cost   Research & Layout Design   Sample Materials   Tooling Expense   Total     :---   :---   :---   :---   :---   :---   :---       研發人月數   人事費   研究設計費   樣品材料費   模具費   合計       Estimated or Actual   Estimated or Actual   Estimated or Actual   Estimated or Actual   Estimated or Actual   Estimated or Actual     POC Phase   -   -         -     CON Phase   -   -         -     DEF Phase   0.50   2.5         2.5     DEV Phase & PCQ Phase   25.50   128.8   \$22.00   \$34.50   \$1.00   186.3     FPR Phase   1.00   5.1         5.1     Total   27.00   136.4   \$22.00   \$34.50   \$1.00   193.9    * 1K US\$  Note - For Sample Material: We will additionally buy material for FPR (Q'ty=30pcs) and minor parts (200-300 sets, for after C4 ramp-up) and not counted on table above - Not like Intel, AMD CPU doesn't give free sample for testing. We have to buy 50pcs around for TPDC usage. This is the reason why USD 34.5K sample material fee even although this is just one phase development - AMD Fire Range pair with AST2600 BMC will require additional resource. It will cost additional 2-3 man-month (BIOS and BMC code modification). Not count on table above  ADLINK   Leading Edge Computing Page 30](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-030.jpg)

## Slide 31

![ROI Analysis  NPL Date RD Unit Cost (USD\$) NT/US Rate PD 2026/02/27 5,052.00 31.28 COM  Currency: USD'0  Category Item Development period 1st Year 2nd Year 3rd Year 4th Year 5th Year Subtotal Revenue USA 32,250 322,500 645,000 967,500 1,290,000 1,290,000 4,547,250 Revenue AP 21,240 159,300 265,500 531,000 796,500 796,500 2,570,040 Revenue CHN 14,820 49,400 247,000 395,200 494,000 494,000 1,694,420 Revenue EMEA 25,800 258,000 516,000 774,000 1,032,000 1,032,000 3,637,800 Revenue NRE 0 0 0 0 0 0 0 Revenue Global 94,110 789,200 1,673,500 2,667,700 3,612,500 3,612,500 12,449,510 GM Global R&D Exp =264,471 30,090 255,800 535,500 853,900 1,158,500 1,158,500 3,992,290 RD Expense GDE Direct 211,982 21,198 21,198 0 0 0 254,378 RD Expense GDE Indirect 31,797 3,180 3,180 0 0 0 38,157 RD Expense Research & Layout 18,028 1,803 1,803 0 0 0 21,634 RD Expense Sample Material 33,000 3,300 3,300 0 0 0 39,600 RD Expense Mold & Tooling 1,007 101 101 0 0 0 1,208 BU PM Expense 1,361 0 0 0 0 0 1,361 Net Profit Net Profit -267,085 226,219 505,919 853,900 1,158,500 1,158,500 3,635,952 Acc Net Prof it Acc Net Profit 40,867 465,952  Finance will update this page later  Acc. Net Profit USD -1M 0 1M 2M 3M 4M Development period 1st Year 2nd Year 3rd Year 4th Year 5th Year COMe Panther Lake Page 31](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-031.jpg)

## Slide 32

![**Title:** Financial Comments  **Left Table:** *   **Header:** Index/Score   High   Medium   Low   Score *   **Row 1:** Payback Period   Less than 1 Year   1-3 Years   More than 3 Years   Medium *   **Row 2:** Risk Assessment   Based on the PM's assumptions, the breakeven point will be achieved at 1,203 shipment units. The return demonstrates a medium score for the payback period  **Right Table:** *   **Header:** Product Name: COMe Panther Lake *   **Header:** Currency: USD'0   SUM *   **Row 1:** Revenue   USD   12,449,510 *   **Row 2:** GM%     32.07% *   **Row 3:** Gross Profit   USD   3,992,290 *   **Row 4:** Acc. Net Profit   USD   3,635,952 *   **Row 5:** Payback Period     2 years *   **Row 6:** RD Input (excl. GDE indirect)   USD   264,017  **Overlay Text (Red, Diagonal):** Finance will update this page later  **Footer:** ADLINK   Leading Edge Computing Confidential Page 32](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-032.jpg)

## Slide 33

![The slide is titled 'Project Schedule (One Phase Assumed)' with a red dotted line underneath. It displays a table with two columns, 'Gate' and 'Date,' containing the following rows:  *   **DEF**: Apr. 2026 *   **DEV**: May. 2026 *   **A1 Sample Deliver**: Sep. 2026 *   **Bug Close**: Sep. 2026 *   **NPL**: Sep. 2026 *   **FPR**: Oct. 2026 *   **MP**: Nov-Dec. 2026  To the right of the table, an arrow points from the 'A1 Sample Deliver' row to the text 'Only for focused accounts.' Below the table on the left, the text reads 'Two phase assumed.' The bottom left corner shows 'ADLINK   Leading Edge Computing' and the bottom right corner displays 'Page 33.'](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-033.jpg)

## Slide 34

![The slide is titled **Project Resource Plan (One Phase Assumed)**. Below the title, it states: **Export from GPL on 2025. MAY.** and **Estimated Future Total H/C = 41.41 man month**.  The main body is a data table with the following headers: *   **Function team (RD TEAM)** *   **Row SubTotal (man-month)** *   **Apr-2025**, **May-2025**, **Jun-2025**, **Jul-2025**, **Aug-2025**, **Sep-2025**, **Oct-2025**, **Nov-2025**, **Dec-2025**, **Jan-2026**, **Feb-2026**, **Mar-2026**, **Apr-2026**  The table rows list various teams and their corresponding percentage values for each month: *   **BDQA** (1050%) *   **BDQA-BMC/IPMI** (170%) *   **BIOS** (754%) *   **BMC/EC** (110%) *   **EE-X86** (885%) *   **EMC** (63%) *   **Layout** (70%) *   **ME** (55%) *   **Power** (227%) *   **RRC** (152%) *   **Safety** (0%) *   **SQA - Signal Assura** (80%) *   **SW-Linux BSP x86** (155%) *   **SW-Other BSP** (130%) *   **TSP** (120%) *   **Thermal** (120%)  A large red diagonal stamp reads: **RD will update this page later**.  At the bottom, a note reads: **Note: the man-months estimation is based on leading product concept. The goal should be do the best to make the real man-month and estimated man-month as close as possible, especially for the leading product**.  The footer displays: **ADLINK   Leading Edge Computing** and **Page 34**.](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-034.jpg)

## Slide 35

![**Slide Title:** Key Part List / Critical Part List – power related  **Table Content:** *   **Headers:** ADLINK Part number   Brand   MFR PN   Function   pcs/unit   Lead Time (Day)   Note *   **Row 1:** New part   MPS   MP29011   Power for CPU SOC   1   182 *   **Row 2:** 76-86959-30Z0   MPS   MP86959   Power for CPU SOC DrMOS   7   182 *   **Row 3:** 76-02941-32R0   MPS   MP2941F   Power for CPU VNNAON 0.77V   1   182 *   **Row 4:** 76-02145-30R0   MPS   MP2145   Power for CPU PRIM 1.25V   1   182   Also add 76-62866-30Z0 as substitution *   **Row 5:** 76-02145-30R0   MPS   MP2145   Power for CPU 1.8V   1   182   Also add 76-62866-30Z0 as substitution *   **Row 6:** 76-NB693-30R0   MPS   NB693   Power for CPU VDD2 1.1V   1   182 *   **Row 7:** 76-NB693-30R0   MPS   NB693(5A)   Power for DDR5 memory   1   182 *   **Row 8:** 76-NB693-30R0   MPS   NB693(5A)   Power for System 3.3V   1   182 *   **Row 9:** 76-61178-30Z0   TI   TPS61178   Power for system architecture   1   126 *   **Row 10:** 76-02330-30Z0   MPS   MP2330C   Power for EC   1   182 *   **Row 11:** 76-61378-30Z0   TI   TPS61378   Power for Module FAN   1   98 *   **Row 12:** 76-82823-30Z0   MPS   TPSM82823A   Power for 1.25V SATA   1   126   Also add 76-76003-30Z0 as substitution *   **Row 13:** 76-82823-30Z0   TI   TPSM82823A   Power for 1.2V HUB   1   126   Also add 76-76003-30Z0 as substitution *   **Row 14:** 76-22997-30Z0   TI   TPS22997   Load switch for 1V8/5V_A/3V_A   3   98  **Overlay Text:** PM will update this page later  **Footer:** ADLINK   Leading Edge Computing (Bottom Left)   Page 35 (Bottom Right)](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-035.jpg)

## Slide 36

![**Title:** Key Part List / Critical Part List – not power related  **Table Content:**    ADLINK Part number   Brand   MFR PN   Function   pcs/unit   Lead Time (Day)   Note     :---   :---   :---   :---   :---   :---   :---     New part   Intel   Panther Lake H CPU   Panther Lake H CPU   1         62-130B2-2620   Lotes   ADR51010-P003A   DDR5 SODIMM   1   56   Will add multiple source as back-up     62-130B3-2620   Lotes   ADR51012-P003A   DDR5 SODIMM   1   56   Will add multiple source as back-up     71-03460-02Z0   NXP   PTN3460IBS/F2MP   eDP-to-LVDS_PT N3460I   1   168       71-07517-01Z0   chrontel   CH7517A-BF   DP-to-VGA CH7517A (Optional)   1   180       71-00226-00Z0   Intel   KT1226IT SRKTX   LAN   1   60       71-05121-02Z0   ITE   IT5121VG-I-128/CX   EC   1   126       71-01200-00Z0   MICROCHIP   ECE1200-I/LD   eSPI-to-LPC_ECE1200   1   140       74-09672-56Z0   INFINEON   SLB 9672XU2.0   TPM   1   280       71-01164-00Z0   Asmedia   ASM1164   PCIe to SATA bridge - ASM1164   1   128       72-43256-05U0   Phison   ESE3D043-2560PYI   nVME SSD gen4 (Optional)   1   180       71-03590-00Z0   GENESYS   GL3590T-TBYS2   USB 3.2 Gen2 Hub (Optional)   1   140       61-61600-2110   Ept   402-51101-51   ROW AB / CD CN   2   84      **Overlay Text:** PM will update this page later  **Footer:** ADLINK   Leading Edge Computing   Page 36](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-036.jpg)

## Slide 37

![Risk Management – Technical  **Intel doesn’t test PCIe-to-SATA IC** - Intel has no PCIe-to-SATA IC AVL list. Will push it, but, so far, their validation plan is still unknow - In worser case that IC can’t work as expected, we still have optional NVMe SSD on module as back-up. customer may not need change their carrier board  **There’s no cost effective PCIe-to-SATA IC industrial grade part** - Marvell has industrial grade part, but it cost USD 62. this is not good solution for COM Express business - Both of ASMEDIA and JMICRON only have commercial temp grade part at this moment - A PCB respin maybe required in the future if the supplier come out a part with commercial grade and industrial grade option  **H12Xe SKU POR with DDR5 SO-DIMM Architecture** - At con-call meeting, Intel said H12Xe can work with DDR5 SODIMM and Intel will update the information on the design file. And we are still pushing Intel to give the correct file  PM will update this page later  ADLINK   Leading Edge Computing Page 37](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-037.jpg)

## Slide 38

![**Risk Management – Business**  Shall create Compact size module as second wave  **In General**  Congatec as main competitor at EMEA area. congatex's design is based on compact size module. Smaller form-factor offered by congatex will make us in bad situation, especially for space constrained applications, especially for the carrier board only design for compact size  **Specific for Rugged Application**  Compact size with LPDDR memory did create opportunities, for example B&R, SAAB, Torma and so on. They did verified our solutions. However, these customers will not just looking for now, the will also looking for the future. Without a continuous roadmap may cause un-certain influence on on-going projects  **(Red Stamp Text)** PM will update this page later  **(Table)** Target Accounts/opportunities qty/year   Estimated Three Years Revenue (\$US)   Key Technical Requirement Scotty   200   200,000   t2Express-PTL-i7-CC GEHC   6000   4,500,000   cExpress-PTL-125H level CPU/S16G SAAB   4000   1,808,000   Solder down memory, wide temp Compact Tomra   10000   4,520,000   Wide temp Compact Icomera   5000   2,400,000   Solder down memory, wide temp, compact UXV   8000   3,840,000   Solder down memory, wide temp, compact Mildef   1000   480,000   Solder down memory, wide temp, compact Vector Informatik   3000   3,750,000   cExpress-PTL, wide temp Total     21,498,000  ADLINK   Leading Edge Computing Page 38](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-038.jpg)

## Slide 39

![New Product Information  Project Name on GPL: Express-FR7 (product name might change)  Development Type V Own Development Development Outsourcing Development and Manufacturing Outsourcing Others:  NPI (Sample run) V TPMC SHMC Others:  Mass production factory V TPMC V SHMC Others:  Medical Device (ISO13485) Yes Risk Management Report(DFMEA) is provided. V No  Automotive Product (IATF16949 ,ISO26262) ISO 26262 (Automotive Functional Safety) IATF16949 (Automotive Device) V No  Ex-proof product(Ex) EN ISO/IEC 80079-34 Yes V No  ADLINK   Leading Edge Computing Page 39](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-039.jpg)

## Slide 40

![**Board List of P/N Application**    Product list. New   Part Name     :---   :---     Final Product Name   Express-FR7-xxxx/xxxxx     Main Board   Express-FR7-xxxx/xxxxx     I/O Board       Daughter Board       Terminal Board       Backplane       RTM       Derivative product   Express-FR7-xxxx/xxxx(br)xxxx-Express-FR7-xxxx/xxxx    **Note:** - The product name might be changed. Will lock it down before DEV gate (end of May 2026) - Develop kit will be created around MP stage. It can be sell through traditional RBU way or through I-Pi online . Part number based on the combination of module, memory, NVMe SSD, thermal solution, even the optional feature, user specific solutions will be applied depends on market feedback  ADLINK   Leading Edge Computing Page 40](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-040.jpg)

## Slide 41

![The slide displays a large red rectangle containing the text 'Thank you.' in white at the top left. Below this is a repeating geometric pattern of white triangles.  In the bottom left corner, the following text appears in white: 'ADLINK Technology Inc. 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan'  Next to the address are contact details: 'Tel: +886-2-8226-5877 Fax: +886-2-8226-5717'  To the right of the contact info are four social media icons followed by the URL 'www.adlinktech.com'.  At the very bottom of the slide, outside the red box, is the text 'ADLINK   Leading Edge Computing' on the left and 'Page 41' on the right.](.amd-epyc-embedded-2005-based-com-express-type-7-mpp-def-gate-report-v0-8-20260309/slide-041.jpg)

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